Bob Wilson
c4a6a42c20
Tidy.
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llvm-svn: 106383
2010-06-19 05:33:57 +00:00
Bob Wilson
059880161b
Remove a fixme comment that is no longer relevant.
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llvm-svn: 106382
2010-06-19 05:32:41 +00:00
Bob Wilson
44afe2065d
Fix error message to match function name.
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llvm-svn: 106381
2010-06-19 05:32:09 +00:00
Bruno Cardoso Lopes
0403eaadce
Refactoring of regular logical packed instructions to prepare for AVX ones.
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llvm-svn: 106375
2010-06-19 04:09:22 +00:00
Bruno Cardoso Lopes
c41dfa7cad
Refactor aliased packed logical instructions, also add
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AVX AND,OR,XOR,NAND{P}{S,D}{rr,rm} instructions.
llvm-svn: 106374
2010-06-19 02:44:01 +00:00
Evan Cheng
142feca0de
Ignore dbg_value's.
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llvm-svn: 106373
2010-06-19 02:36:21 +00:00
Bruno Cardoso Lopes
4e76c6a522
Move new sse 1 & 2 generic classes to a more appropriate place
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llvm-svn: 106372
2010-06-19 01:32:46 +00:00
Bruno Cardoso Lopes
962d79ed72
Remove unnecessary arguments
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llvm-svn: 106371
2010-06-19 01:22:34 +00:00
Bruno Cardoso Lopes
2ca4dde535
Add AVX packed intrinsics for MIN, MAX
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llvm-svn: 106370
2010-06-19 01:17:05 +00:00
Evan Cheng
f40b8f0e32
Disable sibcall optimization for Thumb1 for now since Thumb1RegisterInfo::emitEpilogue is not expecting them.
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llvm-svn: 106368
2010-06-19 01:01:32 +00:00
Eric Christopher
b6dfc01862
Finish ripping isTwoAddress out of X86. Some mindless formatting
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and operand renaming to help.
The giant turn the constraints on and selectively turn it off
should probably be inverted at some point since it's just largely
50/50.
llvm-svn: 106367
2010-06-19 00:37:40 +00:00
Bruno Cardoso Lopes
d6d12f37c6
Shrink down code and add for free AVX {MIN,MAX}P{S,D}{rm,rr} instructions
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llvm-svn: 106366
2010-06-19 00:37:31 +00:00
Chris Lattner
def4def8f9
rip out dead code.
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llvm-svn: 106365
2010-06-19 00:34:14 +00:00
Chris Lattner
ed5a217085
fix rdar://7873482 by teaching the instruction encoder to emit
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segment prefixes. Daniel wrote most of this patch.
llvm-svn: 106364
2010-06-19 00:34:00 +00:00
Evan Cheng
604fd85b52
Indentation and remove dead code.
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llvm-svn: 106362
2010-06-19 00:11:54 +00:00
Bruno Cardoso Lopes
018fd49970
Clean up: remove now unnecessary Constraints
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llvm-svn: 106361
2010-06-19 00:09:27 +00:00
Dan Gohman
8f0bc55ea5
Silence compiler warnings.
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llvm-svn: 106360
2010-06-19 00:02:06 +00:00
Bruno Cardoso Lopes
c016e11c53
more refactoring! yay! big win over the intrinsics
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llvm-svn: 106359
2010-06-19 00:00:22 +00:00
Eric Christopher
e0cc8e131e
Remove isTwoAddress from here too.
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llvm-svn: 106358
2010-06-18 23:56:07 +00:00
Bruno Cardoso Lopes
5af812b35b
Fix typo, SSE1 should be used by XS, not SSE2
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llvm-svn: 106357
2010-06-18 23:53:27 +00:00
Eric Christopher
10fa91df80
Remove isTwoAddress from 64-bit files.
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llvm-svn: 106356
2010-06-18 23:51:21 +00:00
Evan Cheng
e9ba3241a3
Move ARM if-conversion before post-ra scheduling.
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llvm-svn: 106355
2010-06-18 23:32:07 +00:00
Dan Gohman
823dff64cd
Teach regular and fast isel to set dead flags on unused implicit defs
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on calls and similar instructions.
llvm-svn: 106353
2010-06-18 23:28:01 +00:00
Bruno Cardoso Lopes
ec4b18a1cf
Apply some refactor to packed instructions
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llvm-svn: 106349
2010-06-18 23:13:35 +00:00
Evan Cheng
5e2c36c202
Update cmake list.
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llvm-svn: 106348
2010-06-18 23:12:10 +00:00
Evan Cheng
f776ed836b
Thumb2 hazard recognizer.
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llvm-svn: 106347
2010-06-18 23:11:35 +00:00
Jakob Stoklund Olesen
7150b84292
Only run CoalesceExtSubRegs when we can expect LiveIntervalAnalysis to clean up
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the inserted INSERT_SUBREGs after us.
llvm-svn: 106345
2010-06-18 23:10:20 +00:00
Evan Cheng
b5fadc47e0
Allow ARM if-converter to be run after post allocation scheduling.
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- This fixed a number of bugs in if-converter, tail merging, and post-allocation
scheduler. If-converter now runs branch folding / tail merging first to
maximize if-conversion opportunities.
- Also changed the t2IT instruction slightly. It now defines the ITSTATE
register which is read by instructions in the IT block.
- Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't
change the instruction ordering in the IT block (since IT mask has been
finalized). It also ensures no other instructions can be scheduled between
instructions in the IT block.
This is not yet enabled.
llvm-svn: 106344
2010-06-18 23:09:54 +00:00
Jim Grosbach
b8c94667a8
back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set)
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llvm-svn: 106342
2010-06-18 23:03:10 +00:00
Eric Christopher
b04dbfd059
Another typo.
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llvm-svn: 106340
2010-06-18 22:51:25 +00:00
Jim Grosbach
c599143b45
Enable Expand handling of atomics for subtargets that can't do them inline.
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llvm-svn: 106336
2010-06-18 22:35:32 +00:00
Eric Christopher
9f949b1c6a
Fix typo.
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llvm-svn: 106335
2010-06-18 22:33:17 +00:00
Jakob Stoklund Olesen
3f0825f966
TwoAddressInstructionPass::CoalesceExtSubRegs can insert INSERT_SUBREG
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instructions, but it doesn't really understand live ranges, so the first
INSERT_SUBREG uses an implicitly defined register.
Fix it in LiveVariableAnalysis by adding the <undef> flag.
llvm-svn: 106333
2010-06-18 22:29:44 +00:00
Evan Cheng
aa0ff1ae01
Fix an inverted condition.
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llvm-svn: 106330
2010-06-18 22:17:13 +00:00
Bruno Cardoso Lopes
55fbcf678c
Use the new 'defm' class inheritance in SSE
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llvm-svn: 106327
2010-06-18 22:10:11 +00:00
Evan Cheng
9a97e1e7f7
Fix cross initialization compilation error.
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llvm-svn: 106324
2010-06-18 22:01:37 +00:00
Evan Cheng
b60ce2d7b4
Teach iff-converter to properly count # of dups. It was not skipping over dbg_value's which resulted in non-duplicated instructions being deleted. rdar://8104384.
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llvm-svn: 106323
2010-06-18 21:52:57 +00:00
Jim Grosbach
91aae1c534
Add Expand-to-libcall support for additional atomics. This covers the usual
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entries used by llvm-gcc. *_[U]MIN and such can be added later if needed.
This enables the front ends to simplify handling of the atomic intrinsics by
removing the target-specific decision about which targets can handle the
intrinsics.
llvm-svn: 106321
2010-06-18 21:43:38 +00:00
Bob Wilson
e77d313369
Rewrite chained if's as switches and replace assertions with llvm_unreachable
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(as suggested in radar 8104405).
llvm-svn: 106318
2010-06-18 21:32:42 +00:00
Dale Johannesen
3f9da2755d
Fix ARM/Thumb reversal in previous attempt.
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llvm-svn: 106314
2010-06-18 21:07:47 +00:00
Jakob Stoklund Olesen
a1d49fabaf
When using ADDri to get the address of a stack object, 255 is a conservative
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limit on the offset that can be materialized without using the register
scavenger.
llvm-svn: 106312
2010-06-18 20:59:25 +00:00
Dan Gohman
f85a514a9f
Make this comment less specific.
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llvm-svn: 106311
2010-06-18 20:45:41 +00:00
Dan Gohman
758ba8093d
Fix X86FastISel's address-mode folding to stay within the
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original basic block. This avoids trouble with examining
instructions in other basic blocks which haven't been
assigned registers yet.
llvm-svn: 106310
2010-06-18 20:44:47 +00:00
Dale Johannesen
81914dea4e
An attempt to fix the problem Anton reported with
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ARM tail calls. Don't know if it works, but it
doesn't break Darwin.
llvm-svn: 106309
2010-06-18 20:44:28 +00:00
Dan Gohman
b5ec637e57
Revert r106304 (105548 and friends), which are the SCEVComplexityCompare
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optimizations. There is still some nondeterminism remaining.
llvm-svn: 106306
2010-06-18 19:54:20 +00:00
Bruno Cardoso Lopes
71ad64af39
Teach tablegen how to inherit from classes in 'defm' definitions.
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The rule is simple: only inherit from a class list if they come
in the end, after the last multiclass.
llvm-svn: 106305
2010-06-18 19:53:41 +00:00
Dan Gohman
527b570925
Reapply 105540, 105542, and 105548, and revert r105732.
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llvm-svn: 106304
2010-06-18 19:26:04 +00:00
Rafael Espindola
d7bfa3a0f7
Add a pass-through option to the plugin. The use case for this option is to
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ask the linker to take another look into some library or object. The case when
one might want to do this is when codegen introduces a new undefined reference.
The canonical example is libgcc.
llvm-svn: 106303
2010-06-18 19:18:58 +00:00
Dan Gohman
75f6f94c48
Reapply 105546.
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llvm-svn: 106302
2010-06-18 19:12:32 +00:00
Dan Gohman
ab895769a7
Reapply 105544.
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llvm-svn: 106301
2010-06-18 19:09:27 +00:00