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Commit Graph

4606 Commits

Author SHA1 Message Date
Duraid Madina
069b517767 fix boolean XOR (which fixes up comparisons..)
llvm-svn: 25462
2006-01-19 15:18:56 +00:00
Duraid Madina
4b75614c9c BOOM!
llvm-svn: 25460
2006-01-19 14:14:11 +00:00
Duraid Madina
08771721f9 click click
llvm-svn: 25459
2006-01-19 14:13:11 +00:00
Evan Cheng
680a8e070b Avoid generating a redundant setcc.
llvm-svn: 25457
2006-01-19 08:52:46 +00:00
Duraid Madina
1946b2ff30 fix calls that return f32
llvm-svn: 25455
2006-01-19 08:31:51 +00:00
Chris Lattner
b15de45374 implement support for f32 arguments past the first 6 words
llvm-svn: 25450
2006-01-19 07:22:29 +00:00
Evan Cheng
cfe9d47379 adc and sbb need an incoming flag to ensure it reads the carry flag
from add / sub.

llvm-svn: 25444
2006-01-19 06:53:20 +00:00
Chris Lattner
60bc56e930 add a note
llvm-svn: 25439
2006-01-19 02:09:38 +00:00
Evan Cheng
be2cf5f948 Two peepholes:
(or (x >> c) | (y << (32 - c))) ==> (shrd x, y, c)
(or (x << c) | (y >> (32 - c))) ==> (shld x, y, c)

llvm-svn: 25438
2006-01-19 01:56:29 +00:00
Evan Cheng
ddb170b73e Didn't mean to check that in.
llvm-svn: 25436
2006-01-19 01:52:56 +00:00
Evan Cheng
aebece2f7b A obvious typo
llvm-svn: 25435
2006-01-19 01:46:14 +00:00
Chris Lattner
23da2dc2ac Don't assert on 'select_cc SETUO'
llvm-svn: 25423
2006-01-18 19:42:35 +00:00
Chris Lattner
00a483f966 fix out of date comment
llvm-svn: 25422
2006-01-18 19:37:44 +00:00
Chris Lattner
b0d3080ca8 Fix Regression/CodeGen/PowerPC/2006-01-18-InvalidBranchOpcodeAssert.ll
llvm-svn: 25421
2006-01-18 19:35:21 +00:00
Jim Laskey
6b25a4e659 Added minimum Dwarf aranges. Cleaned up some section headers. Line number
support now works in gdb.

llvm-svn: 25417
2006-01-18 16:54:26 +00:00
Evan Cheng
92c122b26f SRA shift amount must be in i8
llvm-svn: 25416
2006-01-18 09:26:46 +00:00
Evan Cheng
4d841aaa98 If a call return type is i1, insert a truncate from X86::AL to i1.
llvm-svn: 25415
2006-01-18 08:08:38 +00:00
Evan Cheng
208f5076a0 Fix lowering of calls which return f32 values.
llvm-svn: 25413
2006-01-17 21:58:21 +00:00
Jim Laskey
52d9832e70 Add frame work for additional dwarf sections. Comments will improve as code
is added.

llvm-svn: 25410
2006-01-17 20:41:40 +00:00
Jim Laskey
0c4202b0ba Adding basic support for Dwarf line number debug information.
I promise to keep future commits smaller.

llvm-svn: 25396
2006-01-17 17:31:53 +00:00
Evan Cheng
1e112de44a Zero extending load from i1 to i8.
llvm-svn: 25391
2006-01-17 07:02:46 +00:00
Duraid Madina
c667c360e3 oops, this shouldn't have gotten in
llvm-svn: 25388
2006-01-17 03:09:48 +00:00
Evan Cheng
759a96e1a3 SSE does not support i64 SINT_TO_FP (FP stack doesn't either, but we custom
expand it), so ask legalizer to expand i32 UINT_TO_FP.

llvm-svn: 25386
2006-01-17 02:32:49 +00:00
Duraid Madina
365cb4f82d use proper (82-bit) spills/fills when spilling FP regs, so that
divides don't get broken. this fixes obsequi, smg2000, and probably
a bunch of other stuff (tm)

llvm-svn: 25385
2006-01-17 02:04:52 +00:00
Duraid Madina
f9cc57d93b fixing divides
llvm-svn: 25383
2006-01-17 01:19:49 +00:00
Evan Cheng
53520a8cee Added a FIXME comment about why FST is currently flagged to fpGETRESULT.
llvm-svn: 25381
2006-01-17 00:37:42 +00:00
Evan Cheng
3ce28c990a Bug fixes: fpGETRESULT should produces a flag result and X86ISD::FST should
read a flag.

llvm-svn: 25378
2006-01-17 00:19:47 +00:00
Evan Cheng
e678b39014 More typo's
llvm-svn: 25375
2006-01-16 23:26:53 +00:00
Evan Cheng
f7c719fe10 Some typo's
llvm-svn: 25374
2006-01-16 22:48:46 +00:00
Andrew Lenharth
b2671cf884 fix short immediate loads
llvm-svn: 25371
2006-01-16 21:41:39 +00:00
Andrew Lenharth
87cf023175 stack and rpcc
llvm-svn: 25369
2006-01-16 21:22:38 +00:00
Evan Cheng
de33ca2831 Fix FP_TO_INT**_IN_MEM lowering.
llvm-svn: 25368
2006-01-16 21:21:29 +00:00
Andrew Lenharth
0f185bc2ee Friendly names
llvm-svn: 25364
2006-01-16 19:53:25 +00:00
Chris Lattner
88572bb5c4 add notes from my *other* email acct.
llvm-svn: 25362
2006-01-16 17:58:54 +00:00
Chris Lattner
62ab456f6b transfer some notes from my email to somewhere useful.
llvm-svn: 25361
2006-01-16 17:53:00 +00:00
Duraid Madina
d359468147 fixing divides: FP should now be 100%, and integers are fine too
unless you try to div/mod 0 by anything, in which case you will
get some cute number, and not 0, which is bad.

llvm-svn: 25358
2006-01-16 14:33:04 +00:00
Duraid Madina
12da32f440 fix division! again!! pattern isel, prepare to die.
llvm-svn: 25353
2006-01-16 06:33:38 +00:00
Chris Lattner
1a1c43d70c Silly Sparc is big endian. If we have to load args out of incoming stack slots
that are smaller than an int, make sure to adjust the frame pointer to take
this into consideration.

llvm-svn: 25351
2006-01-16 01:40:00 +00:00
Chris Lattner
f71df454df Make sure that bool,byte and short arguments are the right type when loaded
from memory.

llvm-svn: 25346
2006-01-15 22:22:01 +00:00
Chris Lattner
9ab5b7adad Disable a broken optimization
llvm-svn: 25340
2006-01-15 19:15:46 +00:00
Evan Cheng
fe83dd85c8 Added patterns for 8-bit multiply
llvm-svn: 25338
2006-01-15 10:05:20 +00:00
Duraid Madina
eb89d7a5d1 explain that r12 is the stack pointer reg
llvm-svn: 25336
2006-01-15 09:45:23 +00:00
Chris Lattner
a91c75e676 Don't print a label for the first MBB in a function.
Compile this:

%_2E_str_8 = external global [75 x sbyte]
implementation   ; Functions:
declare int %printf(sbyte*, ...)
void %test()
        %tmp.101 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([75 x sbyte]* %_2E_str_8, int 0, int 0) )             ; <int> [#uses=0]
        unreachable
}

to this:

main_endif_2E_8:
        save -96, %o6, %o6
        sethi %hi(_2E_str_8), %l0
        add %l0, %lo(_2E_str_8), %o0
        call printf
        nop

instead of this:

main_endif_2E_8:
        save -96, %o6, %o6
        sethi %hi(_2E_str_8), %l0
        or %g0, %lo(_2E_str_8), %l1   ;; extra instruction
        add %l1, %l0, %o0
        call printf
        nop

llvm-svn: 25335
2006-01-15 09:26:27 +00:00
Chris Lattner
4d2c4cb7a7 Use the default impl of DYNAMIC_STACKALLOC, allowing us to delete some code.
llvm-svn: 25334
2006-01-15 09:02:48 +00:00
Chris Lattner
20f25dc8c2 Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.
llvm-svn: 25333
2006-01-15 09:00:21 +00:00
Chris Lattner
ada619f3b6 Have legalize take care of DYNAMIC_STACKALLOC for us, implement llvm.stacksave/stackrestore.
llvm-svn: 25332
2006-01-15 08:55:25 +00:00
Chris Lattner
d8711c673d Implement DYNAMIC_STACKALLOC for V8
llvm-svn: 25330
2006-01-15 08:43:57 +00:00
Chris Lattner
241b08f64d reorder passes
llvm-svn: 25326
2006-01-15 07:19:53 +00:00
Chris Lattner
be7efab5dc Cleanup IA64ISD, tell the graph drawer what the symbolic names for the enums are.
llvm-svn: 25324
2006-01-14 22:27:21 +00:00
Chris Lattner
95882698e5 silence a warning
llvm-svn: 25322
2006-01-14 20:11:13 +00:00
Nate Begeman
85b2dc0c4e bswap implementation
llvm-svn: 25312
2006-01-14 03:14:10 +00:00
Nate Begeman
10813e4f97 Remove some redundant stuff out of the readme.
llvm-svn: 25308
2006-01-14 01:24:22 +00:00
Evan Cheng
d92410b194 A typo.
llvm-svn: 25307
2006-01-14 01:18:49 +00:00
Chris Lattner
bf03ecb920 Implement a new InvalidateStructLayoutInfo method and add some comments
llvm-svn: 25304
2006-01-14 00:07:34 +00:00
Evan Cheng
4d9bab5789 Add truncstore i1 patterns.
llvm-svn: 25296
2006-01-13 21:45:19 +00:00
Chris Lattner
b839f31954 Fix a bug in my last X86 checkin, pointed out by cozmic
llvm-svn: 25293
2006-01-13 20:19:44 +00:00
Evan Cheng
a26ed7b9b2 LHS = X86ISD::CMOVcc LHS, RHS means LHS = RHS if cc. So the operands must be
flipped around.

llvm-svn: 25290
2006-01-13 19:51:46 +00:00
Andrew Lenharth
e591830a97 make DAG isel the default
llvm-svn: 25282
2006-01-13 18:49:47 +00:00
Chris Lattner
344642961e Enable X86 support for savestack/restorestack
llvm-svn: 25278
2006-01-13 18:00:54 +00:00
Chris Lattner
c615ed65ac implement stacksave/stackrestore on PPC
llvm-svn: 25277
2006-01-13 17:52:03 +00:00
Duraid Madina
e8b42dc96d don't be a doofus - this fixes storing bools
llvm-svn: 25274
2006-01-13 10:28:25 +00:00
Chris Lattner
80fed2d66e expand unsupported stacksave/stackrestore nodes
llvm-svn: 25272
2006-01-13 02:42:53 +00:00
Chris Lattner
ea59d9a498 new nodes
llvm-svn: 25271
2006-01-13 02:40:58 +00:00
Evan Cheng
e43fbe0d93 Minor update.
llvm-svn: 25263
2006-01-13 01:20:42 +00:00
Evan Cheng
bed984a1c8 More typo's. I need new eye glasses...
llvm-svn: 25261
2006-01-13 01:17:24 +00:00
Evan Cheng
ae2915ac91 Oops. Typo.
llvm-svn: 25260
2006-01-13 01:06:49 +00:00
Evan Cheng
3f2ae15472 Fix a SETCC / BRCOND folding bug.
llvm-svn: 25259
2006-01-13 01:03:02 +00:00
Evan Cheng
794a7cf6fe Fix sint_to_fp (fild*) support.
llvm-svn: 25257
2006-01-12 22:54:21 +00:00
Evan Cheng
169206c67f Specify transformation from GlobalAddress to TargetGlobalAddress and
ExternalSymbol to TargetExternalSymbol.

llvm-svn: 25253
2006-01-12 19:36:31 +00:00
Chris Lattner
1f1d6eb6a9 Fix branches on FP compares
llvm-svn: 25249
2006-01-12 17:05:32 +00:00
Evan Cheng
978f5581c4 X86ISD::SETCC (e.g. SETEr) produces a flag (so multiple SETCC can be
linked together).

llvm-svn: 25247
2006-01-12 08:27:59 +00:00
Evan Cheng
dd45d29b56 * Materialize GlobalAddress and ExternalSym with MOV32ri rather than
LEA32r.
* Do not lower GlobalAddress to TargetGlobalAddress. Let isel does it.

llvm-svn: 25246
2006-01-12 07:56:47 +00:00
Chris Lattner
03fcd99728 fix a bug in my previous checkin
llvm-svn: 25244
2006-01-12 07:38:04 +00:00
Chris Lattner
07bdb6319b Give V8ISD nodes symbolic names in dumps
llvm-svn: 25243
2006-01-12 07:31:15 +00:00
Duraid Madina
f6131d02a9 sabre's (correct) fix means these guys need to be flagged as well (else
the scheduler will complain)

llvm-svn: 25241
2006-01-12 03:28:40 +00:00
Chris Lattner
29e1825fd3 ahem :)
llvm-svn: 25239
2006-01-12 02:05:36 +00:00
Chris Lattner
452a84e2b6 these cases are autogenerated
llvm-svn: 25238
2006-01-12 02:01:45 +00:00
Chris Lattner
861897037b remove dead code
llvm-svn: 25237
2006-01-12 01:54:15 +00:00
Chris Lattner
e88b032f85 Goodbye PPC pattern isel. You have served us well, but it is now time for
you to ride off into the sunset.

llvm-svn: 25236
2006-01-12 01:46:07 +00:00
Chris Lattner
2514d94ca3 Fix an itanium call lowering bug for duraid
llvm-svn: 25235
2006-01-12 01:33:08 +00:00
Chris Lattner
7592fe2d86 invert the sense of this switch and its name
llvm-svn: 25234
2006-01-12 01:28:56 +00:00
Nate Begeman
2b45fdffcb Missed a spot.
llvm-svn: 25233
2006-01-11 23:20:28 +00:00
Evan Cheng
5841005bdf Added ROTL and ROTR.
llvm-svn: 25232
2006-01-11 23:20:05 +00:00
Chris Lattner
c8527856c1 Fix an off-by-one error that Nate's eagle eyes caught
llvm-svn: 25231
2006-01-11 23:16:29 +00:00
Chris Lattner
5633c9bccf Use the auto-insert BuildMI constructor to avoid an explicit insert. No
functionality change, just code cleanup.

llvm-svn: 25230
2006-01-11 23:07:57 +00:00
Chris Lattner
2c8238e494 If a function has a non-zero sized frame, use an add to adjust the stack
pointer in the epilog, not a load.

llvm-svn: 25229
2006-01-11 23:03:54 +00:00
Evan Cheng
66540aa32c Support for MEMCPY and MEMSET.
llvm-svn: 25226
2006-01-11 22:15:48 +00:00
Evan Cheng
3c3391632d Select DYNAMIC_STACKALLOC
llvm-svn: 25225
2006-01-11 22:15:18 +00:00
Nate Begeman
cff96008ac Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
2006-01-11 21:21:00 +00:00
Chris Lattner
5a59c88c17 Fix calls that need to store values in stack slots, to not copy the stack
pointer.  This allows us to emit stuff like this:

        li r10, 0
        stw r10, 56(r1)
        or r3, r10, r10
        or r4, r10, r10
        or r5, r10, r10
        or r6, r10, r10
        or r7, r10, r10
        or r8, r10, r10
        or r9, r10, r10
        bl L_bar$stub

instead of this:

        or r2, r1, r1     ;; Extraneous copy.
        li r10, 0
        stw r10, 56(r2)
        or r3, r10, r10
        or r4, r10, r10
        or r5, r10, r10
        or r6, r10, r10
        or r7, r10, r10
        or r8, r10, r10
        or r9, r10, r10
        bl L_bar$stub

wowness.

llvm-svn: 25221
2006-01-11 19:55:07 +00:00
Chris Lattner
f9e32005dd tblgen does this now
llvm-svn: 25220
2006-01-11 19:53:22 +00:00
Chris Lattner
8dd97ae338 This is no longer needed
llvm-svn: 25219
2006-01-11 19:52:46 +00:00
Chris Lattner
6b8fb2e9bc Dead FP arguments still use an incoming FP reg. This fixes
Regression/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll, which was
distilled from a miscompilation in 252.eon.

llvm-svn: 25217
2006-01-11 18:21:25 +00:00
Chris Lattner
1ffbbc9ebc Use Evan's outflag stuff to implement V8cmpicc. This allows us to write a
pattern for SUBCCrr, and makes it trivial to add support for SUBCCri, eliminating
an instruction in the common "setcc X, imm" case.

llvm-svn: 25212
2006-01-11 07:49:38 +00:00
Chris Lattner
c2bd047226 Fix a bug in i32->f64 conversion lowering
llvm-svn: 25211
2006-01-11 07:27:40 +00:00
Chris Lattner
34c4cddb14 Unbreak ret void :-/
llvm-svn: 25210
2006-01-11 07:15:43 +00:00
Chris Lattner
d9b3f6a3df Write this pattern in canonical form, allowing more patterns to match.
This implements Regression/CodeGen/SparcV8/xnor.ll

llvm-svn: 25209
2006-01-11 07:14:01 +00:00
Evan Cheng
e42281bcba * Add special entry code main() (to set x87 to 64-bit precision).
* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
  call parmater passing.

llvm-svn: 25207
2006-01-11 06:09:51 +00:00
Duraid Madina
52e3f53ea5 cleanup GETFD
llvm-svn: 25198
2006-01-11 03:50:40 +00:00
Andrew Lenharth
09447d44ac this pattern was bogus
llvm-svn: 25197
2006-01-11 03:33:06 +00:00
Duraid Madina
3246f5317b this just might work
llvm-svn: 25195
2006-01-11 01:38:07 +00:00
Duraid Madina
242414e621 add support for selecting bools
FIXME: this is commented out because it makes tblgen go a bit fruity
llvm-svn: 25193
2006-01-11 01:21:12 +00:00
Chris Lattner
1d0926075f implement FP_REG_KILL insertion for the dag-dag instruction selector
llvm-svn: 25192
2006-01-11 01:15:34 +00:00
Chris Lattner
b4e9082f18 Fit into 80 cols
llvm-svn: 25191
2006-01-11 00:46:55 +00:00
Evan Cheng
9adc8e5a3d SSE cmov support.
llvm-svn: 25190
2006-01-11 00:33:36 +00:00
Evan Cheng
0cb5e32cda * fp to sint patterns.
* fiadd, fisub, etc.

llvm-svn: 25189
2006-01-10 22:22:02 +00:00
Evan Cheng
8504673bb2 FP_TO_INT*_IN_MEM and x87 FP Select support.
llvm-svn: 25188
2006-01-10 20:26:56 +00:00
Chris Lattner
6a671ed26f silence a bogus warning
llvm-svn: 25185
2006-01-10 19:45:18 +00:00
Andrew Lenharth
0dd7d82ec6 Int immediate loading fix
llvm-svn: 25182
2006-01-10 19:12:47 +00:00
Duraid Madina
e2986589aa heh, 'sif it'd be a legalizer bug.
llvm-svn: 25172
2006-01-10 05:26:01 +00:00
Duraid Madina
7034571679 support functions that return bool (this "should" work but doesn't,
*maybe* due to a legalizer bug.)

llvm-svn: 25171
2006-01-10 05:08:25 +00:00
Nate Begeman
7ed9b8b287 Remove a comment that no longer applies.
llvm-svn: 25167
2006-01-10 00:15:59 +00:00
Chris Lattner
a59d6394d2 Give PPCISD:: nodes legible names in dumps.
llvm-svn: 25166
2006-01-09 23:52:17 +00:00
Chris Lattner
95443534bf add ret void support back
llvm-svn: 25164
2006-01-09 23:20:37 +00:00
Evan Cheng
154cef5ccb * Added undef patterns.
* Some reorg.

llvm-svn: 25163
2006-01-09 23:10:28 +00:00
Evan Cheng
c0b3a2166b More typos
llvm-svn: 25162
2006-01-09 22:29:54 +00:00
Evan Cheng
5baec4d0e2 typo
llvm-svn: 25160
2006-01-09 20:49:21 +00:00
Andrew Lenharth
58e26e2c4b proper branch not equal sequence
llvm-svn: 25159
2006-01-09 19:49:58 +00:00
Evan Cheng
d3babfe458 Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.
llvm-svn: 25158
2006-01-09 18:33:28 +00:00
Evan Cheng
e720cfd690 New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
hasInFlag, hasOutFlag.

llvm-svn: 25155
2006-01-09 18:28:21 +00:00
Chris Lattner
00d77e22d4 Fix the PPC JIT failures last night, which were due to mishandling of linkonce globals
llvm-svn: 25141
2006-01-07 06:22:16 +00:00
Evan Cheng
6a9c735e21 * Added integer div / rem.
* Fixed a load folding bug.

llvm-svn: 25136
2006-01-06 23:19:29 +00:00
Evan Cheng
060b19c708 ISEL code for MULHU, MULHS, and UNDEF.
llvm-svn: 25132
2006-01-06 20:36:21 +00:00
Andrew Lenharth
193ef655ed make 0 codegen much better
llvm-svn: 25131
2006-01-06 19:41:51 +00:00
Chris Lattner
88239024ca silence a bogus gcc warning
llvm-svn: 25129
2006-01-06 17:56:38 +00:00
Evan Cheng
66355df170 Addd (shl x, 1) ==> (shl x, x) peepholes.
llvm-svn: 25123
2006-01-06 02:31:59 +00:00
Evan Cheng
efe621adce fold (shl x, 1) -> (add x, x)
llvm-svn: 25120
2006-01-06 01:06:31 +00:00
Chris Lattner
d583872b9e linkonce symbols have an extra indirection, just like weak ones do. This fixes
Prolangs-C++/family and Prolangs-C++/primes.

llvm-svn: 25119
2006-01-06 01:04:03 +00:00
Evan Cheng
1e0d7b98f3 * Fast call support.
* FP cmp, setcc, etc.

llvm-svn: 25117
2006-01-06 00:43:03 +00:00
Chris Lattner
5488b43338 Fix a compile crash building MultiSource/Applications/d with the new front-end.
The PPC backend was generating random shift counts in this case, due to an
uninitialized variable.

llvm-svn: 25114
2006-01-05 18:32:49 +00:00
Chris Lattner
0bbcba6cff unbreak the build, these are now in TargetSelectionDAG.td
llvm-svn: 25109
2006-01-05 04:48:15 +00:00
Evan Cheng
6c86cf3a5f Added ConstantFP patterns.
llvm-svn: 25108
2006-01-05 02:08:37 +00:00
Evan Cheng
02c9e0646c Added fpimm node for ConstantFP.
llvm-svn: 25107
2006-01-05 02:07:49 +00:00
Jim Laskey
41b3ee3c4f Had expand logic backward.
llvm-svn: 25105
2006-01-05 01:47:43 +00:00
Jim Laskey
5eddaee9f3 Added initial support for DEBUG_LABEL allowing debug specific labels to be
inserted in the code.

llvm-svn: 25104
2006-01-05 01:25:28 +00:00
Evan Cheng
2329411038 DAG based isel call support.
llvm-svn: 25103
2006-01-05 00:27:02 +00:00
Evan Cheng
0d39dd2664 Remove some dead code.
llvm-svn: 25102
2006-01-05 00:26:14 +00:00
Jim Laskey
61138e28ff Applied some recommend changes from sabre. The dominate one beginning "let the
pass manager do it's thing."  Fixes crash when compiling -g files and suppresses
dwarf statements if no debug info is present.

llvm-svn: 25100
2006-01-04 22:28:25 +00:00
Jim Laskey
897ad8ddb7 Add unique id to debug location for debug label use (work in progress.)
llvm-svn: 25096
2006-01-04 15:04:11 +00:00
Jim Laskey
62b29812a6 Tie dwarf generation to darwin assembler.
llvm-svn: 25093
2006-01-04 13:52:30 +00:00
Andrew Lenharth
b4102c0250 typeo
llvm-svn: 25060
2006-01-02 21:15:53 +00:00
Chris Lattner
9f51967a78 Remove a 'using namespace std'.
llvm-svn: 25059
2006-01-01 22:20:31 +00:00
Andrew Lenharth
8291285388 Add support for brcond
llvm-svn: 25058
2006-01-01 22:16:43 +00:00
Andrew Lenharth
33a683c939 Move brcond over and fix some imm patterns. This may be the last change before changing the default alpha isel.
llvm-svn: 25057
2006-01-01 22:16:14 +00:00
Andrew Lenharth
1f84cd6920 clean this function up some
llvm-svn: 25055
2006-01-01 22:13:54 +00:00
Andrew Lenharth
3441657fb4 improve constant loading. Still sucks, but oh well
llvm-svn: 25047
2005-12-30 02:30:02 +00:00
Nate Begeman
ec7c28a28c Add support for generating v4i32 altivec code
llvm-svn: 25046
2005-12-30 00:12:56 +00:00
Nate Begeman
e1fdcf5a20 Remove a fixme
llvm-svn: 25045
2005-12-30 00:11:07 +00:00
Andrew Lenharth
13a01d794b let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean
llvm-svn: 25040
2005-12-29 01:06:12 +00:00
Andrew Lenharth
b87ac716bc Fix up immediate handling
llvm-svn: 25039
2005-12-29 00:50:08 +00:00
Duraid Madina
ad3a82e21c yet more C++ standards-compliance stuff.
llvm-svn: 25028
2005-12-27 10:40:34 +00:00
Duraid Madina
2ea271c8bf nasty paste-o, calls passing more than 8 arguments along were having
args >8 put into the wrong place

llvm-svn: 25027
2005-12-27 10:17:03 +00:00
Andrew Lenharth
bea3ab432b Restore some happiness to the JIT
llvm-svn: 25026
2005-12-27 06:25:50 +00:00
Andrew Lenharth
b48bdd4aae Fix alpha regressions.
llvm-svn: 25025
2005-12-27 03:53:58 +00:00
Chris Lattner
cee6093ca8 Fix a problem duraid pointed out to me compiling kc++ with -enable-x86-fastcc
llvm-svn: 25024
2005-12-27 03:02:18 +00:00
Evan Cheng
231b11ba87 Added field noResults to Instruction.
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
2005-12-26 09:11:45 +00:00
Andrew Lenharth
f8a6d19367 add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG
llvm-svn: 25011
2005-12-25 17:36:48 +00:00
Duraid Madina
303d3f1f96 unbreak calls, a few more tests should run. Tomorrow: bugpoint!
llvm-svn: 25010
2005-12-25 14:09:08 +00:00
Duraid Madina
00fbe7a7e4 we don't feed our call instructions extra operands
llvm-svn: 25009
2005-12-25 14:07:01 +00:00
Andrew Lenharth
9e8f45d185 All that just to lower div and rem
llvm-svn: 25008
2005-12-25 01:34:27 +00:00
Andrew Lenharth
b42cc57048 support targetexternalsym
llvm-svn: 25005
2005-12-24 23:36:59 +00:00
Evan Cheng
cd69c81c5e Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass.
llvm-svn: 25004
2005-12-24 09:48:35 +00:00
Andrew Lenharth
1e6795bc0c All addressing modes are now exposed. The only remaining relocated forms
are for function prologue.

TODO: move external symbols over to using RelLit.
    : have a pattern that matches constpool|globaladdr
    : have a pattern that matches (add x imm) -> x, imm or (...) -> ..., 0
llvm-svn: 25003
2005-12-24 08:29:32 +00:00
Andrew Lenharth
588bd3f659 Unify the patterns for loads and stores. Now offset addressing should be
supported.  This almost completes memory operations.

llvm-svn: 25002
2005-12-24 07:34:33 +00:00
Andrew Lenharth
f4c74093bb Let's see if we can break things.
Lower GOT relative addresses to Lo and HI.
Update both ISels to select them when they can.
Saves instructions here and there.

llvm-svn: 25001
2005-12-24 05:36:33 +00:00
Andrew Lenharth
5ce2a6c2cf move loads and stores over. Smart addr selection comming
llvm-svn: 25000
2005-12-24 03:41:56 +00:00
Nate Begeman
96c7e22231 Fix one of the things in the todo file, and get a bit closer to folding
constant offsets from statics into the address arithmetic.

llvm-svn: 24999
2005-12-24 01:00:15 +00:00
Evan Cheng
d87688fe72 * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)

llvm-svn: 24997
2005-12-23 22:14:32 +00:00
Chris Lattner
738cec7a6e not a good idea
llvm-svn: 24991
2005-12-23 07:37:47 +00:00
Evan Cheng
995503fc91 More X86 floating point patterns.
llvm-svn: 24990
2005-12-23 07:31:11 +00:00
Evan Cheng
74cf3e8823 Operand 1 of TRUNCSTORE can be any of integer and floating point types.
llvm-svn: 24989
2005-12-23 07:30:30 +00:00
Chris Lattner
2e386f9d46 fix something-o
llvm-svn: 24987
2005-12-23 07:08:39 +00:00
Chris Lattner
a4a2d4c3fe implement vaarg. Varargs now should work.
llvm-svn: 24986
2005-12-23 06:37:38 +00:00
Chris Lattner
4e8124bd9b implement vastart. The dag isel compiles this:
void test3(va_list Y);
void test2(int F, ...) {
  va_list X;
  va_start(X, F);
  test3(X);
}

into this:

test2:
        save -104, %o6, %o6
        st %i5, [%i6+88]
        st %i4, [%i6+84]
        st %i3, [%i6+80]
        st %i2, [%i6+76]
        st %i1, [%i6+72]
        add %i6, 72, %o0
        st %o0, [%i6+-4]
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

The simple isel emits:

test2:
        save -96, %o6, %o6
        st %i0, [%i6+68]
        st %i1, [%i6+72]
        st %i2, [%i6+76]
        st %i3, [%i6+80]
        st %i4, [%i6+84]
        st %i5, [%i6+88]
        or %g0, 1, %l0
        or %g0, 4, %l1
        umul %l0, %l1, %l0
        add %l0, 7, %l0
        and %l0, -8, %l0
        sub %o6, %l0, %o6
        add %o6, 96, %l0
        add %i6, 72, %l1
        st %l1, [%l0]
        ld [%l0], %o0
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24985
2005-12-23 06:24:04 +00:00
Chris Lattner
73db2dc9fc remove benchmark list, remove issues addressed by the dag-dag isel
llvm-svn: 24984
2005-12-23 06:09:30 +00:00
Chris Lattner
8e80a247ff make sure bit_convert's are expanded
llvm-svn: 24979
2005-12-23 05:15:23 +00:00
Chris Lattner
8b2bd265f4 make sure bit_converts are expanded
llvm-svn: 24978
2005-12-23 05:13:35 +00:00
Chris Lattner
e47f28d044 fix the int<->fp instructions, which apparently take a single float register
to represent the int part (because it's always 32-bits)

llvm-svn: 24976
2005-12-23 05:00:16 +00:00
Chris Lattner
aaeb6774c7 Use BIT_CONVERT to simplify this code
llvm-svn: 24975
2005-12-23 02:31:39 +00:00
Chris Lattner
3c4a3dd86e Simplify some code by using BIT_CONVERT
llvm-svn: 24974
2005-12-23 00:59:59 +00:00
Chris Lattner
1cbff1f3cd clean up .td file by using evan's new FLAG thing
llvm-svn: 24967
2005-12-22 21:18:39 +00:00
Chris Lattner
73f38507d9 remove dead code
llvm-svn: 24965
2005-12-22 21:16:08 +00:00
Chris Lattner
8c2622a14e fix handling of weak linkage
llvm-svn: 24964
2005-12-22 21:15:17 +00:00
Chris Lattner
f7ed832fcf move some random notes out of my email into someplace useful
llvm-svn: 24956
2005-12-22 17:19:28 +00:00
Duraid Madina
e009e40008 this is a hack, which may or may not hang around. In short:
whimper out of doing things the Right Way, and hack up a generic
'BRCALL' instruction, that gets generated when calls are lowered.
This gets selected by hand in the DAG isel, where it gets turned
into real (i.e. in tablegen) br.call instructions.

BUG: this dies on void calls, but seems to work otherwise?
llvm-svn: 24952
2005-12-22 13:29:14 +00:00
Duraid Madina
325c2cc07b we can't do this directly in lowering, so we need this case
llvm-svn: 24951
2005-12-22 07:14:45 +00:00
Duraid Madina
bf2a5de0d5 oops, back this out
llvm-svn: 24950
2005-12-22 07:13:51 +00:00
Duraid Madina
d87738a097 we can't all have brains now, can we
llvm-svn: 24948
2005-12-22 06:41:39 +00:00
Duraid Madina
b43dc0ff5b this should take care of calls to varadic functions, but it doesn.,t
BUG: calling printf(string, float) will load the float into the wrong
register, completely forget about loading the string, etce

llvm-svn: 24947
2005-12-22 06:39:57 +00:00
Duraid Madina
d1c9d5ae4d we need to emit the getf.d instruction in lowering, so add it
to IA64ISD

llvm-svn: 24946
2005-12-22 06:38:38 +00:00
Duraid Madina
47cd4eeab0 I shoulda done this a *long* time ago (tm): implement calls properly,
i.e. r1/r12/rp are saved/restored regardless of scheduling/luck

TODO: calls to external symbols, indirect (function descriptor) calls,
      performance (we're being paranoid right now)

BUG: the code for handling calls to vararg functions breaks if FP
args are passed (this will make printf() go haywire so a bunch of
tests will fail)

BUG: this seems to trigger some legalize nastiness
llvm-svn: 24942
2005-12-22 04:07:40 +00:00
Duraid Madina
22eb8a3fb4 kill SelectCALL() in the DAG isel, we handle this in lowering now, like
SPARCv8. (we copy sparcv8's workaround for tablegen not being nice about
ISD::CALL/TAILCALL)

llvm-svn: 24941
2005-12-22 03:58:17 +00:00
Duraid Madina
2c940da498 update tablegen files - nothing to see here
llvm-svn: 24939
2005-12-22 03:56:03 +00:00
Evan Cheng
e458553c73 Bye bye HACKTROCITY.
llvm-svn: 24935
2005-12-22 02:26:21 +00:00
Evan Cheng
eac312f453 Added special flag node FLAG.
llvm-svn: 24934
2005-12-22 02:25:14 +00:00
Evan Cheng
d33f8fde4a Lefted out TargetLowering::
llvm-svn: 24922
2005-12-21 23:14:54 +00:00
Evan Cheng
fb6413e05a * Fix a GlobalAddress lowering bug.
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.

llvm-svn: 24921
2005-12-21 23:05:39 +00:00
Evan Cheng
add305de26 Oops. Accidentally deleted RET pattern. It's still needed for return void;
llvm-svn: 24920
2005-12-21 22:22:16 +00:00
Jim Laskey
d82881490c Disengage DEBUG_LOC from non-PPC targets.
llvm-svn: 24919
2005-12-21 20:51:37 +00:00
Evan Cheng
6f15189a77 * Added support for X86 RET with an additional operand to specify number of
bytes to pop off stack.
* Added support for X86 SETCC.

llvm-svn: 24917
2005-12-21 20:21:51 +00:00
Chris Lattner
2bc611f6f0 add some nodes, forgot to commit this last night :(
llvm-svn: 24901
2005-12-21 16:22:46 +00:00
Chris Lattner
347c6eedae This was meant to go in
llvm-svn: 24900
2005-12-21 07:50:26 +00:00
Chris Lattner
884def40f4 Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns
that were overloaded to work before and after the stackifier runs.  With the
new clean world, it is possible to write patterns for these instructions: woo!

This also adds a few simple patterns here and there, though there are a lot
still missing.  These should be easy to add though. :)

See the comments under "Floating Point Stack Support" for more details on
the new world order.

This patch as absolutely no effect on the generated code, woo!

llvm-svn: 24899
2005-12-21 07:47:04 +00:00
Chris Lattner
ee15b5393f Wrap some long lines: no functionality change
llvm-svn: 24898
2005-12-21 05:34:58 +00:00
Chris Lattner
39b72c3525 remove dead code
llvm-svn: 24896
2005-12-21 05:27:51 +00:00
Evan Cheng
cab6710034 Remove ISD::RET select code. Now tblgen'd.
llvm-svn: 24889
2005-12-21 02:41:57 +00:00
Evan Cheng
0226113ed5 * Added lowering hook for external weak global address. It inserts a load
for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
  value (or store / fld / copy to ST(0) for floating point value). This
  eliminate the need to write C++ code to handle RET with variable number
  of operands.

llvm-svn: 24888
2005-12-21 02:39:21 +00:00
Evan Cheng
ace8f1fafa SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns.
llvm-svn: 24886
2005-12-20 22:59:51 +00:00
Evan Cheng
05ad906ccf Flip the meaning of FPContractions to reflect Requires<[]> change.
llvm-svn: 24884
2005-12-20 20:08:53 +00:00
Chris Lattner
338c0b2011 Run lower-switch after lower-invoke.
Only run lower-allocations and lower-select for the simple isel

llvm-svn: 24881
2005-12-20 08:00:11 +00:00
Chris Lattner
ec177e242d Reserve G1 for frame offset stuff and use it to handle large stack frames.
For example, instead of emitting this:

test:
        save -40112, %o6, %o6   ;; imm too large
        add %i6, -40016, %o0    ;; imm too large
        call caller
        nop
        restore %g0, %g0, %g0
        retl
        nop

emit this:

test:
        sethi 4194264, %g1
        or %g1, 848, %g1
        save %o6, %g1, %o6
        sethi 4194264, %g1
        add %g1, %i6, %g1
        add %i1, 944, %o0
        call caller
        nop
        restore %g0, %g0, %g0
        retl
        nop

which doesn't cause the assembler to barf.

llvm-svn: 24880
2005-12-20 07:56:31 +00:00
Evan Cheng
1c3ea75ffc Added X86 readport patterns.
llvm-svn: 24879
2005-12-20 07:38:38 +00:00
Evan Cheng
44e4e6a57f Added a hook to print out names of target specific DAG nodes.
llvm-svn: 24877
2005-12-20 06:22:03 +00:00
Nate Begeman
a114534620 Pattern-match return. Includes gross hack!
llvm-svn: 24874
2005-12-20 00:26:01 +00:00
Nate Begeman
d4562971b3 Fix a couple of the FIXMEs, thanks to suggestion from Chris. This allows
us to load and store vectors directly at a pointer (offset of zero) by
using r0 as the base register.  This also requires some asm printer work
to satisfy the darwin assembler.

For
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = add <4 x float> %tmp1, %tmp1
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

We now produce:
_foo:
        lvx v0, 0, r3
        vaddfp v0, v0, v0
        stvx v0, 0, r3
        blr

Instead of:
_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

llvm-svn: 24872
2005-12-19 23:40:42 +00:00
Nate Begeman
9c7dce88b5 Convert load/store over to being pattern matched
llvm-svn: 24871
2005-12-19 23:25:09 +00:00
Evan Cheng
bb34a50cb0 X86 conditional branch support.
llvm-svn: 24870
2005-12-19 23:12:38 +00:00
Evan Cheng
c87099506c It's essential we clear CodeGenMap after isel every basic block!
llvm-svn: 24867
2005-12-19 22:36:02 +00:00
Chris Lattner
7a430ddf61 Fix pifft by correcting the case when a i64/f64 straddles O5 and memory:
we were storing into [FP+88] instead of [FP+92].
Improve codegen by emitting [FP+92], instead of emitting a copy of FP into
another GPR which wouldn't be coallesced because FP isn't register allocated.

llvm-svn: 24859
2005-12-19 07:57:53 +00:00
Chris Lattner
3d1946c765 don't emit 'add %o6, 0, %o6' instructions
llvm-svn: 24857
2005-12-19 02:51:12 +00:00
Chris Lattner
2aeb7fcbb3 Fix calls to functions returning i64
llvm-svn: 24856
2005-12-19 02:15:51 +00:00
Chris Lattner
63761db672 Correct bool truncstore operand order
llvm-svn: 24855
2005-12-19 02:06:50 +00:00
Chris Lattner
4fef952e4d add the other bool zextload as well
llvm-svn: 24854
2005-12-19 01:44:58 +00:00
Chris Lattner
91caf35bf5 implement zextload bool
llvm-svn: 24853
2005-12-19 01:43:04 +00:00
Chris Lattner
59f1a92c77 mark some unsupported ops as unsupported
llvm-svn: 24852
2005-12-19 01:39:40 +00:00
Chris Lattner
480e2f7945 Fix syntax for indirect calls. This fixes Olden/mst
llvm-svn: 24850
2005-12-19 01:22:53 +00:00
Chris Lattner
bd8b911c46 Keep stack frames 8-byte aligned. This fixes olden/voronoi
llvm-svn: 24849
2005-12-19 01:15:13 +00:00
Chris Lattner
b10b543e85 apparently rdy isn't actually a psuedo instruction. Use rd %y
llvm-svn: 24848
2005-12-19 00:53:02 +00:00
Chris Lattner
9e50ecd0d2 add fneg/fabs support for doubles
llvm-svn: 24847
2005-12-19 00:50:12 +00:00
Chris Lattner
0a579fb2ac Various cleanups to this pass, no functionality change
llvm-svn: 24846
2005-12-19 00:46:20 +00:00
Chris Lattner
be1adf763b add bool truncstores
llvm-svn: 24845
2005-12-19 00:19:21 +00:00
Chris Lattner
be3df4a199 Elimiante SP and FP, which weren't members of the IntRegs register class
llvm-svn: 24844
2005-12-19 00:06:52 +00:00
Chris Lattner
fdc05d74a6 The sun assembler only supports .xword in V9 mode.
llvm-svn: 24842
2005-12-18 23:36:45 +00:00
Chris Lattner
d0e25175d3 Configure the asmwriter to allow constant pools to be printed correctly
llvm-svn: 24841
2005-12-18 23:35:05 +00:00
Chris Lattner
84a2caf581 add support for integer extloads
llvm-svn: 24840
2005-12-18 23:18:37 +00:00
Chris Lattner
061cfe15c9 Add support for undef
llvm-svn: 24839
2005-12-18 23:10:57 +00:00
Chris Lattner
e8dad0dcb9 Add support for calls to external symbols
llvm-svn: 24838
2005-12-18 23:07:11 +00:00
Chris Lattner
745c88ba10 we have no memcpy
llvm-svn: 24837
2005-12-18 23:00:27 +00:00
Chris Lattner
d8c98dcfe0 Fix a crash on a call with no arguments
llvm-svn: 24836
2005-12-18 22:57:47 +00:00
Chris Lattner
0124442495 This is handled by the autogen'd code
llvm-svn: 24834
2005-12-18 21:06:11 +00:00
Chris Lattner
27357a915a Change return lowering so that we can autogen the matching code.
llvm-svn: 24832
2005-12-18 21:03:04 +00:00
Chris Lattner
41ec63f309 Implement Calls for V8. This would be completely autogenerated except for
a small bug in tblgen.  When that is fixed, we can remove the ISD::Call case
in Select.

llvm-svn: 24830
2005-12-18 15:55:15 +00:00
Chris Lattner
b82f4641c4 Implement the full V8 ABI for incoming arguments.
llvm-svn: 24825
2005-12-18 13:33:06 +00:00
Chris Lattner
21ae63ceb9 Push ops list, asm string, and pattern all the way up to InstV8. Move the
InstV8 class to the InstrFormats file where it belongs.

llvm-svn: 24824
2005-12-18 08:21:00 +00:00
Chris Lattner
11fa3cc8ee Give V8 select_cc, in the spirit of the PPC backend
llvm-svn: 24823
2005-12-18 08:13:54 +00:00
Chris Lattner
6d46ed50a0 remove some unused instructions
llvm-svn: 24822
2005-12-18 07:15:17 +00:00
Chris Lattner
e0ebaa24f9 V8 doesn't have FP extload
llvm-svn: 24821
2005-12-18 07:13:32 +00:00
Chris Lattner
0d0850d22e simplifications, fix typo
llvm-svn: 24820
2005-12-18 07:09:06 +00:00
Chris Lattner
b401548fd5 add a node, for completeness
llvm-svn: 24819
2005-12-18 07:05:21 +00:00
Chris Lattner
941ba22d08 Add frameindex support
Add support for copying (e.g. returning) doubles
Add support for F<->I instructions

llvm-svn: 24818
2005-12-18 06:59:57 +00:00
Chris Lattner
7b7ea7c7bd Tighten up some checks
llvm-svn: 24817
2005-12-18 06:40:34 +00:00
Nate Begeman
c14ad3dec7 Since extload can also be used by FP, split STDIntExtLoad into two parts,
one for use with extload, one for use with sextload and zextload, which
are integer only.

llvm-svn: 24814
2005-12-18 02:48:48 +00:00
Chris Lattner
2aab8f4471 Add constant pool support, including folding into addresses.
Pretty print addresses a bit, to not print [%r1+%g0]: just print [%r1]

llvm-svn: 24813
2005-12-18 02:37:35 +00:00
Chris Lattner
cba8a96bd0 Teach the addressing mode stuff to fold "%lo" into 'ri' addressing modes,
allowing us to compile this:

to this:

%G1 = external global int
%G2 = external global int
void %test() {
        %X = load int* %G1
        store int %X, int* %G2
        ret void
}

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        ld [%l0+%lo(G1)], %l0
        sethi %hi(G2), %l1
        st %l0, [%l1+%lo(G2)]
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        or %g0, %lo(G1), %l1
        ld [%l1+%l0], %l0
        sethi %hi(G2), %l1
        or %g0, %lo(G2), %l2
        st %l0, [%l2+%l1]
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24812
2005-12-18 02:27:00 +00:00
Chris Lattner
5303e59b7a Add initial support for global variables, and fix a bug in addr mode selection
where we didn't select the operands.

llvm-svn: 24811
2005-12-18 02:10:39 +00:00
Chris Lattner
1294e27969 Claiming that branch targets are registers is not very wholesome. Change them
to be basic blocks.  Also, add uncond branches.

llvm-svn: 24810
2005-12-18 01:46:58 +00:00
Chris Lattner
f3a888d1dd Add unordered comparisons
llvm-svn: 24809
2005-12-18 01:41:39 +00:00
Chris Lattner
66e29f7ead Add patterns to the rest of the int condbranches and some of the fp branches
llvm-svn: 24808
2005-12-18 01:38:19 +00:00
Chris Lattner
47785d8fc3 Add initial conditional branch support. This doesn't actually work yet due
to a bug in the scheduler.

llvm-svn: 24807
2005-12-18 01:20:35 +00:00
Chris Lattner
9f0ac41d5c Eliminate CMPri, which is a synonym for SUBCCri
llvm-svn: 24805
2005-12-17 23:52:08 +00:00
Chris Lattner
95e9327303 add fneg,fabs,fsqrt instructions
llvm-svn: 24803
2005-12-17 23:20:27 +00:00
Chris Lattner
a9adf79113 Add patterns for fround/fextend and the funny fsmuld instruction
llvm-svn: 24802
2005-12-17 23:14:30 +00:00
Chris Lattner
ac03e1e55e Add FP +,-,*,/
llvm-svn: 24801
2005-12-17 23:10:46 +00:00
Chris Lattner
13253a829a Give patterns to F3_3 instructions
llvm-svn: 24800
2005-12-17 23:05:35 +00:00
Chris Lattner
057fbaea0d Implement 64-bit add/sub, make sure to receive and return 64-bit args with
the right halves in the right regs

llvm-svn: 24799
2005-12-17 22:55:57 +00:00
Chris Lattner
a4865938dc implement div and rem
llvm-svn: 24798
2005-12-17 22:39:19 +00:00
Chris Lattner
88a3754b46 implement MULHU/MULHS for 64-bit multiplies
llvm-svn: 24797
2005-12-17 22:30:00 +00:00
Chris Lattner
7f9e66063d Add patterns for multiply, simplify Y register handling stuff, add RDY instruction
llvm-svn: 24796
2005-12-17 22:22:53 +00:00
Chris Lattner
a4dbacd0d6 Make the addressing modes smarter
llvm-svn: 24795
2005-12-17 21:25:27 +00:00
Chris Lattner
9bd197adae remove some unused instructions
llvm-svn: 24794
2005-12-17 21:13:50 +00:00
Chris Lattner
a17cbf352e add andn/orn/xorn patterns. This allows us to compile this:
long %test(ubyte, short, long %X, long %Y) {
  %A = xor long %X, -1
  %B = and long %Y, %A
  ret long %B
}

to this:

test:
        save -96, %sp, %sp
        andn %i4, %i2, %i0
        andn %i5, %i3, %i1
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        xor %i2, -1, %l0
        xor %i3, -1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop

The simpleisel emits:  :(

test:
        save -96, %sp, %sp
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l1
        xor %i2, %l0, %l0
        xor %i3, %l1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24793
2005-12-17 21:05:49 +00:00
Chris Lattner
3afda7194f Add support for 64-bit arguments
llvm-svn: 24792
2005-12-17 20:59:06 +00:00
Chris Lattner
c1ab8a5e42 Sparc doesn't have sext_inreg
llvm-svn: 24791
2005-12-17 20:50:42 +00:00
Chris Lattner
a57b8986ea add patterns for FP stores
llvm-svn: 24790
2005-12-17 20:47:16 +00:00
Chris Lattner
abb86e4e22 Add [reg+reg] integer stores
llvm-svn: 24789
2005-12-17 20:44:36 +00:00
Chris Lattner
f9bc70e0ef Add store patterns
llvm-svn: 24788
2005-12-17 20:42:55 +00:00
Chris Lattner
171e828d2d add truncstore
llvm-svn: 24787
2005-12-17 20:42:29 +00:00
Chris Lattner
bdfee98ec0 add fp load patterns, switch rest of loads and stores to use addrmodes
llvm-svn: 24786
2005-12-17 20:32:47 +00:00
Chris Lattner
d775f1de68 Add integer load[r+r] forms.
llvm-svn: 24785
2005-12-17 20:26:45 +00:00
Chris Lattner
d09afb735d Rename load/store instructions to include an RI suffix
llvm-svn: 24784
2005-12-17 20:18:49 +00:00
Chris Lattner
9133c2c38b Add patterns for the rest of the loads. Add 'ri' suffixes to the load and store insts
llvm-svn: 24783
2005-12-17 20:18:24 +00:00
Chris Lattner
3e51b620ec Add basic addressing mode support and one load.
llvm-svn: 24782
2005-12-17 20:04:49 +00:00
Chris Lattner
399dfec939 eliminate some redundancy
llvm-svn: 24781
2005-12-17 19:47:05 +00:00
Chris Lattner
e441738cef Use a combination of sethi and or to build arbitrary immediates.
llvm-svn: 24780
2005-12-17 19:41:43 +00:00
Chris Lattner
39740d3207 Use sethi to build large immediates with zeros at the bottom
llvm-svn: 24779
2005-12-17 19:37:00 +00:00
Chris Lattner
5893b95caa Add shift and small immediate support
llvm-svn: 24778
2005-12-17 19:07:57 +00:00
Chris Lattner
81b13ccb01 Add some basic reg-reg instructions
llvm-svn: 24777
2005-12-17 18:53:33 +00:00
Chris Lattner
058fe7d1ed Add empty patterns to all F3_1 instructions
llvm-svn: 24776
2005-12-17 18:49:14 +00:00
Evan Cheng
56649f9616 Darwin API issue: indirect load of external and weak symbols.
llvm-svn: 24775
2005-12-17 09:13:43 +00:00
Chris Lattner
2ba4a8584c Add some simple integer patterns. This allows us to compile this:
int %test(int %A) {
  %B = add int %A, 1
  %C = xor int %B, 123
  ret int %C
}

into this:

test:
        save -96, %sp, %sp
        add %i0, 1, %l0
        xor %l0, 123, %i0
        restore %g0, %g0, %g0
        retl
        nop

for example.  I guess it would make sense to add reg/reg versions too.

llvm-svn: 24774
2005-12-17 08:26:38 +00:00
Chris Lattner
4de7491c52 Implement ret with operand, giving us this:
int %test(int %A) {
  ret int %A
}

llvm-svn: 24773
2005-12-17 08:15:09 +00:00
Chris Lattner
b877ae7929 Add a pattern for 'ret'. This now compiles:
void %test() { ret void }

:)

llvm-svn: 24772
2005-12-17 08:08:42 +00:00
Chris Lattner
e7408707fd Add empty patterns for F3_2 instructions
llvm-svn: 24771
2005-12-17 08:06:43 +00:00
Chris Lattner
3fca9488d2 Implement LowerArguments, at least for the first 6 integer args
llvm-svn: 24770
2005-12-17 08:03:24 +00:00
Chris Lattner
62aadddb9d Add the framework for a dag-dag isel
llvm-svn: 24769
2005-12-17 07:47:01 +00:00
Evan Cheng
a3ff796fda Remove a few lines of dead code.
llvm-svn: 24768
2005-12-17 07:18:44 +00:00
Chris Lattner
adf84860db asmprinter done, added crucial missing step
llvm-svn: 24767
2005-12-17 07:17:59 +00:00
Chris Lattner
91e36127ed Use the AsmPrinter for global variable init printing. This eliminates a
bunch of code and causes V8 to start using the fancy .asciz directive that
the sun assembler supports.

llvm-svn: 24766
2005-12-17 07:17:08 +00:00
Chris Lattner
2b66656dd9 Switch constant pool printing over to use the Shared AsmPrinter version
llvm-svn: 24765
2005-12-17 07:11:43 +00:00
Chris Lattner
9fcfd38a6d Use the shared AsmPrinter code for some basic stuff. No functionality
change except for fewer .section directives emitted

llvm-svn: 24764
2005-12-17 07:04:29 +00:00