RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 22:42:46 +02:00
Code Issues Projects Releases Wiki Activity
66,310 Commits 4 Branches 5 Tags 704 MiB
d7f24e831f
Commit Graph

42671 Commits

Author SHA1 Message Date
Rafael Espindola
f230319275 Defined weak symbols should have non-zero value. 
llvm-svn: 117585
 2010-10-28 19:39:57 +00:00
Mikhail Glushenkov
8988adb7db llvmc: Make ExecuteProgram() look in the driver directory first. 
llvm-svn: 117584
 2010-10-28 19:33:08 +00:00
Mikhail Glushenkov
7ee0f678cb Remove an unnecessary check and an unnecessary temporary. 
llvm-svn: 117583
 2010-10-28 19:33:04 +00:00
Mikhail Glushenkov
b727c53cff Revert r77396. 
Original commit message:

    On "Unix", if Program::FindProgramByName is given a name containing
    slashes, just go with it, regardless of whether it looks like it will
    be executable. This follows the behavior of sh(1) more closely.

It's better when behaviour is consistent between platforms. This change also
makes FindExecutable() behave as expected on unix-likes (before this commit, it
used to always succeed).

llvm-svn: 117582
 2010-10-28 19:32:58 +00:00
Mikhail Glushenkov
e2c628c84f Trailing whitespace. 
llvm-svn: 117581
 2010-10-28 19:32:53 +00:00
Rafael Espindola
862d688cbd Fix relocations with renamed symbols. 
llvm-svn: 117575
 2010-10-28 19:08:03 +00:00
Benjamin Kramer
fbfb8cf5f8 Reduce malloc thrashing. 
llvm-svn: 117572
 2010-10-28 18:41:23 +00:00
Jim Grosbach
d02c1c7d77 PLD, PLDW, PLI encodings, plus refactor their use of addrmode2. 
llvm-svn: 117571
 2010-10-28 18:34:10 +00:00
Rafael Espindola
e62cf892ae Aliases defined with .symver should copy the binding of the symbols they alias. 
Move the existing patching for undefined symbols so that all the patching
is done in the same function.

llvm-svn: 117570
 2010-10-28 18:33:03 +00:00
Devang Patel
0e43a2d84f Technically DIFile scope should also be handled here. 
llvm-svn: 117563
 2010-10-28 17:30:52 +00:00
Chris Lattner
0a21ad2553 rearrange ParseRegisterList. 
llvm-svn: 117560
 2010-10-28 17:23:41 +00:00
Chris Lattner
a9c0f00f10 refactor some code to simplify it, eliminating some owningptr's. 
llvm-svn: 117559
 2010-10-28 17:20:03 +00:00
Bob Wilson
65124cd7c7 Teach the DAG combiner to fold a splat of a splat. Radar 8597790. 
Also do some minor refactoring to reduce indentation.

llvm-svn: 117558
 2010-10-28 17:06:14 +00:00
Roman Divacky
2aedee6ff2 Use the IDVal directly as there's no need to convert to std::string. 
Pointed out by Chris!

llvm-svn: 117557
 2010-10-28 16:57:58 +00:00
Roman Divacky
8555f153e9 Implement .equ directive as a synonym to .set. 
llvm-svn: 117553
 2010-10-28 16:22:58 +00:00
Duncan Sands
eccf0b18a5 Fix PR8494: when reading invalid bitcode, getTypeByID may return 
a null pointer.

llvm-svn: 117551
 2010-10-28 15:47:26 +00:00
Rafael Espindola
ff7e4e4e43 Implement R_X86_64_DTPOFF32. 
llvm-svn: 117548
 2010-10-28 15:11:03 +00:00
Rafael Espindola
1d1ff5485c Implement TLSLD. 
llvm-svn: 117547
 2010-10-28 15:02:40 +00:00
Rafael Espindola
8372247e83 Implement DTPOFF. 
llvm-svn: 117546
 2010-10-28 14:48:59 +00:00
Rafael Espindola
c44c5b374a Implement TLSLDM. 
llvm-svn: 117544
 2010-10-28 14:37:09 +00:00
Rafael Espindola
d8ef67f8b9 Implement VK_GOTNTPOFF and switch RelocNeedsGOT to use VariantKind. 
llvm-svn: 117543
 2010-10-28 14:22:44 +00:00
Mikhail Glushenkov
4bf08b3a06 Reindent. 
llvm-svn: 117538
 2010-10-28 08:25:44 +00:00
Evan Cheng
bc4588c439 Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. 
llvm-svn: 117531
 2010-10-28 06:47:08 +00:00
Evan Cheng
fdc80a0316 Revert 117518 and 117519 for now. They changed scheduling and cause MC tests to fail. Ugh. 
llvm-svn: 117520
 2010-10-28 02:00:25 +00:00
Evan Cheng
5c358e02ea - Assign load / store with shifter op address modes the right itinerary classes. 
- For now, loads of [r, r] addressing mode is the same as the
  [r, r lsl/lsr/asr #] variants. ARMBaseInstrInfo::getOperandLatency() should
  identify the former case and reduce the output latency by 1.
- Also identify [r, r << 2] case. This special form of shifter addressing mode
  is "free".

llvm-svn: 117519
 2010-10-28 01:49:06 +00:00
Evan Cheng
a07cd58978 Fix a major bug in operand latency computation. The use index must be adjusted 
by the number of defs first for it to match the instruction itinerary.

llvm-svn: 117518
 2010-10-28 01:46:29 +00:00
Dale Johannesen
b78530f9b0 Fix pastos in handling of AVX cvttsd2si, PR8491. 
Bruno, please review, but I'm pretty sure this is right.
Patch by Alex Mac!

llvm-svn: 117514
 2010-10-28 00:35:54 +00:00
Owen Anderson
e75f7c5419 Add correct NEON encodings for vtbl and vtbx. 
llvm-svn: 117513
 2010-10-28 00:18:46 +00:00
Owen Anderson
008116cb71 Add correct NEON encodings for vext, vtrn, vuzp, and vzip. 
llvm-svn: 117512
 2010-10-27 23:56:39 +00:00
Bob Wilson
2f8b69b196 Fix compiler warnings about signed/unsigned comparisons. 
llvm-svn: 117511
 2010-10-27 23:49:00 +00:00
Dale Johannesen
454b9243bd Teach InstCombine not to use Add and Neg on FP. PR 8490. 
llvm-svn: 117510
 2010-10-27 23:45:18 +00:00
Evan Cheng
44d2802e1d Shifter ops are not always free. Do not fold them (especially to form 
complex load / store addressing mode) when they have higher cost and
when they have more than one use.

llvm-svn: 117509
 2010-10-27 23:41:30 +00:00
Evan Cheng
77693156fb Putting r117193 back except for the compile time cost. Rather than assuming fallthroughs uses all registers, just gather the union of all successor liveins. 
llvm-svn: 117506
 2010-10-27 23:17:17 +00:00
Jim Grosbach
86ecfda983 Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like 
the LDR instructions have. This makes the literal/register forms of the
instructions explicit and allows us to assign scheduling itineraries
appropriately. rdar://8477752

llvm-svn: 117505
 2010-10-27 23:12:14 +00:00
Owen Anderson
9437a20a72 Provide correct encodings for NEON vcvt, which has its own special immediate encoding 
for specifying fractional bits for fixed point conversions.

llvm-svn: 117501
 2010-10-27 22:49:00 +00:00
Jim Grosbach
1d5b71b3cc Trailing whitespace 
llvm-svn: 117496
 2010-10-27 21:39:08 +00:00
Owen Anderson
d28d229ded Provide correct encodings for the get_lane and set_lane variants of vmov. 
llvm-svn: 117495
 2010-10-27 21:28:09 +00:00
Rafael Espindola
68ec803155 Add support for R_386_TLS_GD, R_386_TLS_LE_32, R_386_TLS_IE and R_386_TLS_LE. 
llvm-svn: 117494
 2010-10-27 21:23:52 +00:00
Kevin Enderby
a53cc6a764 Added the x86 instruction ud2b (2nd official undefined instruction). 
llvm-svn: 117485
 2010-10-27 20:46:49 +00:00
Jim Grosbach
db7ba38ca4 JIT imm12 encoding for constant pool entry references. 
llvm-svn: 117483
 2010-10-27 20:39:40 +00:00
Bob Wilson
cdc8dff3ac SelectionDAG shuffle nodes do not allow operands with different numbers of 
elements than the result vector type.  So, when an instruction like:

%8 = shufflevector <2 x float> %4, <2 x float> %7, <4 x i32> <i32 1, i32 0, i32 3, i32 2>

is translated to a DAG, each operand is changed to a concat_vectors node that appends 2 undef elements.  That is:

shuffle [a,b], [c,d] is changed to:
shuffle [a,b,u,u], [c,d,u,u]

That's probably the right thing for x86 but for NEON, we'd much rather have:

shuffle [a,b,c,d], undef

Teach the DAG combiner how to do that transformation for ARM.  Radar 8597007.

llvm-svn: 117482
 2010-10-27 20:38:28 +00:00
Rafael Espindola
2ea1239070 Implement R_X86_64_GOTTPOFF, R_X86_64_TLSGD and R_X86_64_TPOFF32. 
llvm-svn: 117481
 2010-10-27 20:28:07 +00:00
Jim Grosbach
0df1207e99 ARM JIT fix for LDRi12 and company. 
llvm-svn: 117478
 2010-10-27 19:55:59 +00:00
Benjamin Kramer
a79201f572 Replace pointer arithmetic with StringRef::substr. 
llvm-svn: 117477
 2010-10-27 19:53:52 +00:00
Owen Anderson
7c46fcfee4 Provide correct NEON encodings for vdup. 
llvm-svn: 117475
 2010-10-27 19:25:54 +00:00
Michael J. Spencer
5518dda87e x86-Win32: Switch ftol2 calling convention from stdcall to C. 
llvm-svn: 117474
 2010-10-27 18:52:38 +00:00
Michael J. Spencer
bf82646290 COFF: Add IMAGE_SCN_MEM_READ to text sections. 
There are currently 100 references to COFF::IMAGE_SCN in 6 files
and 11 different functions. Section to attribute mapping really
needs to happen in one place to avoid problems like this.

llvm-svn: 117473
 2010-10-27 18:52:29 +00:00
Michael J. Spencer
fc69783598 Fix whitespace. 
llvm-svn: 117472
 2010-10-27 18:52:20 +00:00
Rafael Espindola
4db628cd34 Set default type and flags for .init and .fini. 
llvm-svn: 117471
 2010-10-27 18:45:20 +00:00
Rafael Espindola
ca302c994a Produce an error for an invalid use of .symver. 
llvm-svn: 117462
 2010-10-27 17:56:18 +00:00
Jim Grosbach
5d4415c6b0 The new LDR* instruction patterns should handle the necessary encoding of 
operands in the TableGen'erated bits, so we don't need to do the additional
magic explicitly.

llvm-svn: 117461
 2010-10-27 17:52:51 +00:00
Owen Anderson
c8757eb137 Add correct NEON encodings for vsli and vsri. 
llvm-svn: 117459
 2010-10-27 17:40:08 +00:00
Owen Anderson
e64b7187a9 Add correct NEON encodings for vsra and vrsra. 
llvm-svn: 117458
 2010-10-27 17:29:29 +00:00
Jim Grosbach
09eab01a37 The immediate operands of an LDRi12 instruction doesn't need the addrmode2 
encoding tricks. Handle the 'imm doesn't fit in the insn' case.

llvm-svn: 117454
 2010-10-27 16:50:31 +00:00
Jim Grosbach
ddd67f8e88 Formatting. 
llvm-svn: 117453
 2010-10-27 16:30:18 +00:00
Rafael Espindola
58a0ea80a4 Symbols defined as the difference of other two end up in the ABS section. 
llvm-svn: 117451
 2010-10-27 16:04:30 +00:00
Rafael Espindola
23d05a8675 Add support for the .symver directive. This is really ugly, but most of it is 
contained in the ELF object writer.

llvm-svn: 117448
 2010-10-27 15:18:17 +00:00
Rafael Espindola
f5b4013598 Move more logic to isInSymtab and simplify. 
llvm-svn: 117447
 2010-10-27 14:44:52 +00:00
Mikhail Glushenkov
df4eb2e516 80-col violation. 
llvm-svn: 117443
 2010-10-27 09:09:10 +00:00
Mikhail Glushenkov
5eeaebe9b8 Remove try/catch(...) from Win32/Signals.inc. 
catch(...) is used in Win32/Signals.inc for catching Win32 structured
exceptions, but according to [1], this is wrong.

We can't simply change try/catch to __try/__finally, since this syntax is not
supported by MinGW. We can use __try/__finally on MSVC and __try1/__except1
macros on MinGW [2], but I think that that solution obfuscates the code too
much.

The use of try/catch(...) in Signals.inc makes it impossible to link
MinGW-compiled libSystem with llvm-gcc compiled executables. I propose that we
just remove try/catch(...) from Signals.inc, since the meaning of the code won't
change.

[1] http://members.cox.net/doug_web/eh.htm
[2] http://article.gmane.org/gmane.comp.compilers.llvm.cvs/81315

llvm-svn: 117442
 2010-10-27 09:09:04 +00:00
Kevin Enderby
74a2614673 Yet another tweak to X86 instructions to add ud2a as an alias to ud2 
(still to add ud2b).

llvm-svn: 117435
 2010-10-27 03:01:02 +00:00
Kevin Enderby
d22f3b9de7 Another tweak to X86 instructions to add the missing flex instruction (without 
the wait prefix).

llvm-svn: 117434
 2010-10-27 02:53:04 +00:00
Kevin Enderby
e812b356cc Tweaks to X86 instructions to allow the 'w' suffix in places it makes 
sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler
allows for these instructions.  Done differently than in r117031 that
caused a valgrind error which was later reverted.

llvm-svn: 117433
 2010-10-27 02:32:19 +00:00
Jim Grosbach
5ccda16fe2 LDRi12 machine instructions handle negative offset operands normally (simple 
integer values), not with the addrmode2 encoding.

llvm-svn: 117429
 2010-10-27 01:19:41 +00:00
Kevin Enderby
d5235bb45c Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mc 
will accept versions that the darwin assembler allows.  Forms ending in "pi" and
forms without all the operands.

llvm-svn: 117427
 2010-10-27 00:59:28 +00:00
Jakob Stoklund Olesen
66180b2c06 Handle critical loop predecessors by making both inside and outside registers 
live out.

This doesn't prevent us from inserting a loop preheader later on, if that is
better.

llvm-svn: 117424
 2010-10-27 00:39:07 +00:00
Jakob Stoklund Olesen
514eb703b8 Compute critical loop predecessors in the same way as critical loop exits. 
Critical edges going into a loop are not as bad as critical exits. We can handle
them by splitting the critical edge, or by having both inside and outside
registers live out of the predecessor.

llvm-svn: 117423
 2010-10-27 00:39:05 +00:00
Jakob Stoklund Olesen
4701c56446 Physical registers trivially have multiple connected components all the time. 
Only virtuals should be requires to be connected.

llvm-svn: 117422
 2010-10-27 00:39:01 +00:00
Jim Grosbach
6453c7cdf9 One more spot where the new arm mode LDR instruction representation 
doesn't need the additional addrmode2 register operand. Missed it the first
time around.

llvm-svn: 117421
 2010-10-27 00:38:16 +00:00
Wesley Peck
854507453a Adding disassembler to the MicroBlaze backend. 
llvm-svn: 117420
 2010-10-27 00:23:01 +00:00
Jim Grosbach
4d4caf1384 Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on 
rdar://8477752.

llvm-svn: 117419
 2010-10-27 00:19:44 +00:00
Jim Grosbach
625e128d29 Since I parameterized this bit, I should probably actually use said parameter. 
llvm-svn: 117418
 2010-10-26 23:58:04 +00:00
Dale Johannesen
e7f07349e4 Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches 
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet).  No functional change except
for dump output.

llvm-svn: 117413
 2010-10-26 23:11:10 +00:00
Andrew Trick
6363e80ded Remove the vector of live vregs. I thought we would need to track 
them, but hopefully we won't. And this is not the right data structure
to do it anyway.

llvm-svn: 117412
 2010-10-26 22:58:24 +00:00
Owen Anderson
1dc05f20e2 Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and vqrshrun. 
llvm-svn: 117411
 2010-10-26 22:50:46 +00:00
Jim Grosbach
30f6744f05 First part of refactoring ARM addrmode2 (load/store) instructions to be more 
explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.

llvm-svn: 117409
 2010-10-26 22:37:02 +00:00
Jakob Stoklund Olesen
bb4b26c42b After splitting, compute connected components of all new registers, not just for 
the remainder register.

Example:

bb0:
  x = 1
bb1:
  use(x)
  ...
  x = 2
  jump bb1

When x is isolated in bb1, the inner part breaks into two components, x1 and x2:

bb0:
  x0 = 1
bb1:
  x1 = x0
  use(x1)
  ...
  x2 = 2
  x0 = x2
  jump bb1

llvm-svn: 117408
 2010-10-26 22:36:09 +00:00
Jakob Stoklund Olesen
3bf3211458 Verify that live intervals are connected. If there are multiple connected 
components, each should get its own virtual register.

llvm-svn: 117407
 2010-10-26 22:36:07 +00:00
Jakob Stoklund Olesen
fa777d622d Call RenumberValues for all new registers created during splitting. This is 
necessary to get correct hasPHIKill flags.

llvm-svn: 117406
 2010-10-26 22:36:05 +00:00
Jakob Stoklund Olesen
0007e9a345 Preserve PHIDef bits in cloned values during splitting. 
llvm-svn: 117405
 2010-10-26 22:36:02 +00:00
Devang Patel
7796146304 Assign source ordering to nodes created for StoreInst. 
llvm-svn: 117404
 2010-10-26 22:14:52 +00:00
Owen Anderson
55c0bad37d Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn. 
llvm-svn: 117402
 2010-10-26 21:58:41 +00:00
Owen Anderson
570a4cdc45 Simplify classes for shift instructions, which are never commutable. 
llvm-svn: 117398
 2010-10-26 21:13:59 +00:00
Owen Anderson
0cecbd810e Provide correct NEON encodings for vshl, register and immediate forms. 
llvm-svn: 117394
 2010-10-26 20:56:57 +00:00
Jakob Stoklund Olesen
3a4c0c13eb Teach MachineBasicBlock::print() to annotate instructions and blocks with 
SlotIndexes when available.

llvm-svn: 117392
 2010-10-26 20:21:46 +00:00
Jakob Stoklund Olesen
195132633a Remmeber to print full live interval on verification error. 
llvm-svn: 117391
 2010-10-26 20:21:43 +00:00
Rafael Espindola
50d3c29c30 Add support for .ident. 
llvm-svn: 117389
 2010-10-26 19:35:47 +00:00
Jim Grosbach
04cd5e5841 Grammar. 
llvm-svn: 117388
 2010-10-26 19:34:41 +00:00
Jim Grosbach
db5b1d93c2 Nuke extraneous comment. It's applicable elsewhere, but not in this func. 
llvm-svn: 117387
 2010-10-26 19:22:23 +00:00
Andrew Trick
06fb7ed472 Jakob's review of the basic register allocator. 
llvm-svn: 117384
 2010-10-26 18:34:01 +00:00
Owen Anderson
d8e5d26a56 Add correct NEON encoding for vpadal. 
llvm-svn: 117380
 2010-10-26 18:18:03 +00:00
Rafael Espindola
adaf2ea5c6 handle X86::EH_RETURN64 and X86::EH_RETURN. 
llvm-svn: 117378
 2010-10-26 18:09:55 +00:00
Devang Patel
e544bb3842 s/beginScope/beginInstruction/g 
s/endScope/endInstruction/g

llvm-svn: 117376
 2010-10-26 17:49:02 +00:00
Owen Anderson
b7618a821f Add NEON encodings for vmov and vmvn of immediates. 
llvm-svn: 117374
 2010-10-26 17:40:54 +00:00
Jakob Stoklund Olesen
de018e2d8e Don't verify physical registers going into landing pads. 
Magic is happening that we don't understand.

llvm-svn: 117370
 2010-10-26 16:49:23 +00:00
Rafael Espindola
e38790534e Implement some relaxations for arithmetic instructions. The limitation 
on RIP relative relocations looks artificial, but this is a superset of
what we were able to do before.

llvm-svn: 117364
 2010-10-26 14:09:12 +00:00
Kalle Raiskila
64680cd5b8 Change v64 datalayout in SPU. 
The SPU ABI does not mention v64, and all examples
in C suggest v128 are treated similarily to arrays, 
we use array alignment for v64 too. This makes the 
alignment of e.g. [2 x <2 x i32>] behave "intuitively"
and similar to as if the elements were e.g. i32s.

This also makes an "unaligned store" test to be 
aligned, with different (but functionally equivalent)
code generated.

llvm-svn: 117360
 2010-10-26 10:45:47 +00:00
Evan Cheng
324e678bb7 Use instruction itinerary to determine what instructions are 'cheap'. 
llvm-svn: 117348
 2010-10-26 02:08:50 +00:00
Evan Cheng
59acb7e4cf NEON vmov's are in Neon domain. 
llvm-svn: 117347
 2010-10-26 02:03:05 +00:00
Nick Lewycky
f7dddd658f For statistics that are only used in functions declared in !NDEBUG, wrap the 
declarations in !NDEBUG to avoid -Wunused-variable warnings. Patch by
Matt Beaumont-Gay!

llvm-svn: 117345
 2010-10-26 00:51:57 +00:00