Dan Gohman
076a3b5e25
Teach MachineLICM to unfold loads from constant memory from
...
otherwise unhoistable instructions in order to allow the loads
to be hoisted.
llvm-svn: 85364
2009-10-28 03:21:57 +00:00
Evan Cheng
1babe43881
Use fconsts and fconstd to materialize small fp constants.
...
llvm-svn: 85362
2009-10-28 01:44:26 +00:00
Dan Gohman
00c9f3e905
Mark dead physregdefs dead immediately. This helps MachineSink and
...
MachineLICM and other things which run before LiveVariables is run.
llvm-svn: 85360
2009-10-28 01:13:53 +00:00
Dan Gohman
a9fb025f00
Allow constants of different types to share constant pool entries
...
if they have compatible encodings.
llvm-svn: 85359
2009-10-28 01:12:16 +00:00
Rafael Espindola
9cafe9e468
Add missing testcase.
...
llvm-svn: 85266
2009-10-27 17:59:03 +00:00
Bob Wilson
aadcaed95f
Fix Thumb2 failures by converting them to FileCheck.
...
llvm-svn: 85210
2009-10-27 06:31:02 +00:00
Bob Wilson
cc098c98de
Fix the rest of the ARM failures by converting them to FileCheck.
...
llvm-svn: 85208
2009-10-27 06:16:45 +00:00
Bob Wilson
5753a34ebb
Fix some more failures by converting to FileCheck.
...
llvm-svn: 85207
2009-10-27 05:50:28 +00:00
Bob Wilson
37191c825b
Convert to FileCheck, fixing failure due to tab change in the process.
...
llvm-svn: 85204
2009-10-27 05:30:47 +00:00
David Goodwin
f6199e95b0
Break anti-dependence breaking out into its own class.
...
llvm-svn: 85127
2009-10-26 16:59:04 +00:00
Dan Gohman
3d0c010ee4
Make LSR's OptimizeShadowIV ignore induction variables with negative
...
strides for now, because it doesn't handle them correctly. This fixes a
miscompile of SingleSource/Benchmarks/Misc-C++/ray.
This problem was usually hidden because indvars transforms such induction
variables into negations of canonical induction variables.
llvm-svn: 85118
2009-10-26 15:32:57 +00:00
Evan Cheng
4443642def
- Revert some changes from 85044, 85045, and 85047 that broke x86_64 tests and
...
bootstrapping. It's not safe to leave identity subreg_to_reg and insert_subreg
around.
- Relax register scavenging to allow use of partially "not-live" registers. It's
common for targets to operate on registers where the top bits are undef. e.g.
s0 =
d0 = insert_subreg d0<undef>, s0, 1
...
= d0
When the insert_subreg is eliminated by the coalescer, the scavenger used to
complain. The previous fix was to keep to insert_subreg around. But that's
brittle and it's overly conservative when we want to use the scavenger to
allocate registers. It's actually legal and desirable for other instructions
to use the "undef" part of d0. e.g.
s0 =
d0 = insert_subreg d0<undef>, s0, 1
...
s1 =
= s1
= d0
We probably need add a "partial-undef" marker on machine operand so the
machine verifier would not complain.
llvm-svn: 85091
2009-10-26 04:56:07 +00:00
Chris Lattner
e3508acbef
fix PR5295 where the .ll parser didn't reject a function after a global
...
or global after a function with conflicting names. Update some testcases
that were accidentally depending on this behavior.
llvm-svn: 85081
2009-10-25 23:22:50 +00:00
Evan Cheng
a308ae55a5
Add a couple of ARM cross-rc coalescing tests.
...
llvm-svn: 85051
2009-10-25 08:01:41 +00:00
Evan Cheng
1c169777ca
Update tests.
...
llvm-svn: 85050
2009-10-25 07:53:48 +00:00
Dan Gohman
b15fee5666
APInt-ify the gep scaling code, so that it correctly handles the case where
...
the scale overflows pointer-sized arithmetic. This fixes PR5281.
llvm-svn: 84954
2009-10-23 17:57:43 +00:00
Evan Cheng
aa03d9926d
Update tests for 84931.
...
llvm-svn: 84932
2009-10-23 05:58:34 +00:00
David Goodwin
82c1dd9754
Allow the target to select the level of anti-dependence breaking that should be performed by the post-RA scheduler. The default is none.
...
llvm-svn: 84911
2009-10-22 23:19:17 +00:00
Bob Wilson
8f4f73da55
Revert 84843. Evan, this was breaking some of the if-conversion tests.
...
llvm-svn: 84868
2009-10-22 16:52:21 +00:00
Evan Cheng
2edd1efa46
Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly.
...
llvm-svn: 84843
2009-10-22 06:48:32 +00:00
Evan Cheng
8fdd1661fa
Don't generate sbfx / ubfx with negative lsb field. Patch by David Conrad.
...
llvm-svn: 84813
2009-10-22 00:40:00 +00:00
Anton Korobeynikov
bbc637e96d
Use special DAG-to-DAG preprocessing to allow mem-mem instructions to be selected.
...
Yay for ASCII graphics!
llvm-svn: 84808
2009-10-22 00:16:00 +00:00
Dan Gohman
2d8e5654a8
Revert the main portion of r31856. It was causing BranchFolding
...
to break up CFG diamonds by banishing one of the blocks to the end of
the function, which is bad for code density and branch size.
This does pessimize MultiSource/Benchmarks/Ptrdist/yacr2, the
benchmark cited as the reason for the change, however I've examined
the code and it looks more like a case of gaming a particular
branch than of being generally applicable.
llvm-svn: 84803
2009-10-22 00:03:58 +00:00
Jim Grosbach
452de96b04
Improve handling of immediates by splitting 32-bit immediates into two 16-bit
...
immediate operands when they will fit into the using instruction.
llvm-svn: 84778
2009-10-21 20:44:34 +00:00
Anton Korobeynikov
23ea13afbb
Add DAG printing for RMW stuff debugging
...
llvm-svn: 84776
2009-10-21 19:18:28 +00:00
Anton Korobeynikov
d233af8049
RMW preprocessing stuff was incorrect. Grab the stuff from x86 backend and disable some tests until it will be clever enough to handle them.
...
llvm-svn: 84775
2009-10-21 19:17:55 +00:00
Evan Cheng
275a09e55d
Match more patterns to movt.
...
llvm-svn: 84751
2009-10-21 08:15:52 +00:00
Dan Gohman
c74da745a7
Revert r84658 and r84691. They were causing llvm-gcc bootstrap to fail.
...
llvm-svn: 84727
2009-10-21 01:44:44 +00:00
Anton Korobeynikov
172b91c273
Add reg-imm tests
...
llvm-svn: 84705
2009-10-21 00:11:44 +00:00
Anton Korobeynikov
7b6fe9f251
Fix invalid for vector types fneg(bitconvert(x)) => bitconvert(x ^ sign)
...
transform.
llvm-svn: 84683
2009-10-20 21:37:45 +00:00
David Goodwin
048b80a70a
Checkpoint more aggressive anti-dependency breaking for post-ra scheduler.
...
llvm-svn: 84658
2009-10-20 19:54:44 +00:00
Dan Gohman
e0ace5c4eb
Make TranslateX86CC return COND_INVALID instead of aborting when it
...
encounters an OEQ or UNE comparison, and update its callers to check
for this return status and recover. This fixes a problem resulting from
the LowerOperation hooks being called from LegalizeVectorOps, because
LegalizeVectorOps only lowers vectors, so OEQ and UNE comparisons may
still be at large. This fixes PR5092.
llvm-svn: 84640
2009-10-20 16:22:37 +00:00
Dan Gohman
b1528d73d1
Re-apply r84295, with fixes to how the loop "top" and "bottom" blocks are
...
tracked. Instead of trying to manually keep track of these locations
while doing complex modifications, just recompute them when they're needed.
This fixes a bug in which the TopMBB and BotMBB were not correctly updated,
leading to invalid transformations.
llvm-svn: 84598
2009-10-20 04:50:37 +00:00
Evan Cheng
029a85b791
If the physical register being spilled does not have an interval, spill its sub-registers instead.
...
llvm-svn: 84586
2009-10-20 01:31:09 +00:00
Jim Grosbach
2fb5eb1264
Enable allocation of R3 in Thumb1
...
llvm-svn: 84563
2009-10-19 22:57:03 +00:00
Chris Lattner
b9bbaf7f4d
convert to filecheck syntax and make a lot more aggressive.
...
llvm-svn: 84517
2009-10-19 18:27:56 +00:00
Anton Korobeynikov
26ed697cf2
Revert r84295, this unbreaks llvm-gcc bootstrap on x86-64/linux
...
llvm-svn: 84516
2009-10-19 18:21:09 +00:00
Chris Lattner
6fd5bc3ba0
rename test
...
llvm-svn: 84515
2009-10-19 18:18:07 +00:00
Torok Edwin
e6df0e6397
Fix PR5247, "lock addq" pattern (and other atomics), it DOES modify EFLAGS.
...
LLC was scheduling compares before the adds causing wrong branches to be taken
in programs, resulting in misoptimized code wherever atomic adds where used.
llvm-svn: 84485
2009-10-19 11:00:58 +00:00
Daniel Dunbar
347b151bc2
Teach lit that the .c files in 'test/CodeGen/CellSPU/useful-harnesses' aren't tests.
...
llvm-svn: 84460
2009-10-19 03:53:55 +00:00
Nate Begeman
1308a36647
Add support for matching shuffle patterns with palignr.
...
llvm-svn: 84459
2009-10-19 02:17:23 +00:00
Evan Cheng
eb82c3743a
Turn on post-alloc scheduling for x86.
...
llvm-svn: 84431
2009-10-18 19:57:27 +00:00
Dan Gohman
f5225573b7
Enhance CodePlacementOpt's unconditional intra-loop branch elimination logic
...
to be more general and understand more varieties of loops.
Teach CodePlacementOpt to reorganize the basic blocks of a loop so that
they are contiguous. This also includes a fair amount of logic for preserving
fall-through edges while doing so. This fixes a BranchFolding-ism where blocks
which can't be made to use a fall-through edge and don't conveniently fit
anywhere nearby get tossed out to the end of the function.
llvm-svn: 84295
2009-10-17 00:32:43 +00:00
Mon P Wang
72d9f1ecfe
Update tests to use FileCheck
...
llvm-svn: 84282
2009-10-16 22:09:05 +00:00
Mon P Wang
7d294603e7
Add test case for r84279
...
llvm-svn: 84280
2009-10-16 22:07:19 +00:00
Dan Gohman
ef1f246d88
Move zext and sext casts fed by loads into the same block as the
...
load, to help SelectionDAG fold them into the loads, unless
conditions are unfavorable.
llvm-svn: 84271
2009-10-16 20:59:35 +00:00
Evan Cheng
b1580b5c48
Enable post-alloc scheduling for all ARM variants except for Thumb1.
...
llvm-svn: 84249
2009-10-16 06:11:08 +00:00
Sandeep Patel
c0762ba283
Branches must be the last instruction in a Thumb2 IT block. Approved by Evan Cheng.
...
llvm-svn: 84212
2009-10-15 22:25:32 +00:00
Sanjiv Gupta
d279da3360
Re-apply 84180 with the fixed test case.
...
llvm-svn: 84195
2009-10-15 19:26:25 +00:00
Jakob Stoklund Olesen
311774b780
Move Blackfin intrinsics into the Target/Blackfin directory.
...
llvm-svn: 84194
2009-10-15 18:50:52 +00:00
Dan Gohman
27c126770a
Make CodePlacementOpt align loops, rather than loop headers. The
...
header is just the entry block to the loop, and it needn't be at
the top of the loop in the code layout.
Remove the code that suppressed loop alignment for outer loops,
so that outer loops are aligned.
llvm-svn: 84158
2009-10-15 00:36:22 +00:00
Evan Cheng
f46b194f84
When LiveVariables is adding implicit-def to model "partial dead", add the earlyclobber marker if the superreg def has it.
...
llvm-svn: 84153
2009-10-14 23:39:27 +00:00
Dan Gohman
1d10570630
Fix this test to account for a movl $0 being emitted as an xor now,
...
and convert it to FileCheck.
llvm-svn: 84065
2009-10-14 00:28:48 +00:00
Bob Wilson
d66a3fd73b
Revise ARM inline assembly memory operands to require the memory address to
...
be in a register. The previous use of ARM address mode 2 was completely
arbitrary and inappropriate for Thumb. Radar 7137468.
llvm-svn: 84022
2009-10-13 20:50:28 +00:00
Sandeep Patel
1584038783
Add ARMv6T2 SBFX/UBFX instructions. Approved by Anton Korobeynikov.
...
llvm-svn: 84009
2009-10-13 18:59:48 +00:00
Dan Gohman
b5a0207b98
Don't forget to mark RAX as live-out of the function when arranging for
...
it to hold the address of an sret return value, for x86-64 ABI purposes.
Also, fix the test that was originally intended to test this to actually
test it, using FileCheck.
llvm-svn: 83853
2009-10-12 16:36:12 +00:00
Benjamin Kramer
34c117d8b7
Eliminate some redundant llvm-as calls.
...
llvm-svn: 83837
2009-10-12 09:31:55 +00:00
Anton Korobeynikov
deadc3ed2d
Add missed mem-mem move patterns
...
llvm-svn: 83812
2009-10-11 23:03:53 +00:00
Anton Korobeynikov
986885b62e
Add MSP430 mem-mem insts support. Patch by Brian Lucas with some my refinements
...
llvm-svn: 83811
2009-10-11 23:03:28 +00:00
Anton Korobeynikov
fb18fbf80d
Add bunch of MSP430 'feature' tests. Patch by Brian Lucas with some my refinements
...
llvm-svn: 83809
2009-10-11 23:02:38 +00:00
Anton Korobeynikov
329def1675
Implement 'm' memory operand properly
...
llvm-svn: 83785
2009-10-11 19:14:21 +00:00
Anton Korobeynikov
1f9ff55cbc
It seems that OR operation does not affect status reg at all.
...
Remove impdef of SRW. This fixes PR4779
llvm-svn: 83739
2009-10-10 22:17:47 +00:00
Dan Gohman
b535009219
Update this test; the code is the same but it gets counted as one
...
fewer remat.
llvm-svn: 83690
2009-10-09 23:31:04 +00:00
Dan Gohman
f2ae9c6220
Fix the x86 test-shrink optimization so that it doesn't shrink comparisons
...
when one of the bits being tested would end up being the sign bit in the
narrower type, and a signed comparison is being performed, since this would
change the result of the signed comparison. This fixes PR5132.
llvm-svn: 83670
2009-10-09 20:35:19 +00:00
Bob Wilson
011e458c11
Merge a bunch of NEON tests into larger files so they run faster.
...
llvm-svn: 83667
2009-10-09 20:20:54 +00:00
Bob Wilson
de71518edb
Convert some ARM tests with lots of greps to use FileCheck.
...
llvm-svn: 83651
2009-10-09 17:20:46 +00:00
Evan Cheng
439044f330
Fix a logic error that caused non-rematable loop invariants loads to be licm'ed out of loop.
...
llvm-svn: 83622
2009-10-09 06:21:52 +00:00
Bob Wilson
d48cacb92f
Commit one last NEON test to use FileCheck. That's all of them now!
...
llvm-svn: 83617
2009-10-09 05:31:56 +00:00
Bob Wilson
a8746e6bd1
Convert more NEON tests to use FileCheck.
...
llvm-svn: 83616
2009-10-09 05:14:48 +00:00
Evan Cheng
b1f6b5fccc
Reset kill markers after live interval is reconstructed.
...
llvm-svn: 83608
2009-10-09 01:17:11 +00:00
Bob Wilson
8092fef09a
Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.
...
llvm-svn: 83600
2009-10-09 00:01:36 +00:00
Bob Wilson
979cb24a81
Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.
...
llvm-svn: 83598
2009-10-08 23:51:31 +00:00
Bob Wilson
233992bc56
Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.
...
llvm-svn: 83596
2009-10-08 23:38:24 +00:00
Bob Wilson
395adfabef
Convert more NEON tests to use FileCheck.
...
llvm-svn: 83595
2009-10-08 23:33:03 +00:00
Bob Wilson
5b96a53ffe
Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.
...
Also fix some copy-and-paste errors in previous changes.
llvm-svn: 83590
2009-10-08 22:53:57 +00:00
Bob Wilson
1fe8b7e27c
Convert more NEON tests to use FileCheck.
...
llvm-svn: 83587
2009-10-08 22:33:53 +00:00
Bob Wilson
7209d78713
Add codegen support for NEON vld3lane intrinsics with 128-bit vectors.
...
llvm-svn: 83585
2009-10-08 22:27:33 +00:00
Anton Korobeynikov
f9c811c948
Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via movt/movw pair.
...
llvm-svn: 83572
2009-10-08 20:43:22 +00:00
Bob Wilson
3a55fe2105
Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.
...
llvm-svn: 83568
2009-10-08 18:56:10 +00:00
Richard Osborne
1719935e3f
Add some peepholes for signed comparisons using ashr X, X, 32.
...
llvm-svn: 83549
2009-10-08 15:38:17 +00:00
Bob Wilson
225627ec81
Convert more NEON tests to use FileCheck.
...
llvm-svn: 83528
2009-10-08 06:02:10 +00:00
Bob Wilson
276bdabb9a
Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors.
...
llvm-svn: 83526
2009-10-08 05:18:18 +00:00
Bob Wilson
8aa1d328b5
Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors.
...
llvm-svn: 83518
2009-10-08 00:28:28 +00:00
Bob Wilson
958e4ae815
Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors.
...
llvm-svn: 83513
2009-10-08 00:21:01 +00:00
Bob Wilson
729cd181a2
Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors.
...
llvm-svn: 83508
2009-10-07 23:54:04 +00:00
Bob Wilson
c7baa2832f
Convert more NEON tests to use FileCheck.
...
llvm-svn: 83507
2009-10-07 23:47:21 +00:00
Bob Wilson
3cbf156518
Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors.
...
llvm-svn: 83506
2009-10-07 23:39:57 +00:00
Bob Wilson
0ffa9679a5
Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors.
...
llvm-svn: 83502
2009-10-07 22:57:01 +00:00
Dale Johannesen
ba62bb565d
Fix handling of x86 'R' constraint.
...
llvm-svn: 83499
2009-10-07 22:47:20 +00:00
Bob Wilson
97bab9ef32
Convert more NEON tests to use FileCheck.
...
llvm-svn: 83497
2009-10-07 22:30:19 +00:00
Bob Wilson
a367eb439c
Convert test to FileCheck.
...
llvm-svn: 83487
2009-10-07 20:51:42 +00:00
Bob Wilson
cee91108da
Add codegen support for NEON vst4 intrinsics with 128-bit vectors.
...
llvm-svn: 83486
2009-10-07 20:49:18 +00:00
Bob Wilson
af14187764
Add codegen support for NEON vst3 intrinsics with 128-bit vectors.
...
llvm-svn: 83484
2009-10-07 20:30:08 +00:00
Bob Wilson
62a3e55cea
Add codegen support for NEON vst2 intrinsics with 128-bit vectors.
...
llvm-svn: 83482
2009-10-07 18:47:39 +00:00
Bob Wilson
9bb47b3e5d
Add codegen support for NEON vld4 intrinsics with 128-bit vectors.
...
llvm-svn: 83479
2009-10-07 18:09:32 +00:00
Bob Wilson
b38401ccef
Add codegen support for NEON vld3 intrinsics with 128-bit vectors.
...
llvm-svn: 83471
2009-10-07 17:24:55 +00:00
Bob Wilson
39328dad67
Add tests for vld2 of 128-bit vectors.
...
llvm-svn: 83468
2009-10-07 17:19:13 +00:00
Bob Wilson
636d635cc1
Update NEON struct names to match llvm-gcc changes.
...
(This is not required for correctness but might help with sanity.)
llvm-svn: 83415
2009-10-06 21:16:19 +00:00
Dan Gohman
a803c712dd
Instead of printing unnecessary basic block labels as labels in
...
verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.
Also, factor out the relevant code out of all the targets and into
target-independent code.
llvm-svn: 83392
2009-10-06 17:38:38 +00:00
Evan Cheng
d93fbb28ed
Fix tests.
...
llvm-svn: 83241
2009-10-02 06:53:57 +00:00