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2603 Commits

Author SHA1 Message Date
Chris Lattner
643e6c2b9e Eliminate some GCC warnings from the generated code 
llvm-svn: 24897
 2005-12-21 05:31:05 +00:00
Evan Cheng
4106feae54 Fix the semantic of Requires<[cond]> to mean if (!cond) goto PXXFail; 
llvm-svn: 24883
 2005-12-20 20:08:01 +00:00
Chris Lattner
28cf136707 This ugly patch works around a GCC bug where it is compiling SelectCode to 
use too much stack space, overflowing the stack for large functions.  Instead
of emitting new SDOperands in each match block, we emit some common ones at
the top of SelectCode then reuse them when possible.

This reduces the stack size of SelectCode from 28K to 21K.  Note that GCC
compiles it to 512 bytes :-/

I've filed GCC PR 25505 to track this.

llvm-svn: 24882
 2005-12-20 19:41:03 +00:00
Evan Cheng
98c6b52236 Now support instructions with implicit write to non-flag registers. 
llvm-svn: 24878
 2005-12-20 07:37:41 +00:00
Evan Cheng
63d897b0e2 Lefted out a fix in the previous check in. 
llvm-svn: 24873
 2005-12-20 00:06:17 +00:00
Evan Cheng
e93635d0ac Fix another bug related to chain / flag. 
llvm-svn: 24868
 2005-12-19 22:40:04 +00:00
Evan Cheng
c56f9824db Fixes for a number of bugs: save flag results in CodeGenMap, folded chains 
may not all have ResNo == 0.

llvm-svn: 24858
 2005-12-19 07:18:51 +00:00
Chris Lattner
abadc27396 Handle basic block nodes 
llvm-svn: 24833
 2005-12-18 21:05:44 +00:00
Chris Lattner
5dfbcbb8be More fixes for Selection of copyto/fromreg with a flag 
llvm-svn: 24829
 2005-12-18 15:45:51 +00:00
Chris Lattner
5322894560 Select copytoreg and copyfromreg nodes that have flag operands correctly. 
llvm-svn: 24827
 2005-12-18 15:28:25 +00:00
Evan Cheng
54695fd38d Support for read / write from explicit registers with FlagVT type. 
llvm-svn: 24753
 2005-12-17 01:19:28 +00:00
Evan Cheng
297c23d2e7 Added support to specify predicates. 
llvm-svn: 24715
 2005-12-14 22:02:59 +00:00
Evan Cheng
81f4683257 Skip over srcvalue nodes when generating ISEL code. 
llvm-svn: 24704
 2005-12-14 02:21:57 +00:00
Evan Cheng
518610154b Bug fix: CodeGenMap[N] = ... -> CodeGenMap[N.getValue(0)] = ... 
llvm-svn: 24680
 2005-12-12 23:45:21 +00:00
Evan Cheng
1bc6443c22 At top of generated isel SelectCode() is this: 
if (!N.Val->hasOneUse()) {
    std::map<SDOperand, SDOperand>::iterator CGMI = CodeGenMap.find(N);
    if (CGMI != CodeGenMap.end()) return CGMI->second;
  }

Suppose a DAG like this:

           X
         ^   ^
        /     \
      USE1    USE2

Suppose USE1 is being selected first and during which X is selected and
returned a new node. After this, USE1 is no longer an use of X. During USE2
selection, X will be selected again since it has only one use!

The fix is to always query CodeGenMap.

llvm-svn: 24679
 2005-12-12 23:22:48 +00:00
Evan Cheng
e7f40a3b8b Bug fix: finding the correct incoming chain for pattern with nested src operand. And a minor change to make output code slightly more readible. 
llvm-svn: 24669
 2005-12-12 19:37:43 +00:00
Nate Begeman
a0e26b25f4 Add support for TargetConstantPool nodes to the dag isel emitter, and use 
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.

llvm-svn: 24657
 2005-12-10 02:36:00 +00:00
Evan Cheng
c8ebe5f6eb Stop emitting a redudant type check for complex pattern node. 
llvm-svn: 24655
 2005-12-10 01:57:33 +00:00
Evan Cheng
8300ae66d1 For instructions which produce no result, e.g. store, chain's Resno == 0. 
llvm-svn: 24652
 2005-12-10 00:09:17 +00:00
Chris Lattner
aaec1f6faa Add a new SDTCisPtrTy constraint, which indicates that an operand must have 
the same type as the pointer type for a target.

llvm-svn: 24649
 2005-12-09 22:57:42 +00:00
Evan Cheng
9586e87904 * Do not allow nodes which produce chain results (e.g. loads) to be folded if 
it has more than one real use (non-chain uses).
* Record folded chain producing node in CodeGenMap.
* Do not fold a chain producing node if it has already been selected as an
  operand of a chain use.

llvm-svn: 24647
 2005-12-09 22:45:35 +00:00
Evan Cheng
18134d8c96 Prevent folding of instructions which produce chains that have more than 1 real use 
llvm-svn: 24643
 2005-12-09 06:06:08 +00:00
Evan Cheng
1d7435f478 * Make sure complex pattern operands are selected first since their select 
functions can return false and causing the instruction pattern match to fail.
* Code clean up.

llvm-svn: 24642
 2005-12-09 00:48:42 +00:00
Evan Cheng
ed205f20a5 * Added an explicit type field to ComplexPattern. 
* Renamed MatchingNodes to RootNodes.

llvm-svn: 24636
 2005-12-08 02:14:08 +00:00
Evan Cheng
d11d31e0bd Added support for ComplexPattern. These are patterns that require C++ pattern 
matching code that is not currently auto-generated by tblgen, e.g. X86
addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4.

llvm-svn: 24634
 2005-12-08 02:00:36 +00:00
Evan Cheng
3d51fa3305 * Infer instruction property hasCtrlDep from pattern if it has one. 
* Fixed a bug related to hasCtrlDep property use.

llvm-svn: 24610
 2005-12-05 23:08:55 +00:00
Chris Lattner
8ef7c0297c Implement PR673: for explicit register references, use type information 
if available

llvm-svn: 24597
 2005-12-05 02:36:37 +00:00
Chris Lattner
e64b6d64d0 Add some methods 
llvm-svn: 24596
 2005-12-05 02:35:08 +00:00
Chris Lattner
5c7d4632f6 Generate code to silence bogus GCC warnings. 
llvm-svn: 24593
 2005-12-05 00:48:51 +00:00
Evan Cheng
cf4f349880 * Commit the fix (by Chris) for a tblgen type inferencing bug. 
* Enhanced tblgen to handle instructions which have chain operand and writes a
chain result.
* Enhanced tblgen to handle instructions which produces no results. Part of
the change is a temporary hack which relies on instruction property (e.g.
isReturn, isBranch). The proper fix would be to change the .td syntax to
separate results dag from ops dag.

llvm-svn: 24587
 2005-12-04 08:18:16 +00:00
Nate Begeman
811a41a87c Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.

llvm-svn: 24563
 2005-12-01 04:51:06 +00:00
Evan Cheng
9c3508e1ab Teach tblgen to accept register source operands in patterns, e.g. 
def SHL8rCL  : I<0xD2, MRM4r, (ops R8 :$dst, R8 :$src),
                 "shl{b} {%cl, $dst|$dst, %CL}",
                 [(set R8:$dst, (shl R8:$src, CL))]>, Imp<[CL],[]>;

This generates a CopyToReg operand and added its 2nd result to the shl as
a flag operand.

llvm-svn: 24557
 2005-12-01 00:18:45 +00:00
Nate Begeman
b79a074c0a Nuke CodeGenInstruction's ValueType member, it is no longer used. 
llvm-svn: 24556
 2005-12-01 00:12:04 +00:00
Nate Begeman
466eaefd38 Stop checking the ValueType of the CodeGenInstruction. Instead, use the 
ValueType from the RegisterClass or Operands.  This step is necessary to
allow RegisterClasses to have multiple ValueTypes.

llvm-svn: 24555
 2005-12-01 00:06:14 +00:00
Nate Begeman
3935bea6c1 fit into 80 columns 
llvm-svn: 24554
 2005-11-30 23:58:18 +00:00
Chris Lattner
7678189bc6 Make the code generated by tblgen return the result of SelectNodeTo, to 
permit future changes.

llvm-svn: 24553
 2005-11-30 23:08:45 +00:00
Nate Begeman
84be54b731 No longer track value types for asm printer operands, and remove them as 
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.

llvm-svn: 24541
 2005-11-30 18:54:35 +00:00
Nate Begeman
ed43f5159f Fix some copy and paste typos. 
llvm-svn: 24540
 2005-11-30 18:37:14 +00:00
Evan Cheng
5395a80640 Better error message when unrecognized opcode is seen. 
llvm-svn: 24519
 2005-11-29 18:44:58 +00:00
Nate Begeman
e4d7c1b7dd Add the new vector types to tablegen 
llvm-svn: 24514
 2005-11-29 06:19:38 +00:00
Chris Lattner
3727cc7ac0 Initialize this variable on all paths, fixing a crasher in windows. Thanks 
to JeffC for pointing this out.

llvm-svn: 24426
 2005-11-19 07:48:33 +00:00
Chris Lattner
a36ad00a9a Teach tblgen about instruction operands that have multiple MachineInstr 
operands, digging into them to find register values (used on X86).  Patch
by Evan Cheng!

llvm-svn: 24424
 2005-11-19 07:05:57 +00:00
Chris Lattner
6b83dcf750 Validate that the input to 'Pat' patterns is sane. 
llvm-svn: 24393
 2005-11-17 17:43:52 +00:00
Chris Lattner
464f4402cf teach tblgen to be smart enough to handle tglobaladdr nodes 
llvm-svn: 24391
 2005-11-17 07:39:45 +00:00
Chris Lattner
b545ab1ac1 fix a tblgen bug that Evan ran into, where we would lose the '$src' name 
on patterns like "(set R32:$dst, (i32 imm:$src))"

llvm-svn: 24383
 2005-11-16 23:14:54 +00:00
Jim Laskey
42681c1d58 1. Remove ranges from itinerary data. 
2. Tidy up the subtarget emittined code.

llvm-svn: 24172
 2005-11-03 22:47:41 +00:00
Chris Lattner
5a4c453d60 Reject integer literals that are out of range for their type. 
llvm-svn: 24162
 2005-11-03 05:46:11 +00:00
Chris Lattner
e3897f6c24 Add support for immediates directly in the pattern, this allows itanium to 
define:

def : Pat<(i1 1), (CMPEQ r0, r0)>;

llvm-svn: 24149
 2005-11-02 06:49:14 +00:00
Jim Laskey
4cb1e29b27 Allow itineraries to be passed through the Target Machine. 
llvm-svn: 24139
 2005-11-01 20:06:59 +00:00
Jeff Cohen
1a0261fe4f Keep VC++ happy. 
llvm-svn: 24137
 2005-11-01 18:04:06 +00:00
Jim Laskey
1c66d7fb02 Emit itinerary class in instruction info. 
llvm-svn: 24122
 2005-10-31 17:16:46 +00:00
Jim Laskey
d79749c8a5 Generate cpu to itinerary map. 
llvm-svn: 24121
 2005-10-31 17:16:01 +00:00
Chris Lattner
9fd7ba3c84 Make negative immediates in patterns work correctly, silence some warnings 
building the itanium backend.

llvm-svn: 24095
 2005-10-29 16:39:40 +00:00
Chris Lattner
d44a96088b Switch more code over to using getValueAsListOfDefs. Look at all the -'s. :) 
llvm-svn: 24074
 2005-10-28 22:59:53 +00:00
Chris Lattner
06c5e018ef Rename Record::getValueAsListDef to getValueAsListOfDefs, to more accurately 
reflect what it is.
Convert some more code over to use it.

llvm-svn: 24072
 2005-10-28 22:49:02 +00:00
Chris Lattner
dea00d4a37 Use the new interface Jim added 
llvm-svn: 24071
 2005-10-28 22:43:25 +00:00
Jim Laskey
b86d73937d Removed Mr. Smith from the code. 
llvm-svn: 24070
 2005-10-28 21:47:29 +00:00
Jim Laskey
7bfb35c1ef Added method to return a vector of records for a ListInit of Def field. This 
simplifies using list of records.

llvm-svn: 24069
 2005-10-28 21:46:31 +00:00
Jim Laskey
dba6376b92 Add some commentary. 
llvm-svn: 24055
 2005-10-28 15:20:43 +00:00
Jeff Cohen
744bfe72c0 Keep Visual Studio happy. 
llvm-svn: 24052
 2005-10-28 01:43:09 +00:00
Jim Laskey
1910cbd4dc Now generating instruction itineraries for scheduling. Not my best work, but... 
llvm-svn: 24050
 2005-10-27 19:47:21 +00:00
Jim Laskey
75494b3a8b Simplify. 
llvm-svn: 24015
 2005-10-26 17:49:21 +00:00
Jim Laskey
9ce53d8411 Give full control of subtarget features over to table generated code. 
llvm-svn: 24013
 2005-10-26 17:30:34 +00:00
Chris Lattner
b462de0868 Condcodes are in the ISD namespace 
llvm-svn: 24010
 2005-10-26 17:02:02 +00:00
Chris Lattner
acc8e41a83 Add support for CondCode's 
llvm-svn: 24008
 2005-10-26 16:59:37 +00:00
Chris Lattner
60d02fd01f Emit some boilerplate for targets 
llvm-svn: 23983
 2005-10-25 20:35:14 +00:00
Jim Laskey
bb03da2612 Refactored to make room for more stuff (scheduling info.) 
llvm-svn: 23975
 2005-10-25 15:16:36 +00:00
Chris Lattner
ffa72e8d79 Fix an incompatibility with GCC 4.1, thanks to Vladimir Merzliakov 
for pointing this out!

llvm-svn: 23963
 2005-10-24 15:04:15 +00:00
Chris Lattner
b621e451ba Add the needed #include, emit enums with the sizes of tables, remove 
definitions from the LLVM namespace, since they are all static.

llvm-svn: 23907
 2005-10-23 22:33:08 +00:00
Chris Lattner
fbab2de9dd Remove the obsolete instr selector emitter 
llvm-svn: 23894
 2005-10-23 05:47:52 +00:00
Jim Laskey
f0f90be71c Sort the features and processor lists for the sake of search (and maintainers.) 
llvm-svn: 23879
 2005-10-22 07:59:56 +00:00
Jim Laskey
1fbdee408d Plugin new subtarget backend into the build. 
llvm-svn: 23870
 2005-10-21 19:05:19 +00:00
Jim Laskey
c2e76396fc New TableGen backends for subtarget information. Only command line stuff 
active now.  Scheduling itinerary next.

llvm-svn: 23869
 2005-10-21 19:00:04 +00:00
Chris Lattner
b018f20c7b Make tblgen emit: 
tblgen: In ZAPNOTi: Cannot use 'IZAPX' in an input pattern!
for a bad pattern, instead of an ugly assertion.

llvm-svn: 23854
 2005-10-21 01:19:59 +00:00
Chris Lattner
1bac5bc8a3 add support for literal immediates in patterns to match, allowing us to 
write things like this:

def : Pat<(add GPRC:$in, 12),
          (ADD12 GPRC:$in)>;

Andrew: if this isn't enough or doesn't work for you, please lemme know.
llvm-svn: 23819
 2005-10-19 04:41:05 +00:00
Chris Lattner
1b8609b570 Add basic support for integer constants in pattern results. 
llvm-svn: 23817
 2005-10-19 04:30:56 +00:00
Chris Lattner
cac2ff4864 Fix some checking that was causing duraid to get a perplexing assertion 
instead of a happy error message

llvm-svn: 23816
 2005-10-19 04:12:14 +00:00
Chris Lattner
39538be7a5 Add support for patterns that have physical registers in them. Testcase: 
def : Pat<(trunc G8RC:$in),
          (OR8To4 G8RC:$in, X0)>;

Even though this doesn't make any sense on PPC :)

llvm-svn: 23815
 2005-10-19 02:07:26 +00:00
Chris Lattner
2a81cf4395 Asserting here is to violent 
llvm-svn: 23814
 2005-10-19 01:55:23 +00:00
Chris Lattner
0816495607 Nate wants to define 'Pat's which turn into instructions that don't have 
patterns.  Certainly a logical request.

llvm-svn: 23810
 2005-10-19 01:27:22 +00:00
Chris Lattner
fbf3838a61 Duraid pointed out that it is impolite to emit PPC:: into the IA64 backend 
llvm-svn: 23780
 2005-10-18 04:41:01 +00:00
Chris Lattner
a4dc9eda40 Make the generated code significantly more memory efficient, by using 
SelectNodeTo instead of getTargetNode when possible.

llvm-svn: 23758
 2005-10-16 01:41:58 +00:00
Chris Lattner
5a4ed7e8ab Implement the last major missing piece in the DAG isel generator: when emitting 
a pattern match, make sure to emit the (minimal number of) type checks that
verify the pattern matches this specific instruction.  This allows FMA32
patterns to not match double expressions for example.

llvm-svn: 23748
 2005-10-15 21:34:21 +00:00
Chris Lattner
3aa7a188b9 Now that we have int/fp lattice values, implement the SDTCisOpSmallerThanOp 
type constraint.  This lets tblgen realize that it doesn't need any dynamic
type checks for fextend/fround on PPC (and many other targets), because there
are only two fp types.

llvm-svn: 23730
 2005-10-14 06:25:00 +00:00
Chris Lattner
28621890d9 Fairly serious rework of the typing code to add new int/fp lattice values. 
Overall, no functionality change yet though.

llvm-svn: 23729
 2005-10-14 06:12:03 +00:00
Chris Lattner
c5dbaceaee simplify the code a bit 
llvm-svn: 23728
 2005-10-14 05:08:37 +00:00
Chris Lattner
d83bbd0f14 Add basic support for recognizing a new SDTCisOpSmallerThanOp type constraint 
llvm-svn: 23725
 2005-10-14 04:53:53 +00:00
Chris Lattner
81047cdfc0 Implement a couple of new (important) features. 
1. If an operation has to be int or fp and the target only supports one
   int or fp type, relize that the op has to have that type.
2. If a target has operations on multiple types, do not emit matching code
   for patterns involving those operators, since we do not emit the code to
   check for them yet.  This prevents PPC from generating FP ops currently.

Also move some code around into more logical places.

llvm-svn: 23724
 2005-10-14 04:11:13 +00:00
Chris Lattner
ee8c8e4562 Do not let getLegalValueTypes return a list with duplicates in it 
llvm-svn: 23723
 2005-10-14 03:54:49 +00:00
Chris Lattner
cccadf388c Emit the value type for each register class. 
llvm-svn: 23584
 2005-10-02 06:23:37 +00:00
Chris Lattner
c744d9398f Rename MRegisterDesc -> TargetRegisterDesc for consistency 
llvm-svn: 23564
 2005-09-30 17:49:27 +00:00
Chris Lattner
f29abb6f4a remove some more initializers 
llvm-svn: 23562
 2005-09-30 17:41:05 +00:00
Chris Lattner
6124aae803 trim down the target info structs now that we have a preferred spill register class for each callee save register 
llvm-svn: 23560
 2005-09-30 17:35:22 +00:00
Chris Lattner
2da37b0d74 Compute a preferred spill register class for each callee-save register 
llvm-svn: 23553
 2005-09-30 06:44:45 +00:00
Chris Lattner
7b69bfc7b6 Fix a warning 
llvm-svn: 23550
 2005-09-30 06:09:50 +00:00
Chris Lattner
7e3972b706 Regenerate 
llvm-svn: 23549
 2005-09-30 04:53:25 +00:00
Chris Lattner
2b7ab1f445 Refactor this a bit to move ParsingTemplateArgs to only apply to classes, 
not defs.

Implement support for forward definitions of classes.  This implements
TableGen/ForwardRef.td.

llvm-svn: 23548
 2005-09-30 04:53:04 +00:00
Chris Lattner
c0830ec129 Regenerate 
llvm-svn: 23546
 2005-09-30 04:42:56 +00:00
Chris Lattner
2e4e3a8678 Generate a parse error instead of a checked exception if template args are 
used on a def.

llvm-svn: 23545
 2005-09-30 04:42:31 +00:00
Chris Lattner
3a8b099f34 regenerate 
llvm-svn: 23543
 2005-09-30 04:11:27 +00:00
Chris Lattner
baa6d77025 Refactor the grammar a bit to implement TableGen/ForwardRef.td 
llvm-svn: 23542
 2005-09-30 04:10:49 +00:00
Chris Lattner
7be456ae2f allow regs to be in multiple reg classes 
llvm-svn: 23540
 2005-09-30 01:33:48 +00:00
Chris Lattner
10a8d57590 Teach tablegen to reassociate operators when possible. This allows it to 
find all of teh pattern matches for EQV from one definition

llvm-svn: 23529
 2005-09-29 22:36:54 +00:00
Chris Lattner
31a9d318a3 Teach tblgen to build permutations of instructions, so that the target author 
doesn't have to specify them manually.  It currently handles associativity,
e.g. knowing that (X*Y)+Z  also matches  X+(Y*Z)  and will be extended in
the future.

It is smart enough to not introduce duplicate patterns or patterns that can
never match.

llvm-svn: 23526
 2005-09-29 19:28:10 +00:00
Chris Lattner
86a339dc34 add support for an associative marker 
llvm-svn: 23502
 2005-09-28 20:58:06 +00:00
Chris Lattner
0231f57a46 Emit an error if instructions or patterns are defined but can never match. 
Currently we check that immediate values live on the RHS of commutative
operators.  Defining ORI like this, for example:

def ORI   : DForm_4<24, (ops GPRC:$dst, GPRC:$src1, u16imm:$src2),
                    "ori $dst, $src1, $src2",
                    [(set GPRC:$dst, (or immZExt16:$src2, GPRC:$src1))]>;

results in:

tblgen: In ORI: Instruction can never match: Immediate values must be on the RHS of commutative operators!
llvm-svn: 23501
 2005-09-28 19:27:25 +00:00
Chris Lattner
18ccb532b5 collect commutativity information 
llvm-svn: 23499
 2005-09-28 18:28:29 +00:00
Chris Lattner
5dae8ab260 Prefer cheaper patterns to more expensive ones. Print the costs to the generated 
file

llvm-svn: 23492
 2005-09-28 17:57:56 +00:00
Chris Lattner
eeead91a84 Select Constant nodes to TargetConstant nodes 
llvm-svn: 23488
 2005-09-28 16:58:06 +00:00
Chris Lattner
cdeed56e4e memoize the assert results 
llvm-svn: 23457
 2005-09-26 22:10:24 +00:00
Chris Lattner
5c061685a2 Emit the switch stmt cases in alphabetical order instead of pointer order, 
which is not stable.

llvm-svn: 23456
 2005-09-26 21:59:35 +00:00
Chris Lattner
ad79bd3f47 implement a fixme: only select values once, even if used multiple times. 
llvm-svn: 23454
 2005-09-26 21:53:26 +00:00
Jeff Cohen
a5c4ff5a96 Fix VC++ build errors. 
llvm-svn: 23431
 2005-09-25 19:04:43 +00:00
Chris Lattner
fc89cbf740 memoize translations 
llvm-svn: 23419
 2005-09-24 00:50:51 +00:00
Chris Lattner
9e2188cf4e Teach the DAG isel generator to emit code that creates nodes. 
Fix a few corner cases parsing things like (i32 imm:$foo)

llvm-svn: 23417
 2005-09-24 00:40:24 +00:00
Chris Lattner
7c7fbdc7e1 Emit better code (no more copies for var references), and support DAG patterns 
(e.g. things like rotates).

llvm-svn: 23416
 2005-09-23 23:16:51 +00:00
Chris Lattner
8c19aa13c8 Fix a fixme by passing around SDOperand's instead of SDNode*'s 
llvm-svn: 23415
 2005-09-23 21:53:45 +00:00
Chris Lattner
6c5dfefcb3 Emit code that matches the incoming DAG pattern and checks predicates. 
This does not check that types match yet, but PPC only has one integer type
;-).

This also doesn't have the code to build the resultant dag.

llvm-svn: 23414
 2005-09-23 21:33:23 +00:00
Chris Lattner
9949ef9748 emit information about the order patterns are to be matched. 
llvm-svn: 23413
 2005-09-23 20:52:47 +00:00
Chris Lattner
d9b4002bac start filling in the switch stmt 
llvm-svn: 23412
 2005-09-23 19:36:15 +00:00
Chris Lattner
2e3569b604 Fix a minor bug, add comments 
llvm-svn: 23370
 2005-09-16 00:29:46 +00:00
Chris Lattner
4c1ec1c784 teach the type inference code how to infer types for instructions and node 
xforms.  Run type inference on result patterns, so we always have fully typed
results (and to catch errors in .td files).

llvm-svn: 23369
 2005-09-15 22:23:50 +00:00
Chris Lattner
07b63eafa1 put instructions into a map instead of a vector for quick lookup 
llvm-svn: 23368
 2005-09-15 21:57:35 +00:00
Chris Lattner
335614b54a when parsing instructions remember information about the types taken and 
returned.

llvm-svn: 23367
 2005-09-15 21:51:12 +00:00
Chris Lattner
66c08682d9 Start parsing "Pattern" nodes 
llvm-svn: 23365
 2005-09-15 21:42:00 +00:00
Chris Lattner
fe7a70834b rename a couple of methods, add structure for pattern parsing 
llvm-svn: 23364
 2005-09-15 02:38:02 +00:00
Chris Lattner
ab6886a31d Verify that xform functions only occur in logical places 
llvm-svn: 23363
 2005-09-14 23:05:13 +00:00
Chris Lattner
6f94c802a2 Promote xform fns to be explicit nodes in result patterns, and clean off 
predicates since they will have already matched at this point.

llvm-svn: 23362
 2005-09-14 23:01:59 +00:00
Chris Lattner
57cae81b5e start building the instruction dest pattern correctly. Change the xform 
functions to preserve the Record for the xform instead of making it into a
function name.

llvm-svn: 23361
 2005-09-14 22:55:26 +00:00
Chris Lattner
a6a0d51065 catch unnamed inputs 
llvm-svn: 23360
 2005-09-14 22:06:36 +00:00
Chris Lattner
f749a0ef7c check that there are no unexpected operands 
llvm-svn: 23359
 2005-09-14 21:59:34 +00:00
Chris Lattner
9c196b02fa force all instruction operands to be named. 
llvm-svn: 23358
 2005-09-14 21:13:50 +00:00
Chris Lattner
c19f24f3d7 Check that operands have unique names. REJECT instructions with broken operand 
lists: only don't parse them if they are entirely missing (sparcv9).

llvm-svn: 23355
 2005-09-14 21:05:02 +00:00
Chris Lattner
3cbcb9f5d6 fix a broke range check 
llvm-svn: 23354
 2005-09-14 21:04:12 +00:00
Chris Lattner
a5ba887c02 Parse significantly more of the instruction pattern, now collecting and 
verifying information about the operands.

llvm-svn: 23353
 2005-09-14 20:53:42 +00:00
Chris Lattner
901ddab7b1 Verify that set destinations occur first in the instruction operand list. 
llvm-svn: 23351
 2005-09-14 18:19:25 +00:00
Chris Lattner
76f1dae1af add an accessor 
llvm-svn: 23349
 2005-09-14 18:02:53 +00:00
Chris Lattner
72cfebc71b remove some code that isn't ready for prime time 
llvm-svn: 23346
 2005-09-14 06:03:10 +00:00
Chris Lattner
c4ae94aa32 Switch to a slightly more structured representation for instructions 
llvm-svn: 23345
 2005-09-14 04:03:16 +00:00
Chris Lattner
77cc161bd5 Add some more checking/verification code 
llvm-svn: 23344
 2005-09-14 02:11:12 +00:00
Chris Lattner
9ab561788e start parsing instructions into patterns, start doing many more checks of 
'set's.

llvm-svn: 23343
 2005-09-14 00:09:24 +00:00
Chris Lattner
e2591652a2 don't emit the namespace inside the class! 
llvm-svn: 23341
 2005-09-13 22:05:02 +00:00
Chris Lattner
1da656efd4 Emit code suitable for emission into the ISel class, allowing us to use/define 
methods.

llvm-svn: 23340
 2005-09-13 22:03:37 +00:00
Chris Lattner
9bb7fff501 continue xform function parsing 
llvm-svn: 23338
 2005-09-13 21:59:15 +00:00
Chris Lattner
abc740453c Start parsing node transformation information 
llvm-svn: 23337
 2005-09-13 21:51:00 +00:00
Chris Lattner
0dd99c9aaf Add a new Record::getValueAsCode method to mirror the other getValueAs* 
methods.  Use it to simplify some code.

llvm-svn: 23336
 2005-09-13 21:44:28 +00:00
Chris Lattner
4e59482982 completely eliminate TreePattern::PatternType 
llvm-svn: 23335
 2005-09-13 21:20:49 +00:00
Chris Lattner
773456a944 Regenerate 
llvm-svn: 23311
 2005-09-12 05:30:06 +00:00
Chris Lattner
8b34f3d20d Rearrange two rules, which apparently makes some versions of bison happier. 
llvm-svn: 23310
 2005-09-12 05:29:43 +00:00
Jeff Cohen
7e6b5c60fc Fix miscellaneous Visual Studio build problems. 
llvm-svn: 23307
 2005-09-10 02:00:02 +00:00
Chris Lattner
ada7ac14a1 add an accessor to provide more checking 
llvm-svn: 23289
 2005-09-09 01:15:01 +00:00
Chris Lattner
2490f8f606 use new accessors to simplify code. Add checking to make sure top-level instr 
definitions are void

llvm-svn: 23288
 2005-09-09 01:11:44 +00:00
Chris Lattner
2b656c6102 add some accessors 
llvm-svn: 23287
 2005-09-09 01:11:17 +00:00
Chris Lattner
334e21eb98 Fix incorrect comment 
llvm-svn: 23285
 2005-09-08 23:26:30 +00:00
Chris Lattner
a6d21c974c Implement a complete type inference system for dag patterns, based on the 
constraints defined in the DAG node definitions in the .td files.  This
allows us to infer (and check!) the types for all nodes in the current
ppc .td file.  For example, instead of:

Inst pattern EQV:       (set GPRC:i32:$rT, (xor (xor GPRC:i32:$rA, GPRC:i32:$rB), (imm)<<Predicate_immAllOnes>>))

we now fully infer:

Inst pattern EQV:       (set:void GPRC:i32:$rT, (xor:i32 (xor:i32 GPRC:i32:$rA, GPRC:i32:$rB), (imm:i32)<<Predicate_immAllOnes>>))

from:  (set GPRC:$rT, (not (xor GPRC:$rA, GPRC:$rB)))
llvm-svn: 23284
 2005-09-08 23:22:48 +00:00
Chris Lattner
e2fb8f3a77 Compute the value types that are natively supported by a target. 
llvm-svn: 23282
 2005-09-08 21:43:21 +00:00
Chris Lattner
152a72de2c Parse information about type constraints on SDNodes 
llvm-svn: 23281
 2005-09-08 21:27:15 +00:00
Chris Lattner
ef07fffe37 use node info in the one place we currently use it 
llvm-svn: 23280
 2005-09-08 21:04:46 +00:00
Chris Lattner
d9930002aa start parsing SDNode info records 
llvm-svn: 23279
 2005-09-08 21:03:01 +00:00
Chris Lattner
515c19f56d Fix indentation 
llvm-svn: 23276
 2005-09-08 19:47:28 +00:00
Chris Lattner
b07d2cc2eb regenerate 
llvm-svn: 23275
 2005-09-08 18:48:47 +00:00
Chris Lattner
df9876cdb7 Add support for automatically created anonymous definitions. 
This implements Regression/TableGen/AnonDefinitionOnDemand.td

llvm-svn: 23274
 2005-09-08 18:48:23 +00:00
Chris Lattner
9e7e8d43e8 regenerate 
llvm-svn: 23271
 2005-09-08 18:22:57 +00:00
Chris Lattner
2e3ed074d8 Tabs to spaces. 
llvm-svn: 23270
 2005-09-08 18:22:35 +00:00
Chris Lattner
03637c7200 Keep names even when inlining. This allows us to realize that ADDI is: 
(set GPRC:i32:$rD, (add GPRC:i32:$rA, (imm)<<Predicate_immSExt16>>:$imm))

not:

(set GPRC:i32:$rD, (add GPRC:i32:$rA, (imm)<<Predicate_immSExt16>>))

(we keep the ":$imm")

llvm-svn: 23269
 2005-09-08 17:45:12 +00:00
Chris Lattner
65c98b6441 Initial cut of the dag isel generator. This is still very much a work in 
progress.  It correctly parses instructions and pattern fragments and glues
together pattern fragments into instructions.

The only code it generates currently is some boilerplate code for things
like the EntryNode.

llvm-svn: 23261
 2005-09-07 23:44:43 +00:00
Chris Lattner
b529b1bdbd Rename a class. These files are being migrated to the new isel and I want to 
reuse the names

llvm-svn: 23252
 2005-09-06 22:51:34 +00:00
Chris Lattner
f12074e8f6 regenerate 
llvm-svn: 23249
 2005-09-06 21:23:27 +00:00
Chris Lattner
5cd3a27513 Tighten up the specification to allow TableGen/nested-comment.td to pass 
(fixing a bug where / in a /* */ comment would cause it to not close).

llvm-svn: 23248
 2005-09-06 21:23:09 +00:00
Chris Lattner
12c57505bf Add an option and stuff implementation of a dag isel emitter 
llvm-svn: 23236
 2005-09-03 01:14:03 +00:00
Reid Spencer
46a7fdeb66 Implement PR614: 
These changes modify the makefiles so that the output of flex and bison are
placed in the SRC directory, not the OBJ directory. It is intended that they
be checked in as any other LLVM source so that platforms without convenient
access to flex/bison can be compiled. From now on, if you change a .y or
.l file you *must* also commit the generated .cpp and .h files.

llvm-svn: 23115
 2005-08-27 18:50:39 +00:00
Chris Lattner
497c012e54 spell this right 
llvm-svn: 23099
 2005-08-26 20:55:40 +00:00
Chris Lattner
6c4ea26961 spell this variable right 
llvm-svn: 23095
 2005-08-26 20:42:52 +00:00
Chris Lattner
b474a0ab06 Expose a new flag to TargetInstrInfo 
llvm-svn: 23094
 2005-08-26 20:40:46 +00:00
Chris Lattner
17f0f9beae add a marker at the end of the instruction enum list 
llvm-svn: 23090
 2005-08-26 20:17:00 +00:00
Chris Lattner
9ceee53f9a Emit this: 
static const TargetOperandInfo OperandInfo6[] = { { &PPC32::CRRCRegClass }, { 0 }, };

instead of this:

static const TargetOperandInfo OperandInfo6[] = { { PPC32::CRRCRegisterClass }, { 0 }, };

For operand information, which does not require dynamic (startup-time)
initialization.

llvm-svn: 22931
 2005-08-19 20:29:14 +00:00
Chris Lattner
916e016ac1 Expose the derived register classes to the public header, allowing them 
to be accessed.

llvm-svn: 22930
 2005-08-19 20:23:42 +00:00
Chris Lattner
20c1c4cf07 Split register class "Methods" into MethodProtos and MethodBodies 
llvm-svn: 22928
 2005-08-19 19:12:51 +00:00
Chris Lattner
cef54bfd28 Refactor to use Target.getRegisterClasses consistently, which provides 
anonymous regclass definition renaming.

Change the generated code to emit register classes as properly namespace
qualified entities like everything else.

expose the actual class definition as an object, though this isn't quite
usable yet.

llvm-svn: 22920
 2005-08-19 18:47:59 +00:00
Chris Lattner
077a4e87c4 Emit real operand info for instructions. This currently works but is bad 
in one way: the generated tables require dynamic initialization for the
register classes.  This will be fixed in a future patch.

llvm-svn: 22919
 2005-08-19 18:46:26 +00:00
Chris Lattner
341308dc6b Read the namespace field from register classes 
llvm-svn: 22918
 2005-08-19 18:45:20 +00:00
Chris Lattner
bf7633b73b add a setName method to record 
llvm-svn: 22912
 2005-08-19 17:58:49 +00:00
Chris Lattner
1344e9cf9c Add a setName method to Record. 
llvm-svn: 22911
 2005-08-19 17:58:11 +00:00
Chris Lattner
36f99a1374 For now, just emit empty operand info structures. 
llvm-svn: 22910
 2005-08-19 16:57:28 +00:00
Chris Lattner
5ac318c67b Fix a problem jeffc noticed 
llvm-svn: 22903
 2005-08-19 06:16:04 +00:00
Chris Lattner
1685432a06 The code emitter generator only supports targets with 32-bit instruction 
words.  There is no way for one of these targets to have a > 32-bit immediate!

llvm-svn: 22897
 2005-08-19 01:04:33 +00:00
Chris Lattner
7ab998463c now that all of the targets are clean w.r.t. the number of operands for each 
instruction defined, actually emit this to the InstrInfoDescriptor, which
allows an assert in the machineinstrbuilder to do some checking for us,
and is required by the dag->dag emitter

llvm-svn: 22895
 2005-08-19 00:59:49 +00:00
Chris Lattner
d03fa09ce7 Figure out how many operands each instruction has, keep track of whether 
or not it's variable.

llvm-svn: 22885
 2005-08-18 23:38:41 +00:00
Chris Lattner
1f718aa8b5 revert this change, which causes breakage, temporarily 
llvm-svn: 22880
 2005-08-18 22:12:31 +00:00
Chris Lattner
b312f4d374 When emitting implicit use/def lists, only emit each unique list once. Though 
LLVM is able to merge identical static const globals, GCC isn't, and this caused
some bloat in the generated data.  This has a marginal effect on PPC, shrinking
the implicit sets from 10->4, but shrinks X86 from 179 to 23, a much bigger
reduction.

This should speed up the register allocator as well by reducing the dcache
footprint for this static data.

llvm-svn: 22879
 2005-08-18 21:36:47 +00:00
Chris Lattner
d3814ff064 Fill in the numOperands field of the TargetInstrDescriptor struct from the 
.td file.

llvm-svn: 22873
 2005-08-18 19:45:37 +00:00
Jeff Cohen
bd51ec7461 Eliminate all remaining tabs and trailing spaces. 
llvm-svn: 22523
 2005-07-27 06:12:32 +00:00
Chris Lattner
bee317e9b0 Fix PR595: These error messages should not be looking at CGI.Name, they 
should be looking at CGI.TheDef->getName().

llvm-svn: 22445
 2005-07-15 22:43:04 +00:00
Nate Begeman
c871411c9d Add support for a TODO; instructions in .td files can now have arguments 
printed as part of the opcode.  This allows something like
cmp${cc}ss in the x86 backed to be printed as cmpltss, cmpless, etc.
depending on what the value of $cc is.

llvm-svn: 22439
 2005-07-14 22:50:30 +00:00
Jeff Cohen
4d31aeb9df Eliminate tabs and trailing spaces 
llvm-svn: 21441
 2005-04-22 04:13:13 +00:00
Misha Brukman
960a8d47d7 Remove trailing whitespace 
llvm-svn: 21428
 2005-04-22 00:00:37 +00:00
Chris Lattner
070188a856 ignore generated files 
llvm-svn: 21362
 2005-04-19 15:34:36 +00:00
Chris Lattner
0c97ef0c04 fix bogus warning 
llvm-svn: 21361
 2005-04-19 15:32:30 +00:00
Chris Lattner
c2f7fcfbba Major change to tblgen: instead of resolving values every time a class is 
finished up, only resolve fully when the def is defined.  This allows things
to be changed and all uses to be propagated through.  This implements
TableGen/LazyChange.td and fixes TemplateArgRename.td in the process.

None of the .td files used in LLVM backends are changed at all by this
patch.

llvm-svn: 21344
 2005-04-19 03:36:21 +00:00
Chris Lattner
57b0bbfcbd implementing shifting of literal integers 
llvm-svn: 21336
 2005-04-19 01:17:35 +00:00
Chris Lattner
414d27b765 Add initial lexer and parser support for shifting values. Every use of this 
will lead to it being rejected though.

llvm-svn: 21335
 2005-04-19 01:11:03 +00:00
Chris Lattner
fb921a5722 Minor fix. 
llvm-svn: 19761
 2005-01-22 20:59:38 +00:00
Chris Lattner
078cda0bb3 This is the final big of factoring. This shares cases in suboperand 
differences, which means that identical instructions (after stripping off
the first literal string) do not run any different code at all.  On the X86,
this turns this code:

    switch (MI->getOpcode()) {
    case X86::ADC32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::ADC32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::ADC32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::ADD32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::ADD32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::ADD32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::AND32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::AND32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::AND32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::CMP32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::CMP32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::MOV32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::MOV32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::OR32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::OR32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::OR32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::ROL32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::ROR32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SAR32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SBB32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::SBB32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::SBB32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::SHL32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SHLD32mrCL: printOperand(MI, 4, MVT::i32); break;
    case X86::SHR32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SHRD32mrCL: printOperand(MI, 4, MVT::i32); break;
    case X86::SUB32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::SUB32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::SUB32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::TEST32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::TEST32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::TEST8mi: printOperand(MI, 4, MVT::i8); break;
    case X86::XCHG32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::XOR32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break;
    }

into this:

    switch (MI->getOpcode()) {
    case X86::ADC32mi:
    case X86::ADC32mr:
    case X86::ADD32mi:
    case X86::ADD32mr:
    case X86::AND32mi:
    case X86::AND32mr:
    case X86::CMP32mi:
    case X86::CMP32mr:
    case X86::MOV32mi:
    case X86::MOV32mr:
    case X86::OR32mi:
    case X86::OR32mr:
    case X86::SBB32mi:
    case X86::SBB32mr:
    case X86::SHLD32mrCL:
    case X86::SHRD32mrCL:
    case X86::SUB32mi:
    case X86::SUB32mr:
    case X86::TEST32mi:
    case X86::TEST32mr:
    case X86::XCHG32mr:
    case X86::XOR32mi:
    case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::ADC32mi8:
    case X86::ADD32mi8:
    case X86::AND32mi8:
    case X86::OR32mi8:
    case X86::ROL32mi:
    case X86::ROR32mi:
    case X86::SAR32mi:
    case X86::SBB32mi8:
    case X86::SHL32mi:
    case X86::SHR32mi:
    case X86::SUB32mi8:
    case X86::TEST8mi:
    case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break;
    }

After this, the generated asmwriters look pretty much as though they were
generated by hand.  This shrinks the X86 asmwriter.inc files from 55101->39669
and 55429->39551 bytes each, and PPC from 16766->12859 bytes.

llvm-svn: 19760
 2005-01-22 20:31:17 +00:00
Chris Lattner
eee6c31449 Implement *even more* factoring. In particular, if all of the instruction 
strings starts out with a constant string, we emit the string first, using
a table lookup (instead of a switch statement).

Because this is usually the opcode portion of the asm string, the differences
between the instructions have now been greatly reduced.  This allows many
more case statements to be grouped together.

This patch also allows instruction cases to be grouped together when the
instruction patterns are exactly identical (common after the opcode string
has been ripped off), and when the differing operand is a MachineInstr
operand that needs to be formatted.

The end result of this is a mean and lean generated AsmPrinter!

llvm-svn: 19759
 2005-01-22 19:22:23 +00:00
Chris Lattner
f78580dcec Refactor code for numbering instructions into CodeGenTarget. 
llvm-svn: 19758
 2005-01-22 18:58:51 +00:00
Jeff Cohen
50c819634d Fix VC++ compilation error 
llvm-svn: 19757
 2005-01-22 18:50:10 +00:00
Chris Lattner
a030a47a51 Implement factoring of instruction pattern strings. In particular, instead of 
emitting code like this:

  case PPC::ADD: O  << "add ";  printOperand(MI, 0, MVT::i64); O  << ", ";  prin
tOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '\n
'; break;
  case PPC::ADDC: O  << "addc ";  printOperand(MI, 0, MVT::i64); O  << ", ";  pr
intOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '
\n'; break;
  case PPC::ADDE: O  << "adde ";  printOperand(MI, 0, MVT::i64); O  << ", ";  pr
intOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '
\n'; break;
...

Emit code like this:

  case PPC::ADD:
  case PPC::ADDC:
  case PPC::ADDE:
  ...
    switch (MI->getOpcode()) {
    case PPC::ADD: O << "add "; break;
    case PPC::ADDC: O << "addc "; break;
    case PPC::ADDE: O << "adde "; break;
    ...
    }
    printOperand(MI, 0, MVT::i64);
    O << ", ";
    printOperand(MI, 1, MVT::i64);
    O << ", ";
    printOperand(MI, 2, MVT::i64);
    O << "\n";
    break;

This shrinks the PPC asm writer from 24785->15205 bytes (even though the new
asmwriter has much more whitespace than the old one), and the X86 printers shrink
quite a bit too.  The important implication of this is that GCC no longer hits swap
when building the PPC backend in optimized mode.  Thus this fixes PR448.

-Chris

llvm-svn: 19755
 2005-01-22 18:38:13 +00:00
Chris Lattner
3e855b097c Fix the ::: problem 
llvm-svn: 19754
 2005-01-22 18:18:59 +00:00
Chris Lattner
cc09d8ac1e Minor refactoring, no functionality change. 
llvm-svn: 19753
 2005-01-22 17:40:38 +00:00
Chris Lattner
67cbd23ad5 Seperate asmstring parsing from emission. This allows the code to be simpler 
and more understandable.  It also allows us to do simple things like fold
consequtive literal strings together.  For example, instead of emitting this
for the X86 backend:

  O  << "adc" << "l" << " ";

we now generate this:

  O << "adcl ";

*whoa* :)

This shrinks the X86 asmwriters from 62729->58267 and 65176->58644 bytes
for the intel/att asm writers respectively.

llvm-svn: 19749
 2005-01-22 17:32:42 +00:00
Andrew Lenharth
e3d81200bc make double-dollar properly escape asmstrings 
llvm-svn: 19740
 2005-01-22 00:35:22 +00:00
Chris Lattner
2aef5783b0 Expose isConvertibleToThreeAddress and isCommutable bits to the code generator. 
llvm-svn: 19243
 2005-01-02 02:29:04 +00:00
Reid Spencer
7b0596782a For PR387: 
Make this compile without warning when -Woverloaded-virtual is used.

llvm-svn: 18588
 2004-12-06 23:42:37 +00:00
Reid Spencer
bbdeb2181d Fix usage of changed function prototype 
llvm-svn: 17798
 2004-11-14 22:30:54 +00:00
Chris Lattner
499e1b16a7 Quiet VC++ warnings 
llvm-svn: 17484
 2004-11-05 04:50:59 +00:00
Reid Spencer
acb1305e99 Internalize variable names to prevent recursive assignment. Cleanup docs. 
llvm-svn: 17359
 2004-10-30 09:19:36 +00:00
Reid Spencer
d3f7233495 Change Library Names Not To Conflict With Others When Installed 
llvm-svn: 17286
 2004-10-27 23:18:45 +00:00
Chris Lattner
dd0094e4ed Convert 'struct' to 'class' in various places to adhere to the coding standards 
and work better with VC++.  Patch contributed by Morten Ofstad!

llvm-svn: 17281
 2004-10-27 16:14:51 +00:00
Chris Lattner
0566f4f4ce Make VC happier, patch contributed by Morten Ofstad 
llvm-svn: 17179
 2004-10-23 04:58:50 +00:00
Reid Spencer
5574857063 We're not doing automake any more 
llvm-svn: 17168
 2004-10-22 21:02:23 +00:00
Reid Spencer
e48ba34fd4 We won't use automake 
llvm-svn: 17155
 2004-10-22 03:35:04 +00:00
Reid Spencer
ce514b1c2c Initial automake generated Makefile template 
llvm-svn: 17136
 2004-10-18 23:55:41 +00:00
Misha Brukman
4e252ebfa0 * Factor out (into new fn) a loop emitting operand shifts into the instruction 
* Reverse instruction bit components for a LittleEndian-style encoding
* Fix some comments and spacing

llvm-svn: 16975
 2004-10-14 05:53:01 +00:00
Misha Brukman
a87a2029e4 * Add option to read isLittleEndianEncoding for InstrInfo classes 
* Doxygen-ify some function comments

llvm-svn: 16974
 2004-10-14 05:50:43 +00:00
Chris Lattner
8dd656b17b Patch to make VS happier, thanks to Morten Ofstad for pointing this out. 
llvm-svn: 16956
 2004-10-13 15:25:46 +00:00
Reid Spencer
1b27f66b76 Updates for changes in Makefile rules. 
llvm-svn: 16951
 2004-10-13 11:48:50 +00:00
Chris Lattner
dc7da6c655 Don't emit the method into the llvm namespace, let the #includer decide where it goes 
llvm-svn: 16934
 2004-10-12 16:21:18 +00:00
Reid Spencer
7d9cba7a0f Initial version of automake Makefile.am file. 
llvm-svn: 16885
 2004-10-10 20:43:57 +00:00
Misha Brukman
7fee34176a Properly `quote' names, and don't forget to add the ending quote! 
llvm-svn: 16838
 2004-10-08 14:59:05 +00:00
Chris Lattner
de7199b94f Correctly parse variant notation 
llvm-svn: 16637
 2004-10-03 20:19:02 +00:00
Chris Lattner
9a649a5c05 Add initial support for variants. This just parses the new format, no 
functionality is added

llvm-svn: 16636
 2004-10-03 19:34:31 +00:00
Misha Brukman
bf7a239716 #include DataTypes.h to compile on MinGW, patch by Henrik Bach. 
llvm-svn: 16616
 2004-09-30 18:27:39 +00:00
Nate Begeman
bbf7945b61 Add support for the isLoad and isStore flags, needed by the instruction scheduler 
llvm-svn: 16554
 2004-09-28 21:01:45 +00:00
Chris Lattner
7a941d7691 Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAG 
llvm-svn: 16553
 2004-09-28 18:38:01 +00:00
Chris Lattner
aee36bb527 Revamp the Register class, and allow the use of the RegisterGroup class to 
specify aliases directly in register definitions.

Patch contributed by Jason Eckhardt!

llvm-svn: 16330
 2004-09-14 04:17:02 +00:00
Reid Spencer
d5b1443205 Clean up some "clean:" targets so they use $(VERB) and don't print anything 
by default, like every other "clean" target in LLVM.

llvm-svn: 16161
 2004-09-03 23:19:53 +00:00
Reid Spencer
7f1b5ae07e Make tblgen's exception handling a little more robust by printing the 
program name and also catching ...

llvm-svn: 16160
 2004-09-03 23:17:54 +00:00
Reid Spencer
c4abcbefb1 Changes For Bug 352 
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.

llvm-svn: 16137
 2004-09-01 22:55:40 +00:00
Reid Spencer
a6733ed360 Link with LLVMsystem.a for operating system independence. 
llvm-svn: 16094
 2004-08-29 19:31:19 +00:00
Reid Spencer
7ddb3950e4 RemoveFileOnErrorSignal is now in the llvm::sys namespace. Adjust 
accordingly.

llvm-svn: 16093
 2004-08-29 19:30:41 +00:00
Chris Lattner
e35741184e Alignment is now in bits. 
llvm-svn: 15976
 2004-08-21 20:15:25 +00:00
Chris Lattner
e88b8e3471 Make alignment be in bits, just like size is 
llvm-svn: 15969
 2004-08-21 20:00:36 +00:00
Chris Lattner
d4ec8aeb62 Infer the spillsize/alignment of a register based on the register classes 
it is embedded into.

llvm-svn: 15966
 2004-08-21 19:42:03 +00:00
Chris Lattner
75ca702833 Support "Methods" in register classes in CodgeGenRegisterClass 
llvm-svn: 15965
 2004-08-21 19:21:21 +00:00
Chris Lattner
c33c1c8dca Start parsing register classes into a more structured form 
llvm-svn: 15961
 2004-08-21 04:05:00 +00:00
Chris Lattner
820f674293 Read in declared reg sizes 
llvm-svn: 15960
 2004-08-21 02:24:57 +00:00
Chris Lattner
89ebd84bc2 Do not #include files into the llvm namespace 
llvm-svn: 15849
 2004-08-17 03:08:28 +00:00
Chris Lattner
892fc12546 Use CodeGenRegister class to make reading in of register information more 
systematic.

llvm-svn: 15805
 2004-08-16 01:10:21 +00:00
Chris Lattner
c07542698b Add initial support for register and register class representation. 
Obviously this is not done.

llvm-svn: 15804
 2004-08-16 01:09:52 +00:00
Chris Lattner
7a514bf631 Remove awareness of isDummyClass 
llvm-svn: 15789
 2004-08-15 23:04:13 +00:00
Chris Lattner
d7240cdb18 Make the AsmWriter a first-class tblgen object. Allow targets to specify 
name of the generated asmwriter class, and the name of the format string.

llvm-svn: 15747
 2004-08-14 22:50:53 +00:00
Chris Lattner
a86411806a Fix minor bug in previous checkin 
llvm-svn: 15649
 2004-08-11 04:08:36 +00:00
Chris Lattner
0f301f495b change how we invoke the printer. Instead of passing in the MO directly, 
pass in the MI, operand number, and the type of the operand.

llvm-svn: 15645
 2004-08-11 02:23:23 +00:00
Chris Lattner
a88aec6972 Start parsing more information from the Operand information 
llvm-svn: 15644
 2004-08-11 02:22:39 +00:00
Chris Lattner
c8ac0bf803 Remove special case hacks 
llvm-svn: 15643
 2004-08-11 01:53:58 +00:00
Misha Brukman
1087080432 Deleted commented-out code as we now get namespace directly, add comments 
llvm-svn: 15627
 2004-08-10 20:54:58 +00:00
Misha Brukman
1aa8b19a07 Use the target name instead of hard-coding SparcV9. 
llvm-svn: 15616
 2004-08-10 18:31:01 +00:00
Chris Lattner
660bc91ec4 This was a good idea, but until this does not break the build of 
lib/Target/Sparc, we should not use it.

llvm-svn: 15603
 2004-08-10 15:05:18 +00:00
Misha Brukman
7a352cede0 Use the current target name instead of a ClassPrefix. 
llvm-svn: 15585
 2004-08-09 19:10:43 +00:00
Misha Brukman
ad01c0dbae * Use Classname and ClassPrefix instead of hard-coded V9 values 
* Simplify code and shorten lines by not recomputing values

llvm-svn: 15582
 2004-08-09 17:47:45 +00:00
Misha Brukman
3a15182b6c * Added documentation in the file header 
* Shorten assert() text to make it fit within 80 cols

llvm-svn: 15508
 2004-08-04 22:07:54 +00:00
Chris Lattner
d308e8dbd8 Be picky 
llvm-svn: 15400
 2004-08-01 08:55:34 +00:00
Chris Lattner
ae25608f8b Instructions no longer need to have names. 
llvm-svn: 15399
 2004-08-01 08:38:17 +00:00
Chris Lattner
0dd4abcce9 Add support for asm printing machine instructions that have operands. 
llvm-svn: 15391
 2004-08-01 07:43:02 +00:00
Chris Lattner
350b76be29 Parse the operand list of the instruction. We currently support register and immediate operands. 
llvm-svn: 15390
 2004-08-01 07:42:39 +00:00
Chris Lattner
a983ac4661 Initial cut at an asm writer emitter. So far, this only handles emission of 
instructions, and only instructions that take no operands at that!

llvm-svn: 15386
 2004-08-01 05:59:33 +00:00
Chris Lattner
09d6e317a8 Add, and start using, the CodeGenInstruction class. This class represents 
an instance of the Instruction tablegen class.

llvm-svn: 15385
 2004-08-01 05:04:00 +00:00
Chris Lattner
07525455a6 Rename CodeGenWrappers.(cpp|h) -> CodeGenTarget.(cpp|h) 
llvm-svn: 15382
 2004-08-01 04:04:35 +00:00
Chris Lattner
2e8beb316b Finegrainify namespacification 
llvm-svn: 15381
 2004-08-01 03:55:39 +00:00
Chris Lattner
5c5c16ec21 Support new flag 
llvm-svn: 15355
 2004-07-31 02:07:26 +00:00
Chris Lattner
33187c4026 Implement test/Regression/TableGen/ListSlices.td 
llvm-svn: 15249
 2004-07-27 01:01:21 +00:00
Chris Lattner
8dcbaf2f98 Add initial support for list slices. This currently allows you to do stuff 
like this:

def B {
  list<int> X = [10, 20, 30, 4, 1, 1231, 20] [2-4,2,2,0-6];
}

... which isn't particularly useful, but more is to come.

llvm-svn: 15247
 2004-07-26 23:21:34 +00:00
Chris Lattner
1e21b8c96f Remove some abandoned code that was never finished. If needed in the future 
it can be ressurected from CVS.

llvm-svn: 15113
 2004-07-22 21:32:38 +00:00
Chris Lattner
ae91cc3002 Passing integer 0 in for a pointer value doesn't work on IA64. Fix this 
by using a new macro.

llvm-svn: 14863
 2004-07-16 00:02:21 +00:00
Chris Lattner
817b562565 Make tblgen not try to be smart. This is better handled in makefiles if 
at all.  Patch contributed by Vladimir Prus!

llvm-svn: 14784
 2004-07-13 06:11:46 +00:00
Misha Brukman
095db9590a Handle shifts >= 32 bits. 
llvm-svn: 14291
 2004-06-21 18:01:47 +00:00
Chris Lattner
cc465361d9 Move the IntrinsicLowering header into the CodeGen directory, as per PR346 
llvm-svn: 14266
 2004-06-20 07:49:54 +00:00
Misha Brukman
8495487d8e Make header comment fit within 80 cols. 
llvm-svn: 14198
 2004-06-17 15:49:36 +00:00
Misha Brukman
fffcf9c9fb Emit a more sensible error message if no subclasses of Target are defined. 
Patch contributed by Vladimir Prus.

llvm-svn: 14010
 2004-06-04 14:59:42 +00:00
Chris Lattner
023eb7484f Add support for dos style files. 
llvm-svn: 13836
 2004-05-27 17:44:18 +00:00
Chris Lattner
6f0bab5b9d Header file moved 
llvm-svn: 13813
 2004-05-27 05:41:36 +00:00
Misha Brukman
be6fcab94d The "best" of both worlds: readable C++ comments and valid HTML For doxygen. 
llvm-svn: 12964
 2004-04-15 15:30:15 +00:00
Jakub Staszak
3c2d9c95e2 Tablegen backend for really simple instruction selector 
llvm-svn: 12713
 2004-04-06 19:31:31 +00:00
Jakub Staszak
6cb338c254 add tablgen backend for really simple instruction selector 
llvm-svn: 12712
 2004-04-06 19:30:56 +00:00
Chris Lattner
9f35c413f5 Do not remove an active template argument even if the superclass had one of the 
same name

llvm-svn: 11950
 2004-02-28 17:41:48 +00:00
Chris Lattner
7d89f8837d Ignore X = X assignments that was causing Alkis's rewrite of X86.td to crash 
tblgen.

llvm-svn: 11948
 2004-02-28 17:31:28 +00:00
Chris Lattner
07aebf1c49 Assert instead of going into an infinite loop! 
llvm-svn: 11946
 2004-02-28 16:31:53 +00:00
Chris Lattner
bdd49e8f4d exit(1) instead of abort()'ing on error 
llvm-svn: 11380
 2004-02-13 16:37:43 +00:00
Chris Lattner
92da902d40 Fix buggy error message problem 
llvm-svn: 11379
 2004-02-13 16:33:56 +00:00
Misha Brukman
fcab5cd5b0 Ooops, top-level C++-comments aren't recognized by flex. 
llvm-svn: 11337
 2004-02-12 00:03:08 +00:00
Misha Brukman
63ba2d3f4d * Convert C comments to C++ style (why are some one way, some another?!) 
* Delete extra space, extra blank comment lines
* Convert function comments to doxygen

llvm-svn: 11336
 2004-02-12 00:00:46 +00:00
Chris Lattner
1ad572ef72 Print the record NAME not the record ADDRESS 
llvm-svn: 11144
 2004-02-06 03:19:17 +00:00
Brian Gaeke
dc5961acc0 Fix a couple of places I noticed where "X86" was hard-coded. 
llvm-svn: 10974
 2004-01-24 09:23:46 +00:00
Chris Lattner
92ff4ee65b Stop laughing Misha 
llvm-svn: 10393
 2003-12-11 00:58:34 +00:00
Brian Gaeke
d25f86d683 Put all LLVM code into the llvm namespace, as per bug 109. 
llvm-svn: 9903
 2003-11-11 22:41:34 +00:00
John Criswell
4746befea3 Added LLVM copyright notice. 
llvm-svn: 9324
 2003-10-21 15:29:18 +00:00
John Criswell
a8dfda0513 Added LLVM copyright to Makefiles. 
llvm-svn: 9314
 2003-10-20 22:29:16 +00:00
John Criswell
fc62e0f40d Added LLVM copyright header. 
llvm-svn: 9305
 2003-10-20 20:20:30 +00:00
John Criswell
c373496a63 Removed the .PRECIOUS of Lex and Yacc output files. 
They are already marked precious in llvm/Makefile.rules, and removing
this line seems to fix the Makefile so that the Yacc output is placed
into the object tree and not the source tree.

llvm-svn: 9179
 2003-10-16 20:38:16 +00:00
Chris Lattner
b6c8569f05 Regularize header file comments 
llvm-svn: 9071
 2003-10-13 03:32:08 +00:00
Brian Gaeke
2f888cb5b5 This seems to work around some unobvious bug in gcc on sparc which was 
causing the build of lib/Target/X86 to fail.

llvm-svn: 9042
 2003-10-10 21:55:29 +00:00
Alkis Evlogimenos
74568bc9d4 Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefs 
and TargetInstrDescriptor::ImplicitUses to always point to a null
terminated array and never be null. So there is no need to check for
pointer validity when iterating over those sets. Code that looked
like:

if (const unsigned* AS = TID.ImplicitDefs) {
  for (int i = 0; AS[i]; ++i) {
    // use AS[i]
  }
}

was changed to:

for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) {
  // use *AS
}

llvm-svn: 8960
 2003-10-08 05:20:08 +00:00
Chris Lattner
1e1215d0d7 Move support/tools/* back into utils 
llvm-svn: 8875
 2003-10-05 19:27:59 +00:00