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668 Commits

Author SHA1 Message Date
Nate Begeman
ab8e705a52 Don't hand ISD::CALL nodes off to SelectExprFP. This fixes siod. 
llvm-svn: 21197
 2005-04-10 01:14:13 +00:00
Chris Lattner
c1bacbff9d rename getPPCOpcodeForSetCCNumber -> getPPCOpcodeForSetCCOpode to be more 
correct.  Remove the EmitComparison retvalue, as it is always the first arg.

Fix a place where we incorrectly passed in the setcc opcode instead of the
setcc number, causing us to miscompile crafty.  Crafty now works!

llvm-svn: 21195
 2005-04-10 01:03:31 +00:00
Nate Begeman
a2374d39df fix ISD::BRCONDTWOWAY codegen to not deference the end() iterator 
llvm-svn: 21193
 2005-04-09 23:35:05 +00:00
Chris Lattner
17c60891c1 Fix CodeGen/Generic/2005-05-09-GlobalInPHI.ll, which was reduced from 254.gap. 
This caused the "use before a def" assertion on some programs.

With this patch, 254.gap now passes with the PPC backend.

llvm-svn: 21191
 2005-04-09 22:05:17 +00:00
Chris Lattner
b630949c2e do not set the root to null if an argument is dead 
llvm-svn: 21188
 2005-04-09 21:23:24 +00:00
Nate Begeman
dda6155d19 Add rlwnm instruction for variable rotate 
Generate rotate left/right immediate
Generate code for brcondtwoway
Use new livein/liveout functionality

llvm-svn: 21187
 2005-04-09 20:09:12 +00:00
Chris Lattner
72b1964108 Fix a crash on 173.applu by asking for a constant bigger than 32-bits. 
llvm-svn: 21185
 2005-04-09 19:47:21 +00:00
Chris Lattner
c97f9f403f Switch this instruction selector over to using liveins and liveouts, eliminating 
implicit defs on entry to the function.  yaay :)

llvm-svn: 21184
 2005-04-09 16:32:30 +00:00
Nate Begeman
98bcb13bfa Optimize FSEL a bit for fneg arguments. This fixes the recently added test 
case so that we emit

_test_fneg_sel:
.LBB_test_fneg_sel_0:   ;
        fsel f1, f1, f3, f2
        blr

instead of:

_test_fneg_sel:
.LBB_test_fneg_sel_0:   ;
        fneg f0, f1
        fneg f0, f0
        fsel f1, f0, f3, f2
        blr

llvm-svn: 21177
 2005-04-09 09:33:07 +00:00
Chris Lattner
c80baf5567 This target does not yet support ISD::BRCONDTWOWAY 
llvm-svn: 21163
 2005-04-09 03:22:30 +00:00
Nate Begeman
99fb6814bd 64b: Expand S/UREM 
32b: No longer pattern match fneg(fsub(fmul)) as fnmsub
     Pattern match fsub a, mul(b, c) as fnmsub
     Pattern match fadd a, mul(b, c) as fmadd
Those changes speed up hydro2d by 2.5%, distray by 6%, and scimark by 8%

llvm-svn: 21161
 2005-04-09 03:05:51 +00:00
Nate Begeman
95e1b860a1 Fix 64b shifts 
llvm-svn: 21159
 2005-04-08 23:45:01 +00:00
Nate Begeman
3fca499b8d Match Mac OS X 64 bit calling conventions 
llvm-svn: 21157
 2005-04-08 21:26:05 +00:00
Nate Begeman
6875356db1 Optimized code sequences for setcc reg, 0 
Optimized code sequence for (a < 0) ? b : 0

llvm-svn: 21150
 2005-04-07 20:30:01 +00:00
Chris Lattner
352dd3e579 PowerPC zero extends setcc results 
llvm-svn: 21147
 2005-04-07 19:41:49 +00:00
Nate Begeman
b890f32ac9 Pattern match bitfield insert, which helps shift long by immediate, among 
other things.

llvm-svn: 21127
 2005-04-06 23:51:40 +00:00
Nate Begeman
6c5e4c3bb1 Fix some shift bugs 
llvm-svn: 21126
 2005-04-06 22:42:08 +00:00
Nate Begeman
98251d6a1c Fixed version of optimized integer divide is now fixed. Calculate the 
quotient, not the remainder.  Also, make sure to remove the old div operand
from the ExprMap and let SelectExpr insert the new one.

llvm-svn: 21111
 2005-04-06 06:44:57 +00:00
Nate Begeman
aee0f81849 Turn off the div -> mul optimization until it works correctly 100% of the 
time.

llvm-svn: 21105
 2005-04-06 03:36:33 +00:00
Nate Begeman
b44597771c Add support for MULHS and MULHU nodes 
Have LegalizeDAG handle SREM and UREM for us
Codegen SDIV and UDIV by constant as a multiply by magic constant instead
of integer divide, which is very slow.

llvm-svn: 21104
 2005-04-06 00:25:27 +00:00
Nate Begeman
82ff41c342 Behold, rlwinm with certain immediate arguments is printed as the much more 
readable slwi or srwi (shift left/right word immediate).

llvm-svn: 21099
 2005-04-05 18:19:50 +00:00
Nate Begeman
581553fd21 Fix cut & paste errors (32->64), and codegen float->int more optimally. 
llvm-svn: 21098
 2005-04-05 17:32:30 +00:00
Nate Begeman
152dbbe856 Remove 64 bit simple ISel, it never worked correctly 
Add initial (buggy) implementation of 64 bit pattern ISel

llvm-svn: 21096
 2005-04-05 08:51:15 +00:00
Nate Begeman
a18a26f47c Back out the previous change to SelectBranchCC, since there are cases it 
could miscompile.  A correct solution will be found in the near future.

llvm-svn: 21095
 2005-04-05 04:32:16 +00:00
Nate Begeman
358dee806e Rename canUseAsImmediateForOpcode to getImmediateForOpcode to better 
indicate that it is not a boolean function.
Properly emit the pseudo instruction for conditional branch, so that we
  can fix up conditional branches whose displacements are too large.
Reserve the right amount of opcode space for said pseudo instructions.

llvm-svn: 21094
 2005-04-05 04:22:58 +00:00
Nate Begeman
ede4abc899 Implement SDIV by power of 2 as srawi/addze rather than load imm, divw 
llvm-svn: 21091
 2005-04-05 00:15:08 +00:00
Nate Begeman
00002553ba Pattern match fp mul-add, mul-sub, neg-mul-add, and neg-mul-sub 
llvm-svn: 21090
 2005-04-04 23:40:36 +00:00
Nate Begeman
682fd51f9c Add support for multiply-add, multiply-sub, and their negated versions 
llvm-svn: 21089
 2005-04-04 23:01:51 +00:00
Nate Begeman
d9af5c4fc5 Make sure that arg regs used by the call instruction are marked as such, so 
that regalloc doesn't cleverly reuse early arg regs loading later arg regs.
This fixes almost all outstanding failures in the pattern isel.

llvm-svn: 21086
 2005-04-04 22:17:48 +00:00
Nate Begeman
ce13bceb2a Remove unnecessary register copy now that regalloc is fixed 
llvm-svn: 21085
 2005-04-04 21:48:13 +00:00
Nate Begeman
bde3612ce3 i1 loads should also be from the low byte of the argument word. 
llvm-svn: 21077
 2005-04-04 09:09:00 +00:00
Nate Begeman
77427b1e77 Fix i64 return, fix CopyFromReg 
llvm-svn: 21076
 2005-04-04 06:52:38 +00:00
Nate Begeman
b2e5a962ff Full varargs support. All of UnitTests now passes 
llvm-svn: 21070
 2005-04-03 23:11:17 +00:00
Nate Begeman
1a5aaf6009 Pass the correct value for the chain to the store 
llvm-svn: 21066
 2005-04-03 22:22:56 +00:00
Nate Begeman
82d17d0e70 Fix SHL_PARTS 
Start implementation of integer varargs

llvm-svn: 21065
 2005-04-03 22:13:27 +00:00
Nate Begeman
127bd62534 Keeping up with the Joneses. 
Implement not, nor, nand, and eqv

llvm-svn: 21060
 2005-04-03 11:20:20 +00:00
Nate Begeman
402c04ff16 Set shift amount to Extend 
Implement ISD::FABS and ISD::FNEG nodes
Implement SHL_PARTS, SRL_PARTS, and SRA_PARTS
Generate PowerPC 'fneg', 'fabs', and 'fnabs' instructions

llvm-svn: 21018
 2005-04-02 05:59:34 +00:00
Chris Lattner
a5d4718875 This target doesn't support fabs/fneg yet. 
llvm-svn: 21010
 2005-04-02 05:03:24 +00:00
Nate Begeman
8d60ca616f Fix i64 returns 
Generate PowerPC 'subfic' instruction when appropriate

llvm-svn: 20995
 2005-04-02 00:42:16 +00:00
Nate Begeman
4034852ba9 Add ISD::UNDEF node 
Teach the SelectionDAG code how to expand and promote it
Have PPC32 LowerCallTo generate ISD::UNDEF for int arg regs used up by fp
  arguments, but not shadowing their value.  This allows us to do the right
  thing with both fixed and vararg floating point arguments.

llvm-svn: 20988
 2005-04-01 22:34:39 +00:00
Nate Begeman
244b36582a Fix Olden/bh, CR0 was being set in the wrong order 
LowerCallTo and ISD::CALL are going to need to be modified, regs are being
set in the wrong order.

llvm-svn: 20981
 2005-04-01 08:57:43 +00:00
Nate Begeman
f3ead25b68 Also apply Chris's fix to FP select and SETCC 
llvm-svn: 20979
 2005-04-01 07:21:30 +00:00
Chris Lattner
0cd0036523 Move the selection of the arms of the select operation up to the conditional 
part to make sure we get the side effects and to avoid confusing the CFG.

llvm-svn: 20977
 2005-04-01 07:10:02 +00:00
Nate Begeman
e82a2d7373 Fix stores to global addresses 
Fix calls with no arguments

llvm-svn: 20975
 2005-04-01 05:57:17 +00:00
Nate Begeman
9d224ae29b Support indexed loads and stores. This drops Shootout/matrix time from 
18.8 to 14.8 seconds.  The Pattern ISel is now often faster than the
Simple ISel, esp. on memory intensive code.

llvm-svn: 20973
 2005-04-01 04:45:11 +00:00
Nate Begeman
af7c6366d7 Implement FP_TO_SINT and FP_TO_UINT 
llvm-svn: 20972
 2005-04-01 02:59:27 +00:00
Nate Begeman
552f6f5f4e Add support for adding 0.0 and -0.0 to the constant pool, since we lie and 
say that we support them, for the purposes of generating fsel instructions.

llvm-svn: 20970
 2005-04-01 01:08:07 +00:00
Nate Begeman
18b3394f4d Factor out common code, support FP comparison in folded SetCC 
llvm-svn: 20969
 2005-04-01 00:32:34 +00:00
Nate Begeman
fc89059914 fsel generation for f32 and f64 select 
generate compare immediate for integer compare with constant
fold setcc into branch
fold setcc into select

Code generation quality for Shootout is now on par with the Simple ISel

llvm-svn: 20968
 2005-03-31 23:55:40 +00:00
Nate Begeman
17ff2b3a87 Pass the correct values to the chain argument for node construction during 
LowerCallTo.
Handle ISD::ADD in SelectAddr, allowing us to have nonzero immediates for
loads and stores, amazing!

llvm-svn: 20946
 2005-03-31 02:05:53 +00:00
Nate Begeman
de4aac1374 Rewrite LowerCallTo and Select(ISD::CALL) to properly handle float varargs 
Tell the SelectionDAG ISel to expand SEXTLOAD of i1 and i8, rather than
  complicate the code in ISD::SEXTLOAD to do it by hand
Combine the FP and Int ISD::LOAD codegen
Generate better code for constant pool loads

As a result, all of Shootout, and likely many other programs are now
working.

llvm-svn: 20945
 2005-03-31 00:15:26 +00:00
Nate Begeman
9c5480beeb Fix calls whose arguments fit entirely in registers to not break the Chain. 
Implement SINT_TO_FP and UINT_TO_FP
Remove some dead code from the simple ISel

llvm-svn: 20944
 2005-03-30 19:38:35 +00:00
Nate Begeman
c877844625 Fix frame index code to generate legal PowerPC instructions. About half of 
Shootout now works.

llvm-svn: 20940
 2005-03-30 02:23:08 +00:00
Nate Begeman
ec87399dac Fix external symbol printing in the AsmPrinter. Tell the ISel that we 
don't support things like memcpy directly.  This allows a handful of the
Shootout programs to work, yay!

llvm-svn: 20939
 2005-03-30 01:45:43 +00:00
Nate Begeman
8eddad3985 Fix BranchCC (it's still dumb), and implement FP select (also dumb) 
llvm-svn: 20935
 2005-03-29 22:48:55 +00:00
Nate Begeman
43b127ca0a Implement integer select and i1 sign extend 
llvm-svn: 20934
 2005-03-29 22:24:51 +00:00
Nate Begeman
d5d90ec76b Implement SetCC, fix ZERO_EXTEND_INREG 
llvm-svn: 20933
 2005-03-29 21:54:38 +00:00
Chris Lattner
3759d20b0f fix a warning in the optimized build 
llvm-svn: 20920
 2005-03-29 15:13:27 +00:00
Nate Begeman
62e458272f Implement div, rem, and frameindex 
llvm-svn: 20907
 2005-03-29 00:03:27 +00:00
Nate Begeman
734a61f057 Pattern ISel: fix argument loading for i64s (thanks chris) 
Simple  ISel: fix i64 subtract

llvm-svn: 20903
 2005-03-28 23:08:54 +00:00
Nate Begeman
32d1caae6d Remove fake instruction 'subc' (mnemonic for subfc). 
More pattern isel updates

llvm-svn: 20902
 2005-03-28 22:28:37 +00:00
Nate Begeman
2ab66f55b6 Implement proper loads and zero-extends of all types 
llvm-svn: 20897
 2005-03-28 19:36:43 +00:00
Nate Begeman
6b0fbf811f Fix that pesky floats in integer regs problem by assigning the f32 type to 
the correct register class.  Also remove the loading of float data into int
regs part of varargs; it will need to be implemented differently later.

llvm-svn: 20857
 2005-03-26 08:25:22 +00:00
Nate Begeman
31d175d1e5 Get closer to having varargs working. There's still something strange 
going on with copies between floating point and integer register files
being generated.  Once that is solved, varargs will be done.

llvm-svn: 20856
 2005-03-26 07:46:36 +00:00
Nate Begeman
69742e6ea1 Make 64bit args and float args work correct with calls. Thanks to Chris 
for explaining EXTRACT_ELEMENT to me.

llvm-svn: 20847
 2005-03-26 02:17:46 +00:00
Nate Begeman
d3b5925b38 Next round of pattern isel changes, mostly dealing with calls. 
llvm-svn: 20841
 2005-03-26 01:28:53 +00:00
Nate Begeman
4106e81966 Correct a documention link 
llvm-svn: 20840
 2005-03-26 01:28:05 +00:00
Nate Begeman
ba1cd37734 Support global addresses and fix call returns. Varargs still aren't 
handled correctly for floating point arguments, or more than 8 arguemnts.
This does however, allow hello world to run.

llvm-svn: 20832
 2005-03-25 08:34:25 +00:00
Nate Begeman
6b11098886 Implement next round of Pattern ISel fixes 
1. void returns
2. multiplies
3. calls

llvm-svn: 20822
 2005-03-24 23:35:30 +00:00
Nate Begeman
613e54d5f0 Fix an incorrect argument being passed to BuildMI for indirect calls. 
llvm-svn: 20821
 2005-03-24 23:34:38 +00:00
Nate Begeman
4584ca0554 Commit Gabor Greif's patch to use iterators in lowering intrinsics. 
llvm-svn: 20816
 2005-03-24 20:07:16 +00:00
Chris Lattner
ad07b1bc54 eliminate dead variables, patch contributed by Gabor Greif! 
llvm-svn: 20812
 2005-03-24 17:32:20 +00:00
Nate Begeman
833c1d0994 Implement more of the PPC32 Pattern ISel: 
1) dynamic stack alloc
2) loads
3) shifts
4) subtract
5) immediate form of add, and, or, xor
6) change flag from -pattern-isel to -enable-ppc-pattern-isel

Remove dead arguments from getGlobalBaseReg in the simple ISel

llvm-svn: 20810
 2005-03-24 06:28:42 +00:00
Chris Lattner
a42c4a0874 Fix silly "no newline at end of file" warning 
llvm-svn: 20809
 2005-03-24 06:16:18 +00:00
Nate Begeman
0e77845b7e Addition of the PPC32 Pattern ISel. While it is far from complete, it will 
be brought up to parity with the current simple ISel in the coming days.
Currently, -pattern-isel is required to trigger it.

llvm-svn: 20805
 2005-03-24 04:41:43 +00:00
Misha Brukman
04d6d0666d We may be adding functions to the Module during initialization, so 
conservatively, it's modified

llvm-svn: 20735
 2005-03-21 19:22:14 +00:00
Chris Lattner
4b688a1c70 This mega patch converts us from using Function::a{iterator|begin|end} to 
using Function::arg_{iterator|begin|end}.  Likewise Module::g* -> Module::global_*.

This patch is contributed by Gabor Greif, thanks!

llvm-svn: 20597
 2005-03-15 04:54:21 +00:00
Chris Lattner
496d623600 Fix a crash handling 'undef bool', fixing an llc crash on 186.crafty 
llvm-svn: 20523
 2005-03-08 22:53:09 +00:00
Chris Lattner
b205d87afe cleanup the cfg after lsr 
llvm-svn: 20410
 2005-03-02 21:56:00 +00:00
Chris Lattner
798b18474c Add a temporary option for llc-beta: -enable-lsr-for-ppc, which turns on 
Loop Strength Reduction.

llvm-svn: 20399
 2005-03-02 06:19:22 +00:00
Chris Lattner
5174b9cb60 Fix a problem where the PPC backend lost track of the fact that it had 
to save and restore the LR register on entry and exit of a leaf function
that needed to access globals or the constant pool.  This should hopefully
fix oscar from sending the PPC tester spinning out of control.

llvm-svn: 20197
 2005-02-15 20:26:49 +00:00
Chris Lattner
c032990335 Fix Regression/CodeGen/PowerPC/2005-01-14-UndefLong.ll 
llvm-svn: 19557
 2005-01-14 20:22:02 +00:00
Chris Lattner
b0b49268c4 Fix: Regression/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll 
llvm-svn: 19555
 2005-01-14 19:31:00 +00:00
Chris Lattner
93fc4bd9cb This hunk: 
-  unsigned TrueValue = getReg(TrueVal, BB, BB->begin());
+  unsigned TrueValue = getReg(TrueVal);

Fixes the PPC regressions from last night.

The other hunk is just a clarity improvement.

llvm-svn: 19263
 2005-01-02 23:07:31 +00:00
Chris Lattner
ad63a0d6a4 Fix a FIXME: Select instructions on longs were miscompiled. 
While we're at it, improve codegen of select instructions.  For this
testcase:

int %test(bool %C, int %A, int %B) {
  %D = select bool %C, int %A, int %B
  ret int %D
}

We used to generate this code:

_test:
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        b .LBB_test_3   ;
.LBB_test_2:    ;
        or r5, r4, r4
.LBB_test_3:    ;
        or r3, r5, r5
        blr

Now we emit:

_test:
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        or r4, r5, r5
.LBB_test_2:    ;
        or r3, r4, r4
        blr

-Chris

llvm-svn: 19214
 2005-01-01 16:10:12 +00:00
Chris Lattner
cea3ae9792 Specify all of the targets built. 
llvm-svn: 18985
 2004-12-16 17:26:44 +00:00
Chris Lattner
a0561d43b2 Factor out common .td file chunks. 
llvm-svn: 18982
 2004-12-16 16:31:57 +00:00
Chris Lattner
9f0237ca85 Fix Regression/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll, and all programs 
when compiled with debug information.

llvm-svn: 18835
 2004-12-12 20:36:19 +00:00
Chris Lattner
dc33000e67 CSE calls to getTypeSize. 
llvm-svn: 18833
 2004-12-12 20:31:00 +00:00
Chris Lattner
6131b06f73 Use the target triple to pick this target. 
llvm-svn: 18830
 2004-12-12 17:40:28 +00:00
Chris Lattner
2231d21dad Fix several bugs in 'op x, imm' handling. Foremost is that we now emit 
addi r3, r3, -1
instead of
   addi r3, r3, 1

for 'sub int X, 1'.

Secondarily, this fixes several cases where we could crash given an unsigned
constant.  And fixes a couple of minor missed optimization cases, such as
xor X, ~0U -> not X

llvm-svn: 18379
 2004-11-30 07:30:20 +00:00
Chris Lattner
1e093bfb2b Fix CodeGen/PowerPC/2004-11-30-shr-var-crash.ll 
llvm-svn: 18376
 2004-11-30 06:40:04 +00:00
Chris Lattner
629965fbe0 Fix test/Regression/CodeGen/PowerPC/2004-11-29-ShrCrash.ll 
llvm-svn: 18374
 2004-11-30 06:36:11 +00:00
Chris Lattner
23a2a6e5d3 Fix test/Regression/CodeGen/PowerPC/2004-11-30-shift-crash.ll 
llvm-svn: 18371
 2004-11-30 06:29:10 +00:00
Chris Lattner
1de5cd0fd0 The LLVM bool type shall have 1 byte alignment on PPC. 
llvm-svn: 18311
 2004-11-28 21:16:45 +00:00
Nate Begeman
6048139b1f Remove the ISel->AsmPrinter link via the TargetMachine that was put in 
place to help bring up the PowerPC back end on Darwin.  This code is no
longer serves any purpose now that the AsmPrinter does the right thing
all the time printing GlobalValues.  --Cruft.

llvm-svn: 18267
 2004-11-27 04:45:11 +00:00
Chris Lattner
47987cf373 There is no reason to store <x,x>, just store <x>. 
llvm-svn: 18263
 2004-11-26 20:25:17 +00:00
Nate Begeman
6405f5e9b3 Enable optimization suggested by Chris Lattner to not emit reloc stubs for 
static global variables whose addresses are taken.  This allows us to
convert the following code for taking the address of a static function foo

        addis r2, r30, ha16(Ll1__2E_foo_2$non_lazy_ptr-"L00001$pb")
        lwz r3, lo16(Ll1__2E_foo_2$non_lazy_ptr-"L00001$pb")(r2)

which also includes linker stub code emitted at the end of the .s file not
shown here, and replace it with this:

        addis r2, r30, ha16(l1__2E_foo_2-"L00001$pb")
        la r3, lo16(l1__2E_foo_2-"L00001$pb")(r2)

which in addition to not needing linker help, also has no load instruction.
For those not up on PowerPC mnemonics, la is shorthand for add immediate.

llvm-svn: 18239
 2004-11-25 07:09:01 +00:00
Chris Lattner
98ddaa680d Fix the build on non ppc machines 
llvm-svn: 18235
 2004-11-25 06:14:45 +00:00
Chris Lattner
026387ccbc The JIT works enough 
llvm-svn: 18228
 2004-11-25 04:14:54 +00:00
Chris Lattner
671d625e17 Fix encoding of fsel, fixing olden/power, McCat/bisort and several others. 
All of Olden passes now! :)

llvm-svn: 18227
 2004-11-25 04:11:07 +00:00
Chris Lattner
1f6882a401 Fix encoding of fneg instruction 
llvm-svn: 18226
 2004-11-25 03:53:44 +00:00
Chris Lattner
1a5a39e9ec Fix encoding of swari, fixing several programs, including Olden/mst 
llvm-svn: 18225
 2004-11-25 03:40:20 +00:00
Chris Lattner
01269e6ad3 There is not a 1-1 mappign between llvm blocks and PPC blocks, do not use 
LLVM blocks as the keys for the branch rewriter.  This fixes treeadd and
many other programs with the JIT.

llvm-svn: 18223
 2004-11-25 00:33:57 +00:00
Chris Lattner
ebbfaa3db8 * Rename existing relocations to be more specific 
* Add relocations for refernces to non-lazy darwin stubs and implement
  them correctly.

With this change, we can correctly references external globals, and now
all but two UnitTests and all but 1 Regression/C tests pass.

More importantly, bugpoint-jit will start giving us useful testcases,
instead of always telling us that references to external globals don't
work :)

llvm-svn: 18222
 2004-11-24 22:30:08 +00:00
Nate Begeman
e9b752c4e3 Add the same optimization that we do loading from fixed alloca slots to 
storing to fixed alloca slots.

llvm-svn: 18221
 2004-11-24 21:53:14 +00:00
Chris Lattner
4b48c12388 Write CompilationCallback as an explicit assembly stub to avoid getting GCC's 
prolog.

llvm-svn: 18220
 2004-11-24 21:01:46 +00:00
Chris Lattner
961fae4d82 When rewriting the original call instruction, make sure to rewrite it to 
call the right address.

llvm-svn: 18213
 2004-11-24 18:00:02 +00:00
Chris Lattner
8cd0215f14 Force the intregs ptr into R2 and the FPregs ptr into R3. This fixes a really 
obscure problem where we were doing:

lmw     r3,0(r9)

which is undefined on PPC.  Now we do:

lmw     r3,0(r2)

by force, not relying on the GCC register allocator for luck :)

llvm-svn: 18212
 2004-11-24 17:42:55 +00:00
Chris Lattner
de6bb17359 Fix a few more tests by encoding the extsb and other XForm11 instructions 
correctly.

llvm-svn: 18200
 2004-11-24 03:52:02 +00:00
Chris Lattner
338b1b4634 Fix the encoding of ORi and other DForm4 instructions. This brings us to 
36/42 SingleSource/UnitTests passing!

llvm-svn: 18199
 2004-11-24 02:15:41 +00:00
Chris Lattner
2c1b140d62 Loads are relocatable too 
llvm-svn: 18198
 2004-11-24 02:03:44 +00:00
Chris Lattner
ef7794a7c6 Calls do not need a MovPCtoLR instruction 
llvm-svn: 18197
 2004-11-24 02:00:06 +00:00
Chris Lattner
9e59b1f3b5 Get constant pools working. This fixes even more programs, allowing us to 
pass 24/42 in UnitTests (up from 20).

llvm-svn: 18196
 2004-11-24 01:56:12 +00:00
Chris Lattner
a4fd491b8d Rewrite branches more closely to correct. This makes more stuff pass, and 
stops the infinite loops!

llvm-svn: 18194
 2004-11-24 01:35:12 +00:00
Chris Lattner
a8184a2882 Branch instructions explicitly represent CRx in them. bEcause of this, encode 
them explicitly as well.

llvm-svn: 18193
 2004-11-24 01:15:19 +00:00
Nate Begeman
f8b9f49dc8 Fix encoding of bctrl, and remove some unused instructions 
llvm-svn: 18192
 2004-11-24 00:16:37 +00:00
Chris Lattner
f50b42adc1 Fix encoding of blr and bctr 
llvm-svn: 18178
 2004-11-23 22:06:24 +00:00
Nate Begeman
9b9c78b3e2 Use the correct register class as a constaint to gcc's inline assembly, so 
that we don't end up trying to use r0 as a base register.

llvm-svn: 18176
 2004-11-23 21:37:22 +00:00
Nate Begeman
7ae4c39fc6 Save/Restore arg regs and nonvolatile regs the compiler might use during 
CompilationCallback

llvm-svn: 18175
 2004-11-23 21:34:18 +00:00
Chris Lattner
08eb9d0d18 Fix the encoding of OR, AND and many other instructions 
llvm-svn: 18174
 2004-11-23 21:17:35 +00:00
Chris Lattner
04a25df638 Remove argtype and argcount magic, which was used by the old asmprinter. 
llvm-svn: 18170
 2004-11-23 20:41:34 +00:00
Chris Lattner
9a57aafc94 Get rid of flags that are dead 
llvm-svn: 18169
 2004-11-23 20:37:41 +00:00
Chris Lattner
88fcda18b8 Fix encoding of rlwinm? 
llvm-svn: 18165
 2004-11-23 19:23:32 +00:00
Chris Lattner
512b1d6c2a Fix encodings 
llvm-svn: 18164
 2004-11-23 19:23:18 +00:00
Chris Lattner
cb15c858c2 Enumerate CR registers 
llvm-svn: 18162
 2004-11-23 18:59:59 +00:00
Chris Lattner
4cad3e8fbc Initial implementation of exiting CompilationCallback 
This should save all argument registers on entry and restore on exit, despite
that, simple things seem to work!!!

llvm-svn: 18161
 2004-11-23 18:49:46 +00:00
Chris Lattner
141a71cf32 This method is dead 
llvm-svn: 18160
 2004-11-23 18:47:55 +00:00
Chris Lattner
9554912215 Remove this method. 
llvm-svn: 18159
 2004-11-23 18:47:42 +00:00
Chris Lattner
e8e62c5431 Squelch a bogus warning. 
llvm-svn: 18156
 2004-11-23 15:56:38 +00:00
Nate Begeman
f096183b46 Don't return value from void function. This is only temporary anyway while 
the JIT is made to work!

llvm-svn: 18155
 2004-11-23 10:04:49 +00:00
Chris Lattner
b8eb5dabd7 Fix a minor bug 
llvm-svn: 18153
 2004-11-23 06:56:31 +00:00
Chris Lattner
30c5ade43e Be really paranoid about not breaking stuff yet 
llvm-svn: 18152
 2004-11-23 06:56:18 +00:00
Chris Lattner
8bb3fbffa3 Implement the first hunk of CompilationCallback. The pieces missing are the 
ones noted, which require funny PPC specific inline assembly.

If some angel felt the desire to help me, I think this is that last bit missing
for JIT support (however, generic code emitter might night work right with
the constant pool yet).

llvm-svn: 18151
 2004-11-23 06:55:05 +00:00
Chris Lattner
ec9138be44 Implement the stub needed to get into compilation callback. 
llvm-svn: 18147
 2004-11-23 06:27:02 +00:00
Chris Lattner
5ac6f7a36d Simplify code a bit 
llvm-svn: 18146
 2004-11-23 06:05:44 +00:00
Chris Lattner
37a72a9ef2 Initial implementation of the JIT interfaces. Relocation is done and stubs 
for external functions work.  CompilationCallback has not been written, and
stubs for internal functions are not generated yet.  This means you can call
printf and exit, and use global variables, but cannot call functions local to
a module yet.

llvm-svn: 18145
 2004-11-23 06:02:06 +00:00
Chris Lattner
2f47d181d8 Emit relocations for the global variable using instructions. This gets us 
LA, LOADHiAddr, CALLpcrel, and MovePCtoLR working, though the constant pool
probably is not right.

llvm-svn: 18144
 2004-11-23 05:59:53 +00:00
Chris Lattner
17d87ca91f Implement all of the methods 
llvm-svn: 18142
 2004-11-23 05:57:57 +00:00
Chris Lattner
068ade1373 Initial checkin of the 32-bit PPC relocation types 
llvm-svn: 18141
 2004-11-23 05:57:38 +00:00
Chris Lattner
e74f5f8a4e Move JITInfo from PPCTM to PPC32TM 
llvm-svn: 18140
 2004-11-23 05:56:40 +00:00
Chris Lattner
8e3800acc9 Do not provide the non-specialized PowerPCJITInfo object, it is pretty useless. 
Instead, let derived classes provide specialized ones.

llvm-svn: 18139
 2004-11-23 05:55:38 +00:00
Chris Lattner
1b163867c6 LA is really addi. Be consistent with operand ordering to avoid confusing the code emitter 
llvm-svn: 18138
 2004-11-23 05:54:25 +00:00
Chris Lattner
3e3ba3b1cf Remove some dead code 
llvm-svn: 18136
 2004-11-22 23:07:22 +00:00
Chris Lattner
5b68bdb2ce Comment out a couple of unused instructions. 
llvm-svn: 18135
 2004-11-22 23:07:01 +00:00
Chris Lattner
a020fc1650 Disable this. 
llvm-svn: 18130
 2004-11-22 21:51:40 +00:00
Chris Lattner
bab8204396 This chunk of code needs to be rewritten 
llvm-svn: 18127
 2004-11-22 21:45:54 +00:00
Nate Begeman
7ec36ad70f Fix Shootout-C++/wc, which was broken by my recent changes to emit fewer 
reg-reg copies.  The necessary conditions for this bug are a GEP that is
used outside the basic block in which it is defined, whose components
other than the pointer are all constant zero, and where the use is
selected before the definition (backwards branch to successsor block).

llvm-svn: 18084
 2004-11-21 05:14:06 +00:00
Chris Lattner
3e3645938e ignore generated files. 
llvm-svn: 18072
 2004-11-21 00:00:54 +00:00
Chris Lattner
3ff7bafe17 Remove this method, it's not clear how it could be implemented indep of 32 or 64-bit mode 
llvm-svn: 18038
 2004-11-20 04:17:17 +00:00
Chris Lattner
e3461cf0bc getJITStubForFunction is optional and unimplemented, just remove it. 
llvm-svn: 18036
 2004-11-20 04:14:44 +00:00
Nate Begeman
83cded0ecb Eliminate another 6k register copies that the register allocator would just 
coalesce out of hbd.  Speeds up compilation by 2% (0.6s)

llvm-svn: 17987
 2004-11-19 08:01:16 +00:00
Nate Begeman
de1fd6a162 Generate fewer reg-reg copies for the register allocator to deal with. 
This eliminates over 2000 in hbd alone.

llvm-svn: 17973
 2004-11-19 02:06:40 +00:00
Nate Begeman
567d30174a Eliminate another common source of moves that the register allocator 
shouldn't be forced to coalesce for us: folded GEP operations.  This too
fires thousands of times across the testsuite.

llvm-svn: 17947
 2004-11-18 07:22:46 +00:00
Nate Begeman
3e1aaef2b5 When accessing the base register for global variables, use the register 
directly rather than making a copy for the register allocator to coalesce.
This kills thousands of live intervals across the testsuite.

llvm-svn: 17946
 2004-11-18 06:51:29 +00:00
Nate Begeman
7e254235e2 Clean up and fix cast codegen by removing cases that are handled elsewhere, 
and properly emitting signed short to unsigned int.  This fixes the last
regression vs. the CBE, MultiSource/Applications/hbd.

llvm-svn: 17942
 2004-11-18 04:56:53 +00:00
Chris Lattner
c13149e03e Simplify namespaces 
llvm-svn: 17870
 2004-11-16 04:47:33 +00:00
Misha Brukman
757502af07 Add BCTR and LWZU instruction opcodes 
llvm-svn: 17851
 2004-11-15 21:20:09 +00:00
Misha Brukman
0d900050be Handle GhostLinkage (should not ever reach the assembly printing stage!) 
llvm-svn: 17749
 2004-11-14 21:03:30 +00:00
Misha Brukman
c98cd22aae Fix build on Linux/PowerPC64 using SuSE GCC (#undef PPC) 
llvm-svn: 17744
 2004-11-14 20:34:01 +00:00
Nate Begeman
398bd2b9f6 Allow hbd to be bugpointable on darwin by fixing common and linkonce codegen 
llvm-svn: 17637
 2004-11-09 04:01:18 +00:00
Nate Begeman
a0c15f3ffd Put int the getReg cast optimization from x86 so that we generate fewer 
move instructions for the register allocator to coalesce.

llvm-svn: 17608
 2004-11-08 02:25:40 +00:00
Nate Begeman
a7541b19fc Disable bogus cast elimination when the cast is used by a setcc instruction. 
llvm-svn: 17583
 2004-11-07 20:23:42 +00:00
Nate Begeman
bc8bc24d28 Thanks to sabre for pointing out that we were incorrectly codegen'ing 
int test(int x) { return 32768 - x; }

Fixed by teaching the function that checks a constant's validity to be used
as an immediate argument about subtract-from instructions.

llvm-svn: 17476
 2004-11-04 19:43:18 +00:00
Reid Spencer
d3f7233495 Change Library Names Not To Conflict With Others When Installed 
llvm-svn: 17286
 2004-10-27 23:18:45 +00:00
Nate Begeman
46c3a8875f Remove file that is no longer used, and move include of MRegisterInfo.h 
from PowerPCFrameInfo.h to PowerPCAsmPrinter.cpp where it is actually
needed.

llvm-svn: 17244
 2004-10-26 06:02:38 +00:00
Nate Begeman
7c3c97af10 Eliminate usage of MRegisterInfo::getRegClass(physreg) 
llvm-svn: 17240
 2004-10-26 05:40:45 +00:00
Nate Begeman
ae98298003 Update to-do list 
llvm-svn: 17235
 2004-10-26 04:10:53 +00:00
Nate Begeman
113f516f6b Fix treecc. Also fix a latent bug in emitBinaryConstOperation that would 
allow and const, 0 to be incorrectly codegen'd into a rlwinm instruction.

llvm-svn: 17234
 2004-10-26 03:48:25 +00:00
Chris Lattner
9c356da87d Disable the JIT until it can sorta kinda work. 
llvm-svn: 17230
 2004-10-25 20:53:41 +00:00
Nate Begeman
4b5ed899fd Implement more complete and correct codegen for bitfield inserts, as tested 
by the recently committed rlwimi.ll test file.  Also commit initial code
for bitfield extract, although it is turned off until fully debugged.

llvm-svn: 17207
 2004-10-24 10:33:30 +00:00
Misha Brukman
f8bd6fc901 * Correctly handle the MovePCtoLR pseudo-instr with a bl to next instr 
* Stop the confusion of using rv and Addr for global addresses: just use rv

llvm-svn: 17195
 2004-10-23 23:47:34 +00:00
Misha Brukman
58d9e43fa1 Add BA, BL, and BLA opcodes 
llvm-svn: 17193
 2004-10-23 20:29:24 +00:00
Misha Brukman
0342392149 * Do not emit IMPLICIT_DEF pseudo-instructions 
* Convert register numbers from their opcode value to the real value, e.g.
  PPC::R1 => 1 and PPC::F1 => 1
* Add correct handling of loading of global values which are PC-relative --
  implement ha16() and lo16()

llvm-svn: 17190
 2004-10-23 18:28:01 +00:00
Misha Brukman
bd6a01c3ef DForm_1, particularly used by store instructions, needs the immediate operand to 
be listed second as that is how the instructions are usually created (and is the
correct asm syntax) so that it's assembled correctly from its constituents

llvm-svn: 17183
 2004-10-23 06:08:38 +00:00
Misha Brukman
e4ae05e099 Fix the SPR field for MTLR, MFLR, MTCTR, and MFCTR instructions. 
The decimal value given in the manual (8 or 9) really needs to be multiplied by
a factor of 32 because of the group of 5 zero bits after the register code.

llvm-svn: 17182
 2004-10-23 06:05:49 +00:00
Misha Brukman
5cea06807d The value of the XO field for MFLR and MFCTR is 339, not 399 
llvm-svn: 17181
 2004-10-23 05:38:55 +00:00
Misha Brukman
39d23c81d4 Remove extraneous blank line 
llvm-svn: 17180
 2004-10-23 04:59:22 +00:00
Misha Brukman
c660c6c514 Align function arguments in function headers 
llvm-svn: 17178
 2004-10-23 04:58:32 +00:00
Nate Begeman
91ef127999 Kill casts from integer types to unsigned byte, when the cast was only used 
as the shift amount operand to a shift instruction.  This was causing us to
emit unnecessary clear operations for code such as:
int foo(int x) { return 1 << x; }

llvm-svn: 17175
 2004-10-23 00:50:23 +00:00
Reid Spencer
019621a1ea Adjust to changes in Makefile.rules 
llvm-svn: 17167
 2004-10-22 21:02:08 +00:00
Reid Spencer
e48ba34fd4 We won't use automake 
llvm-svn: 17155
 2004-10-22 03:35:04 +00:00
Misha Brukman
66a092f3df Remove debug code emitter from the JIT 
llvm-svn: 17151
 2004-10-21 03:07:38 +00:00
Alkis Evlogimenos
67449982b8 Make this compile. 
llvm-svn: 17150
 2004-10-21 02:44:16 +00:00
Misha Brukman
9514a75e36 * Added basic support for JITing functions, basic blocks, instruction encoding, 
including registers, constants, and partial support for global addresses
* The JIT is disabled by default to allow building llvm-gcc, which wants to test
  running programs during configure

llvm-svn: 17149
 2004-10-21 01:42:02 +00:00
Nate Begeman
d7cbf1d28e Don't clear or sign extend bool->int. This fires a few dozen times on the test suite 
llvm-svn: 17147
 2004-10-20 21:55:41 +00:00
Reid Spencer
ce514b1c2c Initial automake generated Makefile template 
llvm-svn: 17136
 2004-10-18 23:55:41 +00:00
Nate Begeman
1c408f7319 Generate correct stubs for weak-linked symbols 
llvm-svn: 17101
 2004-10-17 23:01:34 +00:00
Reid Spencer
9a97056275 PPC32GenCodeEmitter instead of PowerPCGenCodeEmitter 
llvm-svn: 17087
 2004-10-17 14:59:38 +00:00
Nate Begeman
f9aac7846c Implement bitfield insert by recognizing the following pattern: 
1. optional shift left
2. and x, immX
3. and y, immY
4. or z, x, y
==> rlwimi z, x, y, shift, mask begin, mask end

where immX == ~immY and immX is a run of set bits. This transformation
fires 32 times on voronoi, once on espresso, and probably several
dozen times on external benchmarks such as gcc.

To put this in terms of actual code generated for
struct B { unsigned a : 3; unsigned b : 2; };
void storeA (struct B *b, int v) { b->a = v;}
void storeB (struct B *b, int v) { b->b = v;}

Old:
_storeA:
        rlwinm r2, r4, 0, 29, 31
        lwz r4, 0(r3)
        rlwinm r4, r4, 0, 0, 28
        or r2, r4, r2
        stw r2, 0(r3)
        blr

_storeB:
        rlwinm r2, r4, 3, 0, 28
        rlwinm r2, r2, 0, 27, 28
        lwz r4, 0(r3)
        rlwinm r4, r4, 0, 29, 26
        or r2, r2, r4
        stw r2, 0(r3)
        blr

New:
_storeA:
        lwz r2, 0(r3)
        rlwimi r2, r4, 0, 29, 31
        stw r2, 0(r3)
        blr

_storeB:
        lwz r2, 0(r3)
        rlwimi r2, r4, 3, 27, 28
        stw r2, 0(r3)
        blr

llvm-svn: 17078
 2004-10-17 05:19:20 +00:00
Nate Begeman
d4c970aa3d Finally fix one of the oldest FIXMEs in the PowerPC backend: correctly 
flag rotate left word immediate then mask insert (rlwimi) as a two-address
instruction, and update the ISel usage of the instruction accordingly.

This will allow us to properly schedule rlwimi, and use it to efficiently
codegen bitfield operations.

llvm-svn: 17068
 2004-10-16 20:43:38 +00:00
Chris Lattner
3662abfd5a ADd support for undef and unreachable 
llvm-svn: 17050
 2004-10-16 18:13:47 +00:00
Nate Begeman
d8183bd297 Better codegen of binary integer ops with 32 bit immediate operands. 
This transformation fires a few dozen times across the testsuite.

For example, int test2(int X) { return X ^ 0x0FF00FF0; }
Old:
_test2:
        lis r2, 4080
        ori r2, r2, 4080
        xor r3, r3, r2
        blr

New:
_test2:
        xoris r3, r3, 4080
        xori r3, r3, 4080
        blr

llvm-svn: 17004
 2004-10-15 00:50:19 +00:00
Misha Brukman
66261f021d * Claim to support machine code emission - return false from 
addPassesToEmitMachineCode()
* Add support for registers and constants in getMachineOpValue()

This enables running "int main() { ret 0 }" via the PowerPC JIT.

llvm-svn: 16983
 2004-10-14 06:39:56 +00:00
Misha Brukman
cb4130c28c * Include the real (generated) version of getBinaryCodeForInstr() 
* Add implementation of getMachineOpValue() for generated code emitter
* Convert assert()s in unimplemented functions to abort()s so that non-debug
  builds fail predictably
* Add file header comments

llvm-svn: 16981
 2004-10-14 06:07:25 +00:00
Misha Brukman
11d1764f74 * Make a PPC32-specific code emitter because we have separate classes for 32- 
and 64-bit code emitters that cannot share code unless we use virtual
  functions
* Identify components being built by tablegen with more detail by assigning them
  to PowerPC, PPC32, or PPC64 more specifically; also avoids seeing 'building
  PowerPC XYZ' messages twice, where one is for PPC32 and one for PPC64

llvm-svn: 16980
 2004-10-14 06:04:56 +00:00
Misha Brukman
5e8bfd0675 There is only one field in an instruction, and that is `Inst', the final view of 
the instruction binary format, all others are simply operands and should not
have the `field' label

llvm-svn: 16978
 2004-10-14 05:55:37 +00:00
Misha Brukman
47c2236ae9 PowerPC instruction definitions use LittleEndian-style encoding [0..31] 
llvm-svn: 16977
 2004-10-14 05:54:38 +00:00
Reid Spencer
e6418ec30f Update to reflect changes in Makefile rules. 
llvm-svn: 16950
 2004-10-13 11:46:52 +00:00
Reid Spencer
1b7459b29d Initial version of automake Makefile.am file. 
llvm-svn: 16893
 2004-10-10 22:20:40 +00:00