1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00
Commit Graph

199032 Commits

Author SHA1 Message Date
Francesco Petrogalli
fe31663523 [sve][acle] Add some C intrinsics for brain float types.
Summary:
The following intrinsics has been added:

svuint16_t svcnt[_bf16]_m(svuint16_t inactive, svbool_t pg, svbfloat16_t op)
svuint16_t svcnt[_bf16]_x(svbool_t pg, svbfloat16_t op)
svuint16_t svcnt[_bf16]_z(svbool_t pg, svbfloat16_t op)

svbfloat16_t svtbl[_bf16](svbfloat16_t data, svuint16_t indices)

svbfloat16_t svtbl2[_bf16](svbfloat16x2_t data, svuint16_t indices)

svbfloat16_t svtbx[_bf16](svbfloat16_t fallback, svbfloat16_t data, svuint16_t indices)

Reviewers: c-rhodes, kmclaughlin, efriedma, sdesmalen, ctetreau

Subscribers: tschuett, hiraditya, rkruppe, psnobl, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D82429
2020-06-25 16:31:01 +00:00
Simon Pilgrim
aafcce1591 GVN.h - reduce AliasAnalysis.h include to forward declaration. NFC.
Cleanup MemoryDependenceAnalysis.h as well - GVN.h was also implicitly including AliasAnalysis.h via this.

Fix implicit include dependencies in source files and replace legacy AliasAnalysis typedef with AAResults where necessary.
2020-06-25 16:59:35 +01:00
Arthur Eubanks
c0c8bb0361 [NewPM] Separate out alias analysis passes in opt
Summary:
This somewhat matches the --aa-pipeline option, which separates out any
AA analyses to make sure they run before other passes.

Makes check-llvm failures under new PM go from 2356 -> 2303.

AA passes are not handled by PassBuilder::parsePassPipeline() but rather
PassBuilder::parseAAPipeline(), which is why this fixes some failures.

Reviewers: asbirlea, hans, ychen, leonardchan

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82488
2020-06-25 08:53:57 -07:00
Sanjay Patel
9abae52291 [InstCombine] fold fmul/fdiv with fabs operands
fabs(X) * fabs(Y) --> fabs(X * Y)
fabs(X) / fabs(Y) --> fabs(X / Y)

If both operands of fmul/fdiv are positive, then the result must be positive.

There's a NAN corner-case that prevents removing the more specific fold just
above this one:
fabs(X) * fabs(X) -> X * X
That fold works even with NAN because the sign-bit result of the multiply is
not specified if X is NAN.

We can't remove that and use the more general fold that is proposed here
because once we convert to this:
fabs (X * X)
...it is not legal to simplify the 'fabs' out of that expression when X is NAN.
That's because fabs() guarantees that the sign-bit is always cleared - even
for NAN values.

So this patch has the potential to lose information, but it seems unlikely if
we do the more specific fold ahead of this one.

Differential Revision: https://reviews.llvm.org/D82277
2020-06-25 11:35:38 -04:00
David Green
589fc8a0d2 [ARM] Fixup for signed comparison warning. NFC 2020-06-25 16:29:44 +01:00
Simon Pilgrim
d4b8320707 Remove orphan AMDGPUAAResult::Aliases and AMDGPUAAResult::PathAliases declarations. NFC. 2020-06-25 16:00:44 +01:00
Simon Pilgrim
ddfeea07cf Remove orphan TypeBasedAAResult::PathAliases declaration. NFC. 2020-06-25 16:00:44 +01:00
Simon Pilgrim
332483b894 GlobalsModRef.h - reduce CallGraph.h include to forward declarations. NFC.
Fix implicit include dependencies in source files.
2020-06-25 16:00:43 +01:00
Simon Pilgrim
d5befcc49c LoopAccessAnalysis.h - reduce AliasAnalysis.h include to forward declaration. NFC.
Fix implicit include dependencies in source files and replace legacy AliasAnalysis typedef with AAResults where necessary.
2020-06-25 16:00:42 +01:00
David Green
6e22f03ef5 [ARM] MVE VCVT lowering for f32->f16 truncs
This adds code to lower f32 to f16 fp_trunc's using a pair of MVE VCVT
instructions. Due to v4f16 not being legal, fp_round are often split up
fairly early. So this reconstructs the vcvt's from a buildvector of
fp_rounds from two vector inputs. Something like:

BUILDVECTOR(FP_ROUND(EXTRACT_ELT(X, 0),
            FP_ROUND(EXTRACT_ELT(Y, 0),
            FP_ROUND(EXTRACT_ELT(X, 1),
            FP_ROUND(EXTRACT_ELT(Y, 1), ...)

It adds a VCVTN node to handle this, which like VMOVN or VQMOVN lowers
into the top/bottom lanes of an MVE instruction.

Differential Revision: https://reviews.llvm.org/D81139
2020-06-25 15:59:36 +01:00
Victor Campos
c5975f74e8 [AArch64] Emit warning when disassembling unpredictable LDRAA and LDRAB
Summary:
LDRAA and LDRAB in their writeback variant should softfail when the same
register is used as result and base.

This patch adds a custom decoder that catches such case and emits a
warning when it occurs.

Differential Revision: https://reviews.llvm.org/D82541
2020-06-25 15:56:36 +01:00
Thomas Preud'homme
281e020b4e [MC] Fix PR45805: infinite recursion in assembler
Give up folding an expression if the fragment of one of the operands
would require laying out a fragment already being laid out. This
prevents hitting an infinite recursion when a fill size expression
refers to a later fragment since computing the offset of that fragment
would require laying out the fill fragment and thus computing its size
expression.

Reviewed By: echristo

Differential Revision: https://reviews.llvm.org/D79570
2020-06-25 15:42:36 +01:00
Xing GUO
fe28db982f [ObjectYAML][DWARF] Format codes. NFC. 2020-06-25 21:53:06 +08:00
Zarko Todorovski
cf94b0b37f [NFC][PPC][AIX] Add stack frame layout diagram to PPCISelLowering.cpp
Summary:
This NFC patch adds a diagram of the AIX ABI stack frame layout.

Based on https://www.ibm.com/support/knowledgecenter/en/ssw_aix_72/assembler/idalangref_runtime_process.html

Reviewers: sfertile, cebowleratibm, hubert.reinterpretcast, Xiangling_L

Reviewed By: sfertile

Subscribers: wuzish, nemanjai, hiraditya, kbarton, llvm-commits

Tags: #powerpc, #llvm

Differential Revision: https://reviews.llvm.org/D82408
2020-06-25 09:41:42 -04:00
Sanjay Patel
bd6e072f30 [PhaseOrdering] delete test for vectorization; NFC
As requested in D81416, I'm deleting the file that I added with:
rGdf79443
2020-06-25 09:34:11 -04:00
Guillaume Chatelet
c9edb6243d [Alignment][NFC] Conform X86, ARM and AArch64 TargetTransformInfo backends to the public API
The main interface has been migrated to Align already but a few backends where broadening the type from Align to MaybeAlign.
This patch makes sure all implementations conform to the public API.

Differential Revision: https://reviews.llvm.org/D82465
2020-06-25 13:23:13 +00:00
Simon Pilgrim
f93a8896de LiveIntervals.h.h - reduce AliasAnalysis.h include to forward declaration. NFC.
Fix implicit include dependencies in source files and replace legacy AliasAnalysis typedef with AAResults where necessary.
2020-06-25 14:22:21 +01:00
Simon Pilgrim
5cd0488c20 Attributes.cpp - fix include sorting order. NFC. 2020-06-25 14:22:20 +01:00
Simon Pilgrim
3a276e5ce7 IRBuilder.cpp - fix include sorting order. NFC. 2020-06-25 14:22:20 +01:00
Simon Pilgrim
0c1872c935 CodeGenPrepare.cpp - remove unused IntrinsicsX86.h header. NFC. 2020-06-25 14:22:19 +01:00
Simon Pilgrim
78ec88201c Fix typos in CodeGenPrepare::splitLargeGEPOffsets comments. 2020-06-25 14:22:19 +01:00
Guillaume Chatelet
71e4df2c3b [Alignment][NFC] Use Align for TargetCallingConv::OrigAlign
This patch replaces D69249.

This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Differential Revision: https://reviews.llvm.org/D82307
2020-06-25 13:21:22 +00:00
Florian Hahn
d5068f51ec [DSE,MSSA] Check if Def is removable only wen we try to remove it.
Non-removable MemoryDefs can still eliminate other defs. Update the
isRemovable checks to only candidates for removal.
2020-06-25 14:01:10 +01:00
David Green
6927c576ff [ARM] Split cast cost tests, and add masked load/store tests. NFC
This file has grown quite large and could do with being split up. This
splits away the load/store + cast tests into a separate file. Some
masked load/store + cast tests have been added too, along with some
extra load/store + fpcast tests.
2020-06-25 13:24:17 +01:00
Georgii Rymar
e7aef285a1 [llvm-readelf] - Report a warning instead of an error when dumping a broken section header.
There is no reason to report an error in `printSectionHeaders()`, we can report
a warning and continue dumping. This is what the patch does.

Differential revision: https://reviews.llvm.org/D82462
2020-06-25 14:38:06 +03:00
Tyker
e767fc4f7e [AssumeBundles] Use operand bundles to encode alignment assumptions
Summary:
NOTE: There is a mailing list discussion on this: http://lists.llvm.org/pipermail/llvm-dev/2019-December/137632.html

Complemantary to the assumption outliner prototype in D71692, this patch
shows how we could simplify the code emitted for an alignemnt
assumption. The generated code is smaller, less fragile, and it makes it
easier to recognize the additional use as a "assumption use".

As mentioned in D71692 and on the mailing list, we could adopt this
scheme, and similar schemes for other patterns, without adopting the
assumption outlining.

Reviewers: hfinkel, xbolva00, lebedev.ri, nikic, rjmccall, spatel, jdoerfert, sstefan1

Reviewed By: jdoerfert

Subscribers: yamauchi, kuter, fhahn, merge_guards_bot, hiraditya, bollu, rkruppe, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D71739
2020-06-25 12:59:44 +02:00
Tyker
b0ad27afc0 [NFC] update test to make diff of the following commit clear 2020-06-25 12:59:44 +02:00
Sam Tebbs
2aff9bba46 [ARM] Allow tail predication on sadd_sat and uadd_sat intrinsics
This patch stops the sadd_sat and uadd_sat intrinsics from blocking tail predication.

Differential revision: https://reviews.llvm.org/D82377
2020-06-25 11:54:29 +01:00
Simon Pilgrim
2c44c49003 FPEnv.h - reduce includes to forward declarations. NFC.
Ensure FPEnv.cpp includes FPEnv.h first to check for hidden dependencies.
2020-06-25 11:40:45 +01:00
Simon Pilgrim
c51eeee6b8 MachineScheduler.h - reduce AliasAnalysis.h include to forward declaration. NFC.
Replace legacy AliasAnalysis typedef with AAResults where necessary.
2020-06-25 11:40:44 +01:00
Guillaume Chatelet
ea4d44ea3b Use concrete natural type alignment for masked load/store operations instead of 0.
Summary: Alignment needs to be resolved at this point so we replace the
0 value with the ABI Type Alignment.
2020-06-25 09:19:12 +00:00
Djordje Todorovic
c0e9a51908 [docs][llvm-dwarfdump] Fix the warnings during docs-llvm-html buil
Before the fix the build of docs-llvm-html would fail.
The D80959 introduced options that are not recognized, so we have
warning as:

  llvm-project/llvm/docs/CommandGuide/llvm-dwarfdump.rst:40\
  :unknown option: --debug-info

Differential Revision: https://reviews.llvm.org/D82460
2020-06-25 11:04:28 +02:00
Djordje Todorovic
b1db73813a [docs][GlobalISel] Fix the warnings during docs-llvm-html build
Before the fix the build of docs-llvm-html would fail.
The rG8bc03d216824 introduced a reference to an undefined label,
so we have warning as:

  llvm-project/llvm/docs/GlobalISel/GenericOpcode.rst:295:\
  undefined label: i_intr_llvm_ptrmask (if the link has no\
  caption the label must precede a section header)
2020-06-25 10:53:39 +02:00
Shawn Landden
df770f665c [PowerPC] add popcount CodeGen test; NFC 2020-06-25 12:41:33 +04:00
Piotr Sobczak
b2cdcb043a [AMDGPU] Select s_cselect
Summary:
Add patterns to select s_cselect in the isel.

Handle more cases of implicit SCC accesses in si-fix-sgpr-copies
to allow new patterns to work.

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, asbirlea, kerbowa, llvm-commits

Tags: #llvm

Re-commit D81925 with a bugfix D82370.

Differential Revision: https://reviews.llvm.org/D81925
Differential Revision: https://reviews.llvm.org/D82370
2020-06-25 10:38:23 +02:00
Aleksandr Urakov
9a59a59244 [lldb][PDB] Constexpr static member values as AST literals
Summary:
When evaluating an expression referencing a constexpr static member variable, an
error is issued because the PDB does not specify a symbol with an address that
can be relocated against.

Rather than attempt to resolve the variable's value within the IR execution, the
values of all constants can be looked up and incorporated into the AST of the
record type as a literal, mirroring the original compiler AST.

This change applies to DIA and native PDB loaders.

Patch By: jackoalan

Reviewers: aleksandr.urakov, jasonmolenda, zturner, jdoerfert, teemperor

Reviewed By: aleksandr.urakov

Subscribers: sstefan1, lldb-commits, llvm-commits, #lldb

Tags: #lldb, #llvm

Differential Revision: https://reviews.llvm.org/D82160
2020-06-25 11:27:16 +03:00
David Sherwood
92662d71cb [SVE] Make ConstantFoldGetElementPtr work for scalable vectors of indices
This patch fixes a compiler crash that was hit when trying to simplify
the following code:

getelementptr [2 x i64], [2 x i64]* null, i64 0, <vscale x 2 x i64> zeroinitializer

For the case where we have a null pointer value like above, we just
need to ensure we don't assume the indices are always fixed width.

Differential Revision: https://reviews.llvm.org/D82183
2020-06-25 07:28:19 +01:00
Max Kazantsev
dde06ce03d [Test] Add more tests for selects & phis 2020-06-25 10:54:07 +07:00
Max Kazantsev
6f268d411a [InstCombine] Combine select & Phi by same condition
This patch transforms
```
p = phi [x, y]
s = select cond, z, p
```
with
```
s = phi[x, z]
```
if we can prove that the Phi node takes values basing on select's condition.

Differential Revision: https://reviews.llvm.org/D82072
Reviewed By: nikic
2020-06-25 10:44:10 +07:00
Craig Topper
a4615b0a89 [X86] Emit a reg-reg copy for fast isel of vector bitcasts.
Previously we just updated a map and moved on. But it possible
we cached known bits information with the vreg that can be used by
another basic block. If the other basic block has a different view
of the VT these known bits won't make sense.

By emitting a copy we ensure we have different vregs before and
after the bitcast. This prevents the known bits from being used
with the wrong type.

Differential Revision: https://reviews.llvm.org/D82517
2020-06-24 20:15:21 -07:00
Wang, Pengfei
a5dbdf7807 [X86] Fix a typo error.
Summary: This will result opcode MULX32Hrm been emitted to MULX32Hrr.

Reviewed by: craig.topper

Differential Revision: https://reviews.llvm.org/D82472
2020-06-25 10:06:27 +08:00
Pengfei Wang
3beff269e6 [X86][NFC] Pre-commit test case for the following patch. 2020-06-24 18:37:01 -07:00
Arthur Eubanks
4cd332044f [NewPM][opt] Assert PassPipeline and Passes don't both contain passes
Reviewers: asbirlea

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82512
2020-06-24 18:00:22 -07:00
Sid Manning
9e71156d6d [Hexagon][llvm-objcopy] Add missing check for SHN_HEXAGON_SCOMMON_1
Differential Revision: https://reviews.llvm.org/D82484
2020-06-24 19:56:01 -05:00
Michele Scandale
80fcca7787 [Inliner] Handle 'no-signed-zeros-fp-math' function attribute.
All other floating point math optimization related attribute are merged
in a conservative way during function inlining. This commit adds the
merge rule for the 'no-signed-zeros-fp-math' attribute.

Differential Revision: https://reviews.llvm.org/D81714
2020-06-24 17:53:59 -07:00
Amara Emerson
e913decb3a Don't inline dynamic allocas that simplify to huge static allocas.
Some sequences of optimizations can generate call sites which may never be
executed during runtime, and through constant propagation result in dynamic
allocas being converted to static allocas with very large allocation amounts.

The inliner tries to move these to the caller's entry block, resulting in the
stack limits being reached/bypassed. Avoid inlining functions if this would
result.

The threshold of 64k currently doesn't get triggered on the test suite with an
-Os LTO build on arm64, care should be taken in changing this in future to avoid
needlessly pessimising inlining behaviour.

Differential Revision: https://reviews.llvm.org/D81765
2020-06-24 17:39:03 -07:00
Xing GUO
cb10895c53 [DWARFYAML][debug_gnu_*] 'Descriptor' field should be 1-byte. NFC.
The 'Descriptor' field of .debug_gnu_pubnames and .debug_gnu_pubtypes
section should be 1-byte rather than 4-byte. This patch helps resolve
this issue.
2020-06-25 08:21:13 +08:00
Kirill Naumov
f6e5cbec4b [InlineCost] PrinterPass prints constants to which instructions are simplified
This patch enables printing of constants to see which instructions were
constant-folded. Needed for tests and better visiual analysis of
inliner's work.

Reviewers: apilipenko, mtrofin, davidxl, fedor.sergeev

Reviewed By: mtrofin

Differential Revision: https://reviews.llvm.org/D81024
2020-06-24 22:52:31 +00:00
Fangrui Song
b24b7c4c54 [llvm-profdata] --hot-func-list: fix some style issues in D81800
Reviewed By: wenlei, hoyFB

Differential Revision: https://reviews.llvm.org/D82500
2020-06-24 15:17:03 -07:00
Scott Linder
0dbcb0ca32 [MIR] Fix CFI_INSTRUCTION escape printing
Summary:
The printer seems to intend to not print the trailing comma but has a
copy-paste error for the last value in the escape, and the parser
enforces having no trailing comma, but somehow a test was never included
to actually confirm it.

Reviewers: thegameg, arsenm

Reviewed By: thegameg, arsenm

Subscribers: wdng, arsenm, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82478
2020-06-24 18:15:28 -04:00