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llvm-mirror/test/MC/AMDGPU
Konstantin Zhuravlyov 0afe58e18c AMDGPU/SI: Add support for R_AMDGPU_ABS32
Differential Revision: https://reviews.llvm.org/D21646

llvm-svn: 276294
2016-07-21 15:29:19 +00:00
..
regression [AMDGPU] Assembler: fix row_bcast parsing 2016-07-14 14:50:35 +00:00
buffer_wbinv1l_vol_vi.s
ds-err.s [AMDGPU] Assembler: rework parsing of optional operands. 2016-05-24 12:38:33 +00:00
ds.s [AMDGPU] fix ds_swizzle_b32 opcode for VI (bz 28371) 2016-07-08 15:12:46 +00:00
expressions.s AMDGPU/SI: Correctly encode constant expressions 2016-06-15 03:09:39 +00:00
flat-scratch.s [AMDGPU] Assembler: refactor parsing of modifiers and immediates. Allow modifiers for imms. 2016-05-23 09:59:02 +00:00
flat.s
hsa_code_object_isa_noargs.s
hsa-exp.s [AMDGPU] Enable absolute expression initializer for amd_kernel_code_t fields. 2016-06-23 14:13:06 +00:00
hsa-text.s AMDGPU/SI: Add support for AMD code object version 2. 2016-05-05 17:03:33 +00:00
hsa.s AMDGPU/SI: Add support for AMD code object version 2. 2016-05-05 17:03:33 +00:00
labels-branch.s [AMDGPU][llvm-mc] Quickfix for r272748 to enable labels in branch instructions. 2016-07-11 12:07:18 +00:00
lit.local.cfg
macro-examples.s [test/AMDGPU] Square-braced-syntax for registers: add macro test/example. 2016-06-03 14:41:17 +00:00
mimg.s
mubuf.s [AMDGPU][llvm-mc] Fixes to support buffer atomics. 2016-05-19 12:22:39 +00:00
out-of-range-registers.s [AMDGPU] Assembler: refactor parsing of modifiers and immediates. Allow modifiers for imms. 2016-05-23 09:59:02 +00:00
reg-syntax-extra.s [AMDGPU][llvm-mc] Square-braced-syntax for registers - make ":expr2" optional. 2016-05-27 12:50:13 +00:00
reloc.s AMDGPU/SI: Add support for R_AMDGPU_ABS32 2016-07-21 15:29:19 +00:00
smem.s
smrd-err.s [AMDGPU] Assembler: refactor parsing of modifiers and immediates. Allow modifiers for imms. 2016-05-23 09:59:02 +00:00
smrd.s [AMDGPU] Assembler: refactor parsing of modifiers and immediates. Allow modifiers for imms. 2016-05-23 09:59:02 +00:00
sop1-err.s [AMDGPU] Assembler: refactor parsing of modifiers and immediates. Allow modifiers for imms. 2016-05-23 09:59:02 +00:00
sop1.s [AMDGPU] Assembler: refactor parsing of modifiers and immediates. Allow modifiers for imms. 2016-05-23 09:59:02 +00:00
sop2.s [AMDGPU] Assembler: refactor parsing of modifiers and immediates. Allow modifiers for imms. 2016-05-23 09:59:02 +00:00
sopc.s
sopk-err.s
sopk.s
sopp-err.s [AMDGPU][llvm-mc] s_getreg/setreg* - hwreg - factor out strings/literals etc. 2016-05-26 17:00:33 +00:00
sopp.s [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax. 2016-05-06 17:48:48 +00:00
symbol_special.s [AMDGPU][llvm-mc] Predefined symbols to access -mcpu from the assembly source (.option.machine_version...) 2016-06-14 15:03:59 +00:00
trap.s [AMDGPU][llvm-mc] Fixes to support buffer atomics. 2016-05-19 12:22:39 +00:00
vop1.s [AMDGPU] Assembler: regression tests for bug 28413. NFC 2016-07-06 12:52:20 +00:00
vop2-err.s [AMDGPU][llvm-mc] v_cndmask_b32: src2 is mandatory; do not enforce VOP2 when src2 == VCC. 2016-06-06 15:23:43 +00:00
vop2.s [AMDGPU] Assembler: Fix parsing error with floating-point literals passed to integer instructions 2016-07-05 14:01:11 +00:00
vop3-errs.s
vop3-vop1-nosrc.s
vop3.s [AMDGPU][llvm-mc] v_cndmask_b32: src2 is mandatory; do not enforce VOP2 when src2 == VCC. 2016-06-06 15:23:43 +00:00
vop_dpp.s
vop_sdwa.s [AMDGPU] Assembler: support SDWA for VOPC instructions 2016-07-01 09:59:21 +00:00
vopc-errs.s
vopc.s