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llvm-mirror/lib/Target/AMDGPU
Sebastian Neubauer 7ea56efeb5 [AMDGPU] Set rsrc1 flags for graphics shaders
Before they were only set for compute kernels and compute shaders but
not for other shaders.

Differential Revision: https://reviews.llvm.org/D89399
2020-11-04 12:25:41 +01:00
..
AsmParser [AMDGPU] Improve FLAT scratch detection 2020-11-02 11:37:33 -08:00
Disassembler [AMDGPU] Add MC layer support for v_fmac_legacy_f32 2020-10-13 21:57:33 +01:00
MCTargetDesc [AMDGPU] Add gfx1033 target 2020-11-03 16:27:48 +00:00
TargetInfo
Utils [AMDGPU] Fix ieee mode default value 2020-11-04 12:25:38 +01:00
AMDGPU.h [amdgpu] Add the late codegen preparation pass. 2020-10-27 14:07:59 -04:00
AMDGPU.td [AMDGPU] Add gfx90c target 2020-11-03 16:27:43 +00:00
AMDGPUAliasAnalysis.cpp [amdgpu] Enhance AMDGPU AA. 2020-10-20 09:54:12 -04:00
AMDGPUAliasAnalysis.h
AMDGPUAlwaysInlinePass.cpp
AMDGPUAnnotateKernelFeatures.cpp
AMDGPUAnnotateUniformValues.cpp AMDGPU: Put inexpensive ops first in AMDGPUAnnotateUniformValues::visitLoadInst 2020-07-30 14:37:06 -07:00
AMDGPUArgumentUsageInfo.cpp
AMDGPUArgumentUsageInfo.h
AMDGPUAsmPrinter.cpp [AMDGPU] Set rsrc1 flags for graphics shaders 2020-11-04 12:25:41 +01:00
AMDGPUAsmPrinter.h
AMDGPUAtomicOptimizer.cpp [AMDGPU] Do not generate mul with 1 in AMDGPU Atomic Optimizer 2020-09-30 11:09:18 +02:00
AMDGPUCallingConv.td AMDGPU: Implement getNoPreservedMask 2020-10-22 10:17:31 -04:00
AMDGPUCallLowering.cpp AMDGPU/GlobalISel: Stop using G_EXTRACT in argument lowering 2020-08-06 09:55:35 -04:00
AMDGPUCallLowering.h
AMDGPUCodeGenPrepare.cpp SelectionDAG.h - remove unnecessary FunctionLoweringInfo.h include. NFCI. 2020-09-03 18:33:25 +01:00
AMDGPUCombine.td AMDGPU/GlobalISel: Use same builder/observer in post-legalizer-combiner 2020-11-03 09:24:50 +01:00
AMDGPUExportClustering.cpp
AMDGPUExportClustering.h
AMDGPUFeatures.td
AMDGPUFixFunctionBitcasts.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUGenRegisterBankInfo.def AMDGPU/GlobalISel: Fix missing 256-bit AGPR mapping 2020-08-17 09:53:26 -04:00
AMDGPUGISel.td [AMDGPU][GlobalISel] Fix 96 and 128 local loads and stores 2020-08-21 12:26:31 +02:00
AMDGPUGlobalISelUtils.cpp
AMDGPUGlobalISelUtils.h [AMDGPU] Use tablegen for argument indices 2020-10-05 11:50:52 +02:00
AMDGPUHSAMetadataStreamer.cpp
AMDGPUHSAMetadataStreamer.h
AMDGPUInline.cpp [NFC] Remove unused GetUnderlyingObject paramenter 2020-07-31 02:10:03 -07:00
AMDGPUInstCombineIntrinsic.cpp [AMDGPU] Add simplification/combines for llvm.amdgcn.fma.legacy 2020-10-23 16:16:13 +01:00
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h [AMDGPU] Use tablegen for argument indices 2020-10-05 11:50:52 +02:00
AMDGPUInstrInfo.td
AMDGPUInstructions.td [AMDGPU] Split R600 and GCN bfe patterns 2020-10-05 09:55:10 +01:00
AMDGPUInstructionSelector.cpp [AMDGPU] Fix ds_read2/write2 with unaligned offsets 2020-11-03 15:16:10 +00:00
AMDGPUInstructionSelector.h [AMDGPU] Fix ds_read2/write2 with unaligned offsets 2020-11-03 15:16:10 +00:00
AMDGPUISelDAGToDAG.cpp [AMDGPU] Fix ds_read2/write2 with unaligned offsets 2020-11-03 15:16:10 +00:00
AMDGPUISelLowering.cpp [AMDGPU] Some refactoring after D90404. NFC. 2020-11-01 13:18:53 +05:30
AMDGPUISelLowering.h [AMDGPU] Some refactoring after D90404. NFC. 2020-11-01 13:18:53 +05:30
AMDGPULateCodeGenPrepare.cpp [amdgpu] Add the late codegen preparation pass. 2020-10-27 14:07:59 -04:00
AMDGPULegalizerInfo.cpp [AMDGPU] Remove fix up operand from SI_ELSE 2020-10-20 19:15:21 +09:00
AMDGPULegalizerInfo.h [AMDGPU] Implement hardware bug workaround for image instructions 2020-10-07 07:39:52 -04:00
AMDGPULibCalls.cpp
AMDGPULibFunc.cpp
AMDGPULibFunc.h
AMDGPULowerIntrinsics.cpp AMDGPU: Use caller subtarget, not intrinsic declaration 2020-08-27 16:42:09 -04:00
AMDGPULowerKernelArguments.cpp
AMDGPULowerKernelAttributes.cpp
AMDGPUMachineCFGStructurizer.cpp [AMDGPU] Apply llvm-prefer-register-over-unsigned from clang-tidy 2020-08-21 10:14:35 +01:00
AMDGPUMachineFunction.cpp [amdgpu] Add codegen support for HIP dynamic shared memory. 2020-08-20 21:29:18 -04:00
AMDGPUMachineFunction.h [amdgpu] Add codegen support for HIP dynamic shared memory. 2020-08-20 21:29:18 -04:00
AMDGPUMachineModuleInfo.cpp
AMDGPUMachineModuleInfo.h
AMDGPUMacroFusion.cpp
AMDGPUMacroFusion.h
AMDGPUMCInstLower.cpp AMDGPU: Increase branch size estimate with offset bug 2020-10-23 10:34:24 -04:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp
AMDGPUPerfHintAnalysis.cpp
AMDGPUPerfHintAnalysis.h
AMDGPUPostLegalizerCombiner.cpp AMDGPU/GlobalISel: Use same builder/observer in post-legalizer-combiner 2020-11-03 09:24:50 +01:00
AMDGPUPreLegalizerCombiner.cpp
AMDGPUPrintfRuntimeBinding.cpp AMDGPUPrintfRuntimeBinding.cpp - drop unnecessary casts/dyn_casts. NFCI. 2020-09-15 14:49:04 +01:00
AMDGPUPromoteAlloca.cpp [NFC] Remove unused GetUnderlyingObject paramenter 2020-07-31 02:10:03 -07:00
AMDGPUPropagateAttributes.cpp AMDGPU: Propagate amdgpu-flat-work-group-size attributes 2020-10-21 12:06:24 -04:00
AMDGPUPTNote.h
AMDGPURegBankCombiner.cpp
AMDGPURegisterBankInfo.cpp [AMDGPU] Add new llvm.amdgcn.fma.legacy intrinsic 2020-10-16 17:10:21 +01:00
AMDGPURegisterBankInfo.h AMDGPU/GlobalISel: Start trying to handle AGPR bank 2020-08-06 12:39:50 -04:00
AMDGPURegisterBanks.td
AMDGPURewriteOutArguments.cpp
AMDGPUSearchableTables.td AMDGPU: Define raw/struct variants of buffer atomic fadd 2020-08-06 13:36:19 -04:00
AMDGPUSubtarget.cpp [amdgpu] Enable use of AA during codegen. 2020-10-27 09:46:23 -04:00
AMDGPUSubtarget.h [amdgpu] Enable use of AA during codegen. 2020-10-27 09:46:23 -04:00
AMDGPUTargetMachine.cpp [AMDGPU] Fix insert of SIPreAllocateWWMRegs in FastRegAlloc 2020-10-28 12:15:15 +09:00
AMDGPUTargetMachine.h Support addrspacecast initializers with isNoopAddrSpaceCast 2020-07-31 10:42:43 -04:00
AMDGPUTargetObjectFile.cpp
AMDGPUTargetObjectFile.h
AMDGPUTargetTransformInfo.cpp [AMDGPU][CostModel] Refine cost model for half- and quarter-rate instructions. 2020-10-24 19:53:08 +03:00
AMDGPUTargetTransformInfo.h [AMDGPU][CostModel] Refine cost model for half- and quarter-rate instructions. 2020-10-24 19:53:08 +03:00
AMDGPUUnifyDivergentExitNodes.cpp
AMDGPUUnifyMetadata.cpp
AMDILCFGStructurizer.cpp
AMDKernelCodeT.h
BUFInstructions.td [AMDGPU] Omit needless string concatenations. NFC. 2020-10-28 12:56:52 +00:00
CaymanInstructions.td
CMakeLists.txt [AMDGPU] Set rsrc1 flags for graphics shaders 2020-11-04 12:25:41 +01:00
DSInstructions.td [AMDGPU] Fix double space in disassembly of ds_gws_sema_* with gds 2020-10-29 17:31:59 +00:00
EvergreenInstructions.td [AMDGPU] Omit needless string concatenations. NFC. 2020-10-28 12:56:52 +00:00
FLATInstructions.td [AMDGPU] Improve FLAT scratch detection 2020-11-02 11:37:33 -08:00
GCNDPPCombine.cpp
GCNHazardRecognizer.cpp [AMDGPU] Use pseudo instructions for readlane/writelane 2020-10-29 16:00:53 +00:00
GCNHazardRecognizer.h [AMDGPU] Add Reset function to GCNHazardRecognizer 2020-10-28 16:32:32 -07:00
GCNILPSched.cpp
GCNIterativeScheduler.cpp
GCNIterativeScheduler.h
GCNMinRegStrategy.cpp Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit" 2020-09-21 13:33:05 +02:00
GCNNSAReassign.cpp [NFC][MC] Use MCRegister in LiveRangeMatrix 2020-10-12 08:54:36 -07:00
GCNProcessors.td [AMDGPU] Add gfx1033 target 2020-11-03 16:27:48 +00:00
GCNRegBankReassign.cpp [NFC][MC] Use MCRegister in LiveRangeMatrix 2020-10-12 08:54:36 -07:00
GCNRegPressure.cpp [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister 2020-08-20 17:59:11 +01:00
GCNRegPressure.h [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister 2020-08-20 17:59:11 +01:00
GCNSchedStrategy.cpp [AMDGPU] Fix not rescheduling without clustering 2020-08-07 11:15:58 -07:00
GCNSchedStrategy.h
InstCombineTables.td
LLVMBuild.txt
MIMGInstructions.td [AMDGPU][TableGen] Make more use of !ne !not !and !or. NFC. 2020-10-21 09:56:43 +01:00
R600.td
R600AsmPrinter.cpp
R600AsmPrinter.h
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600FrameLowering.cpp
R600FrameLowering.h
R600InstrFormats.td
R600InstrInfo.cpp Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate 2020-10-21 11:52:47 +01:00
R600InstrInfo.h Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate 2020-10-21 11:52:47 +01:00
R600Instructions.td [NFC] Remove unused GetUnderlyingObject paramenter 2020-07-31 02:10:03 -07:00
R600ISelLowering.cpp [AMDGPU] Use cast instead of dyn_cast 2020-09-24 15:20:49 +01:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister 2020-08-20 17:59:11 +01:00
R600MachineScheduler.h [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister 2020-08-20 17:59:11 +01:00
R600OpenCLImageTypeLoweringPass.cpp
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600Processors.td
R600RegisterInfo.cpp [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister 2020-08-20 17:59:11 +01:00
R600RegisterInfo.h [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister 2020-08-20 17:59:11 +01:00
R600RegisterInfo.td
R600Schedule.td
R700Instructions.td
SIAddIMGInit.cpp [AMDGPU] gfx1030 RT support 2020-09-16 11:40:58 -07:00
SIAnnotateControlFlow.cpp
SIDefines.h [AMDGPU] Set rsrc1 flags for graphics shaders 2020-11-04 12:25:41 +01:00
SIFixSGPRCopies.cpp [AMDGPU] Fix merging m0 inits 2020-09-23 09:13:43 +02:00
SIFixVGPRCopies.cpp
SIFoldOperands.cpp [AMDGPU] Use flat scratch instructions where available 2020-10-26 14:40:42 -07:00
SIFormMemoryClauses.cpp [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister 2020-08-20 17:59:11 +01:00
SIFrameLowering.cpp [AMDGPU] Use pseudo instructions for readlane/writelane 2020-10-29 16:00:53 +00:00
SIFrameLowering.h AMDGPU: Correct prolog SP initialization logic 2020-08-05 15:47:53 -04:00
SIInsertHardClauses.cpp
SIInsertSkips.cpp [AMDGPU] SIInsertSkips: Refactor early exit block creation 2020-10-06 09:44:55 +09:00
SIInsertWaitcnts.cpp [AMDGPU] Optimize waitcnt insertion for flat memory operations 2020-10-20 22:55:12 +00:00
SIInstrFormats.td [AMDGPU] Improve FLAT scratch detection 2020-11-02 11:37:33 -08:00
SIInstrInfo.cpp AMDGPU: Fix missing writelane cases to skip with exec=0 2020-10-30 11:15:11 -04:00
SIInstrInfo.h [AMDGPU] Improve FLAT scratch detection 2020-11-02 11:37:33 -08:00
SIInstrInfo.td [AMDGPU] Fix double space in disassembly of some DPP instructions 2020-10-29 14:54:33 +00:00
SIInstructions.td [AMDGPU] Change predicate for fma/fmac legacy 2020-10-27 12:03:52 -07:00
SIISelLowering.cpp [AMDGPU] Some refactoring after D90404. NFC. 2020-11-01 13:18:53 +05:30
SIISelLowering.h [AMDGPU] Implement hardware bug workaround for image instructions 2020-10-07 07:39:52 -04:00
SILoadStoreOptimizer.cpp [AMDGPU] gfx1030 RT support 2020-09-16 11:40:58 -07:00
SILowerControlFlow.cpp [AMDGPU] SILowerControlFlow::removeMBBifRedundant. Refactoring plus fix for the null MBB pointer in MF->splice 2020-10-30 14:46:08 +03:00
SILowerI1Copies.cpp [AMDGPU] Apply llvm-prefer-register-over-unsigned from clang-tidy 2020-08-21 10:14:35 +01:00
SILowerSGPRSpills.cpp [AMDGPU] Remove getAllVGPR32() which cannot handle Accum VGPRs properly 2020-10-20 23:15:24 +05:30
SIMachineFunctionInfo.cpp [AMDGPU] Use flat scratch instructions where available 2020-10-26 14:40:42 -07:00
SIMachineFunctionInfo.h [amdgpu] Add codegen support for HIP dynamic shared memory. 2020-08-20 21:29:18 -04:00
SIMachineScheduler.cpp [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister 2020-08-20 17:59:11 +01:00
SIMachineScheduler.h Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit" 2020-09-21 13:33:05 +02:00
SIMemoryLegalizer.cpp [NFC][AMDGPU] Reorder SIMemoryLegalizer functions to be consistent 2020-10-22 05:39:18 +00:00
SIModeRegister.cpp [AMDGPU] Enable scheduling around FP MODE-setting instructions 2020-09-16 16:10:47 +01:00
SIOptimizeExecMasking.cpp AMDGPU: Don't sometimes allow instructions before lowered si_end_cf 2020-09-18 13:43:01 -04:00
SIOptimizeExecMaskingPreRA.cpp [AMDGPU] Remove fix up operand from SI_ELSE 2020-10-20 19:15:21 +09:00
SIPeepholeSDWA.cpp [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister 2020-08-20 17:59:11 +01:00
SIPostRABundler.cpp
SIPreAllocateWWMRegs.cpp AMDGPU: Reorder checks 2020-11-02 10:21:48 -05:00
SIPreEmitPeephole.cpp [AMDGPU] Fix missed SI_RETURN_TO_EPILOG in pre-emit peephole 2020-08-13 21:52:41 +09:00
SIProgramInfo.cpp [AMDGPU] Set rsrc1 flags for graphics shaders 2020-11-04 12:25:41 +01:00
SIProgramInfo.h [AMDGPU] Set rsrc1 flags for graphics shaders 2020-11-04 12:25:41 +01:00
SIRegisterInfo.cpp [AMDGPU] Use pseudo instructions for readlane/writelane 2020-10-29 16:00:53 +00:00
SIRegisterInfo.h [AMDGPU] Use flat scratch instructions where available 2020-10-26 14:40:42 -07:00
SIRegisterInfo.td [TableGen] [AMDGPU] Add !sub operator for subtraction 2020-10-28 12:27:53 -04:00
SIRemoveShortExecBranches.cpp
SISchedule.td [AMDGPU] Add XDL resource to scheduling model 2020-09-14 13:48:54 -07:00
SIShrinkInstructions.cpp [AMDGPU] Fix VC warning about singed/unsigned comparison. NFC. 2020-10-26 11:55:57 -07:00
SIWholeQuadMode.cpp [AMDGPU] Move WQM Pass after MI Scheduler 2020-10-27 10:25:53 +09:00
SMInstructions.td
SOPInstructions.td [AMDGPU] Fix double space in disassembly of s_set_gpr_idx_mode 2020-10-29 14:54:33 +00:00
VIInstrFormats.td
VOP1Instructions.td
VOP2Instructions.td [AMDGPU] Fix double space in disassembly of SDWA instructions with vcc 2020-10-28 21:39:39 +00:00
VOP3Instructions.td [AMDGPU] Allow some modifiers on VOP3B instructions 2020-10-28 21:54:14 +00:00
VOP3PInstructions.td [AMDGPU][TableGen] Make more use of !ne !not !and !or. NFC. 2020-10-21 09:56:43 +01:00
VOPCInstructions.td
VOPInstructions.td [AMDGPU][TableGen] Make more use of !ne !not !and !or. NFC. 2020-10-21 09:56:43 +01:00