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llvm-mirror/lib/Target/Hexagon
Sander de Smalen b60a1a8c9a NFC: Change getIntrinsicInstrCost to return InstructionCost
This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Depends on D97468

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D97469
2021-03-31 14:04:41 +01:00
..
AsmParser [llvm] Use llvm::erase_value and llvm::erase_if (NFC) 2021-01-02 09:24:15 -08:00
Disassembler llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
MCTargetDesc [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
TargetInfo llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
BitTracker.cpp [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
BitTracker.h [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
CMakeLists.txt [Hexagon] Realign HVX vectors wherever possible 2020-12-09 17:11:25 -06:00
Hexagon.h
Hexagon.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonArch.h
HexagonAsmPrinter.cpp
HexagonAsmPrinter.h
HexagonBitSimplify.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonBitTracker.cpp [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
HexagonBitTracker.h [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
HexagonBlockRanges.cpp [llvm] Use llvm::sort (NFC) 2021-01-17 10:39:45 -08:00
HexagonBlockRanges.h [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonBranchRelaxation.cpp
HexagonCallingConv.td
HexagonCFGOptimizer.cpp
HexagonCommonGEP.cpp [Target] Use llvm::append_range (NFC) 2021-01-03 09:57:43 -08:00
HexagonConstExtenders.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonConstPropagation.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonCopyToCombine.cpp
HexagonDepArch.h [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepArch.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepDecoders.inc [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepIICHVX.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepIICScalar.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepInstrFormats.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepInstrInfo.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepITypes.h [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepITypes.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepMapAsm2Intrin.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepMappings.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepMask.h [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepOperands.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepTimingClasses.h [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonEarlyIfConv.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonExpandCondsets.cpp [llvm] Use *::empty (NFC) 2021-01-16 09:40:55 -08:00
HexagonFixupHwLoops.cpp
HexagonFrameLowering.cpp [NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions 2021-03-30 17:31:39 +01:00
HexagonFrameLowering.h [SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference. 2020-11-05 11:02:18 +00:00
HexagonGenExtract.cpp
HexagonGenInsert.cpp [Target] Use llvm::erase_if (NFC) 2020-12-20 17:43:22 -08:00
HexagonGenMux.cpp
HexagonGenPredicate.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonHardwareLoops.cpp [llvm] Use llvm::is_contained (NFC) 2021-02-14 08:36:20 -08:00
HexagonHazardRecognizer.cpp
HexagonHazardRecognizer.h
HexagonIICHVX.td
HexagonIICScalar.td
HexagonInstrFormats.td
HexagonInstrFormatsV60.td
HexagonInstrFormatsV65.td
HexagonInstrInfo.cpp
HexagonInstrInfo.h
HexagonIntrinsics.td
HexagonIntrinsicsV5.td
HexagonIntrinsicsV60.td
HexagonISelDAGToDAG.cpp
HexagonISelDAGToDAG.h
HexagonISelDAGToDAGHVX.cpp
HexagonISelLowering.cpp [Hexagon] Return an i64 for result 0 from LowerREADCYCLECOUNTER instead of an i32. 2021-03-19 10:54:33 -07:00
HexagonISelLowering.h [TargetLowering] Use Align in allowsMisalignedMemoryAccesses. 2021-02-04 19:22:06 -08:00
HexagonISelLoweringHVX.cpp [Target] Use llvm::append_range (NFC) 2021-01-24 12:18:56 -08:00
HexagonLoopIdiomRecognition.cpp Require chained analyses in BasicAA and AAResults to be transitive 2021-01-11 11:50:07 +01:00
HexagonLoopIdiomRecognition.h [Hexagon][NewPM] Port -hexagon-loop-idiom and add to pipeline 2020-11-20 09:34:37 -08:00
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h
HexagonMachineScheduler.cpp
HexagonMachineScheduler.h
HexagonMapAsm2IntrinV62.gen.td
HexagonMapAsm2IntrinV65.gen.td
HexagonMCInstLower.cpp
HexagonNewValueJump.cpp
HexagonOperands.td
HexagonOptAddrMode.cpp
HexagonOptimizeSZextends.cpp
HexagonPatterns.td [Hexagon] Fix multiclass template parameter types. NFC. 2021-02-06 15:28:26 +00:00
HexagonPatternsHVX.td [Hexagon] Add more patterns for HVX loads and stores 2021-03-17 21:01:52 -05:00
HexagonPatternsV65.td
HexagonPeephole.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonPseudo.td
HexagonRDFOpt.cpp
HexagonRegisterInfo.cpp [Hexagon] Limit virtual register reuse range in FI elimination 2021-03-25 13:59:36 -05:00
HexagonRegisterInfo.h
HexagonRegisterInfo.td
HexagonSchedule.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonScheduleV5.td
HexagonScheduleV55.td
HexagonScheduleV60.td
HexagonScheduleV62.td
HexagonScheduleV65.td
HexagonScheduleV66.td
HexagonScheduleV67.td
HexagonScheduleV67T.td
HexagonScheduleV68.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h
HexagonSplitConst32AndConst64.cpp
HexagonSplitDouble.cpp [llvm] Use append_range (NFC) 2021-01-27 23:25:41 -08:00
HexagonStoreWidening.cpp
HexagonSubtarget.cpp [llvm] Use llvm::find (NFC) 2021-01-19 20:19:14 -08:00
HexagonSubtarget.h [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonTargetMachine.cpp [llvm] Use Optional::getValueOr (NFC) 2021-01-12 21:43:50 -08:00
HexagonTargetMachine.h
HexagonTargetObjectFile.cpp [X86][AMX] Fix compilation warning introduced by 981a0bd8. 2020-12-30 22:22:13 +08:00
HexagonTargetObjectFile.h
HexagonTargetStreamer.h
HexagonTargetTransformInfo.cpp NFC: Change getIntrinsicInstrCost to return InstructionCost 2021-03-31 14:04:41 +01:00
HexagonTargetTransformInfo.h NFC: Change getIntrinsicInstrCost to return InstructionCost 2021-03-31 14:04:41 +01:00
HexagonVectorCombine.cpp [Hexagon] Fix segment start to adjust for gaps between segments 2021-01-19 12:49:39 -06:00
HexagonVectorLoopCarriedReuse.cpp
HexagonVectorLoopCarriedReuse.h
HexagonVectorPrint.cpp
HexagonVExtract.cpp
HexagonVLIWPacketizer.cpp
HexagonVLIWPacketizer.h
RDFCopy.cpp
RDFCopy.h
RDFDeadCode.cpp [Target] Use llvm::append_range (NFC) 2021-01-24 12:18:56 -08:00
RDFDeadCode.h