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llvm-mirror/lib/Target/Hexagon
Krzysztof Parzyszek 39116ea918 [Hexagon] Generate trap/undef if misaligned access is detected
This applies to memory accesses to (compile-time) constant addresses
(such as memory-mapped registers). Currently when a misaligned access
to such an address is detected, a fatal error is reported. This change
will emit a remark, and the compilation will continue with a trap,
and "undef" (for loads) emitted.

This fixes https://llvm.org/PR50838.

Differential Revision: https://reviews.llvm.org/D50524
2021-07-06 14:52:23 -05:00
..
AsmParser [llvm] Rename StringRef _lower() method calls to _insensitive() 2021-06-25 00:22:01 +03:00
Disassembler [NFCI] Move DEBUG_TYPE definition below #includes 2021-05-30 17:31:01 +08:00
MCTargetDesc [llvm] Rename StringRef _lower() method calls to _insensitive() 2021-06-25 00:22:01 +03:00
TargetInfo llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
BitTracker.cpp [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
BitTracker.h [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
CMakeLists.txt [Hexagon] Remove redundant HVX intrinsic selection patterns, NFC 2021-04-23 09:28:08 -05:00
Hexagon.h Hexagon.h - remove unnecessary includes. NFCI. 2020-09-10 16:59:43 +01:00
Hexagon.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonArch.h
HexagonAsmPrinter.cpp
HexagonAsmPrinter.h
HexagonBitSimplify.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonBitTracker.cpp [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
HexagonBitTracker.h [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
HexagonBlockRanges.cpp [llvm] Use llvm::sort (NFC) 2021-01-17 10:39:45 -08:00
HexagonBlockRanges.h [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonBranchRelaxation.cpp [NFCI] Move DEBUG_TYPE definition below #includes 2021-05-30 17:31:01 +08:00
HexagonCallingConv.td
HexagonCFGOptimizer.cpp Hexagon.h - remove unnecessary includes. NFCI. 2020-09-10 16:59:43 +01:00
HexagonCommonGEP.cpp [Hexagon] Opaquify pointer usage in GEP commoning 2021-06-24 16:06:36 -05:00
HexagonConstExtenders.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonConstPropagation.cpp [NFCI] Move DEBUG_TYPE definition below #includes 2021-05-30 17:31:01 +08:00
HexagonCopyToCombine.cpp Hexagon.h - remove unnecessary includes. NFCI. 2020-09-10 16:59:43 +01:00
HexagonDepArch.h [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepArch.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepDecoders.inc [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepIICHVX.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepIICScalar.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepInstrFormats.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepInstrInfo.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepITypes.h [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepITypes.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepMapAsm2Intrin.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepMappings.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepMask.h [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepOperands.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonDepTimingClasses.h [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonEarlyIfConv.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonExpandCondsets.cpp [llvm] Use *::empty (NFC) 2021-01-16 09:40:55 -08:00
HexagonFixupHwLoops.cpp
HexagonFrameLowering.cpp Rename MachineMemOperand::getOrdering -> getSuccessOrdering. 2021-06-21 16:49:27 -07:00
HexagonFrameLowering.h [SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference. 2020-11-05 11:02:18 +00:00
HexagonGenExtract.cpp Fix HexagonGenExtract return status 2020-07-13 20:41:59 +02:00
HexagonGenInsert.cpp [Target] Use llvm::erase_if (NFC) 2020-12-20 17:43:22 -08:00
HexagonGenMux.cpp [NFCI] Move DEBUG_TYPE definition below #includes 2021-05-30 17:31:01 +08:00
HexagonGenPredicate.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonHardwareLoops.cpp [llvm] Use llvm::is_contained (NFC) 2021-02-14 08:36:20 -08:00
HexagonHazardRecognizer.cpp
HexagonHazardRecognizer.h
HexagonIICHVX.td
HexagonIICScalar.td
HexagonInstrFormats.td
HexagonInstrFormatsV60.td
HexagonInstrFormatsV65.td
HexagonInstrInfo.cpp Retire TargetRegisterInfo::getSpillAlignment 2021-05-07 15:16:22 +02:00
HexagonInstrInfo.h Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate 2020-10-21 11:52:47 +01:00
HexagonIntrinsics.td [Hexagon] Remove redundant HVX intrinsic selection patterns, NFC 2021-04-23 09:28:08 -05:00
HexagonIntrinsicsV5.td
HexagonIntrinsicsV60.td [Hexagon] Fix license headers in some .td files, NFC 2020-10-16 10:03:05 -05:00
HexagonISelDAGToDAG.cpp [docs] Fix doxygen comments wrongly attached to the llvm namespace 2021-04-07 01:20:18 +02:00
HexagonISelDAGToDAG.h [Alignment][NFC] Use proper getter to retrieve alignment from ConstantInt and ConstantSDNode 2020-07-03 08:06:43 +00:00
HexagonISelDAGToDAGHVX.cpp [Hexagon] Restore handling of expanding shuffles 2021-05-26 18:04:15 -05:00
HexagonISelLowering.cpp [Hexagon] Generate trap/undef if misaligned access is detected 2021-07-06 14:52:23 -05:00
HexagonISelLowering.h [Hexagon] Generate trap/undef if misaligned access is detected 2021-07-06 14:52:23 -05:00
HexagonISelLoweringHVX.cpp [Hexagon] Avoid infinite loops in type legalization when lowering SETCC 2021-04-15 13:34:37 -05:00
HexagonLoopIdiomRecognition.cpp Require chained analyses in BasicAA and AAResults to be transitive 2021-01-11 11:50:07 +01:00
HexagonLoopIdiomRecognition.h [Hexagon][NewPM] Port -hexagon-loop-idiom and add to pipeline 2020-11-20 09:34:37 -08:00
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h
HexagonMachineScheduler.cpp
HexagonMachineScheduler.h
HexagonMapAsm2IntrinV62.gen.td
HexagonMCInstLower.cpp [MC] Fix memory leak when allocating MCInst with bump allocator 2020-08-03 16:08:26 -07:00
HexagonNewValueJump.cpp [Hexagon][NFC] Remove redundant condition 2020-07-01 09:04:26 +02:00
HexagonOperands.td
HexagonOptAddrMode.cpp [RDF] Remove uses of RDFRegisters::normalize (deprecate) 2020-08-04 17:02:12 -05:00
HexagonOptimizeSZextends.cpp Hexagon.h - remove unnecessary includes. NFCI. 2020-09-10 16:59:43 +01:00
HexagonPatterns.td [Hexagon] Add patterns to load i1 2021-06-28 12:17:30 -05:00
HexagonPatternsHVX.td [Hexagon] Use 'vnot' instead of 'not' in patterns with vectors 2021-04-22 15:36:20 -05:00
HexagonPatternsV65.td
HexagonPeephole.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonPseudo.td
HexagonRDFOpt.cpp
HexagonRegisterInfo.cpp [Hexagon] Limit virtual register reuse range in FI elimination 2021-03-25 13:59:36 -05:00
HexagonRegisterInfo.h
HexagonRegisterInfo.td
HexagonSchedule.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonScheduleV5.td
HexagonScheduleV55.td
HexagonScheduleV60.td
HexagonScheduleV62.td
HexagonScheduleV65.td
HexagonScheduleV66.td
HexagonScheduleV67.td
HexagonScheduleV67T.td
HexagonScheduleV68.td [Hexagon] Add LLVM instruction definitions for Hexagon V68 2021-02-03 13:59:34 -06:00
HexagonSelectionDAGInfo.cpp [Alignment][NFC] Migrate SelectionDAGTargetInfo::EmitTargetCodeForMemcpy to Align 2020-06-30 13:12:31 +00:00
HexagonSelectionDAGInfo.h [Alignment][NFC] Migrate SelectionDAGTargetInfo::EmitTargetCodeForMemcpy to Align 2020-06-30 13:12:31 +00:00
HexagonSplitConst32AndConst64.cpp
HexagonSplitDouble.cpp [NFCI] Move DEBUG_TYPE definition below #includes 2021-05-30 17:31:01 +08:00
HexagonStoreWidening.cpp [NFC][AA] Prepare to convert AliasResult to class with PartialAlias offset. 2021-04-09 12:54:22 +03:00
HexagonSubtarget.cpp [llvm] Use llvm::find (NFC) 2021-01-19 20:19:14 -08:00
HexagonSubtarget.h [Hexagon] Convert getTypeAlignment to return Align 2021-06-25 10:53:14 -05:00
HexagonTargetMachine.cpp [NewPM] Hide pass manager debug logging behind -debug-pass-manager-verbose 2021-05-07 21:51:47 -07:00
HexagonTargetMachine.h [NewPM] Hide pass manager debug logging behind -debug-pass-manager-verbose 2021-05-07 21:51:47 -07:00
HexagonTargetObjectFile.cpp [NFCI] Move DEBUG_TYPE definition below #includes 2021-05-30 17:31:01 +08:00
HexagonTargetObjectFile.h
HexagonTargetStreamer.h
HexagonTargetTransformInfo.cpp [TTI] NFC: Change getTypeLegalizationCost to return InstructionCost. 2021-04-30 22:51:51 +03:00
HexagonTargetTransformInfo.h [TTI] NFC: Change getScalarizationOverhead and getOperandsScalarizationOverhead to return InstructionCost. 2021-04-27 08:51:48 +03:00
HexagonVectorCombine.cpp [IRBuilder] Add type argument to CreateMaskedLoad/Gather 2021-07-04 12:17:59 +02:00
HexagonVectorLoopCarriedReuse.cpp [Hexagon] Make HexagonVLCR compatibile with New PM 2020-09-21 13:45:12 -07:00
HexagonVectorLoopCarriedReuse.h [Hexagon] Make HexagonVLCR compatibile with New PM 2020-09-21 13:45:12 -07:00
HexagonVectorPrint.cpp
HexagonVExtract.cpp
HexagonVLIWPacketizer.cpp
HexagonVLIWPacketizer.h
RDFCopy.cpp
RDFCopy.h
RDFDeadCode.cpp [Target] Use llvm::append_range (NFC) 2021-01-24 12:18:56 -08:00
RDFDeadCode.h