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llvm-mirror/test/CodeGen/Thumb2
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James Molloy 5538ea11d7 [Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tables 
[Reapplying r284580 and r285917 with fix and testing to ensure emitted jump tables for Thumb-1 have 4-byte alignment]

The TBB and TBH instructions in Thumb-2 allow jump tables to be compressed into sequences of bytes or shorts respectively. These instructions do not exist in Thumb-1, however it is possible to synthesize them out of a sequence of other instructions.

It turns out this sequence is so short that it's almost never a lose for performance and is ALWAYS a significant win for code size.

TBB example:
Before: lsls r0, r0, #2    After: add  r0, pc
        adr  r1, .LJTI0_0         ldrb r0, [r0, #6]
        ldr  r0, [r0, r1]         lsls r0, r0, #1
        mov  pc, r0               add  pc, r0
  => No change in prologue code size or dynamic instruction count. Jump table shrunk by a factor of 4.

The only case that can increase dynamic instruction count is the TBH case:

Before: lsls r0, r4, #2    After: lsls r4, r4, #1
        adr  r1, .LJTI0_0         add  r4, pc
        ldr  r0, [r0, r1]         ldrh r4, [r4, #6]
        mov  pc, r0               lsls r4, r4, #1
                                  add  pc, r4
  => 1 more instruction in prologue. Jump table shrunk by a factor of 2.

So there is an argument that this should be disabled when optimizing for performance (and a TBH needs to be generated). I'm not so sure about that in practice, because on small cores with Thumb-1 performance is often tied to code size. But I'm willing to turn it off when optimizing for performance if people want (also note that TBHs are fairly rare in practice!)

llvm-svn: 285690
2016-11-01 13:37:41 +00:00
..
2009-07-17-CrossRegClassCopy.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
2009-07-21-ISelBug.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
2009-07-23-CPIslandBug.ll
2009-07-30-PEICrash.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
2009-08-01-WrongLDRBOpc.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
2009-08-02-CoalescerBug.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
2009-08-04-CoalescerAssert.ll [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
2009-08-04-CoalescerBug.ll [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
2009-08-04-ScavengerAssert.ll [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
2009-08-04-SubregLoweringBug2.ll
2009-08-04-SubregLoweringBug3.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
2009-08-04-SubregLoweringBug.ll Revert "Change memcpy/memset/memmove to have dest and source alignments." 2015-11-19 05:56:52 +00:00
2009-08-06-SpDecBug.ll ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets. 2015-04-23 20:31:26 +00:00
2009-08-07-CoalescerBug.ll
2009-08-07-NeonFPBug.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
2009-08-08-ScavengerAssert.ll
2009-08-10-ISelBug.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
2009-08-21-PostRAKill4.ll [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
2009-09-01-PostRAProlog.ll Fix an old memset signature in 2009-09-01-PostRAProlog.ll test causing a buildbot failure 2016-06-23 16:07:10 +00:00
2009-09-28-ITBlockBug.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
2009-10-15-ITBlockBranch.ll
2009-11-01-CopyReg2RegBug.ll
2009-11-11-ScavengerAssert.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
2009-11-13-STRDBug.ll
2009-12-01-LoopIVUsers.ll [SCEV] Try to reuse existing value during SCEV expansion 2016-02-04 01:27:38 +00:00
2010-01-06-TailDuplicateLabels.ll [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
2010-01-19-RemovePredicates.ll [opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction 2015-02-27 19:29:02 +00:00
2010-02-11-phi-cycle.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
2010-02-24-BigStack.ll
2010-03-08-addi12-ccout.ll [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
2010-03-15-AsmCCClobber.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
2010-04-15-DynAllocBug.ll
2010-04-26-CopyRegCrash.ll
2010-05-24-rsbs.ll
2010-06-14-NEONCoalescer.ll [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
2010-06-19-ITBlockCrash.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
2010-06-21-TailMergeBug.ll [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
2010-08-10-VarSizedAllocaBug.ll [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
2010-11-22-EpilogueBug.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
2010-12-03-AddSPNarrowing.ll
2011-04-21-FILoweringBug.ll
2011-06-07-TwoAddrEarlyClobber.ll Thumb2: When optimizing for size, do not if-convert branches involving comparisons with zero. 2015-04-23 20:31:30 +00:00
2011-12-16-T2SizeReduceAssert.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
2012-01-13-CBNZBug.ll Revert "Change memcpy/memset/memmove to have dest and source alignments." 2015-11-19 05:56:52 +00:00
2013-02-19-tail-call-register-hint.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
2013-03-02-vduplane-nonconstant-source-index.ll Fix a nasty bug in DAGCombine of STORE nodes. 2015-03-19 22:48:57 +00:00
2013-03-06-vector-sext-operand-scalarize.ll
aapcs.ll ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2 2015-07-21 00:18:59 +00:00
aligned-constants.ll [MC] Use .p2align instead of .align 2016-01-26 00:03:25 +00:00
aligned-spill.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
bfi.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
bfx.ll
bicbfi.ll [Thumb] Reapply r272251 with a fix for PR28348 (mk 2) 2016-07-05 12:37:13 +00:00
buildvector-crash.ll
carry.ll Address buildbot fallout from r259065 2016-01-28 18:59:04 +00:00
cbnz.ll Thumb2: When applying branch optimizations, visit branches in reverse order. 2015-04-23 20:31:35 +00:00
constant-islands-jump-table.ll ARM: recommit r237590: allow jump tables to be placed as constant islands. 2015-05-31 19:22:07 +00:00
constant-islands-new-island-padding.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
constant-islands-new-island.ll ARM: allow constpool entry to be moved to the user's block in all cases. 2014-11-13 17:58:53 +00:00
constant-islands.ll Move the personality function from LandingPadInst to Function 2015-06-17 20:52:32 +00:00
cortex-fp.ll [ARM] Add support for Cortex-M7, FPv5-SP and FPv5-DP (LLVM) 2014-10-01 09:02:17 +00:00
crash.ll [ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions 2015-09-30 10:56:37 +00:00
cross-rc-coalescing-1.ll
cross-rc-coalescing-2.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
div.ll [ARM] support for Cortex-R4/R4F 2015-04-09 14:07:28 +00:00
emit-unwinding.ll ARM: use r7 as the frame-pointer on all MachO targets. 2016-04-11 22:27:40 +00:00
float-cmp.ll [SDAG] Optimize unordered comparison in soft-float mode (patch by Anton Nadolskiy) 2015-07-15 08:39:35 +00:00
float-intrinsics-double.ll CodeGen: ensure that libcalls are always AAPCS CC 2016-09-07 17:56:09 +00:00
float-intrinsics-float.ll CodeGen: ensure that libcalls are always AAPCS CC 2016-09-07 17:56:09 +00:00
float-ops.ll Revert "[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently" 2016-09-14 09:45:28 +00:00
frame-pointer.ll Re-land "[Thumb] Save/restore high registers in Thumb1 pro/epilogues" 2016-10-11 21:14:03 +00:00
frameless2.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
frameless.ll
ifcvt-compare.ll [ARM] Enable shrink-wrapping by default. 2015-11-18 00:40:54 +00:00
ifcvt-neon.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
ifcvt-rescan-bug-2016-08-22.ll IfConversion: Rescan diamonds. 2016-08-24 21:34:24 +00:00
ifcvt-rescan-diamonds.ll IfConversion: Fix bug introduced by rescanning diamonds. 2016-09-02 18:29:26 +00:00
inflate-regs.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
inlineasm.ll
large-call.ll [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
large-stack.ll ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets. 2015-04-23 20:31:26 +00:00
ldr-str-imm12.ll [Codegen] Decrease minimum jump table density. 2016-03-29 00:23:41 +00:00
lit.local.cfg
longMACt.ll
lsr-deficiency.ll [Thumb] Select (CMPZ X, -C) -> (CMPZ (ADDS X, C), 0) 2016-09-09 12:52:24 +00:00
machine-licm.ll [ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions 2015-09-30 10:56:37 +00:00
mul_const.ll
pic-load.ll ARM: Add scheduling information for LDRLIT instructions to swift scheduling model 2015-07-17 23:18:26 +00:00
segmented-stacks.ll
setjmp_longjmp.ll Arm: Don't define a label twice with two setjmps in a function. 2015-07-16 22:34:20 +00:00
stack_guard_remat.ll [opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction 2015-02-27 19:29:02 +00:00
tail-call-r9.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
thumb2-adc.ll
thumb2-add2.ll
thumb2-add3.ll
thumb2-add4.ll
thumb2-add5.ll
thumb2-add6.ll
thumb2-add.ll
thumb2-and2.ll
thumb2-and.ll
thumb2-asr2.ll
thumb2-asr.ll
thumb2-bcc.ll
thumb2-bfc.ll
thumb2-bic.ll
thumb2-branch.ll
thumb2-call-tc.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
thumb2-call.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
thumb2-cbnz.ll Codegen: Fix broken assumption in Tail Merge. 2016-06-24 18:16:36 +00:00
thumb2-clz.ll
thumb2-cmn2.ll [Thumb] Select (CMPZ X, -C) -> (CMPZ (ADDS X, C), 0) 2016-09-09 12:52:24 +00:00
thumb2-cmn.ll IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
thumb2-cmp2.ll
thumb2-cmp.ll
thumb2-cpsr-liveness.ll Fix PR26655: Bail out if all regs of an inst BUNDLE have the correct kill flag 2016-05-10 17:57:27 +00:00
thumb2-eor2.ll
thumb2-eor.ll
thumb2-ifcvt1-tc.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
thumb2-ifcvt1.ll CodeGen: If Convert blocks that would form a diamond when tail-merged. 2016-08-24 21:34:27 +00:00
thumb2-ifcvt2.ll [ARM] Enable shrink-wrapping by default. 2015-11-18 00:40:54 +00:00
thumb2-ifcvt3.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
thumb2-jtb.ll [Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tables 2016-11-01 13:37:41 +00:00
thumb2-ldm.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
thumb2-ldr_ext.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
thumb2-ldr_post.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
thumb2-ldr_pre.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
thumb2-ldr.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
thumb2-ldrb.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
thumb2-ldrd.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
thumb2-ldrh.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
thumb2-lsl2.ll
thumb2-lsl.ll
thumb2-lsr2.ll
thumb2-lsr3.ll
thumb2-lsr.ll
thumb2-mla.ll
thumb2-mls.ll
thumb2-mov.ll
thumb2-mul.ll
thumb2-mulhi.ll [ARM] Renaming +t2dsp feature into +dsp, as discussed on llvm-dev 2015-10-23 17:19:19 +00:00
thumb2-mvn2.ll
thumb2-mvn.ll
thumb2-neg.ll
thumb2-orn2.ll
thumb2-orn.ll
thumb2-orr2.ll
thumb2-orr.ll
thumb2-pack.ll
thumb2-rev16.ll
thumb2-rev.ll
thumb2-ror.ll
thumb2-rsb2.ll
thumb2-rsb.ll
thumb2-sbc.ll
thumb2-select_xform.ll
thumb2-select.ll
thumb2-shifter.ll
thumb2-smla.ll [ARM] Renaming +t2dsp feature into +dsp, as discussed on llvm-dev 2015-10-23 17:19:19 +00:00
thumb2-smul.ll [ARM] Renaming +t2dsp feature into +dsp, as discussed on llvm-dev 2015-10-23 17:19:19 +00:00
thumb2-spill-q.ll [ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions 2015-09-30 10:56:37 +00:00
thumb2-str_post.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
thumb2-str_pre.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
thumb2-str.ll [opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction 2015-02-27 19:29:02 +00:00
thumb2-strb.ll [opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction 2015-02-27 19:29:02 +00:00
thumb2-strh.ll [opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction 2015-02-27 19:29:02 +00:00
thumb2-sub2.ll
thumb2-sub3.ll
thumb2-sub4.ll
thumb2-sub5.ll
thumb2-sub.ll
thumb2-sxt_rot.ll [ARM] Improve sxta{b|h} and uxta{b|h} tests 2016-08-10 09:34:34 +00:00
thumb2-sxt-uxt.ll [ARM] Improve sxta{b|h} and uxta{b|h} tests 2016-08-10 09:34:34 +00:00
thumb2-tbb.ll [Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tables 2016-11-01 13:37:41 +00:00
thumb2-tbh.ll [Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tables 2016-11-01 13:37:41 +00:00
thumb2-teq2.ll
thumb2-teq.ll
thumb2-tst2.ll
thumb2-tst.ll
thumb2-uxt_rot.ll [ARM] Improve sxta{b|h} and uxta{b|h} tests 2016-08-10 09:34:34 +00:00
thumb2-uxtb.ll
tls1.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
tls2.ll Don't print (PLT) on arm. 2016-06-16 16:09:53 +00:00
tpsoft.ll ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets. 2015-04-23 20:31:26 +00:00
v8_IT_1.ll [ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions 2015-09-30 10:56:37 +00:00
v8_IT_2.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
v8_IT_3.ll Distribute the weight on the edge from switch to default statement to edges generated in lowering switch. 2015-09-01 01:42:16 +00:00
v8_IT_4.ll
v8_IT_5.ll Codegen: Fix broken assumption in Tail Merge. 2016-06-24 18:16:36 +00:00
v8_IT_6.ll