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1413 Commits

Author SHA1 Message Date
Bill Wendling
1e6d74b84a Add generic test for add with overflow. 
llvm-svn: 59781
 2008-11-21 02:15:51 +00:00
Dan Gohman
7e92e53e25 Test -pre-RA-sched=fast too, for completeness. 
llvm-svn: 59741
 2008-11-20 19:26:04 +00:00
Evan Cheng
2805dcc9a0 - Register scavenger should use MachineRegisterInfo and internal map to find the first use of a register after a given machine instruction. 
- When scavenging a register, in addition to the spill, insert a restore before the first use.
- Abort if client is looking to scavenge a register even when a previously scavenged register is still live.

llvm-svn: 59697
 2008-11-20 02:32:35 +00:00
Dan Gohman
60e2650b09 Revert r59640. It broke this test for builds that aren't 
configured with llvm-gcc.

llvm-svn: 59641
 2008-11-19 16:24:37 +00:00
Dan Gohman
1b9557279c Use %llvmgcc -xassembler instead of invoking as directly. This avoids 
problems for example when LLVM is built with --with-extra-options=-m64
and as defaults to x86-32 mode.

llvm-svn: 59640
 2008-11-19 16:02:14 +00:00
Owen Anderson
482ea64f7b Add support for rematerialization in pre-alloc-splitting. 
llvm-svn: 59587
 2008-11-19 04:28:29 +00:00
Evan Cheng
145b3db050 Register scavenger should process early clobber defs first. A dead early clobber def should not interfere with a normal def which happens one slot later. 
llvm-svn: 59559
 2008-11-18 22:28:38 +00:00
Duncan Sands
3f0dbb4ead Reapply r59464, this time using the correct type 
when softening FNEG.

llvm-svn: 59513
 2008-11-18 09:15:03 +00:00
Bill Wendling
8c9e9be673 A simple test for stack protectors. This should be valid on all platforms. 
llvm-svn: 59505
 2008-11-18 07:34:50 +00:00
Bill Wendling
33cf8ff597 Revert r59464. It was causing this failure: 
Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/dg.exp ...
FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll
Failed with signal(SIGABRT) at line 1
while running:  llvm-as < /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll |  llc -march=xcore > fneg.ll.tmp1.s
Assertion failed: (VT.isFloatingPoint() && "Cannot create integer FP constant!"), function getConstantFP, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, line 913.
0   llc                                 0x0092115c _ZN4llvm3sys18RemoveFileOnSignalERKNS0_4PathEPSs + 844
1   libSystem.B.dylib                   0x9217809b _sigtramp + 43
2   ???                                 0xffffffff 0x0 + 4294967295
3   libSystem.B.dylib                   0x921f0ec2 raise + 26
4   libSystem.B.dylib                   0x9220047f abort + 73
5   libSystem.B.dylib                   0x921f2063 __assert_rtn + 101
6   llc                                 0x005a5b0a _ZN4llvm12SelectionDAG13getConmake[1]: *** [check-local] Error 1
make: *** [check] Error 2

llvm-svn: 59487
 2008-11-18 01:49:24 +00:00
Duncan Sands
b13af5a714 Add soft float support for a bunch more operations. Original 
patch by Richard Osborne, tweaked and extended by your humble
servant.

llvm-svn: 59464
 2008-11-17 20:52:38 +00:00
Dale Johannesen
652c29e68d Remove these, which test for optimizations that 
are not currently done (cf PowerPC/README.txt).

llvm-svn: 59456
 2008-11-17 18:57:45 +00:00
Richard Osborne
2eb278eb4d Don't produce ADDC/ADDE when expanding SHL unless they are legal 
for the target. This fixes PR3080.

llvm-svn: 59450
 2008-11-17 17:34:31 +00:00
Lang Hames
cdccf43c58 Removed 2008-10-17-SpillerBug.ll as it does not provide an accurate test of PR2898. 
llvm-svn: 59431
 2008-11-16 23:30:12 +00:00
Lang Hames
66bb641598 2008-10-17-SpillerBug.ll is currently failing, but this doesn't reflect an actual regression of PR2898. This test should probably be removed. I've XFAILed it for now to keep buildbot quiet while this is considered. 
llvm-svn: 59415
 2008-11-16 13:11:09 +00:00
Mon P Wang
b6661b480b Improved shuffle normalization to avoid using extract/build when we 
can extract using different indexes for two vectors. Added a few tests
for vector shuffles.

llvm-svn: 59399
 2008-11-16 05:06:27 +00:00
Richard Osborne
c2b2d5e6cf [XCore] Fix expansion of 64 bit add/sub. Don't custom expand 
these operations if ladd/lsub are not available on the current
subtarget.

llvm-svn: 59305
 2008-11-14 15:59:19 +00:00
Richard Osborne
8f86bb4d20 Add XCore intrinsics for getid (returns thread id) and bitrev (reverses 
bits in a word).

llvm-svn: 59296
 2008-11-14 10:12:16 +00:00
Dan Gohman
0a3ae5c0f2 Remove the FlaggedNodes member from SUnit. Instead of requiring each SUnit 
to carry a SmallVector of flagged nodes, just calculate the flagged nodes
dynamically when they are needed.

The local-liveness change is due to a trivial scheduling change where
the scheduler arbitrary decision differently.

llvm-svn: 59273
 2008-11-13 23:24:17 +00:00
Dale Johannesen
cc7dc0ec70 testcase for PR 1779. 
llvm-svn: 59268
 2008-11-13 22:17:10 +00:00
Duncan Sands
117397c8dd Correct some thinkos in the expansion of ADD/SUB 
when the target does not support ADDC/SUBC.  This
fixes PR3044.

llvm-svn: 59120
 2008-11-12 08:23:26 +00:00
Dale Johannesen
a2cd0724ea Fix the testb optimization so x86 also bootstraps. 
Reenable test.

llvm-svn: 59101
 2008-11-12 02:00:35 +00:00
Andrew Lenharth
d096adcb5f fix another libgcc blocker 
llvm-svn: 59026
 2008-11-11 06:06:07 +00:00
Bill Wendling
97ad53032e Un-XFAIL tests now that they're fixed. 
llvm-svn: 59023
 2008-11-11 04:44:42 +00:00
Bill Wendling
e27327ae95 r59009 broke these tests. XFAIL for now. 
llvm-svn: 59010
 2008-11-11 00:36:10 +00:00
Bill Wendling
891f177dd0 Temporarily revert r58979 and related patch. It's causing a failure in X86 bootstrap: 
Comparing stages 2 and 3
warning: ./cc1-checksum.o differs
warning: ./cc1obj-checksum.o differs
warning: ./cc1objplus-checksum.o differs
warning: ./cc1plus-checksum.o differs
Bootstrap comparison failure!
./alias.o differs
./alloc-pool.o differs
./attribs.o differs
./bb-reorder.o differs
./bitmap.o differs
./build/errors.o differs
./build/genattrtab.o differs
./build/genautomata.o differs
./build/genemit.o differs
./build/genextract.o differs
...

-bw

llvm-svn: 59003
 2008-11-10 21:22:06 +00:00
Duncan Sands
22e8a45a01 Fix PR2667: add soft float support for sint_to_fp/uint_to_fp 
where the argument is an apint, or smaller than the minimum
size for which there is a libcall (i32). 

llvm-svn: 58994
 2008-11-10 17:36:26 +00:00
Duncan Sands
1d0b7dccf7 When promoting the result of fp_to_uint/fp_to_sint, 
inform the optimizers that the result must be zero/
sign extended from the smaller type.  For example,
if a fp to unsigned i16 is promoted to fp to i32,
then we are allowed to assume that the extra 16 bits
are zero (because the result of fp to i16 is undefined
if the result does not fit in an i16).  This is
quite aggressive, but should help the optimizers
produce better code.  This requires correcting a
test which thought that fp_to_uint is some kind
of truncation, which it is not: in the testcase
(which does fp to i1), either the fp value converts
to 0 or 1 or the result is undefined, which is
quite different to truncation.

llvm-svn: 58991
 2008-11-10 17:28:30 +00:00
Dale Johannesen
28c0044273 Reenable test. 
llvm-svn: 58980
 2008-11-10 07:30:32 +00:00
Duncan Sands
3bc55fc46f XFAIL this while waiting for a fix. 
llvm-svn: 58934
 2008-11-09 13:07:47 +00:00
Scott Michel
d168ef3d26 CellSPU: Update expected counts on expected patterns 
llvm-svn: 58927
 2008-11-09 01:03:41 +00:00
Dale Johannesen
2487d3100b Generated code for generic expansion of SETUGT etc. 
is noticeably worse than previous PPC-specific code.
Since the latter was also wrong in some cases and
correctness is more important than efficiency, I'm
disabling this test temporarily while I fix it.

llvm-svn: 58876
 2008-11-08 00:49:19 +00:00
Dale Johannesen
5c10f4178e Xfail an incorrect test. 
llvm-svn: 58875
 2008-11-08 00:40:24 +00:00
Richard Osborne
f4fb6eaf71 Add basic test for XCore backend 
llvm-svn: 58841
 2008-11-07 11:24:12 +00:00
Dale Johannesen
64f40545b3 Testcase for testb optimization. 
llvm-svn: 58827
 2008-11-07 01:30:18 +00:00
Dan Gohman
aeaf83cfb8 Make ISel ignore dead nodes. The DAGCombiner normally eliminates 
dead nodes, but in this case its missing one. Fixing the DAGCombiner
is desirable, but it's somewhat involved.

llvm-svn: 58777
 2008-11-05 22:56:47 +00:00
Evan Cheng
1378d6c7a9 Add more vector move low and zero-extend patterns. 
llvm-svn: 58752
 2008-11-05 06:04:51 +00:00
Evan Cheng
59112bc108 Actually ARM / Mac OS X does have UINTTOFP_I64_F{64|32} libcalls. 
llvm-svn: 58725
 2008-11-04 22:19:55 +00:00
Evan Cheng
45496b349f Custom lower bit_convert i64 -> f64 into FMDRR. This is now happening with legalizetypes. 
llvm-svn: 58714
 2008-11-04 19:57:48 +00:00
Duncan Sands
58ebf09772 Fix PR3011: LegalizeTypes support for scalarizing 
SELECT_CC.

llvm-svn: 58706
 2008-11-04 17:31:08 +00:00
Dan Gohman
0ba8aad1af The ANDMask node folds to a constant, and isn't the node that needs to 
have its node id set. The new and and shift nodes are the nodes that need
the IDs. This fixes PR2982.

llvm-svn: 58655
 2008-11-03 23:43:55 +00:00
Dan Gohman
edf3dc97c2 Change how extended types are represented in MVTs. Instead of fiddling 
bits, use a union of a SimpleValueType enum and a regular Type*.

This increases the size of MVT on 64-bit hosts from 32 bits to 64 bits.
In most cases, this doesn't add significant overhead. There are places
in codegen that use arrays of MVTs, so these are now larger, but
they're small in common cases.

This eliminates restrictions on the size of integer types and vector
types that can be represented in codegen. As the included testcase
demonstrates, it's now possible to codegen very large add operations.
There are still some complications with using very large types. PR2880
is still open so they can't be used as return values on normal targets,
there are no libcalls defined for very large integers so operations
like multiply and divide aren't supported.

This also introduces a minimal tablgen Type library, capable of
handling IntegerType and VectorType. This will allow parts of
TableGen that don't depend on using SimpleValueType values to handle
arbitrary integer and vector types.

llvm-svn: 58623
 2008-11-03 17:56:27 +00:00
Duncan Sands
a9047944bc Make VAARG work with x86 long double (which is 
10 bytes long, but is passed in 12/16 bytes).

llvm-svn: 58608
 2008-11-03 11:51:11 +00:00
Duncan Sands
d2500010a3 Add a bunch of libcalls for ppcf128 that were somehow 
completely forgotten about when writing LegalizeTypes.

llvm-svn: 58508
 2008-10-31 14:06:52 +00:00
Dan Gohman
481e1fd0a6 Use MOVSSmr instead of EXTRACTPSmr in the case of extracting 
vector element 0 for a store, as it's smaller and faster.

llvm-svn: 58483
 2008-10-31 00:57:24 +00:00
Duncan Sands
1903629c49 Testcase for PR2986. 
llvm-svn: 58456
 2008-10-30 20:34:30 +00:00
Scott Michel
5b588212d8 Resolve bug 2947: vararg-marked functions must spill registers R3-R79 to stack 
so that va_start/va_arg/et.al. will walk arguments correctly for Cell SPU.

N.B.: Because neither clang nor llvm-gcc-4.2 can be built for CellSPU, this is
still unexorcised code.

llvm-svn: 58415
 2008-10-30 01:51:48 +00:00
Chris Lattner
a99dc2692a add testcase for PR2964 
llvm-svn: 58393
 2008-10-29 18:42:22 +00:00
Duncan Sands
fd032c5bef Fix PR2977: LegalizeTypes support for expanding 
VAARG.

llvm-svn: 58379
 2008-10-29 14:25:28 +00:00
Evan Cheng
6125b9e097 - More pre-split fixes: spill slot live interval computation bug; restore point bug. 
- If a def is spilt, remember its spill index to allow its reuse.

llvm-svn: 58375
 2008-10-29 08:39:34 +00:00
Duncan Sands
a64641fbd2 Fix darwin ppc llvm-gcc build breakage: intercept 
ppcf128 to i32 conversion and expand it into a code
sequence like in LegalizeDAG.  This needs custom
ppc lowering of FP_ROUND_INREG, so turn that on and
make it work with LegalizeTypes.  Probably PPC should
simply custom lower the original conversion.

llvm-svn: 58329
 2008-10-28 15:00:32 +00:00
Duncan Sands
da35d6f7d6 Turn off LegalizeTypes for this test for the 
moment, while waiting for a proper solution.

llvm-svn: 58324
 2008-10-28 09:55:04 +00:00
Duncan Sands
ce82e0aa82 Fix a testcase provided by Bill in which the node 
id could end up being wrong mostly because of
forgetting to remap new nodes that morphed into
processed nodes through CSE.

llvm-svn: 58323
 2008-10-28 09:38:36 +00:00
Chris Lattner
63e92876e0 Fix a nasty miscompilation of 176.gcc on linux/x86 where we synthesized 
a memset using 16-byte XMM stores, but where the stack realignment code
didn't work.  Until it does (PR2962) disable use of xmm regs in memcpy
and memset formation for linux and other targets with insufficiently
aligned stacks.

This is part of PR2888

llvm-svn: 58317
 2008-10-28 05:49:35 +00:00
Evan Cheng
9bbf76a1e9 Avoid putting a split past the end of the live range; always shrink wrap live interval in the barrier mbb. 
llvm-svn: 58309
 2008-10-28 00:47:49 +00:00
Evan Cheng
056ef89e68 Remove val# defined by a remat'ed def that is now dead. 
llvm-svn: 58294
 2008-10-27 23:21:01 +00:00
Chris Lattner
3722193550 rename vec_spat -> vec_splat, pointed out by duncan 
llvm-svn: 58260
 2008-10-27 18:28:24 +00:00
Duncan Sands
a6bbc047d5 Turn on LegalizeTypes, the new type legalization 
codegen infrastructure, by default.  Please report
any breakage to the mailing lists.

llvm-svn: 58232
 2008-10-27 08:42:46 +00:00
Evan Cheng
3bcbccf563 For now, don't split live intervals around x87 stack register barriers. FpGET_ST0_80 must be right after a call instruction (and ADJCALLSTACKUP) so we need to find a way to prevent reload of x87 registers between them. 
llvm-svn: 58230
 2008-10-27 07:14:50 +00:00
Chris Lattner
9737bef5a1 remove eh output from this test. 
llvm-svn: 58196
 2008-10-26 18:53:07 +00:00
Evan Cheng
8a7f04e7c2 Do not shrink wrap live interval in a mbb if it's livein any of its successor blocks. The mbb can be revisited again after all of the successors are processed. 
llvm-svn: 58184
 2008-10-26 07:49:03 +00:00
Evan Cheng
db1c135283 Handle cases where there aren't uses in the barrier mbb. 
llvm-svn: 58174
 2008-10-25 23:49:39 +00:00
Gordon Henriksen
e5b0182e94 Related to PR2911, reject as invalid non-pointer GC roots. 
llvm-svn: 58143
 2008-10-25 16:28:35 +00:00
Evan Cheng
0c78ace7dc If val# def is ~0U, meaning it's defined by a PHI, and it's previously split, spill before the barrier because it's impossible to determine if all the defs are spilled in the same spill slot. 
llvm-svn: 58129
 2008-10-25 00:52:41 +00:00
Dale Johannesen
834f23dbed Be kind to non-x86 hosts. 
llvm-svn: 58113
 2008-10-24 21:20:25 +00:00
Duncan Sands
4b148a29ef Fix translateX86CC: if SetCCOpcode is SETULE and 
LHS is a foldable load, then LHS and RHS are swapped
and SetCCOpcode is changed to SETUGT.  But the later
code is expecting operands to be the wrong way round
for SETUGT, but they are not in this case, resulting
in an inverted compare.  The solution is to move the
load normalization before the correction for SETUGT.
This bug was tickled by LegalizeTypes which happened
to legalize the testcase slightly differently to
LegalizeDAG.

llvm-svn: 58092
 2008-10-24 13:03:10 +00:00
Evan Cheng
a7a0aabf99 Avoid splitting an interval multiple times; avoid splitting re-materializable val# (for now). 
llvm-svn: 58068
 2008-10-24 02:05:00 +00:00
Chris Lattner
cf48fee0c7 Fix PR2907 by digging through constant expressions to find FP constants that 
are their operands.

llvm-svn: 57956
 2008-10-22 04:53:16 +00:00
Dan Gohman
b6f073ce21 Fix SelectionDAGBuild lowering of Select instructions to 
handle first-class aggregate values. Also, fix a bug in
the Ret handling for empty aggregates.

llvm-svn: 57925
 2008-10-21 20:00:42 +00:00
Chris Lattner
3ebc702926 really fix run line 
llvm-svn: 57889
 2008-10-21 03:55:19 +00:00
Chris Lattner
bd27c9091a fix run line 
llvm-svn: 57888
 2008-10-21 03:54:49 +00:00
Chris Lattner
7ef8907342 remove some unneeded eh generation 
llvm-svn: 57887
 2008-10-21 03:49:19 +00:00
Dan Gohman
847a83dbad Don't create TargetGlobalAddress nodes with offsets that don't fit 
in the 32-bit signed offset field of addresses. Even though this
may be intended, some linkers refuse to relocate code where the
relocated address computation overflows.

Also, fix the sign-extension of constant offsets to use the
actual pointer size, rather than the size of the GlobalAddress
node, which may be different, for example on x86-64 where MVT::i32
is used when the address is being fit into the 32-bit displacement
field.

llvm-svn: 57885
 2008-10-21 03:38:42 +00:00
Dan Gohman
281881b8e2 Optimized FCMP_OEQ and FCMP_UNE for x86. 
Where previously LLVM might emit code like this:

        ucomisd %xmm1, %xmm0
        setne   %al
        setp    %cl
        orb     %al, %cl
        jne     .LBB4_2

it now emits this:

        ucomisd %xmm1, %xmm0
        jne     .LBB4_2
        jp      .LBB4_2

It has fewer instructions and uses fewer registers, but it does
have more branches. And in the case that this code is followed by
a non-fallthrough edge, it may be followed by a jmp instruction,
resulting in three branch instructions in sequence. Some effort
is made to avoid this situation.

To achieve this, X86ISelLowering.cpp now recognizes FCMP_OEQ and
FCMP_UNE in lowered form, and replace them with code that emits
two branches, except in the case where it would require converting
a fall-through edge to an explicit branch.

Also, X86InstrInfo.cpp's branch analysis and transform code now
knows now to handle blocks with multiple conditional branches. It
uses loops instead of having fixed checks for up to two
instructions. It can now analyze and transform code generated
from FCMP_OEQ and FCMP_UNE.

llvm-svn: 57873
 2008-10-21 03:29:32 +00:00
Dan Gohman
d692070372 When the coalescer is doing rematerializing, have it remove 
the copy instruction from the instruction list before asking the
target to create the new instruction. This gets the old instruction
out of the way so that it doesn't interfere with the target's
rematerialization code. In the case of x86, this helps it find
more cases where EFLAGS is not live.

Also, in the X86InstrInfo.cpp, teach isSafeToClobberEFLAGS to check
to see if it reached the end of the block after scanning each
instruction, instead of just before. This lets it notice when the
end of the block is only two instructions away, without doing any
additional scanning.

These changes allow rematerialization to clobber EFLAGS in more
cases, for example using xor instead of mov to set the return value
to zero in the included testcase.

llvm-svn: 57872
 2008-10-21 03:24:31 +00:00
Chris Lattner
c4a880e03c Fix gcc.c-torture/compile/920520-1.c by inserting bitconverts 
for strange asm conditions earlier.  In this case, we have a
double being passed in an integer reg class.  Convert to like
sized integer register so that we allocate the right number 
for the class (two i32's for the f64 in this case).

llvm-svn: 57862
 2008-10-21 00:45:36 +00:00
Chris Lattner
c369db13cc Reapply r57699 with a fix to not crash on asms with multiple results. Unlike 
the previous patch this one actually passes make check.

"Fix PR2356 on PowerPC: if we have an input and output that are tied together
that have different sizes (e.g. i32 and i64) make sure to reserve registers for
the bigger operand."

llvm-svn: 57771
 2008-10-18 18:49:30 +00:00
Dan Gohman
15597f07b2 Teach DAGCombine to fold constant offsets into GlobalAddress nodes, 
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)

This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.

This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.

Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.

The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.

llvm-svn: 57748
 2008-10-18 02:06:02 +00:00
Dan Gohman
2eaf4f1c48 Revert r57699. It's causing regressions in 
test/CodeGen/X86/2008-09-17-inline-asm-1.ll
and a few others, and it breaks the llvm-gcc build.

llvm-svn: 57747
 2008-10-18 01:03:45 +00:00
Evan Cheng
7792ca759d Fix PR2898. Spiller delete a store for reuse before it knows for sure the reuse happened. 
Patch by Lang Hames!

llvm-svn: 57720
 2008-10-17 20:56:41 +00:00
Chris Lattner
231a9466df Fix a bug where the x86 backend would reject 64-bit r constraints when 
in 32-bit mode instead of assigning a register pair.  This has nothing to
do with PR2356, but I happened to notice it while working on it.

llvm-svn: 57704
 2008-10-17 17:59:52 +00:00
Chris Lattner
e2342cd790 Fix PR2356 on PowerPC: if we have an input and output that are tied together 
that have different sizes (e.g. i32 and i64) make sure to reserve registers for
the bigger operand.

llvm-svn: 57699
 2008-10-17 17:52:49 +00:00
Chris Lattner
d7b9ca9f8a remove an xfailed test. 
llvm-svn: 57695
 2008-10-17 17:26:48 +00:00
Chris Lattner
9876270b99 remove this test: it is xfailed anyway, and is failing for a reason 
other than why it was xfailed.

llvm-svn: 57694
 2008-10-17 17:26:19 +00:00
Evan Cheng
5fe2abfee8 Fix a very subtle spiller bug: UpdateKills should not forget to track defs of aliases. 
llvm-svn: 57673
 2008-10-17 06:16:07 +00:00
Dan Gohman
268cfea6bc Fun x86 encoding tricks: when adding an immediate value of 128, 
use a SUB instruction instead of an ADD, because -128 can be
encoded in an 8-bit signed immediate field, while +128 can't be.
This avoids the need for a 32-bit immediate field in this case.

A similar optimization applies to 64-bit adds with 0x80000000,
with the 32-bit signed immediate field.

To support this, teach tablegen how to handle 64-bit constants.

llvm-svn: 57663
 2008-10-17 01:33:43 +00:00
Dan Gohman
5d83bd89a5 Define patterns for shld and shrd that match immediate 
shift counts, and patterns that match dynamic shift counts
when the subtract is obscured by a truncate node.

Add DAGCombiner support for recognizing rotate patterns
when the shift counts are defined by truncate nodes.

Fix and simplify the code for commuting shld and shrd
instructions to work even when the given instruction doesn't
have a parent, and when the caller needs a new instruction.

These changes allow LLVM to use the shld, shrd, rol, and ror
instructions on x86 to replace equivalent code using two
shifts and an or in many more cases.

llvm-svn: 57662
 2008-10-17 01:23:35 +00:00
Dan Gohman
5a693288f6 Fix this test so it actually runs the grep lines. 
llvm-svn: 57653
 2008-10-16 23:57:54 +00:00
Duncan Sands
10e931facf Testcase for PR2762. 
llvm-svn: 57633
 2008-10-16 08:56:46 +00:00
Bill Wendling
8d26b9c07a Testcase for PR1638. 
llvm-svn: 57590
 2008-10-15 18:27:15 +00:00
Evan Cheng
cb8b4e9dd4 - Add target lowering hooks that specify which setcc conditions are illegal, 
i.e. conditions that cannot be checked with a single instruction. For example,
SETONE and SETUEQ on x86.
- Teach legalizer to implement *illegal* setcc as a and / or of a number of
legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is
implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ.
- Move x86 target over.

llvm-svn: 57542
 2008-10-15 02:05:31 +00:00
Dan Gohman
e08e0dcfcc When doing the very-late shift-and address-mode optimization, 
create a new DAG node to represent the new shift to keep the
DAG consistent, even though it'll almost always be folded into
the address.

If a user of the resulting address has multiple uses, the
nodes may get revisited by a later MatchAddress call, in which
case DAG inconsistencies do matter.

This fixes PR2849.

llvm-svn: 57465
 2008-10-13 20:52:04 +00:00
Evan Cheng
de99d94c58 FIX PR2794. Make sure SIGN_EXTEND_INREG nodes introduced by LegalizeSetCCOperands are leglized. Patch by Richard Pennington. 
llvm-svn: 57460
 2008-10-13 18:46:18 +00:00
Evan Cheng
731f400eac Also update sub-register intervals after a trivial computation is rematt'ed for a copy instruction. PR2775. 
llvm-svn: 57458
 2008-10-13 18:35:52 +00:00
Evan Cheng
023b124109 Add a test case for _Complex passed as a FCA. 
llvm-svn: 57456
 2008-10-13 18:13:07 +00:00
Chris Lattner
7910d59d44 Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as 
parameters instead of raw Constants.  This prevents the constants from
being selected by the isel pass, fixing PR2735.

llvm-svn: 57385
 2008-10-11 22:08:30 +00:00
Anton Korobeynikov
72e9aa27f0 Add testcase for 'r' inline asm operand 
llvm-svn: 57361
 2008-10-10 20:28:59 +00:00
Anton Korobeynikov
3f74df506c This does not fail anymore 
llvm-svn: 57360
 2008-10-10 20:28:32 +00:00
Anton Korobeynikov
40b8d5fc4d Add sparc test for memory operand used in inline asm 
llvm-svn: 57348
 2008-10-10 10:15:33 +00:00
Anton Korobeynikov
1134867d55 This is not failing anymore 
llvm-svn: 57347
 2008-10-10 10:15:18 +00:00
Chris Lattner
284ae75537 get CodeGen/Alpha/mul128.ll to work. 
llvm-svn: 57318
 2008-10-09 04:50:56 +00:00
Dan Gohman
08e60cee90 Remove -disable-fast-isel. Use cl::boolOrDefault with -fast-isel 
instead.

So now: -fast-isel or -fast-isel=true enable fast-isel, and
-fast-isel=false disables it. Fast-isel is also on by default
with -fast, and off by default otherwise.

llvm-svn: 57270
 2008-10-07 23:00:56 +00:00
Dan Gohman
bc47391399 Add a testcase for i256 add. i256 isn't fully supported in 
codegen right now, but add and subtract work.

llvm-svn: 57260
 2008-10-07 20:39:12 +00:00
Andrew Lenharth
dccb47de69 128 mul test, xfailed 
llvm-svn: 57250
 2008-10-07 17:13:32 +00:00
Anders Carlsson
a9c42526f8 Certain patterns involving the "movss" instruction were marked as requiring SSE2, when in reality movss is an SSE1 instruction. 
llvm-svn: 57246
 2008-10-07 16:14:11 +00:00
Andrew Lenharth
c00c2a0058 Expand arith on machines without carry flags 
llvm-svn: 57243
 2008-10-07 14:15:42 +00:00
Chris Lattner
75c684100c no need to write the output to the disk 
llvm-svn: 57232
 2008-10-07 04:06:55 +00:00
Andrew Lenharth
99c106c2a2 Add test case for ADDC ADDE expansion 
llvm-svn: 57228
 2008-10-07 02:30:13 +00:00
Dale Johannesen
40d00c0979 Be more precise about which conversions of NaNs 
are Inexact.  (These are not Inexact as defined
by IEEE754, but that seems like a reasonable way
to abstract what happens:  information is lost.)

llvm-svn: 57218
 2008-10-06 22:59:10 +00:00
Evan Cheng
88d76ffe8a Fix PR2850 and PR2863. Only generate movddup for 128-bit SSE vector shuffles. 
llvm-svn: 57210
 2008-10-06 21:13:08 +00:00
Anton Korobeynikov
4cc9051fbb Revert r56675 - it breaks unwinding runtime everywhere. 
llvm-svn: 57048
 2008-10-04 11:09:36 +00:00
Dan Gohman
638a8001c8 Fix a bug in the local allocator's liveness computation where it 
was setting kill flags on tied uses in two-address instructions.
The kill flags were causing the allocator to think it could
allocate the use and its tied def in different registers.

llvm-svn: 57039
 2008-10-04 00:31:14 +00:00
Dale Johannesen
dbd7b1bd33 Handle some 64-bit atomics on x86-32, some of the time. 
llvm-svn: 56963
 2008-10-02 18:53:47 +00:00
Dan Gohman
c48242640d Fix a think-o in isSafeToMove. This fixes it from thinking that 
volatile memory references are safe to move.

llvm-svn: 56948
 2008-10-02 15:04:30 +00:00
Dan Gohman
595edc380a Disable fast-isel for this test, as it doesn't emit the same 
number of instructions.

llvm-svn: 56940
 2008-10-01 23:48:35 +00:00
Devang Patel
a5cda569d3 Remove OptimizeForSize global. Use function attribute optsize. 
llvm-svn: 56937
 2008-10-01 23:18:38 +00:00
Dan Gohman
be88cf29b6 Split this test and move it into target-specific directories. 
This fixes failures on configurations that don't have one or the
other targets enabled.

llvm-svn: 56926
 2008-10-01 19:46:30 +00:00
Dan Gohman
5508abb3bf nounwind-ify this test. 
llvm-svn: 56918
 2008-10-01 15:07:14 +00:00
Bill Wendling
c807050f44 Moved this option to the front-end. 
llvm-svn: 56901
 2008-10-01 01:02:18 +00:00
Dan Gohman
d456cc01eb Use explicit target-triples to unbreak this test on non-darwin systems. 
llvm-svn: 56896
 2008-10-01 00:25:38 +00:00
Bill Wendling
618d422cdd Just don't transform this memset into "bzero" if no-builtin is specified. 
llvm-svn: 56888
 2008-09-30 22:05:33 +00:00
Bill Wendling
86f6fdc7e3 - Initialize "--no-builtin" to "false". 
- Testcase for r56885.

llvm-svn: 56886
 2008-09-30 21:40:30 +00:00
Evan Cheng
1c8ff02eeb Re-apply 56835 along with header file changes. 
llvm-svn: 56848
 2008-09-30 15:44:16 +00:00
Duncan Sands
a2c8482495 Revert commit 56835 since it breaks the build. 
"If a re-materializable instruction has a register
operand, the spiller will change the register operand's
spill weight to HUGE_VAL to avoid it being spilled.
However, if the operand is already in the queue ready
to be spilled, avoid re-materializing it".

llvm-svn: 56837
 2008-09-30 10:00:30 +00:00
Evan Cheng
4eee17f4fb If a re-materializable instruction has a register operand, the spiller will change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it. 
llvm-svn: 56835
 2008-09-30 06:36:58 +00:00
Evan Cheng
b749199c34 Fix PR2835. Do not change the width of a volatile load. 
llvm-svn: 56792
 2008-09-29 17:26:18 +00:00
Evan Cheng
28d9b3a8ad Re-apply 56683 with fixes. 
llvm-svn: 56748
 2008-09-27 01:56:22 +00:00
Devang Patel
47a504c87c Implement function notes as function attributes. 
llvm-svn: 56716
 2008-09-26 23:51:19 +00:00
Evan Cheng
d63fc80c1e Implement "punpckldq %xmm0, $xmm0" as "pshufd $0x50, %xmm0, %xmm" unless optimizing for code size. 
llvm-svn: 56711
 2008-09-26 23:41:32 +00:00
Bill Wendling
7273078850 Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc: 
/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition  -isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include  -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...

llvm-svn: 56703
 2008-09-26 22:10:44 +00:00
Evan Cheng
9946443460 Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0. 
llvm-svn: 56683
 2008-09-26 19:48:35 +00:00
Evan Cheng
b4d6625c85 Avoid spilling EBP / RBP twice in the prologue. 
llvm-svn: 56675
 2008-09-26 19:14:21 +00:00
Evan Cheng
c8674dcfd0 Prefer movlhps over punpcklqdq, etc. in more cases. 
llvm-svn: 56627
 2008-09-25 23:35:16 +00:00
Evan Cheng
d190aeb62d With sse3 and when the source is a load or has multiple uses, favors movddup over shuffp*, pshufd, etc. Without sse3 or when the source is from a register, make use of movlhps 
llvm-svn: 56620
 2008-09-25 20:50:48 +00:00
Dale Johannesen
62f64ab4c8 Accept 'inreg' attribute on x86 functions as 
meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0).  Update documentation
to reflect reality.

llvm-svn: 56619
 2008-09-25 20:47:45 +00:00
Evan Cheng
efd1f614ff Fix patterns for SSE4.1 move and sign extend instructions. Also add instructions which fold VZEXT_MOVL and VZEXT_LOAD. 
llvm-svn: 56594
 2008-09-24 23:27:55 +00:00
Dale Johannesen
4184c23365 Remove SelectionDag early allocation of registers 
for earlyclobbers.  Teach Local RA about earlyclobber,
and add some tests for it.

llvm-svn: 56592
 2008-09-24 23:13:09 +00:00
Evan Cheng
f942615847 Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc. 
llvm-svn: 56526
 2008-09-24 00:05:32 +00:00
Evan Cheng
5bf702d20a Support x86 specific inline asm modifier 'J'. 
llvm-svn: 56483
 2008-09-22 23:57:37 +00:00
Arnold Schwaighofer
49f49e2086 Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC. 
llvm-svn: 56436
 2008-09-22 14:50:07 +00:00
Evan Cheng
270178bdda Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. 
llvm-svn: 56381
 2008-09-20 01:28:05 +00:00
Evan Cheng
c01e6c2f59 Clean up the test. 
llvm-svn: 56380
 2008-09-20 01:26:27 +00:00
Evan Cheng
6a86ec1ef0 No need to print function stubs for Mac OS X 10.5 and up. Linker will handle it. 
llvm-svn: 56378
 2008-09-20 00:13:45 +00:00
Dan Gohman
f66b3277d3 Refactor X86SelectConstAddr, folding it into X86SelectAddress. This 
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.

llvm-svn: 56371
 2008-09-19 22:16:54 +00:00
Evan Cheng
14493ffe78 Re-materalized definition instructions may be dead. Whack them. 
llvm-svn: 56352
 2008-09-19 17:38:47 +00:00
Dale Johannesen
99091ed94f Add a bit to mark operands of asm's that conflict 
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.

llvm-svn: 56290
 2008-09-17 21:13:11 +00:00
Evan Cheng
d3225118a6 Unallocatable registers do not have live intervals. 
llvm-svn: 56287
 2008-09-17 18:36:25 +00:00
Bill Wendling
b2701e541c Add trampoline support to PPC. GCC simply calls the "__trampoline_setup" 
function with appropriate parameters. This allows us to support blocks on PPC.

llvm-svn: 56267
 2008-09-17 00:30:57 +00:00
Dan Gohman
faa15214e0 Teach LSR to optimize away SMAX operations for tripcounts in common 
cases.  See the comment above OptimizeSMax for the full story, and
the testcase for an example. This cancels out a pessimization
commonly attributed to indvars, and will allow us to lift some of
the artificial throttles in indvars, rather than add new ones.

llvm-svn: 56230
 2008-09-15 21:22:06 +00:00
Dan Gohman
f38d63884f Re-enable SelectionDAG CSE for calls. It matters in the case of 
libcalls, as in this testcase on ARM.

llvm-svn: 56226
 2008-09-15 19:46:03 +00:00
Bruno Cardoso Lopes
5463c59693 Added testcase for bswap allegrexel intrinsic 
llvm-svn: 56225
 2008-09-15 19:38:11 +00:00
Evan Cheng
db1693cb14 Correctly update kill infos after extending a live range and merge 2 val#'s; fix 56165 - do not mark val# copy field if the copy does not define the val#. 
llvm-svn: 56199
 2008-09-15 06:28:41 +00:00
Evan Cheng
07046dae41 On some targets, non-move instructions can become move instructions because of coalescing. e.g. 
vr2 = OR vr0, vr1
=>
vr2 = OR vr1, vr1   // after coalescing vr0 with vr1

Update the value# of the destination register with the copy instruction if that happens.

llvm-svn: 56165
 2008-09-12 18:13:14 +00:00
Arnold Schwaighofer
9cfcc68e04 Add indirect tail call (function pointer) examples. 
llvm-svn: 56127
 2008-09-11 22:24:28 +00:00
Arnold Schwaighofer
adfb111f10 When tailcallopt is enabled all fastcc calls must have an aligned argument stack size. Add a test case. 
llvm-svn: 56119
 2008-09-11 20:28:43 +00:00
Evan Cheng
5c7e3783ef Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g. 
vr1024 = extract_subreg vr1025, 1
...
vr1024 = mov8rr AH
If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH.

llvm-svn: 56118
 2008-09-11 20:07:10 +00:00
Evan Cheng
99be914c9a Fix PR2783 - coalescer bug. Missing a TargetRegisterInfo::isVirtualRegister check. 
llvm-svn: 56112
 2008-09-11 18:40:32 +00:00
Evan Cheng
b879f93ba5 Propagate subreg index when promoting a load to a copy. 
llvm-svn: 56085
 2008-09-11 01:02:12 +00:00
Evan Cheng
83c694fbe7 Fix a fastcc + sret bug. If fastcc and sret, callee doesn't need to pop the hidden struct ptr; Re-enable fastcc. 
llvm-svn: 56061
 2008-09-10 18:25:29 +00:00
Evan Cheng
ba11945234 Legalizer was missing code that expand fpow to a libcall. 
llvm-svn: 56028
 2008-09-09 23:02:14 +00:00
Evan Cheng
304fba81c9 Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing. 
llvm-svn: 56006
 2008-09-09 20:22:01 +00:00
Evan Cheng
dc011a1b10 Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand. 
llvm-svn: 55975
 2008-09-09 01:26:59 +00:00
Anton Korobeynikov
afd49daa42 Reapply 55902: Add test for checking proper lowering of eh_return & unwind init intrinsics on 32bit x86 targets 
llvm-svn: 55960
 2008-09-08 21:14:36 +00:00
Anton Korobeynikov
ddf0f04445 Reapply 55903: Testcase for 64-bit lowering of eh_return & unwind_init 
llvm-svn: 55959
 2008-09-08 21:14:19 +00:00
Dan Gohman
6f360fc081 Add a target triple; apparently LLVM doesn't use 64-bit 
data directives on darwin.

llvm-svn: 55941
 2008-09-08 20:16:18 +00:00
Bill Wendling
122df59fda Remove these testcases associated with changes between r 55898 and r 55909. 
llvm-svn: 55931
 2008-09-08 18:00:39 +00:00
Bill Wendling
4cc4caab72 Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8

llvm-svn: 55928
 2008-09-08 17:59:12 +00:00
Evan Cheng
fc78ac5bbe Handle calls which produce i1 results: promote to i8 but and it with 1 to get the low bit. 
llvm-svn: 55925
 2008-09-08 17:15:42 +00:00
Dan Gohman
f2a912c2a7 Add AsmPrinter support for i128 and larger static initializer data. 
llvm-svn: 55919
 2008-09-08 16:40:13 +00:00
Anton Korobeynikov
0da56882db Testcase for 64-bit lowering of eh_return & unwind_init 
llvm-svn: 55903
 2008-09-08 14:23:16 +00:00
Anton Korobeynikov
7dc16250e7 Add test for checking proper lowering of eh_return & unwind init intrinsics on 32bit x86 targets 
llvm-svn: 55902
 2008-09-08 14:22:57 +00:00
Rafael Espindola
ce4f075afd Add testcase from bug 2770. 
llvm-svn: 55897
 2008-09-08 11:17:54 +00:00
Evan Cheng
f8d8287454 Correctly handle physical register inputs. They are not explicit input operands in the resulting machine instrs. 
llvm-svn: 55893
 2008-09-08 08:39:33 +00:00
Evan Cheng
6690ccd573 Handle x86 truncate to i8 with target hook for now. 
llvm-svn: 55877
 2008-09-07 08:47:42 +00:00
Eli Friedman
fecea4b498 Fix for PR2687: Add patterns to match sint_to_fp and fp_to_sint for <2 x 
i32>.  This is a little messy, but it works.

We should really get rid of the intrinsics, though, since they map
perfectly well to standard LLVM instructions.

llvm-svn: 55864
 2008-09-05 23:07:03 +00:00
Evan Cheng
1f4b84cad0 Fix test. 
llvm-svn: 55849
 2008-09-05 20:04:37 +00:00
Evan Cheng
10a350fa89 If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls. 
llvm-svn: 55840
 2008-09-05 17:24:07 +00:00
Evan Cheng
bd15e330d0 For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries. 
llvm-svn: 55807
 2008-09-04 22:59:58 +00:00
Owen Anderson
cd3ee9198d Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase. 
llvm-svn: 55777
 2008-09-04 16:48:33 +00:00
Owen Anderson
35485dbae3 Add a first attempt at implementing stores for X86 fast isel using target hooks. 
Dan or Evan, please review.

llvm-svn: 55764
 2008-09-04 07:08:58 +00:00
Evan Cheng
9c728a557d Load from GV stub should be locally CSE'd. 
llvm-svn: 55763
 2008-09-04 06:18:33 +00:00
Evan Cheng
53ce5fa5ce Remove code that pad number of bytes to pop for X86_FastCall CC. The code doesn't do the "aligning" for Cygwin, Mingw, and Windows. But aligning it on Darwin and Linux breaks gcc compatibility. That ruled out all the platforms we support! 
llvm-svn: 55756
 2008-09-04 01:04:15 +00:00
Evan Cheng
942d55dd92 Add X86 target hook to implement load (even from GlobalAddress). 
llvm-svn: 55693
 2008-09-03 06:44:39 +00:00
Duncan Sands
044fcaf6b4 Turn this legalize types test on. 
llvm-svn: 55605
 2008-09-01 12:00:55 +00:00
Bill Wendling
297eb080b6 Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR 
instructions in CellSPU as "Expand" so that they won't be generated. I added a
"FIXME" so that this hack can be addressed and reverted once ISD::ROTR is
supported in the .td files.

llvm-svn: 55582
 2008-08-31 02:59:23 +00:00
Bill Wendling
5c442aafb6 CellSPU doesn't appear to support fully the "ISD::ROTR" operation. The DAG 
combiner can now generate ROTR if the backend says that it can handle it. Cell
SPU says this, but gets an error from code gen saying that it can't select
ROTR. I'm xfailing this test until this can be fixed.

llvm-svn: 55579
 2008-08-31 02:32:12 +00:00
Evan Cheng
b40b710766 Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer the implicit defs onto the remat'ed instruction. 
llvm-svn: 55564
 2008-08-30 09:09:33 +00:00
Evan Cheng
4bc8c9652e Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case). 
llvm-svn: 55558
 2008-08-30 02:03:58 +00:00
Dale Johannesen
0124a7db51 Testcases for ppc atomics. 
llvm-svn: 55556
 2008-08-30 00:54:31 +00:00
Evan Cheng
c1c53221c5 Swap fp comparison operands and change predicate to allow load folding (safely this time). 
llvm-svn: 55553
 2008-08-29 23:22:12 +00:00
Evan Cheng
79d2a8f97d xfail this. 
llvm-svn: 55550
 2008-08-29 22:59:13 +00:00
Chris Lattner
f24550c9d2 allow this to pass. 
llvm-svn: 55540
 2008-08-29 17:18:26 +00:00
Evan Cheng
cdd06ba3f4 Swap fp comparison operands and change predicate to allow load folding. 
llvm-svn: 55521
 2008-08-28 23:48:31 +00:00
Mon P Wang
7566974359 In lowering SELECT_CC, removed cases where we can't flip the true and false when the compare value has a NaN 
llvm-svn: 55499
 2008-08-28 21:04:05 +00:00
Dan Gohman
35a69c106a Optimize DAGCombiner's worklist processing. Previously it started 
its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.

This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.

llvm-svn: 55498
 2008-08-28 21:01:56 +00:00
Dan Gohman
8f4d612996 Revert r55467; it causes regressions in UnitTests/Vector/divides, 
Benchmarks/sim/sim, and others on x86-64.

llvm-svn: 55475
 2008-08-28 17:22:54 +00:00
Evan Cheng
28b0b18082 If a copy isn't coalesced, but its src is defined by trivial computation. Re-materialize the src to replace the copy. 
llvm-svn: 55467
 2008-08-28 07:53:51 +00:00
Dale Johannesen
ae522b8463 This test crashes on non-x86 host; make SSE explicit. 
Feel free to fix a better way!

llvm-svn: 55456
 2008-08-28 01:51:09 +00:00
Dan Gohman
5e5f1c9e8f Basic FastISel support for floating-point constants. 
llvm-svn: 55401
 2008-08-27 01:09:54 +00:00
Chris Lattner
c5c00890e5 If an xmm register is referenced explicitly in an inline asm, make sure to 
assign it to a version of the xmm register with the regclass that matches its
type.  This fixes PR2715, a bug handling some crazy xpcom case in mozilla.

llvm-svn: 55358
 2008-08-26 06:19:02 +00:00