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Commit Graph

38665 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
76a5a71473 Teach the machine code verifier to use getSubRegisterRegClass().
The old approach was wrong. It had an off-by-one error.

llvm-svn: 104034
2010-05-18 17:31:12 +00:00
Daniel Dunbar
739e720a21 MC/Mach-O: Implement support for setting indirect symbol table offset in section header.
Also, create symbol data for LHS of assignment, to match 'as' symbol ordering better.

llvm-svn: 104033
2010-05-18 17:28:24 +00:00
Daniel Dunbar
9a1bbd9dc5 MC/Mach-O: Remove some FIXMEs.
llvm-svn: 104032
2010-05-18 17:28:20 +00:00
Daniel Dunbar
5ed90337ff MC/Mach-O: Fail faster/harder when we see .file, which isn't yet supported.
llvm-svn: 104031
2010-05-18 17:28:17 +00:00
Daniel Dunbar
8c20c162fe MC/X86: Implement custom lowering to make sure we match things like
X86::ADC32ri $0, %eax
to
  X86::ADC32i32 $0

llvm-svn: 104030
2010-05-18 17:22:24 +00:00
Daniel Dunbar
71107d6099 llc (et al): Add support for --show-encoding and --show-inst.
llvm-svn: 104029
2010-05-18 17:22:19 +00:00
Dan Gohman
393fa6e0a2 Usage of O_NONBLOCK in bjam is now confirmed as a bug and fixed upstream.
Update the comment.

llvm-svn: 104021
2010-05-18 15:25:14 +00:00
Benjamin Kramer
ad350eb789 Simplify MCContext::(Next|Get)Instance
- Allocate MCLabels in the context so they don't leak.
- Avoid duplicated densemap lookup.

llvm-svn: 104020
2010-05-18 12:15:34 +00:00
Evan Cheng
39b5115e93 FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)).
llvm-svn: 104004
2010-05-18 00:03:40 +00:00
Jakob Stoklund Olesen
79b683a9bf ARMBaseRegisterInfo::estimateRSStackSizeLimit() could return prematurely with a
too large limit.

The function would return immediately when finding an addrmode 3/5 instruction.
It needs to keep scanning in case there is an addrmode 6 instruction which drops
the limit to 0.

A test case is very difficult to produce because it will only fail when the
scavenger is used.

rdar://problem/7894847

llvm-svn: 103995
2010-05-17 23:29:23 +00:00
Evan Cheng
8aa900cf16 Fix PR7175. Insert copies of a REG_SEQUENCE source if it is used by other REG_SEQUENCE instructions.
llvm-svn: 103994
2010-05-17 23:24:12 +00:00
Bill Wendling
5a1c9f8d06 - Set the "HasCalls" flag after instruction selection is finished.
- Change the logic DisableFramePointerElim() to check for the
  -disable-non-leaf-fp-elim before -disable-fp-elim.

llvm-svn: 103990
2010-05-17 23:09:50 +00:00
Kevin Enderby
14c986967b Added support in MC for Directional Local Labels.
llvm-svn: 103989
2010-05-17 23:08:19 +00:00
Eric Christopher
6ea9cf8425 More data/parsing support for tls directives. Add a few more testcases
and cleanup comments as well.

llvm-svn: 103985
2010-05-17 22:53:55 +00:00
Evan Cheng
378d6c5d76 Fix PR7156. If the sources of a REG_SEQUENCE are all IMPLICIT_DEF's. Replace it with an IMPLICIT_DEF rather than deleting it or else it would be left without a def.
llvm-svn: 103984
2010-05-17 22:09:49 +00:00
Evan Cheng
330b993ede vmov of immediates are trivially re-materializable.
llvm-svn: 103982
2010-05-17 21:54:50 +00:00
Daniel Dunbar
b18dfe6cb4 MC/Mach-O/x86: Optimal nop sequences should only be used for the .text sections, not all sections in the text segment.
llvm-svn: 103981
2010-05-17 21:54:30 +00:00
Daniel Dunbar
7e141838cd MC: Add dyn_cast support to MCSection.
- Of questionable utility, since in general anything which wants to do this should probably be within a target specific hook, which can rely on the sections being of the appropriate type. However, it can be useful for short term hacks.

llvm-svn: 103980
2010-05-17 21:54:26 +00:00
Daniel Dunbar
ee5ac7a69b MC/Mach-O: Reverse order of SymbolData scanning when emitting instructions.
- This fixes a string table mismatch with 'as' when two new symbols are defined
   in a single instruction.

llvm-svn: 103979
2010-05-17 21:19:59 +00:00
Jakob Stoklund Olesen
7182505241 Pull the UsedInInstr.test() calls into calcSpillCost() and remember aliases.
This fixes the miscompilations of MultiSource/Applications/JM/l{en,de}cod.
Clang now successfully self hosts in a debug build with the fast register allocator.

llvm-svn: 103975
2010-05-17 21:02:08 +00:00
Eric Christopher
380e16a725 Add some section and constant support for darwin TLS.
llvm-svn: 103974
2010-05-17 21:02:07 +00:00
Evan Cheng
bb0a4fbe13 Careful with reg_sequence coalescing to not to overwrite sub-register indices.
llvm-svn: 103971
2010-05-17 20:57:12 +00:00
Bob Wilson
a748ca62cc Fix a regression in 464.h264 for thumb1 and thumb2 nightly tests.
Obvious in retrospect but not fun to debug.

llvm-svn: 103969
2010-05-17 20:31:13 +00:00
Daniel Dunbar
80719b2d36 MC/Mach-O: Fix some differences in symbol flag handling.
- Don't clear weak reference flag, 'as' was only "trying" to do this, it wasn't
   actually succeeding.
 - Clear the "lazy bound" bit when we mark something external. This corresponds
   roughly to the lazy clearing of the bit that 'as' implements in
   symbol_table_lookup.
 - The exact meaning of these flags appears pretty loose, since 'as' isn't very
   consistent. For now we just try to match 'as', we will clean this up one day
   hopefully.

llvm-svn: 103964
2010-05-17 20:12:31 +00:00
Jakob Stoklund Olesen
7fdbac6a38 Remove debug option. Add comment on spill order determinism.
llvm-svn: 103961
2010-05-17 20:01:22 +00:00
Evan Cheng
3bce87c79f Turn on -neon-reg-sequence by default.
Using NEON load / store multiple instructions will no longer create gobs of vmov of D registers!

llvm-svn: 103960
2010-05-17 19:51:20 +00:00
Daniel Dunbar
8f5da3624f llvm-mc: Support reassignment of variables in one special case, when the
variable has not yet been used in an expression. This allows us to support a few
cases that show up in real code (mostly because gcc generates it for Objective-C
on Darwin), without giving up a reasonable semantic model for assignment.

llvm-svn: 103950
2010-05-17 17:46:23 +00:00
Jakob Stoklund Olesen
c07fd51d56 Avoid allocating the same physreg to multiple virtregs in one instruction.
While that approach works wonders for register pressure, it tends to break
everything.

This should unbreak the arm-linux builder and fix a number of miscompilations.

llvm-svn: 103946
2010-05-17 17:18:59 +00:00
Jakob Stoklund Olesen
c97d3f5b78 Minor optimizations. DenseMap::begin() is surprisingly slow on an empty map.
llvm-svn: 103940
2010-05-17 15:30:37 +00:00
Jakob Stoklund Olesen
a9f77dbb8f Extract spill cost calculation to a new method, and use definePhysReg() to clear
out aliases when allocating. Clean up allocVirtReg().

Use calcSpillCost() to allow more aggressive hinting. Now the hint is always
taken unless blocked by a reserved register. This leads to more coalescing,
lower register pressure, and less spilling.

llvm-svn: 103939
2010-05-17 15:30:32 +00:00
Zhongxing Xu
a44f4d62bc Remove unused member variable.
llvm-svn: 103936
2010-05-17 09:47:55 +00:00
Jakob Stoklund Olesen
40545bf117 Only use clairvoyance when defining a register, and then only if it has one use.
This makes allocation independent on the ordering of use-def chains.

llvm-svn: 103935
2010-05-17 04:50:57 +00:00
Jakob Stoklund Olesen
f7bef21e58 Eliminate a hash table probe when killing virtual registers.
llvm-svn: 103934
2010-05-17 03:26:09 +00:00
Jakob Stoklund Olesen
ab401cc7c3 Execute virtreg kills immediately instead of after processing all uses.
This is safe to do because the physreg has been marked UsedInInstr and the kill flag will be set on the last operand using the virtreg if there are more then one.

llvm-svn: 103933
2010-05-17 03:26:06 +00:00
Jakob Stoklund Olesen
f00cf55938 Sprinkle superregister <imp-def> and <imp-kill> operands when dealing with subregister indices.
llvm-svn: 103931
2010-05-17 02:49:21 +00:00
Jakob Stoklund Olesen
f9bfd996b3 Now that we don't keep live registers across calls, there is not reason to go
through the very long list of call-clobbered registers. We just assume all
registers are clobbered.

llvm-svn: 103930
2010-05-17 02:49:18 +00:00
Jakob Stoklund Olesen
39dbedba34 Boldly attempt consistent capitalization. Functional changes unintended.
llvm-svn: 103929
2010-05-17 02:49:15 +00:00
Eric Christopher
950f0d7892 Assume that we'll handle mangling the symbols earlier and just put the
symbol to the file as we have it.  Simplifies out tbss handling.

llvm-svn: 103928
2010-05-17 02:13:02 +00:00
Jakob Stoklund Olesen
cfae258409 Spill and kill all virtual registers across a call.
Debug code doesn't use callee saved registers anyway, and the code is simpler this way. Now spillVirtReg always kills, and the isKill parameter is not needed.

llvm-svn: 103927
2010-05-17 02:07:32 +00:00
Jakob Stoklund Olesen
ef65f26906 Reduce hashtable probes by using DenseMap::insert() for lookup.
llvm-svn: 103926
2010-05-17 02:07:29 +00:00
Jakob Stoklund Olesen
f5593b76bc Make MBB a class member instead of passing it around everywhere.
llvm-svn: 103925
2010-05-17 02:07:22 +00:00
Evan Cheng
e4766e6bda Yes, if the redef is a copy, update the old val# with the copy. But make sure to clear the copy field if the redef is not a copy.
llvm-svn: 103922
2010-05-17 01:47:47 +00:00
Evan Cheng
142431a069 No reason not to run the NEON domain croassing fix up pass in thumb2 mode.
llvm-svn: 103917
2010-05-17 01:11:46 +00:00
Dale Johannesen
cf2d4b9f91 Revert 103911; it broke a test that expects bitconvert
<1xi64> -> i64 to work in MMX registers on hosts where -no-sse
is the default (not mine).  The right thing is
to accept this and make i64->f64 conversions go through memory,
but I don't have time right now.

llvm-svn: 103914
2010-05-16 20:19:04 +00:00
Dale Johannesen
15dce10b5a Make x86-64 64-bit bitconvert work when SSE is not available.
(This worked as of about 6 months ago and I didn't track down
exactly what broke it; I think this fix is appropriate.)

llvm-svn: 103911
2010-05-16 18:22:38 +00:00
Anton Korobeynikov
a63555c10d Chris said that the comment char should be escaped. Fix all the occurences of "@" in *.td
llvm-svn: 103903
2010-05-16 09:15:36 +00:00
Anton Korobeynikov
925a32ae37 Add support for thiscall calling convention.
Patch by Charles Davis and Steven Watanabe!

llvm-svn: 103902
2010-05-16 09:08:45 +00:00
Anton Korobeynikov
a80267a946 Generalize the ARM DAG combiner of mul with constants to all power-of-two cases.
llvm-svn: 103901
2010-05-16 08:54:20 +00:00
Evan Cheng
7facc1504a Model vst lane instructions with REG_SEQUENCE.
llvm-svn: 103898
2010-05-16 03:27:48 +00:00
Dale Johannesen
82dfdcdde7 Fix uint64->{float, double} conversion to do rounding correctly in 32-bit.
The implementation in LegalizeIntegerTypes to handle this as 
sint64->float + appropriate power of 2 is subject to double rounding,
considered incorrect by numerics people.  Use this implementation only
when it is safe.  This leads to using library calls in some cases
that produced inline code before, but it's correct now.
(EVTToAPFloatSemantics belongs somewhere else, any suggestions?)

Add a correctly rounding (though not particularly fast) conversion
that uses X87 80-bit computations for x86-32.

7885399, 5901940.  This shows up in gcc.c-torture/execute/ieee/rbug.c
in the gcc testsuite on some platforms.

llvm-svn: 103883
2010-05-15 18:51:12 +00:00
Dale Johannesen
d093363ea5 Improve assertion messages.
llvm-svn: 103882
2010-05-15 18:38:02 +00:00
Anton Korobeynikov
314ccc5501 Some cheap DAG combine goodness for multiplication with a particular constant.
This can be extended later on to handle more "complex" constants.

llvm-svn: 103881
2010-05-15 18:16:59 +00:00
Anton Korobeynikov
4f8b48d8c6 "trap" pseudo-op turned out to be apple-local.
Temporary emit it as raw bytes until it will be added to binutils as well.

llvm-svn: 103878
2010-05-15 17:19:20 +00:00
Chris Lattner
a1f4042939 improve portability to systems that don't have round, patch by
Evzen Muller!

llvm-svn: 103877
2010-05-15 17:11:55 +00:00
Chris Lattner
6e63336eb4 improve portability to systems that don't have powf/modf (e.g. solaris 9)
patch by Evzen Muller!

llvm-svn: 103876
2010-05-15 17:10:24 +00:00
Chandler Carruth
8aee521671 Fix an GCC warning that seems to have actually caught a bug (!!!) in
a condition's grouping. Every other use of Allocatable.test(Hint) groups it the
same way as it is indented, so move the parentheses to agree with that
grouping.

llvm-svn: 103869
2010-05-15 10:23:23 +00:00
Evan Cheng
9301a88cbb Model 128-bit vld lane with REG_SEQUENCE.
llvm-svn: 103868
2010-05-15 07:53:37 +00:00
Jakob Stoklund Olesen
671a452627 Calculate liveness on the fly for local registers.
When working top-down in a basic block, substituting physregs for virtregs, the use-def chains are kept up to date. That means we can recognize a virtreg kill by the use-def chain becoming empty.

This makes the fast allocator independent of incoming kill flags.

llvm-svn: 103866
2010-05-15 06:09:08 +00:00
Nick Lewycky
9c2a75e5e3 Teach the always inliner to release its inline cost estimates, like the basic
inliner did in r103653. Why does the always inliner even bother with cost
estimates anyways?

llvm-svn: 103858
2010-05-15 04:26:25 +00:00
Nick Lewycky
f9d7cb5fb2 Clean up, no functional change.
llvm-svn: 103857
2010-05-15 03:41:58 +00:00
Evan Cheng
16f27a70ef v4i64 and v8i64 are only synthesizable when NEON is available.
llvm-svn: 103855
2010-05-15 02:20:21 +00:00
Evan Cheng
85497bd415 Allow TargetLowering::getRegClassFor() to be called on illegal types. Also
allow target to override it in order to map register classes to illegal
but synthesizable types. e.g. v4i64, v8i64 for ARM / NEON.

llvm-svn: 103854
2010-05-15 02:18:07 +00:00
Evan Cheng
db2c1543c8 Model 64-bit lane vld with REG_SEQUENCE.
llvm-svn: 103851
2010-05-15 01:36:29 +00:00
Evan Cheng
d95a4505dc A partial re-def instruction may be a copy.
llvm-svn: 103850
2010-05-15 01:35:44 +00:00
Evan Cheng
0a651c3314 Teach two-address pass to do some coalescing while eliminating REG_SEQUENCE
instructions.

e.g.
%reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0
%reg1027<def> = EXTRACT_SUBREG %reg1026, 6
%reg1028<def> = EXTRACT_SUBREG %reg1026<kill>, 5
...
%reg1029<def> = REG_SEQUENCE %reg1028<kill>, 5, %reg1027<kill>, 6, %reg1028, 7, %reg1027, 8, %reg1028, 9, %reg1027, 10, %reg1030<kill>, 11, %reg1032<kill>, 12

After REG_SEQUENCE is eliminated, we are left with:

%reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0
%reg1029:6<def> = EXTRACT_SUBREG %reg1026, 6
%reg1029:5<def> = EXTRACT_SUBREG %reg1026<kill>, 5

The regular coalescer will not be able to coalesce reg1026 and reg1029 because it doesn't
know how to combine sub-register indices 5 and 6. Now 2-address pass will consult the
target whether sub-registers 5 and 6 of reg1026 can be combined to into a larger
sub-register (or combined to be reg1026 itself as is the case here). If it is possible, 
it will be able to replace references of reg1026 with reg1029 + the larger sub-register
index.

llvm-svn: 103835
2010-05-14 23:21:14 +00:00
Evan Cheng
ba77bacf48 Model VST*_UPD and VST*oddUPD pair with REG_SEQUENCE.
llvm-svn: 103833
2010-05-14 22:54:52 +00:00
Dan Gohman
4049434a04 Fast ISel trivially coalesces away no-op casts, so check for this when
setting kill flags.

llvm-svn: 103832
2010-05-14 22:53:18 +00:00
Jakob Stoklund Olesen
7a16481068 Don't bother spilling before a return
llvm-svn: 103831
2010-05-14 22:40:43 +00:00
Jakob Stoklund Olesen
ed0d357e27 RegAllocLocal can count copies too
llvm-svn: 103830
2010-05-14 22:40:40 +00:00
Bill Wendling
5fde821884 SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and
replace the check with the appropriate predicate. Modify the testcase to reflect
the correct code. (It should be saving callee-saved registers on the stack
allocated by the calling fuction.)

llvm-svn: 103829
2010-05-14 22:17:42 +00:00
Jakob Stoklund Olesen
21bd5b7fbb Track allocatable instead of reserved regs, and never take an unallocatable hint.
llvm-svn: 103828
2010-05-14 22:02:56 +00:00
Dan Gohman
97d22ade75 Don't set kill flags for instructions which the scheduler has cloned.
llvm-svn: 103827
2010-05-14 22:01:14 +00:00
Dan Gohman
8a798dcca9 BR is a barrier.
llvm-svn: 103826
2010-05-14 22:00:27 +00:00
Bill Wendling
8a2afec7c1 Several tail call tests apparently rely upon this being "adjusts stack" instead
of "has calls". That's probably wrong, but it needs further
investigation. Revert to the original behavior until this is settled.

llvm-svn: 103824
2010-05-14 21:58:35 +00:00
Jakob Stoklund Olesen
295d11f215 Avoid scanning the long tail of physreg operands on calls
llvm-svn: 103823
2010-05-14 21:55:52 +00:00
Devang Patel
e54dbcd4bf Do not forget to mark prcessed arguments.
llvm-svn: 103822
2010-05-14 21:55:50 +00:00
Jakob Stoklund Olesen
83d4c31c0b Count coalesced copies
llvm-svn: 103821
2010-05-14 21:55:50 +00:00
Jakob Stoklund Olesen
89a21b1cc3 Allow virtreg redefines when verifying for RegAllocFast
llvm-svn: 103820
2010-05-14 21:55:44 +00:00
Bill Wendling
d5fb80cbf4 This should happen if there are no calls, not if it just doesn't adjust the
stack.

llvm-svn: 103813
2010-05-14 21:38:44 +00:00
Bill Wendling
adcbee9547 Revert r103804. The comment is correct.
llvm-svn: 103808
2010-05-14 21:28:24 +00:00
Jim Grosbach
869f73322d Remove trailing whitespace
llvm-svn: 103807
2010-05-14 21:20:46 +00:00
Jim Grosbach
f15a56edfc 80 column and trailing whitespace cleanup
llvm-svn: 103806
2010-05-14 21:19:48 +00:00
Jim Grosbach
7a50cfb682 add cmd line option to leave dbgvalues in during post-RA sceduling. Useful
while debugging what's mishandled about them in the post-RA pass.

llvm-svn: 103805
2010-05-14 21:18:04 +00:00
Bill Wendling
b2c38c02ea Fix comment.
llvm-svn: 103804
2010-05-14 21:17:29 +00:00
Bill Wendling
e346a38ed4 Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
the variable actually tracks.

N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.

llvm-svn: 103802
2010-05-14 21:14:32 +00:00
Dan Gohman
6517cc1dd9 Lowering of atomic instructions can result in operands being
used more than once. If ISel had put a kill flag on one of them,
it's not valid to transfer the kill flag to each new instance.

llvm-svn: 103799
2010-05-14 21:01:44 +00:00
Devang Patel
2b99c27e47 Add support to preserve type info for the variables that are removed by the optimizer.
llvm-svn: 103798
2010-05-14 21:01:35 +00:00
Jakob Stoklund Olesen
4715605740 When verifying two-address instructions, check the following:
- Kill is implicit when use and def registers are identical.
- Only virtual registers can differ.

Add a -verify-fast-regalloc to run the verifier before the fast allocator.

llvm-svn: 103797
2010-05-14 20:28:32 +00:00
Kevin Enderby
dc13d89540 Fix so "int3" is correctly accepted, added "into" and fixed "int" with an
argument, like "int $4", to not get an Assertion error.

llvm-svn: 103791
2010-05-14 19:16:02 +00:00
Evan Cheng
ab9e0f7315 Model VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE.
llvm-svn: 103790
2010-05-14 18:54:59 +00:00
Daniel Dunbar
89a1d9036a MC/Mach-O/x86_64: Darwin's special "signed_N" relocation types should only be
used to replace a normal relocation, not a reference to a GOT entry.

llvm-svn: 103789
2010-05-14 18:53:40 +00:00
Jakob Stoklund Olesen
3eac02b22f Simplify the handling of physreg defs and uses in RegAllocFast.
This adds extra security against using clobbered physregs, and it adds kill
markers to physreg uses.

llvm-svn: 103784
2010-05-14 18:03:25 +00:00
Dan Gohman
dc05cdd475 Set isTerminator on TRAP instructions.
llvm-svn: 103778
2010-05-14 16:46:02 +00:00
Dan Gohman
c0438974b2 Don't use isBarrier for the PowerPC sync instruction. isBarrier is for
control barriers, not memory ordering barriers.

llvm-svn: 103777
2010-05-14 16:42:16 +00:00
Dan Gohman
b0f18b9c6c Add mayLoad and mayStore flags to instructions which missed them.
llvm-svn: 103776
2010-05-14 16:34:55 +00:00
Daniel Dunbar
3c261b3ff8 XFAIL the test I added with vg_leak, apparently it is the first and only llc
-filetype=obj test, and -filetype=obj leaks a few objects. Added a FIXME, we
need to sort out the ownership model for the various MC objects.

llvm-svn: 103769
2010-05-14 07:47:51 +00:00
Daniel Dunbar
26fa01eb86 Inline Asm: Ensure buffer is newline terminated to match how the text is printed.
- This is a hack, but I can't decide the best place to handle this. Chris?

llvm-svn: 103765
2010-05-14 04:31:50 +00:00
Jakob Stoklund Olesen
892983155c Enable opportunistic coalescing
llvm-svn: 103764
2010-05-14 04:30:51 +00:00
Evan Cheng
2af2c9fa14 Added a QQQQ register file to model 4-consecutive Q registers.
llvm-svn: 103760
2010-05-14 02:13:41 +00:00
Eric Christopher
ebea91f168 Add AsmParser support for darwin tbss directive.
Nothing uses this yet.

llvm-svn: 103757
2010-05-14 01:50:28 +00:00
Eric Christopher
0b3085ae2e Fix a couple of typos.
llvm-svn: 103756
2010-05-14 01:38:54 +00:00
Daniel Dunbar
7fee3c7b28 MC: Switch to completely lazy layout.
- The eliminates the last major algorithmic problem with MC.

llvm-svn: 103754
2010-05-14 00:51:14 +00:00
Daniel Dunbar
66c2ccec2d MC: Extend MCAsmLayout to explicitly track which fragments have been layed out, and enforce several invariants to LayoutFragment to ensure we only do layout in a sensible order.
llvm-svn: 103753
2010-05-14 00:37:21 +00:00
Daniel Dunbar
bfc0b2083d MC: Implicitly assign section addresses when the previous fragment is layed out.
llvm-svn: 103752
2010-05-14 00:37:17 +00:00
Daniel Dunbar
11467b2eaa MC: Switch MCFragment to storing the layout order index, not its index in the file.
llvm-svn: 103751
2010-05-14 00:37:14 +00:00
Daniel Dunbar
b2a98e0a16 MC: Change LayoutSection() to only do the section initializiation.
Also, elimminate MCAsmLayout::set*, which are no longer needed.

llvm-svn: 103750
2010-05-14 00:37:11 +00:00
Evan Cheng
d1f60c198d Fix comments.
llvm-svn: 103749
2010-05-14 00:21:45 +00:00
Jakob Stoklund Olesen
f913d9f2b8 Trust kill flags from isel and later passes.
llvm-svn: 103748
2010-05-14 00:02:23 +00:00
Jakob Stoklund Olesen
aa38789fd4 Fix an embarrassing runtime regression for RegAllocFast.
This loop is quadratic in the capacity for a DenseMap:

  while(!map.empty())
    map.erase(map.begin());

Instead we now do a normal begin() - end() iteration followed by map.clear().
That also has the nice sideeffect of shrinking the map capacity on demand.

llvm-svn: 103747
2010-05-14 00:02:20 +00:00
Evan Cheng
775549c9e7 Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.
llvm-svn: 103746
2010-05-13 23:55:47 +00:00
Dale Johannesen
9f19b6a761 Implement a correct ui64->f32 conversion. The old
one was subject to double rounding in extreme cases.

llvm-svn: 103744
2010-05-13 23:50:42 +00:00
Jakob Stoklund Olesen
b698dfd8c7 Clean up RegAllocFast debug output
llvm-svn: 103739
2010-05-13 20:43:17 +00:00
Daniel Dunbar
86825a9719 MC: Move Layout{Fragment,Section} into MCAsmLayout, and add LayoutFile().
llvm-svn: 103738
2010-05-13 20:40:12 +00:00
Dan Gohman
33e9c347bf Teach MachineLICM and MachineSink how to clear kill flags conservatively
when they move instructions.

llvm-svn: 103737
2010-05-13 20:34:42 +00:00
Evan Cheng
a36135d02f Add comment about the pseudo registers QQ, each of which is a pair of Q registers.
llvm-svn: 103731
2010-05-13 20:02:08 +00:00
Bob Wilson
eaa62c4861 Fix pr7110: For non-Darwin targets UnspilledCS1GPRs may include high registers.
Do not use those for Thumb1 functions.

llvm-svn: 103730
2010-05-13 19:58:24 +00:00
Oscar Fuentes
7712b9a40b CMake: fixes 64 bit Visual Studio IDE build. Fixes bug 4936.
Patch by Dimitry Andric!

llvm-svn: 103727
2010-05-13 19:34:06 +00:00
Dan Gohman
223379b3a9 Add a utility function for conservatively clearing kill flags, and make
use of it in MachineCSE.

llvm-svn: 103726
2010-05-13 19:24:00 +00:00
Dan Gohman
d7b4c5b82e An Instruction has a trivial kill only if its use is in the same
basic block.

llvm-svn: 103725
2010-05-13 19:19:32 +00:00
Daniel Dunbar
b142c00db4 MC: Factor out MCAssembler::ComputeFragmentSize.
llvm-svn: 103724
2010-05-13 18:35:06 +00:00
Daniel Dunbar
5a601f9e09 MC: Add section layout order indices to MCSectionData.
llvm-svn: 103715
2010-05-13 15:17:26 +00:00
Daniel Dunbar
aa67ae072c MC: Move ordinal calculation, to make sure fragments synthesized for layout get assigned ordinals properly.
llvm-svn: 103711
2010-05-13 08:43:37 +00:00
Daniel Dunbar
e72ef430f7 MC: Create dummy fragments to avoid ever having empty sections, which simplifies layout.
llvm-svn: 103710
2010-05-13 08:43:34 +00:00
Daniel Dunbar
5ef1bcbb97 MC: Add MCAsmLayout::FragmentReplaced() helper function.
llvm-svn: 103709
2010-05-13 08:43:31 +00:00
Anton Korobeynikov
fa0c92ab6c Properly set thread-local flag on globals during cpp emission
llvm-svn: 103702
2010-05-13 07:41:57 +00:00
Nick Lewycky
e343761a2a Remove heinous tabs.
llvm-svn: 103700
2010-05-13 06:45:13 +00:00
Nick Lewycky
4cb49bc5a4 Replace the core comparison login in merge functions. We can now merge
vector<>::push_back() in:

  int foo(vector<int> &a, vector<unsigned> &b) {
    a.push_back(10);
    b.push_back(11);
  }

to two calls to the same push_back function, or fold away the two copies of
push_back() in:

  struct T { int; };
  struct S { char; };
  vector<T*> t;
  vector<S*> s;
  void f(T *x) { t.push_back(x); }
  void g(S *x) { s.push_back(x); }

but leave f() and g() separate, since they refer to two different global
variables.

llvm-svn: 103698
2010-05-13 05:48:45 +00:00
Daniel Dunbar
5759287db9 Fix -Asserts warning.
llvm-svn: 103697
2010-05-13 03:50:50 +00:00
Daniel Dunbar
561f55c1af MC: Eliminate MCSectionData::{,Address,File}Size, which can now be computed by
utility functions.

llvm-svn: 103695
2010-05-13 03:19:50 +00:00
Daniel Dunbar
03bd9216df Fix -Asserts warning.
llvm-svn: 103694
2010-05-13 03:19:36 +00:00
Daniel Dunbar
a81966a973 MC: Switch to using explicit MCAlignFragments with OnlyAlignAddress bit instead
of manually doing padding/editing layout in LayoutSection().
    - This probably seems like six-of-one and half-dozen of another, but there
      is a method to my madness.

llvm-svn: 103693
2010-05-13 02:34:14 +00:00
Evan Cheng
8d516e4c3e Bring back VLD1q and VST1q and use them for reloading / spilling Q registers. This allows folding loads and stores into VMOVQ.
llvm-svn: 103692
2010-05-13 01:12:06 +00:00
Daniel Dunbar
3fc379596a MC: Add MCAlignFragment::OnlyAlignAddress bit. This is a bit of magic that says the align fragment shouldn't contribute to the logical section size, it is will be used for cleaning up the code to handle section alignment.
llvm-svn: 103690
2010-05-13 01:10:26 +00:00
Daniel Dunbar
ec3a2ac5ed MC: Add MCSectionData::AddressSize, which is the size of the address space consumed by the section. This can differ from both the section logical size, and the section size on disk (although the current code handles this without making an explicit distinction).
llvm-svn: 103689
2010-05-13 01:10:22 +00:00
Jakob Stoklund Olesen
d99818256c Take allocation hints from copy instructions to/from physregs.
This causes way more identity copies to be generated, ripe for coalescing.

llvm-svn: 103686
2010-05-13 00:19:43 +00:00
Jakob Stoklund Olesen
69f3ae8789 More asserts around physreg uses
llvm-svn: 103685
2010-05-13 00:19:39 +00:00
Evan Cheng
d43aee655d Expand VMOVQQ into a pair of VMOVQ.
llvm-svn: 103684
2010-05-13 00:17:02 +00:00
Evan Cheng
533ffa237e Mark some pattern-less instructions as neverHasSideEffects.
llvm-svn: 103683
2010-05-13 00:16:46 +00:00
Chris Lattner
ca57d80f83 fix rdar://7965971 and a fixme: use ParseIdentifier in
ParseDirectiveDarwinZerofill instead of hard coding the
check for identifier. This allows quoted symbol names to
be used.

llvm-svn: 103682
2010-05-13 00:10:34 +00:00
Chris Lattner
887e8f9f53 reapply r103668 with a fix. Never make "minor syntax changes"
after testing before committing.

llvm-svn: 103681
2010-05-13 00:02:47 +00:00
Evan Cheng
791573787a If REG_SEQUENCE source is livein, copy it first. Also, update livevariables information when a copy is introduced.
llvm-svn: 103680
2010-05-13 00:00:35 +00:00
Evan Cheng
8134a2e87b Do not attempt copy coalescing if the source and dest sub-register indices do not match.
llvm-svn: 103679
2010-05-12 23:59:42 +00:00
Chris Lattner
361c115f23 revert r103668 for now, it is apparently breaking things.
llvm-svn: 103677
2010-05-12 23:40:59 +00:00
Chris Lattner
91a836a9c7 moffset forms of moves are x86-32 only, make the parser
lower them to the correct x86-64 instructions since we 
don't have a clean way to handle this in td files yet.
rdar://7947184

llvm-svn: 103668
2010-05-12 23:13:36 +00:00
Evan Cheng
aef4fc8804 Fix some potential issues in the pseudo instruction expansion phase: copy implicit operands and memoperands. Also, expand instructions even if their defs are "dead" since they may have implicit kill operands.
llvm-svn: 103667
2010-05-12 23:13:12 +00:00
Daniel Dunbar
de7caed021 MC: Move MCAlignFragment::EmitNops value out of the constructor.
llvm-svn: 103665
2010-05-12 22:56:23 +00:00
Daniel Dunbar
cf11e2a0a5 MC: Eliminate MCZeroFillFragment, it is no longer needed.
llvm-svn: 103664
2010-05-12 22:51:38 +00:00
Daniel Dunbar
0040c2c393 MC: Explicitly check that only virtual fragments appear in virtual sections.
llvm-svn: 103663
2010-05-12 22:51:35 +00:00
Daniel Dunbar
08bcc3a6fc MC: Switch MCFillFragment to storing total fill size instead of a count. This allows using ValueSize==0 to represent a virtual fill.
llvm-svn: 103662
2010-05-12 22:51:32 +00:00
Daniel Dunbar
d3f60794d8 MC: Drop support for alignment in ZeroFill fragment, we can just use
MCAlignFragments for this.

llvm-svn: 103661
2010-05-12 22:51:27 +00:00