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710 Commits

Author SHA1 Message Date
Colin LeMahieu
59d3eac138 [Hexagon] Adding missing vector multiply instruction encodings. Converting multiply intrinsics and updating tests. 
llvm-svn: 228010
 2015-02-03 19:15:11 +00:00
Colin LeMahieu
530baa45f7 [Hexagon] Converting complex number intrinsics and adding tests. 
llvm-svn: 227995
 2015-02-03 18:16:28 +00:00
Colin LeMahieu
ed25cb4221 [Hexagon] Adding vector intrinsics for alu32/alu and xtype/alu. 
llvm-svn: 227993
 2015-02-03 18:01:45 +00:00
Eric Christopher
cc62f1ae1b Only access TLOF via the TargetMachine, not TargetLowering. 
llvm-svn: 227949
 2015-02-03 07:22:52 +00:00
Eric Christopher
a26193de86 Define a runOnMachineFunction for the Hexagon AsmPrinter and 
use it to initialize the subtarget.

llvm-svn: 227948
 2015-02-03 06:40:22 +00:00
Eric Christopher
feb4ffa8ee Use the cached subtarget on the MachineFunction. 
llvm-svn: 227885
 2015-02-02 22:40:56 +00:00
Eric Christopher
0224cb6674 Remove dead header. 
llvm-svn: 227884
 2015-02-02 22:40:54 +00:00
Eric Christopher
a3a294848d Remove dead code in the HexagonMCInst classes. This also fixes 
a layering violation in the port and removes calls to getSubtargetImpl.

llvm-svn: 227883
 2015-02-02 22:40:53 +00:00
Eric Christopher
bfcc1f0544 80-col fixup. 
llvm-svn: 227882
 2015-02-02 22:40:51 +00:00
Eric Christopher
da02fbafc4 Remove dead code in the HexagonMCInst classes. This also fixes 
a layering violation in the port and removes calls to getSubtargetImpl.

llvm-svn: 227880
 2015-02-02 22:28:48 +00:00
Eric Christopher
922293f3ca 80-col fixup. 
llvm-svn: 227879
 2015-02-02 22:28:46 +00:00
Eric Christopher
cddc0aa5d2 Remove unused class variables and update all callers/uses from 
the HexagonSplitTFRCondSet pass. Use the subtarget off the machine
function at the same time.

llvm-svn: 227878
 2015-02-02 22:28:44 +00:00
Eric Christopher
3e95522a4f Migrate the HexagonSplitConst32AndConst64 pass from TargetMachine 
based getSubtarget to the one cached on the MachineFunction.
Remove unused class variables and update all callers/uses.

llvm-svn: 227874
 2015-02-02 22:11:43 +00:00
Eric Christopher
9e0beab8b0 Remove #if'd code and update comment. 
llvm-svn: 227873
 2015-02-02 22:11:42 +00:00
Eric Christopher
3ccabc821b Move HexagonMachineScheduler to use the subtarget off of the 
MachineFunction and update all uses accordingly including
VLIWResourceModel.

llvm-svn: 227872
 2015-02-02 22:11:40 +00:00
Eric Christopher
3ce7338e3c Cache and use the subtarget that owns the target lowering. 
llvm-svn: 227871
 2015-02-02 22:11:36 +00:00
Eric Christopher
5cb620ce06 Migrate HexagonISelDAGToDAG to setting a subtarget pointer during 
runOnMachineFunction. Update all uses of the Subtarget accordingly.

llvm-svn: 227840
 2015-02-02 19:22:03 +00:00
Eric Christopher
eabd2452d1 Use the getSubtarget call off of the MachineFunction rather than 
the TargetMachine.

llvm-svn: 227839
 2015-02-02 19:22:01 +00:00
Eric Christopher
fa6d0be9d4 Remove unused class variables and update calls to get the subtarget 
off of the machine function.

llvm-svn: 227837
 2015-02-02 19:05:28 +00:00
Eric Christopher
1a48904da5 Sink queries into asserts since the variable is unused otherwise. 
llvm-svn: 227836
 2015-02-02 18:58:24 +00:00
Eric Christopher
5120f67861 Update CMake build for removed files. 
llvm-svn: 227834
 2015-02-02 18:52:49 +00:00
Eric Christopher
815e721ecd Get TargetRegisterInfo and TargetInstrInfo off of the MachineFunction 
and remove unnecessary class variables.

llvm-svn: 227832
 2015-02-02 18:46:31 +00:00
Eric Christopher
5e75c7a7c4 Use the function template getSubtarget to remove an explicit cast. 
llvm-svn: 227831
 2015-02-02 18:46:29 +00:00
Eric Christopher
201e4d3e21 Grab TargetInstrInfo off of the MachineFunction and remove 
unnecessary class variables.

llvm-svn: 227830
 2015-02-02 18:46:27 +00:00
Eric Christopher
ef475ed72a Remove unused files. 
llvm-svn: 227829
 2015-02-02 18:46:23 +00:00
Colin LeMahieu
e39bce1b3f [Hexagon] Adding vector shift instructions and tests. 
llvm-svn: 227619
 2015-01-30 21:58:46 +00:00
Colin LeMahieu
4316877029 [Hexagon] Adding vector predicate instructions. 
llvm-svn: 227613
 2015-01-30 21:24:06 +00:00
Colin LeMahieu
ee3ca03932 [Hexagon] Adding vector permutation instructions and tests. 
llvm-svn: 227612
 2015-01-30 21:14:00 +00:00
Colin LeMahieu
f8c65e69e9 [Hexagon] Adding vector multiplies. Cleaning up tests. 
llvm-svn: 227609
 2015-01-30 20:56:54 +00:00
Colin LeMahieu
113a9cf539 [Hexagon] Adding XTYPE/COMPLEX instructions and cleaning up tests. 
llvm-svn: 227607
 2015-01-30 20:08:37 +00:00
Colin LeMahieu
de5c154423 [Hexagon] Adding XTYPE/ALU vector instructions. Organizing test files. 
llvm-svn: 227598
 2015-01-30 19:13:26 +00:00
Colin LeMahieu
9b74e87575 [Hexagon] Adding a number of vector load variants and organizing tests. 
llvm-svn: 227588
 2015-01-30 18:09:44 +00:00
Colin LeMahieu
54b41eed7b [Hexagon] Organizing tests and adding a few missing jump instruction encodings. 
llvm-svn: 227498
 2015-01-29 21:47:15 +00:00
Colin LeMahieu
13519e2bd4 [Hexagon] Adding missing instruction encodings and tests. 
llvm-svn: 227495
 2015-01-29 21:30:22 +00:00
Colin LeMahieu
d1253ac69a [Hexagon] Adding alu vector instructions 
llvm-svn: 227493
 2015-01-29 21:09:30 +00:00
Rafael Espindola
16f3006ec0 Compute the ELF SectionKind from the flags. 
Any code creating an MCSectionELF knows ELF and already provides the flags.

SectionKind is an abstraction used by common code that uses a plain
MCSection.

Use the flags to compute the SectionKind. This removes a lot of
guessing and boilerplate from the MCSectionELF construction.

llvm-svn: 227476
 2015-01-29 17:33:21 +00:00
Colin LeMahieu
60586de39c [Hexagon] Deleting old variants of intrinsics and adding missing tests. 
llvm-svn: 227474
 2015-01-29 17:26:56 +00:00
Colin LeMahieu
f319d92955 [Hexagon] Adding CR intrinsic tests. 
llvm-svn: 227463
 2015-01-29 16:55:37 +00:00
Colin LeMahieu
28811bcf4c [Hexagon] Deleting unused classes. 
llvm-svn: 227460
 2015-01-29 16:35:38 +00:00
Colin LeMahieu
332a5243a2 [Hexagon] Adding XTYPE/PRED intrinsic tests. Converting predicate types to i32 instead of i1. 
llvm-svn: 227457
 2015-01-29 16:08:43 +00:00
Colin LeMahieu
f323a70677 [Hexagon] Updating several V5 intrinsics and adding FP tests. 
llvm-svn: 227379
 2015-01-28 22:08:16 +00:00
Colin LeMahieu
e461a384f0 [Hexagon] Updating many V4 intrinsic patterns. Adding missing instruction and deleting unused classes. 
llvm-svn: 227353
 2015-01-28 19:39:09 +00:00
Colin LeMahieu
629196ef3e [Hexagon] Adding XTYPE/MPY intrinsic tests and some missing multiply instructions. 
llvm-svn: 227347
 2015-01-28 19:16:17 +00:00
Colin LeMahieu
159f2e1618 [Hexagon] Deleting a lot of old variants of intrinsics and updating references. 
llvm-svn: 227338
 2015-01-28 18:29:11 +00:00
Colin LeMahieu
123b7d1e5a [Hexagon] Converting XTYPE/BIT intrinsic patterns and adding tests. 
llvm-svn: 227335
 2015-01-28 18:06:23 +00:00
Colin LeMahieu
13e9276fa8 [Hexagon] Replacing XTYPE/SHIFT intrinsic patternss. Adding tests and missing instructions with tests. 
llvm-svn: 227330
 2015-01-28 17:37:59 +00:00
Colin LeMahieu
d39a45731a [Hexagon] Replacing intrinsics for halfword adds and max/min word/dword. 
llvm-svn: 227322
 2015-01-28 17:06:40 +00:00
Chandler Carruth
2835bf79f7 [LPM] Stop using the string based preservation API. It is an 
abomination.

For starters, this API is incredibly slow. In order to lookup the name
of a pass it must take a memory fence to acquire a pointer to the
managed static pass registry, and then potentially acquire locks while
it consults this registry for information about what passes exist by
that name. This stops the world of LLVMs in your process no matter
how little they cared about the result.

To make this more joyful, you'll note that we are preserving many passes
which *do not exist* any more, or are not even analyses which one might
wish to have be preserved. This means we do all the work only to say
"nope" with no error to the user.

String-based APIs are a *bad idea*. String-based APIs that cannot
produce any meaningful error are an even worse idea. =/

I have a patch that simply removes this API completely, but I'm hesitant
to commit it as I don't really want to perniciously break out-of-tree
users of the old pass manager. I'd rather they just have to migrate to
the new one at some point. If others disagree and would like me to kill
it with fire, just say the word. =]

llvm-svn: 227294
 2015-01-28 04:57:56 +00:00
Eric Christopher
aacfef65cf Move DataLayout back to the TargetMachine from TargetSubtargetInfo 
derived classes.

Since global data alignment, layout, and mangling is often based on the
DataLayout, move it to the TargetMachine. This ensures that global
data is going to be layed out and mangled consistently if the subtarget
changes on a per function basis. Prior to this all targets(*) have
had subtarget dependent code moved out and onto the TargetMachine.

*One target hasn't been migrated as part of this change: R600. The
R600 port has, as a subtarget feature, the size of pointers and
this affects global data layout. I've currently hacked in a FIXME
to enable progress, but the port needs to be updated to either pass
the 64-bitness to the TargetMachine, or fix the DataLayout to
avoid subtarget dependent features.

llvm-svn: 227113
 2015-01-26 19:03:15 +00:00
Colin LeMahieu
eacab3ed87 [Hexagon] Converting multiply and accumulate with immediate intrinsics to patterns. 
llvm-svn: 226681
 2015-01-21 18:13:15 +00:00
Colin LeMahieu
b11b24f79e [Hexagon] Adding intrinsics for doubleword ALU operations. 
llvm-svn: 226606
 2015-01-20 20:45:05 +00:00
Colin LeMahieu
9cc2ac99d5 [Hexagon] Updating muxir/ri/ii intrinsics. Setting predicate registers as compatible with i32 rather than doing custom type conversion. 
llvm-svn: 226500
 2015-01-19 20:31:18 +00:00
Colin LeMahieu
89f087ffd8 [Hexagon] Converting intrinsics combine imm/imm, simple shifts and extends. 
llvm-svn: 226483
 2015-01-19 18:56:19 +00:00
Colin LeMahieu
c9d3d690e7 [Hexagon] Converting remaining ALU32/ALU intrinsics. 
llvm-svn: 226480
 2015-01-19 18:33:58 +00:00
Colin LeMahieu
dc770a4bae [Hexagon] Converting ALU32/ALU intrinsics to new patterns. 
llvm-svn: 226478
 2015-01-19 18:22:19 +00:00
Colin LeMahieu
9b7e71b043 [Hexagon] Converting halfword to double accumulating multiply intrinsics. 
llvm-svn: 226472
 2015-01-19 17:36:32 +00:00
David Blaikie
8839ae1559 std::unique_ptrify the MCStreamer argument to createAsmPrinter 
llvm-svn: 226414
 2015-01-18 20:29:04 +00:00
Colin LeMahieu
b0ae008450 [Hexagon] Converting halfword to doubleword multiply intrinsics. 
llvm-svn: 226326
 2015-01-16 21:41:57 +00:00
Colin LeMahieu
3f0206ff73 [Hexagon] Converting accumulating halfword multiply intrinsics to patterns. 
llvm-svn: 226324
 2015-01-16 21:36:34 +00:00
Colin LeMahieu
6559af4ce0 [Hexagon] Beginning converting intrinsics to patterns instead of duplicated definitions. Converting halfword multiply intrinsics. 
llvm-svn: 226318
 2015-01-16 20:38:54 +00:00
Colin LeMahieu
c4ad57bf83 [Hexagon] Fix 226309, replacement atomic store patterns didn't actually exist, added new versions. 
llvm-svn: 226315
 2015-01-16 20:16:14 +00:00
Colin LeMahieu
1a5115554a [Hexagon] Removing old duplicate atomic load/store patterns. 
llvm-svn: 226309
 2015-01-16 19:53:35 +00:00
Colin LeMahieu
33e84773e4 [Hexagon] Converting old patterns to new versions using classes. 
llvm-svn: 226304
 2015-01-16 19:29:59 +00:00
Colin LeMahieu
8abdb53b9d [Hexagon] Updating call/jump instruction patterns. 
llvm-svn: 226288
 2015-01-16 17:05:27 +00:00
Colin LeMahieu
ef6291ec41 [Hexagon] Adding new-value store and bit reverse instructions. 
llvm-svn: 226224
 2015-01-15 23:10:29 +00:00
Colin LeMahieu
d02bf117bc [Hexagon] Fix 226206 by uncommenting required pattern and changing patterns for simple load-extends. 
llvm-svn: 226210
 2015-01-15 21:35:49 +00:00
Colin LeMahieu
ad558c9627 [Hexagon] Updating indexed load-extend patterns and changing test to new expected output. 
llvm-svn: 226206
 2015-01-15 21:07:52 +00:00
Colin LeMahieu
14474ecfe7 [Hexagon] Removing old versions of vsplice, valign, cl0, ct0 and updating references to new versions. 
llvm-svn: 226194
 2015-01-15 19:28:32 +00:00
Colin LeMahieu
39bcb9a1e4 [Hexagon] Adding vmux instruction. Removing old transfer instructions and updating references. 
llvm-svn: 226184
 2015-01-15 18:16:00 +00:00
Colin LeMahieu
55264a56e6 [Hexagon] Deleting old float comparison instruction and updating references to new ones. 
llvm-svn: 226179
 2015-01-15 17:28:14 +00:00
Colin LeMahieu
6ce6625967 [Hexagon] Replacing old fadd/fsub instructions and updating references. 
llvm-svn: 226176
 2015-01-15 16:30:07 +00:00
Colin LeMahieu
0710e9b065 [Hexagon] Replacing old versions of stores and loads. 
llvm-svn: 226065
 2015-01-15 00:15:30 +00:00
Colin LeMahieu
255d98103d [Hexagon] Replacing old version of convert and load f64. 
llvm-svn: 226057
 2015-01-14 23:07:36 +00:00
Colin LeMahieu
fc143604e5 [Hexagon] Removing old, unused !tstbit instructions. 
llvm-svn: 226036
 2015-01-14 20:26:15 +00:00
Colin LeMahieu
b97153f51b [Hexagon] Removing old versions of cmph and updating references. 
llvm-svn: 226013
 2015-01-14 18:26:14 +00:00
Colin LeMahieu
5aaa1beaef [Hexagon] Removing old versions of cmpb and updating references. 
llvm-svn: 226006
 2015-01-14 18:05:44 +00:00
Colin LeMahieu
26ee1d374d [Hexagon] Deleting versions of compare-not that don't have encoding information. Updating references. 
llvm-svn: 226003
 2015-01-14 16:49:12 +00:00
Chandler Carruth
0b619fcc8e [cleanup] Re-sort all the #include lines in LLVM using 
utils/sort_includes.py.

I clearly haven't done this in a while, so more changed than usual. This
even uncovered a missing include from the InstrProf library that I've
added. No functionality changed here, just mechanical cleanup of the
include order.

llvm-svn: 225974
 2015-01-14 11:23:27 +00:00
Ahmed Bougacha
4150499cd1 [SelectionDAG] Allow targets to specify legality of extloads' result 
type (in addition to the memory type).

The *LoadExt* legalization handling used to only have one type, the
memory type.  This forced users to assume that as long as the extload
for the memory type was declared legal, and the result type was legal,
the whole extload was legal.

However, this isn't always the case.  For instance, on X86, with AVX,
this is legal:
    v4i32 load, zext from v4i8
but this isn't:
    v4i64 load, zext from v4i8
Whereas v4i64 is (arguably) legal, even without AVX2.

Note that the same thing was done a while ago for truncstores (r46140),
but I assume no one needed it yet for extloads, so here we go.

Calls to getLoadExtAction were changed to add the value type, found
manually in the surrounding code.

Calls to setLoadExtAction were mechanically changed, by wrapping the
call in a loop, to match previous behavior.  The loop iterates over
the MVT subrange corresponding to the memory type (FP vectors, etc...).
I also pulled neighboring setTruncStoreActions into some of the loops;
those shouldn't make a difference, as the additional types are illegal.
(e.g., i128->i1 truncstores on PPC.)

No functional change intended.

Differential Revision: http://reviews.llvm.org/D6532

llvm-svn: 225421
 2015-01-08 00:51:32 +00:00
Colin LeMahieu
3a3e6ac2f6 [Hexagon] Fix 225372 USR register is not fully complete. Removing Uses = [USR] maintains existing functionality to old instructions without encodings. 
llvm-svn: 225377
 2015-01-07 20:43:38 +00:00
Colin LeMahieu
113d011e38 [Hexagon] Adding floating point classification and creation. 
llvm-svn: 225374
 2015-01-07 20:28:57 +00:00
Colin LeMahieu
4e075604d7 [Hexagon] Adding encodings for v5 floating point instructions. 
llvm-svn: 225372
 2015-01-07 20:24:09 +00:00
Colin LeMahieu
bb38f7d496 [Hexagon] Adding encoding for popcount, fastcorner, dword asr with rounding. 
llvm-svn: 225371
 2015-01-07 20:07:28 +00:00
Colin LeMahieu
5dbfa1b1a1 [Hexagon] Adding compound jump encodings. 
llvm-svn: 225291
 2015-01-06 20:03:31 +00:00
Colin LeMahieu
e59b0ff43e [Hexagon] Adding encoding for misc v4 instructions: boundscheck, tlbmatch, dcfetch. 
llvm-svn: 225283
 2015-01-06 19:03:20 +00:00
Colin LeMahieu
769b0f293d [Hexagon] Adding encoding information for absolute address loads. 
llvm-svn: 225279
 2015-01-06 18:38:26 +00:00
Colin LeMahieu
6a3f537bb7 [Hexagon] Fix 225267. GP register is not yet fully implemented. Removing Uses [GP] maintains existing behavior. 
llvm-svn: 225270
 2015-01-06 16:52:38 +00:00
Colin LeMahieu
7c1bcabc22 [Hexagon] Adding dealloc_return encoding and absolute address stores. 
llvm-svn: 225267
 2015-01-06 16:15:15 +00:00
Colin LeMahieu
9f18605465 [Hexagon] Adding add/sub with carry, logical shift left by immediate and memop instructions. Removing old defs without bits and updating references. 
llvm-svn: 225210
 2015-01-05 21:36:38 +00:00
Colin LeMahieu
139c47f671 [Hexagon] Adding rounding reg/reg variants, accumulating multiplies, and accumulating shifts. 
llvm-svn: 225201
 2015-01-05 20:56:41 +00:00
Colin LeMahieu
9a85ae53a7 [Hexagon] Adding V4 bit manipulating instructions, removing ALU defs without encoding bits. 
llvm-svn: 225199
 2015-01-05 20:35:54 +00:00
Colin LeMahieu
ef8cb75b7d [Hexagon] Adding V4 logic-logic instructions and tests. 
llvm-svn: 225198
 2015-01-05 20:14:58 +00:00
Colin LeMahieu
e42756883b [Hexagon] Adding orand, bitsplit reg/reg, and modwrap instructions. 
llvm-svn: 225197
 2015-01-05 20:04:40 +00:00
Colin LeMahieu
caea68537b [Hexagon] Adding round reg/imm and bitsplit instructions. 
llvm-svn: 225188
 2015-01-05 18:08:21 +00:00
Craig Topper
03e518b16d Replace several 'assert(false' with 'llvm_unreachable' or fold a condition into the assert. 
llvm-svn: 225160
 2015-01-05 10:15:49 +00:00
Colin LeMahieu
f2dcb1dbfa Reverting 225045 and 225043 and XFAIL multiline.ll on hexagon 
llvm-svn: 225047
 2014-12-31 17:14:35 +00:00
Colin LeMahieu
ca60c4bd6c [Hexagon] Removing assertion to appease buildbot until I can reproduce the problem 
llvm-svn: 225045
 2014-12-31 16:20:00 +00:00
Colin LeMahieu
fe239ffbc6 [Hexagon] Changing an llvm_unreachable to an assertion and returning 0. Relocations aren't implemented yet but we don't need to abort for this in release builds. 
llvm-svn: 225043
 2014-12-31 15:57:38 +00:00
Colin LeMahieu
664727ddb9 [Hexagon] Adding accumulating add/sub, doubleword logic-not variants, doubleword bitfield extract, word parity, accumulating multiplies with saturation. 
llvm-svn: 225024
 2014-12-31 00:08:34 +00:00
Colin LeMahieu
ce5a9848a5 [Hexagon] Adding double-logic on predicate instructions. 
llvm-svn: 225018
 2014-12-30 23:22:39 +00:00