Bill Wendling
00481555e0
Add more Thumb add instruction encodings.
...
llvm-svn: 119883
2010-11-20 01:18:47 +00:00
Bill Wendling
4fb2131b0a
Add Thumb encodings for some add instructions.
...
llvm-svn: 119882
2010-11-20 01:00:29 +00:00
Bill Wendling
cd27d03d93
Add more encodings for Thumb instructions.
...
llvm-svn: 119881
2010-11-20 00:53:35 +00:00
Bill Wendling
2271583883
Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the same
...
value that the one in ARMMCCodeEmitter.cpp does.
llvm-svn: 119878
2010-11-20 00:26:37 +00:00
Jim Grosbach
b2b99c9b64
Fix ARM LDR* post-indexed operand encoding.
...
llvm-svn: 119869
2010-11-19 23:14:43 +00:00
Bill Wendling
c568ce5bda
Encodings for the compare instructions.
...
llvm-svn: 119868
2010-11-19 23:14:32 +00:00
Owen Anderson
023f096736
The Vm and Vn register fields must be the same for a register-register vmov.
...
llvm-svn: 119867
2010-11-19 23:12:43 +00:00
Evan Cheng
2b30babdcc
Fix a cut-n-paste-error.
...
llvm-svn: 119866
2010-11-19 23:01:16 +00:00
Jim Grosbach
7445ae1145
Operand names
...
llvm-svn: 119864
2010-11-19 22:43:08 +00:00
Jim Grosbach
4d6c419ea2
trailing whitespace
...
llvm-svn: 119863
2010-11-19 22:42:55 +00:00
Eric Christopher
322b045c95
Don't need to save piecemeal now.
...
llvm-svn: 119862
2010-11-19 22:39:56 +00:00
Eric Christopher
899d8247c8
Update comment.
...
llvm-svn: 119861
2010-11-19 22:37:58 +00:00
Bill Wendling
65402c3a76
Add encodings for some of the thumb ADD instructions. Tests will come once the
...
asm parser can handle them.
llvm-svn: 119860
2010-11-19 22:37:33 +00:00
Eric Christopher
716f891687
Update comment.
...
llvm-svn: 119859
2010-11-19 22:36:41 +00:00
Jim Grosbach
69cad2c8b0
Clarify operand names.
...
llvm-svn: 119858
2010-11-19 22:36:02 +00:00
Eric Christopher
563a0d8b6b
Refactor address mode handling into a single struct (ala x86), this
...
should give allow a wider range of addressing modes.
No functional change.
llvm-svn: 119856
2010-11-19 22:30:02 +00:00
Jim Grosbach
0a0b2ed163
Fix encoding for ARM MLS instruction.
...
llvm-svn: 119855
2010-11-19 22:22:37 +00:00
Jim Grosbach
a7213faf85
Add ARM encoding information for STRD.
...
llvm-svn: 119852
2010-11-19 22:14:31 +00:00
Jim Grosbach
bd80b3fe98
Shuffle things around a bit to keep like things together. Tidy up formatting.
...
llvm-svn: 119851
2010-11-19 22:06:57 +00:00
Bill Wendling
29f262163a
Revert accidental commit.
...
llvm-svn: 119850
2010-11-19 22:06:18 +00:00
Bill Wendling
e2f19dfde3
Change long binary encodings to use hex instead. It's more readable. Also
...
initialize missing bit.
llvm-svn: 119849
2010-11-19 22:02:18 +00:00
Jim Grosbach
33930ff560
Factor out operand encoding bits for ARM addressing mode 2 store instructions.
...
llvm-svn: 119846
2010-11-19 21:35:06 +00:00
Jim Grosbach
b58de2a8c7
Delete another dead class.
...
llvm-svn: 119844
2010-11-19 21:16:08 +00:00
Jim Grosbach
dc695e7de2
whitespace tweak.
...
llvm-svn: 119843
2010-11-19 21:14:37 +00:00
Jim Grosbach
edef95dc56
Refactor PICSTR* instructions to really be pseudos. Nuke dead classes.
...
llvm-svn: 119841
2010-11-19 21:14:02 +00:00
Jim Grosbach
a57ac3e282
Rename ARM .td class AIldst1 to AI2ldst for consistency with the other classes.
...
llvm-svn: 119840
2010-11-19 21:07:51 +00:00
Jim Grosbach
9e50b14e34
Add ARM binary encoding information for the rest of the indexed loads.
...
llvm-svn: 119821
2010-11-19 19:41:26 +00:00
Jim Grosbach
7a92d84b46
Remove dead code.
...
llvm-svn: 119815
2010-11-19 18:18:37 +00:00
Jim Grosbach
c2ac477e54
ARM LDRD binary encoding.
...
llvm-svn: 119812
2010-11-19 18:16:46 +00:00
Jim Grosbach
be61a90b99
Remove hard tabs.
...
llvm-svn: 119810
2010-11-19 18:01:37 +00:00
Jim Grosbach
48531dd967
Remove trailing whitespace.
...
llvm-svn: 119806
2010-11-19 17:11:02 +00:00
Benjamin Kramer
6807d1b8fa
Avoid release build warnings.
...
llvm-svn: 119804
2010-11-19 16:36:02 +00:00
Owen Anderson
99c5ea71f7
Fix decoding ambiguities of stdrex and ldrex.
...
llvm-svn: 119801
2010-11-19 13:11:50 +00:00
Evan Cheng
46ea6d0bf1
These instructions are thumb2 only.
...
llvm-svn: 119793
2010-11-19 06:28:11 +00:00
Evan Cheng
4a88903266
Fix an obvious oversight.
...
llvm-svn: 119792
2010-11-19 06:15:10 +00:00
Rafael Espindola
b33e5e07e1
Change some methods in MCDwarf.cpp to be able to handle an arbitrary
...
MCStreamer instead of just MCObjectStreamer. Address changes cannot
be as efficient as we have to use DW_LNE_set_addres, but at least
most of the logic is shared.
This will be used so that, with CodeGen still using EmitDwarfLocDirective,
llvm-gcc is able to produce debug_line sections without needing an
assembler that supports .loc.
llvm-svn: 119777
2010-11-19 02:26:16 +00:00
Bill Wendling
50a1812023
Add MC encodings for some Thumb instructions. Test for a few of them. The "bx
...
lr" instruction cannot be tested just yet. It requires matching a "condition
code", but adding one of those makes things go south quickly...
llvm-svn: 119774
2010-11-19 01:33:10 +00:00
Bill Wendling
48cce64ab5
Use array_pod_sort because the list is contiguous.
...
llvm-svn: 119769
2010-11-19 00:38:19 +00:00
Owen Anderson
fa216abdd5
Provide Thumb2 encodings for strex and ldrex.
...
llvm-svn: 119768
2010-11-19 00:28:38 +00:00
Jim Grosbach
941d812765
Minor cleanups to a few llvm_unreachable() calls.
...
llvm-svn: 119767
2010-11-19 00:27:09 +00:00
Bill Wendling
f433d71069
An 'unreachable' shouldn't have a '0 &&' prefix.
...
llvm-svn: 119762
2010-11-19 00:05:15 +00:00
Bill Wendling
ef43273c51
Add support for parsing the writeback ("!") token.
...
llvm-svn: 119761
2010-11-18 23:43:05 +00:00
Jason W Kim
331b7407c8
Fix .o emission of ARM movt/movw. MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the .o path now works for ARM.
...
Note: lo16AllZero remains in ARMInstrInfo.td - It can be factored out when Thumb movt is repaired.
Existing tests cover this update.
llvm-svn: 119760
2010-11-18 23:37:15 +00:00
Owen Anderson
ca14474db4
Fix encodings for pkhbt, and fix some tests where I accidentally tested ARM mode instead of Thumb2.
...
llvm-svn: 119755
2010-11-18 23:29:56 +00:00
Anton Korobeynikov
ce676f96e1
Move getInitialFrameState() to TargetFrameInfo
...
llvm-svn: 119754
2010-11-18 23:25:52 +00:00
Jim Grosbach
6d88154077
ARM Encoding information for UXTAH and friends.
...
llvm-svn: 119753
2010-11-18 23:24:22 +00:00
Tanya Lattner
9cac0edef3
Fix bug in DAGCombiner for ARM that was trying to do a ShiftCombine on illegal types (vector should be split first).
...
Added test case.
llvm-svn: 119749
2010-11-18 22:06:46 +00:00
Bill Wendling
510e600542
Don't allocate the SmallVector of Registers. It gets messy figuring out who
...
should delete what when the object gets copied around. It's also making valgrind
upset.
llvm-svn: 119747
2010-11-18 21:50:54 +00:00
Owen Anderson
2f9d8861ac
Provide Thumb2 encodings for mov's that come from MOVCC SDNodes.
...
llvm-svn: 119744
2010-11-18 21:46:31 +00:00
Jim Grosbach
0651dc456a
Add ARM encoding information for LDRH post-increment.
...
llvm-svn: 119743
2010-11-18 21:43:37 +00:00
Anton Korobeynikov
269e7d3be1
Move hasFP() and few related hooks to TargetFrameInfo.
...
llvm-svn: 119740
2010-11-18 21:19:35 +00:00
Bob Wilson
2ada679434
Split up ARM LowerShift function.
...
This function was being called from two different places for completely
unrelated reasons. During type legalization, it was called to expand 64-bit
shift operations. During operation legalization, it was called to handle
Neon vector shifts. The vector shift code was not written to check for
illegal types, since it was assumed to be only called after type legalization.
Fixed this by splitting off the 64-bit shift expansion into a separate
function. I don't have a particular testcase for this; I just noticed it
by inspection.
llvm-svn: 119738
2010-11-18 21:16:28 +00:00
Owen Anderson
25dc3a4fe6
More Thumb2 encodings.
...
llvm-svn: 119737
2010-11-18 21:15:19 +00:00
Owen Anderson
eec8c82d32
Fill out the set of Thumb2 multiplication operator encodings.
...
llvm-svn: 119733
2010-11-18 20:32:18 +00:00
Bill Wendling
09c1d135be
Missed the _RET versions of LDMIA.
...
llvm-svn: 119726
2010-11-18 19:44:29 +00:00
Eric Christopher
bc6a51d63f
Rewrite stack callee saved spills and restores to use push/pop instructions.
...
Remove movePastCSLoadStoreOps and associated code for simple pointer
increments. Update routines that depended upon other opcodes for save/restore.
Adjust all testcases accordingly.
llvm-svn: 119725
2010-11-18 19:40:05 +00:00
Jim Grosbach
fd0bab72a7
ARMPseudoInst instructions should default to being considered a single 4-byte
...
instruction. Any that may be expanded otherwise by MC lowering should
override this value. rdar://8683274
llvm-svn: 119713
2010-11-18 18:01:40 +00:00
Chris Lattner
c85f76f7da
trivial QoI improvement. On this invalid input:
...
sahf movl 344(%rdi),%r14d
we used to produce:
t.s:2:1: error: unexpected token in argument list
^
we now produce:
t.s:1:11: error: unexpected token in argument list
sahf movl 344(%rdi),%r14d
^
rdar://8581401
llvm-svn: 119676
2010-11-18 02:53:02 +00:00
Rafael Espindola
93a07b464e
Change CodeGen to use .loc directives. This produces a lot more readable output
...
and testing is easier. A good example is the unknown-location.ll test that
now can just look for ".loc 1 0 0". We also don't use a DW_LNE_set_address for
every address change anymore.
llvm-svn: 119613
2010-11-18 02:04:25 +00:00
Evan Cheng
6b2be51f7e
Silence compiler warnings.
...
llvm-svn: 119610
2010-11-18 01:43:23 +00:00
Jim Grosbach
082e9f2f2c
Remove trailing whitespace.
...
llvm-svn: 119608
2010-11-18 01:39:50 +00:00
Jim Grosbach
2f9a2efb3c
ARM PseudoInst instructions don't need or use an assembler string. Get rid of
...
the operand to the pattern.
llvm-svn: 119607
2010-11-18 01:38:26 +00:00
Evan Cheng
e63f6c7422
Code clean up.
...
llvm-svn: 119604
2010-11-18 01:28:51 +00:00
Jim Grosbach
205e0345c1
Add FIXME.
...
llvm-svn: 119603
2010-11-18 01:20:48 +00:00
Jim Grosbach
a42e2b0fcb
Refactor the ARM PICADD and PICLDR* instructions to really be pseudos and not
...
just pretend to be.
llvm-svn: 119602
2010-11-18 01:15:56 +00:00
Owen Anderson
b7970b2c6a
Try again at providing Thumb2 encodings for basic multiplication operators.
...
llvm-svn: 119601
2010-11-18 01:08:42 +00:00
Jim Grosbach
42d103250b
Refactor a few ARM load instructions to better parameterize things and re-use
...
common encoding information.
llvm-svn: 119598
2010-11-18 00:46:58 +00:00
Owen Anderson
e8906ba112
Revert r119593 while I figure out my testing disagrees with the buildbot.
...
llvm-svn: 119597
2010-11-18 00:42:51 +00:00
Owen Anderson
47a64ab90c
Provide correct Thumb2 encodings for basic multiplication operators.
...
llvm-svn: 119593
2010-11-18 00:19:10 +00:00
Jim Grosbach
5d9d8356fa
Clean up LEApcrel instuction(s) a bit. It's not really a Pseudo, so don't mark
...
it as such. Add some encoding information.
llvm-svn: 119588
2010-11-17 23:33:14 +00:00
Owen Anderson
ea6ac4cdff
Second attempt at correct encodings for Thumb2 bitfield instructions.
...
llvm-svn: 119575
2010-11-17 22:16:31 +00:00
Jim Grosbach
16aeabf0d5
Fix comment typo.
...
llvm-svn: 119573
2010-11-17 21:57:51 +00:00
Bob Wilson
a217a6e40b
Change ARMGlobalMerge to keep BSS globals in separate pools.
...
This completes the fixes for Radar 8673120.
llvm-svn: 119566
2010-11-17 21:25:39 +00:00
Bob Wilson
819660b716
Fix ARMGlobalMerge pass to check if globals are entirely within range.
...
It is generally not sufficient to check if the starting offset is in range
of the maximum offset that can be efficiently used for the target.
llvm-svn: 119565
2010-11-17 21:25:36 +00:00
Bob Wilson
49bf8702f0
Change the symbol for merged globals from "merged" to "_MergedGlobals".
...
This makes it more clear that the symbol is an internal, compiler-generated
name and gives a little more description about its contents.
llvm-svn: 119564
2010-11-17 21:25:33 +00:00
Bob Wilson
fd7399b6a6
Fix the ARMGlobalMerge pass to look at variable sizes instead of pointer sizes.
...
It was mistakenly looking at the pointer type when checking for the size of
global variables. This is a partial fix for Radar 8673120.
llvm-svn: 119563
2010-11-17 21:25:27 +00:00
Jim Grosbach
37233d0ea6
Make the ARM BR_JTadd instruction an explicit pseudo and lower it properly
...
in the MC lowering process.
llvm-svn: 119559
2010-11-17 21:05:55 +00:00
Evan Cheng
00c4672acc
Avoid isel movcc of large immediates when the large immediate is available in a register. These immediates aren't free.
...
llvm-svn: 119558
2010-11-17 20:56:30 +00:00
Owen Anderson
2adebbb603
Revert r119551, which broke buildbots.
...
llvm-svn: 119555
2010-11-17 20:48:51 +00:00
Owen Anderson
c7750780fc
Provide Thumb2 encodings for bitfield instructions.
...
llvm-svn: 119551
2010-11-17 20:35:29 +00:00
Evan Cheng
ce610bd6b3
Remove ARM isel hacks that fold large immediates into a pair of add, sub, and,
...
and xor. The 32-bit move immediates can be hoisted out of loops by machine
LICM but the isel hacks were preventing them.
Instead, let peephole optimization pass recognize registers that are defined by
immediates and the ARM target hook will fold the immediates in.
Other changes include 1) do not fold and / xor into cmp to isel TST / TEQ
instructions if there are multiple uses. This happens when the 'and' is live
out, machine sink would have sinked the computation and that ends up pessimizing
code. The peephole pass would recognize situations where the 'and' can be
toggled to define CPSR and eliminate the comparison anyway.
2) Move peephole pass to after machine LICM, sink, and CSE to avoid blocking
important optimizations.
rdar://8663787, rdar://8241368
llvm-svn: 119548
2010-11-17 20:13:28 +00:00
Rafael Espindola
7fc5cd0a58
make isVirtualSection a virtual method on MCSection. Chris' suggestion.
...
llvm-svn: 119547
2010-11-17 20:03:54 +00:00
Owen Anderson
d88cfe5453
More miscellaneous Thumb2 encodings.
...
llvm-svn: 119546
2010-11-17 19:57:38 +00:00
Bill Wendling
5c4f5ecff0
Add missing opcodes now that this function's used in more than one place.
...
llvm-svn: 119539
2010-11-17 19:16:20 +00:00
Jim Grosbach
b640b6a7b4
More ARM encoding bits. LDRH now encodes properly.
...
llvm-svn: 119529
2010-11-17 18:11:11 +00:00
Evan Cheng
907a7149d6
Revert r119109 for now. It's breaking 176.gcc.
...
llvm-svn: 119492
2010-11-17 09:31:04 +00:00
Che-Liang Chiou
f8ffd59ccb
Add simple arithmetics and %type directive for PTX
...
llvm-svn: 119485
2010-11-17 08:08:49 +00:00
Evan Cheng
eed919e2fb
Simplify code that toggle optional operand to ARM::CPSR.
...
llvm-svn: 119484
2010-11-17 08:06:50 +00:00
Chris Lattner
4e53e6e198
tidy up
...
llvm-svn: 119462
2010-11-17 05:41:32 +00:00
Bill Wendling
7d3f3104d7
The machine instruction no longer encodes the submode as a separate operand. We
...
should get the submode from the load/store multiple instruction's opcode.
llvm-svn: 119461
2010-11-17 05:31:09 +00:00
Bill Wendling
f0a1acba8c
Proper encoding for VLDM and VSTM instructions. The register lists for these
...
instructions have to distinguish between lists of single- and double-precision
registers in order for the ASM matcher to do a proper job. In all other
respects, a list of single- or double-precision registers are the same as a list
of GPR registers.
llvm-svn: 119460
2010-11-17 04:32:08 +00:00
Bill Wendling
0b16ba97fd
Add binary emission stuff for VLDM/VSTM. This reuses the
...
"getRegisterListOpValue" logic. If the registers are double or single precision,
the value returned is suitable for VLDM/VSTM.
llvm-svn: 119435
2010-11-17 00:45:23 +00:00
Bill Wendling
d2da6dff5e
Use the correct variable names so that the encodings will be correct.
...
llvm-svn: 119403
2010-11-16 23:44:49 +00:00
Dan Gohman
348c3f8197
Reapply r118917. With pseudo-instruction expansion moved to
...
a different pass, the complicated interaction between cmov expansion
and fast isel is no longer a concern.
llvm-svn: 119400
2010-11-16 22:43:23 +00:00
Oscar Fuentes
690d065e70
Fix assembling X86CompilationCallback_Win64.asm on VS 10.
...
Patch by Louis Zhuang!
llvm-svn: 119394
2010-11-16 22:07:47 +00:00
Rafael Espindola
283e6bd938
Add .loc methods to the streamer.
...
Next: Add support for the !HasDotLocAndDotFile case to the MCAsmStreamer
and then switch codegen to use it.
llvm-svn: 119384
2010-11-16 21:20:32 +00:00
Jim Grosbach
1b1636f0cb
ARM conditional mov encoding fix.
...
llvm-svn: 119354
2010-11-16 18:13:42 +00:00
Bill Wendling
655c05147e
L_bit doesn't work here.
...
llvm-svn: 119325
2010-11-16 02:20:22 +00:00
Bill Wendling
2ac47f0959
- Remove dead patterns.
...
- Add encodings to the *LDMIA_RET instrs. Probably not needed...
llvm-svn: 119323
2010-11-16 02:08:45 +00:00
Bill Wendling
64cb4dd72d
vldm and vstm are mnemonics for vldmia and vstmia resp.
...
llvm-svn: 119321
2010-11-16 02:00:24 +00:00
Chris Lattner
a47f6f03f9
Fix a bug I introduced in the ppc refactoring, which caused long
...
branches to be emitted as:
bne cr0, 2
instead of:
bne cr0, $+8
llvm-svn: 119317
2010-11-16 01:45:05 +00:00
Bill Wendling
b450d320ec
Encode the multi-load/store instructions with their respective modes ('ia',
...
'db', 'ib', 'da') instead of having that mode as a separate field in the
instruction. It's more convenient for the asm parser and much more readable for
humans.
<rdar://problem/8654088>
llvm-svn: 119310
2010-11-16 01:16:36 +00:00
Chris Lattner
af9558a178
add copy of comment to the code that will survive the mcjit'ization
...
llvm-svn: 119308
2010-11-16 00:57:32 +00:00
Chris Lattner
378215748c
relax an assertion a bit, allowing the GPR argument of
...
these instructions to be encoded with getMachineOpValue.
This unbreaks ExecutionEngine/2003-01-04-ArgumentBug.ll
when running on a G5
llvm-svn: 119307
2010-11-16 00:55:51 +00:00
Owen Anderson
686fae59e6
Add Thumb2 encodings for mov and friends.
...
llvm-svn: 119295
2010-11-16 00:29:56 +00:00
Rafael Espindola
53a8ae85b7
Change the 11 byte nop to be a single instruction.
...
llvm-svn: 119286
2010-11-15 23:10:30 +00:00
Chris Lattner
24aff5bdbd
fix a pasto that massively broke the ppc jit while the buildbots happened
...
to be broken for other reasons
llvm-svn: 119283
2010-11-15 22:50:50 +00:00
Owen Anderson
3d47a3536c
Attempt to provide encodings for some miscellaneous Thumb2 encodings.
...
llvm-svn: 119187
2010-11-15 21:30:39 +00:00
Evan Cheng
4afa3a6b1f
Code clean up. The peephole pass should be the one updating the instruction
...
iterator, not TII->OptimizeCompareInstr.
llvm-svn: 119186
2010-11-15 21:20:45 +00:00
Owen Anderson
db1a4541c2
Provide Thumb2 encodings for sxtb and friends.
...
llvm-svn: 119185
2010-11-15 21:12:05 +00:00
Eric Christopher
22b01f0d76
Recommit this change and remove the failing part of the test - it didn't
...
pass in the first place and was masked by earlier failures not warning
and aborting the block.
llvm-svn: 119184
2010-11-15 21:11:06 +00:00
Jim Grosbach
7aabb8c5ee
ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B counterparts) binary encoding.
...
llvm-svn: 119180
2010-11-15 20:47:07 +00:00
Owen Anderson
0bb2efeb7d
Add Thumb2 encodings for comparison and shift operators.
...
llvm-svn: 119176
2010-11-15 19:58:36 +00:00
Owen Anderson
5ae5db8931
Add correct Thumb2 encodings for mvn and friends.
...
llvm-svn: 119170
2010-11-15 18:45:17 +00:00
Jim Grosbach
e0122f5d54
Add FIXMEs.
...
llvm-svn: 119167
2010-11-15 18:36:48 +00:00
Jim Grosbach
a7676f5079
Nuke redundant encoding bit set.
...
llvm-svn: 119164
2010-11-15 18:17:24 +00:00
Kalle Raiskila
917df2ee14
Improve code layout, mostly indentation.
...
No functionality change.
llvm-svn: 119142
2010-11-15 10:12:32 +00:00
Chris Lattner
c00f41ef21
Wire up primitive support in the assembler backend for writing .o files
...
directly on the mac. This is very early, doesn't support relocations and
has a terrible hack to avoid .machine from being printed, but despite
that it generates an bitwise-identical-to-cctools .o file for stuff like
this:
define i32 @test() nounwind { ret i32 42 }
I don't plan to continue pushing this forward, but if anyone else was
interested in doing it, it should be really straight-forward.
llvm-svn: 119136
2010-11-15 08:49:58 +00:00
Chris Lattner
51793c5b92
split out an encoder for memri operands, allowing a relocation to be plopped
...
into the immediate field. This allows us to encode stuff like this:
lbz r3, lo16(__ZL4init)(r4) ; globalopt.cpp:5
; encoding: [0x88,0x64,A,A]
; fixup A - offset: 0, value: lo16(__ZL4init), kind: fixup_ppc_lo16
stw r3, lo16(__ZL1s)(r5) ; globalopt.cpp:6
; encoding: [0x90,0x65,A,A]
; fixup A - offset: 0, value: lo16(__ZL1s), kind: fixup_ppc_lo16
With this, we should have a completely function MCCodeEmitter for PPC, wewt.
llvm-svn: 119134
2010-11-15 08:22:03 +00:00
Chris Lattner
96f8078924
add support for encoding the lo14 forms used for a few PPC64 addressing
...
modes. For example, we now get:
ld r3, lo16(_G)(r3) ; encoding: [0xe8,0x63,A,0bAAAAAA00]
; fixup A - offset: 0, value: lo16(_G), kind: fixup_ppc_lo14
llvm-svn: 119133
2010-11-15 08:02:41 +00:00
Chris Lattner
a028364bcd
fix a regression with the new instprinter: we lost the ability to
...
print DBG_VALUE instructions. This should unbreak the llvm-gcc-powerpc-darwin9
buildbot.
llvm-svn: 119132
2010-11-15 07:52:06 +00:00
Chris Lattner
ac5f6ff408
implement the start of support for lo16 and ha16, allowing us to get stuff like:
...
lis r4, ha16(__ZL4init) ; encoding: [0x3c,0x80,A,A]
; fixup A - offset: 0, value: ha16(__ZL4init), kind: fixup_ppc_ha16
llvm-svn: 119127
2010-11-15 06:33:39 +00:00
Chris Lattner
f04cb8ebad
add a fixup for conditional branches, giving us output like this:
...
beq cr0, LBB0_4 ; encoding: [0x41,0x82,A,0bAAAAAA00]
; fixup A - offset: 0, value: LBB0_4, kind: fixup_ppc_brcond14
llvm-svn: 119126
2010-11-15 06:12:22 +00:00
Chris Lattner
8b6744a612
change direct branches to encode with the same encoding method
...
as direct calls. Change conditional branches to encode with
their own method, simplifying the JIT encoder and making room
for adding an mc fixup.
llvm-svn: 119125
2010-11-15 06:09:35 +00:00
Chris Lattner
4795a876f6
eliminate a now-unneeded operand printer.
...
llvm-svn: 119124
2010-11-15 06:01:10 +00:00
Chris Lattner
37bebc344a
split call operands out to their own encoding class, simplifying
...
code in the JIT. Use this to form the first fixup for the PPC backend,
giving us stuff like this:
bl L_foo$stub ; encoding: [0b010010AA,A,A,0bAAAAAA01]
; fixup A - offset: 0, value: L_foo$stub, kind: fixup_ppc_br24
llvm-svn: 119123
2010-11-15 05:57:53 +00:00
Chris Lattner
6eb2a0b277
add proper encoding for MTCRF instead of using a hack.
...
llvm-svn: 119121
2010-11-15 05:19:25 +00:00
Chris Lattner
b2daeac125
add fields to the .td files unconditionally, simplifying tblgen a bit.
...
Switch the ARM backend to use 'let' instead of 'set' with this change.
llvm-svn: 119120
2010-11-15 05:19:05 +00:00
Chris Lattner
6f23a467b0
add basic encoding support for immediates and registers, allowing us
...
to encode all of these instructions correctly (for example):
mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6]
stw r0, 8(r1) ; encoding: [0x90,0x01,0x00,0x08]
stwu r1, -64(r1) ; encoding: [0x94,0x21,0xff,0xc0]
llvm-svn: 119118
2010-11-15 04:51:55 +00:00
Chris Lattner
ca7d8427c9
add a dummy entry to fix a build error
...
llvm-svn: 119117
2010-11-15 04:47:16 +00:00
Chris Lattner
d5a087b439
Implement a basic MCCodeEmitter for PPC. This doesn't handle
...
fixups yet, and doesn't handle actually encoding operand values,
but this is enough for llc -show-mc-encoding to show the base
instruction encoding information, e.g.:
mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6]
stw r0, 8(r1) ; encoding: [0x90,0x00,0x00,0x00]
stwu r1, -64(r1) ; encoding: [0x94,0x00,0x00,0x00]
Ltmp0:
lhz r4, 4(r3) ; encoding: [0xa0,0x00,0x00,0x00]
cmplwi cr0, r4, 8 ; encoding: [0x28,0x00,0x00,0x00]
beq cr0, LBB0_2 ; encoding: [0x40,0x00,0x00,0x00]
llvm-svn: 119116
2010-11-15 04:16:32 +00:00
Chris Lattner
d79d1b6297
dissolve some more hacks.
...
llvm-svn: 119115
2010-11-15 03:53:53 +00:00
Chris Lattner
3ee55a9b8d
fix some fixme's, removing dead code.
...
llvm-svn: 119114
2010-11-15 03:51:13 +00:00
Chris Lattner
8fa38e3222
remove asmstrings (which can never be printed) from pseudo
...
instructions, allowing is to eliminate some dead operand
printing methods from the instprinter.
llvm-svn: 119113
2010-11-15 03:48:58 +00:00
Chris Lattner
5f571f5a13
strength reduce TOC temp label generation, no functionality change.
...
llvm-svn: 119112
2010-11-15 03:42:54 +00:00
Chris Lattner
38e49f3f11
rip out a ton of old instruction printing junk now that the
...
new instprinting logic is there.
llvm-svn: 119111
2010-11-15 03:39:06 +00:00
Evan Cheng
73e79b8a9c
Make sure ARM multi load / store pass copies memoperands when forming ldrd / strd. pr8113.
...
llvm-svn: 119109
2010-11-15 03:30:30 +00:00
Chris Lattner
9ffced5b9d
Turn on the new instprinter by default.
...
The only change in the output is:
1) we get a better comment on mfcr, we get:
mfcr r2 ; cr2
instead of:
mfcr r2 ; 32
2) we no longer emit $stub's on powerpc/leopard. The Leopard
linker autosynthesizes them.
llvm-svn: 119108
2010-11-15 03:27:05 +00:00
Chris Lattner
e50d695490
convert the operand bits into bitfields since they are all combinable in
...
different ways. Add $non_lazy_ptr support, and proper lowering for
global values.
Now all the ppc regression tests pass with the new instruction printer.
llvm-svn: 119106
2010-11-15 03:13:19 +00:00
Chris Lattner
9a0a840839
add targetoperand flags for jump tables, constant pool and block address
...
nodes to indicate when ha16/lo16 modifiers should be used. This lets
us pass PowerPC/indirectbr.ll.
The one annoying thing about this patch is that the MCSymbolExpr isn't
expressive enough to represent ha16(label1-label2) which we need on
PowerPC. I have a terrible hack in the meantime, but this will have
to be revisited at some point.
Last major conversion item left is global variable references.
llvm-svn: 119105
2010-11-15 02:46:57 +00:00
Chris Lattner
7743db8f20
remove some extraneous quotes to make the new instprinter match.
...
llvm-svn: 119104
2010-11-15 02:43:46 +00:00
Chris Lattner
11e50c531a
silence a ton of warnings from clang.
...
llvm-svn: 119102
2010-11-15 01:45:44 +00:00
Anton Korobeynikov
794259aec0
Attempt to unbreak cmake-based builds
...
llvm-svn: 119098
2010-11-15 00:48:12 +00:00
Anton Korobeynikov
76c52dcf44
First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place
...
llvm-svn: 119097
2010-11-15 00:06:54 +00:00
Anton Korobeynikov
33f85080b4
Whitespace cleanup
...
llvm-svn: 119096
2010-11-15 00:06:05 +00:00
Chris Lattner
3512e07ecf
implement support for the MO_DARWIN_STUB TargetOperand flag,
...
and have isel apply to to call operands as required. This allows
us to get $stub suffixes on label references on ppc/tiger with the
new instprinter, fixing two tests. Only 2 to go.
llvm-svn: 119093
2010-11-14 23:42:06 +00:00
Chris Lattner
b347be831c
tidy up, no functionality change.
...
llvm-svn: 119092
2010-11-14 23:32:42 +00:00
Chris Lattner
6af9d8969d
with the picbase nonsense starting to be figured out, implement
...
lowering support for MovePCtoLR[8]. Down to 4 failures again.
llvm-svn: 119090
2010-11-14 22:56:43 +00:00
Chris Lattner
51168d6510
move the pic base symbol stuff up to MachineFunction
...
since it is trivial and will be shared between ppc and x86.
This substantially simplifies the X86 backend also.
llvm-svn: 119089
2010-11-14 22:48:15 +00:00
Chris Lattner
09ea2ce78f
simplify getPICBaseSymbol a bit.
...
llvm-svn: 119088
2010-11-14 22:37:11 +00:00
Chris Lattner
fc626aa37d
reimplement ppc asmprinter "toc" handling to use a VariantKind
...
on the operand, required for .o file writing and fixing
the PowerPC/mult-alt-generic-powerpc64.ll failure with the new
instprinter.
llvm-svn: 119087
2010-11-14 22:22:59 +00:00
Chris Lattner
3c8d9ea286
lower PPC::MFCRpseud when transforming to MC, avoiding calling
...
the aborting printSpecial() method. This gets us to 8 failures.
llvm-svn: 119084
2010-11-14 22:03:15 +00:00
Chris Lattner
36fad020cd
make the stubbed-out printer methods abort instead of
...
printing nothing. This gets us back up to 24 failures.
llvm-svn: 119083
2010-11-14 21:54:34 +00:00
Chris Lattner
331d966779
wire up a few more things, down to 4 test failures, all
...
about handling $stub, lo/hi etc.
llvm-svn: 119082
2010-11-14 21:51:37 +00:00
Chris Lattner
3959bd7fb4
properly wire up the instprinter to the ppc64 backend, down to 5 failures.
...
llvm-svn: 119081
2010-11-14 21:42:53 +00:00
Chris Lattner
27b65608d0
implement pretty printing support for the various pseudo
...
ops the asmprinter supported, fixing PowerPC/rlwimi2.ll
among others. Down to 20 failures.
llvm-svn: 119080
2010-11-14 21:39:51 +00:00
Chris Lattner
437623476f
Wire up symbol hi/lo printing. We don't print hi()/lo(), but this gets
...
us further along. Only 28 failures now.
llvm-svn: 119079
2010-11-14 21:33:07 +00:00
Chris Lattner
b12ecaae5a
implement basic support for symbol operand lowering,
...
and printing support for call operands. Down to 77 failures.
llvm-svn: 119078
2010-11-14 21:20:46 +00:00
Chris Lattner
3bf85b2f4b
trim #includes.
...
llvm-svn: 119075
2010-11-14 21:16:04 +00:00
Chris Lattner
32848508af
switch PPC to a simplified MCInstLowering model.
...
llvm-svn: 119074
2010-11-14 21:12:33 +00:00
Chris Lattner
163fbca360
fix PPC.h to not pull in TargetMachine.h
...
llvm-svn: 119072
2010-11-14 21:09:28 +00:00
Chris Lattner
3a01d37b66
rename LowerToMCInst -> LowerARMMachineInstrToMCInst.
...
llvm-svn: 119071
2010-11-14 21:00:02 +00:00
Chris Lattner
4dac1b2742
even more simplifications. ARM MCInstLowering is now just
...
a single function instead of a class. It doesn't need the
complexity that X86 does.
llvm-svn: 119070
2010-11-14 20:58:38 +00:00
Chris Lattner
3ebf1f315e
more shrinkification
...
llvm-svn: 119068
2010-11-14 20:41:53 +00:00
Chris Lattner
758bc06aff
more simplifications.
...
llvm-svn: 119067
2010-11-14 20:40:08 +00:00
Chris Lattner
2393da7c40
simplify and tidy up
...
llvm-svn: 119066
2010-11-14 20:31:06 +00:00
Chris Lattner
a6262cb13f
implement basic support for memory operands and crbit operands,
...
this fixes 3 more ppc tests.
llvm-svn: 119065
2010-11-14 20:22:56 +00:00
Chris Lattner
3249cd7521
implement several trivial operand printers, reducing
...
failures in CodeGen/PowerPC from 120 -> 117
llvm-svn: 119063
2010-11-14 20:11:21 +00:00
Chris Lattner
8d769a7610
Implement support for printing register and immediate operands,
...
add support for darwin vs aix syntax. We now can print instructions
like this:
add r3, r3, r4
blr
and (in aix mode):
add 3, 3, 4
blr
llvm-svn: 119062
2010-11-14 20:02:39 +00:00
Chris Lattner
e137166772
stub out PPCMCInstLowering, add a new option that uses it and the new
...
instprinter when -enable-ppc-inst-printer is passed to llc.
llvm-svn: 119061
2010-11-14 19:53:02 +00:00
Chris Lattner
d045c38bf6
stub out a powerpc MCInstPrinter implementation.
...
llvm-svn: 119059
2010-11-14 19:40:38 +00:00
Chris Lattner
cec3b226a4
move all the target's asmprinters into the main target. The piece
...
that should be split out is the InstPrinter (if a target is mc'ized).
This change makes all the targets be consistent.
llvm-svn: 119056
2010-11-14 18:43:56 +00:00
Chris Lattner
38ca2c6f0f
move PPCAsmPrinter into the main PPC library, like ARM and X86.
...
llvm-svn: 119054
2010-11-14 18:33:33 +00:00
Chris Lattner
7e03d38bd7
fix cmake
...
llvm-svn: 119053
2010-11-14 18:27:11 +00:00
Chris Lattner
4533444a49
remove JIT support from the Alpha backend. The JIT will be moving to MC,
...
and the Alpha backend isn't MCized yet. Approved by Andrew.
llvm-svn: 119051
2010-11-14 18:24:41 +00:00
Chris Lattner
3e3e29381e
random acts of tidiness.
...
llvm-svn: 119049
2010-11-14 18:09:50 +00:00
Owen Anderson
ad4f83df6a
Second attempt at providing correct encodings for Thumb2 binary operators.
...
llvm-svn: 119029
2010-11-14 05:37:38 +00:00
Peter Collingbourne
4ec6b2dbe7
Recognise 32-bit ror-based bswap implementation used by uclibc
...
llvm-svn: 119007
2010-11-13 19:54:30 +00:00
Peter Collingbourne
6c3094234e
Support ; as asm separator
...
llvm-svn: 119006
2010-11-13 19:54:23 +00:00
Bill Wendling
49dd03e223
Comment out the defms until they're activated.
...
llvm-svn: 119000
2010-11-13 11:20:05 +00:00
Bill Wendling
fadcb3cded
Add uses of the *_ldst_multi multiclasses. These aren't used yet.
...
llvm-svn: 118999
2010-11-13 10:57:02 +00:00
Bill Wendling
184bc1368d
Convert the modes to lower case.
...
llvm-svn: 118998
2010-11-13 10:43:34 +00:00
Bill Wendling
0a55425158
Minor cleanups:
...
- Get the opcode once.
- Add a ParserMatchClass to reglist.
llvm-svn: 118997
2010-11-13 10:40:19 +00:00
Bill Wendling
aa9ca6fcca
Add *_ldst_mult multiclasses to the ARM back-end. These will be used in the
...
future to separate out the ia, ib, da, db variants of the load/store multiple
instructions.
llvm-svn: 118995
2010-11-13 09:09:38 +00:00
Daniel Dunbar
2ba9f79194
MC: Simplify Mach-O and ELF object writer implementations.
...
- What was I thinking?????
llvm-svn: 118992
2010-11-13 07:33:40 +00:00
Wesley Peck
4a2644f203
Fixed error and re-enabled MBlaze MC disassembler tests.
...
llvm-svn: 118987
2010-11-13 05:48:21 +00:00
Evan Cheng
239d9b439d
Conditional moves are slightly more expensive than moves.
...
llvm-svn: 118985
2010-11-13 05:14:20 +00:00
Wesley Peck
c534d55751
1. Adding test cases for MBlaze MC disassembler.
...
2. Fixing several errors in disassembler uncovered by test cases.
3. Fixing invalid encoding of PCMPEQ and PCMPNE uncovered by test cases.
llvm-svn: 118969
2010-11-13 02:37:59 +00:00
Evan Cheng
a7d3c3d387
Add conditional move of large immediate.
...
llvm-svn: 118968
2010-11-13 02:25:14 +00:00
Jim Grosbach
cab8b12f7a
Swap multiclass operand order for consistency with other patterns.
...
llvm-svn: 118965
2010-11-13 01:28:30 +00:00
Jim Grosbach
c8b3147ca5
Continue ARM indexed load refactoring. Multiclass for LDR{B} pre/post indexed
...
instructions.
llvm-svn: 118963
2010-11-13 01:07:20 +00:00
Jim Grosbach
03eb1993ea
More ARM load/store indexed refactoring. Also fix an incorrect IndexMode
...
flag for the LDRT/STRT family instructions as a side effect.
llvm-svn: 118955
2010-11-13 00:35:48 +00:00
Dan Gohman
a4aa69cf2a
Revert r118917, which is implicated in the llvm-gcc-i386-linux-selfhost failure.
...
llvm-svn: 118954
2010-11-13 00:31:40 +00:00
Evan Cheng
a08372d4b4
Fix an obvious typo which inverted an immediate.
...
llvm-svn: 118951
2010-11-13 00:27:47 +00:00
Wesley Peck
28f124b047
1. Adding missing immediate mode asm parser test cases.
...
2. Fixing improper immediate mode reverse subtract.
llvm-svn: 118948
2010-11-13 00:03:46 +00:00
Eric Christopher
f6c7694c29
Temporarily revert this.
...
llvm-svn: 118946
2010-11-12 23:50:48 +00:00
Evan Cheng
1f5296d832
For pre-v6t2 targets, only select MOVi32imm if the immediate can be handled with movi + orr.
...
llvm-svn: 118945
2010-11-12 23:46:13 +00:00
Wesley Peck
f11db049fe
Fixing improperly encoded reverse subtract instructions in MBlaze backend.
...
llvm-svn: 118943
2010-11-12 23:41:10 +00:00
Owen Anderson
053d9fb9b5
Revert r118939 while I work out why it broke some buildbots.
...
llvm-svn: 118942
2010-11-12 23:36:03 +00:00
Wesley Peck
be71f5db40
1. Finishing MBlaze MC asm parser test cases
...
2. Parsing .word directive in MBlaze asm parser
3. Fixing hack where memory instructions reversed order of last two parameters
4. Fixing many improperly encoded instructions
5. Support parsing special instructions (MFS,MTS,etc.)
6. Removing unused functions from inst printer
llvm-svn: 118941
2010-11-12 23:30:17 +00:00
Owen Anderson
f8192cf0cc
Attemt to provide correct encodings for Thumb2 binary operators.
...
llvm-svn: 118939
2010-11-12 23:18:11 +00:00
Evan Cheng
f3c75f91e9
Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+orr or movw+movt depending on the subtarget.
...
llvm-svn: 118938
2010-11-12 23:03:38 +00:00
Eric Christopher
b8ee838424
Make this happen for ARM like x86. Don't entirely bail out when
...
an address is in a different block, get it into a register and go
from there.
llvm-svn: 118936
2010-11-12 22:52:32 +00:00
Evan Cheng
19f018a1be
Add conditional mvn instructions.
...
llvm-svn: 118935
2010-11-12 22:42:47 +00:00
Jim Grosbach
e0ba69b81d
Zap a copy/paste-o bit of dead code.
...
llvm-svn: 118926
2010-11-12 21:29:10 +00:00
Jim Grosbach
eaaf8294a5
Refactor to parameterize some ARM load/store encoding patterns. Preparatory
...
to splitting the load/store pre/post indexed instructions into [r, r] and
[r, imm] forms.
llvm-svn: 118925
2010-11-12 21:28:15 +00:00
Owen Anderson
f1ffc8fdc9
First stab at providing correct Thumb2 encodings, start with adc.
...
llvm-svn: 118924
2010-11-12 21:12:40 +00:00
Evan Cheng
b565d1acf9
Add some missing isel predicates on def : pat patterns to avoid generating VFP vmla / vmls (they cause stalls). Disabling them in isel is properly not a right solution, I'll look into a proper solution next.
...
llvm-svn: 118922
2010-11-12 20:32:20 +00:00
Jim Grosbach
160cc37f73
Kill more unused stuff.
...
llvm-svn: 118921
2010-11-12 19:27:45 +00:00
Jim Grosbach
8bb507dd6b
Remove unused class.
...
llvm-svn: 118919
2010-11-12 19:24:53 +00:00
Dan Gohman
8b86287a06
When the definition of an address value is in a different block
...
from the user of the address, fall back to just using the
address in a register instead of bailing out of fast-isel
altogether.
llvm-svn: 118917
2010-11-12 19:14:00 +00:00
Chris Lattner
2a70c4e38a
accept lret as an alias for lretl, fixing the reopened part of PR8592
...
llvm-svn: 118916
2010-11-12 18:54:56 +00:00
Jim Grosbach
f9d1b45754
Fill in the default predication bits for ARM unconditional branch.
...
llvm-svn: 118907
2010-11-12 18:13:26 +00:00
Jim Grosbach
cbab1ea04e
Encoding for ARM LDRSB instructions.
...
llvm-svn: 118905
2010-11-12 17:52:59 +00:00
Chris Lattner
612039e538
implement PR8592: empirically "lretq" is a "lret" with a rex.w prefix.
...
llvm-svn: 118903
2010-11-12 17:41:20 +00:00
Chris Lattner
bcdb696f6c
tidy up.
...
llvm-svn: 118896
2010-11-12 17:24:29 +00:00
Kalle Raiskila
f89d0d0389
Fix memory access lowering on SPU, adding
...
support for the case where alignment<value size.
These cases were silently miscompiled before this patch.
Now they are overly verbose -especially storing is- and
any front-end should still avoid misaligned memory
accesses as much as possible. The bit juggling algorithm
added here probably has some room for improvement still.
llvm-svn: 118889
2010-11-12 10:14:03 +00:00
Eric Christopher
1ca7518097
Fix up a few more spots of addrmode2 (or not) changes that were
...
missed. Update some comments accordingly.
Fixes rdar://8652289
llvm-svn: 118888
2010-11-12 09:48:30 +00:00
Dale Johannesen
659061fcd3
Remove possibly useful info from comment, per Chris.
...
llvm-svn: 118865
2010-11-12 00:43:18 +00:00
Bruno Cardoso Lopes
37f2439cbd
Enable mips32 mul instruction. Patch by Akira Hatanaka <ahatanaka@mips.com>
...
llvm-svn: 118864
2010-11-12 00:38:32 +00:00
Jim Grosbach
f00a6faa17
Start of support for binary emit of 16-it Thumb instructions.
...
llvm-svn: 118859
2010-11-11 23:41:09 +00:00
Owen Anderson
85cf1b8ff5
Fill out support for Thumb2 encodings of NEON instructions.
...
llvm-svn: 118854
2010-11-11 23:12:55 +00:00
Wesley Peck
7974f4c201
The BRK instruction in the MicroBlaze is a branch-and-link.
...
llvm-svn: 118848
2010-11-11 22:21:08 +00:00
Wesley Peck
0e937ae80d
Fix tblgen instruction errors exposed by MC asm parser tests
...
Fix minimum 16-bit signed value error exposed by MC asm parser tests
Add initial MC asm parser tests for the MBlaze backend
llvm-svn: 118844
2010-11-11 21:40:53 +00:00
Owen Anderson
0913dac245
Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4].
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llvm-svn: 118843
2010-11-11 21:36:43 +00:00
Eric Christopher
474a93ff76
Revert the accidental commit I made reverting the previous commit.
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llvm-svn: 118835
2010-11-11 20:50:14 +00:00
Jim Grosbach
cc8e5dc0c6
ARM fixup encoding for direct call instructions (BL).
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llvm-svn: 118829
2010-11-11 20:05:40 +00:00
Eric Christopher
e7f27cf66a
Revert this temporarily.
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llvm-svn: 118827
2010-11-11 19:47:02 +00:00
Eric Christopher
beb7a50acb
Change the prologue and epilogue to use push/pop for the low ARM registers.
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llvm-svn: 118823
2010-11-11 19:26:03 +00:00
Owen Anderson
f43f09f6f6
Add support for Thumb2 encodings of NEON data processing instructions, using the new PostEncoderMethod infrastructure.
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More tests to come.
llvm-svn: 118819
2010-11-11 19:07:48 +00:00
Wesley Peck
9ad36509f8
Fixed some bugs in MBlaze asm parser that were introduced when removing OwningPtrs from the code.
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llvm-svn: 118807
2010-11-11 18:41:33 +00:00
Chris Lattner
b3eff154cd
add a note
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llvm-svn: 118806
2010-11-11 18:23:57 +00:00
Jim Grosbach
abf0e10ea0
Encoding of destination fixup for ARM branch and conditional branch
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instructions.
llvm-svn: 118801
2010-11-11 18:04:49 +00:00
Chris Lattner
3514fa6b11
add pr#
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llvm-svn: 118797
2010-11-11 17:17:56 +00:00
Jim Grosbach
cfc32e3b5a
Encoding for ARM LDRSH_POST.
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llvm-svn: 118794
2010-11-11 16:55:29 +00:00
Rafael Espindola
5766346831
Remove some explicit arguments to getELFSection. This is
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a leftover from the removal of isExplicit.
llvm-svn: 118774
2010-11-11 03:40:25 +00:00
Jim Grosbach
8cb10f8def
Encoding for ARM LDRSH and LDRSH_PRE. Cannonicalize operand names.
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llvm-svn: 118767
2010-11-11 01:55:59 +00:00
Jim Grosbach
b86e183a33
Fix encoding of Ra register for ARM smla* instructions.
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llvm-svn: 118761
2010-11-11 01:27:41 +00:00
Jim Grosbach
3b13f9013c
ARM STRH encoding information.
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llvm-svn: 118757
2010-11-11 01:09:40 +00:00
Jim Grosbach
2c1d6373ab
Move LDM predicate operand encoding into base clase. Add STM missing STM
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encoding bits.
llvm-svn: 118738
2010-11-10 23:44:32 +00:00
Jim Grosbach
ad037e5ded
ARM LDM encoding for the mode (ia, ib, da, db) operand.
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llvm-svn: 118736
2010-11-10 23:38:36 +00:00
Jim Grosbach
ef95eee920
Fix ARM encoding of non-return LDM instructions.
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llvm-svn: 118732
2010-11-10 23:18:49 +00:00
Jim Grosbach
d832c84199
Fix ARM encoding of LDM+Return instruction.
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llvm-svn: 118730
2010-11-10 23:12:48 +00:00
Nate Begeman
c4fabeabb9
Fix an issue where we tried to turn a v2f32 build_vector into a v4i32 build vector with 2 elts
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llvm-svn: 118720
2010-11-10 21:35:41 +00:00
Jim Grosbach
c5001c0f1d
Simplify and clean up MC symbol lookup for ARM constant pool values. This fixes
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double quoting of ObjC symbol names in constant pool entries.
rdar://8652107
llvm-svn: 118688
2010-11-10 17:59:10 +00:00
Jim Grosbach
4e3653e4e1
Update ARMConstantPoolValue to not use a modifier string. Use an explicit
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VariantKind marker to indicate the additional information necessary. Update
MC to handle the new Kinds. rdar://8647623
llvm-svn: 118671
2010-11-10 03:26:07 +00:00
Bruno Cardoso Lopes
2266e58196
Add clo instruction. Patch by Akira Hatanaka (ahatanaka@mips.com) with some minor tweaks
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llvm-svn: 118667
2010-11-10 02:13:22 +00:00
Bill Wendling
87c781b411
Emit a '!' if this is a "writeback" register or memory address.
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llvm-svn: 118662
2010-11-10 01:07:54 +00:00
Matt Beaumont-Gay
993d07638e
Rename a parameter to avoid confusion with a local variable
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llvm-svn: 118656
2010-11-10 00:08:58 +00:00
Bill Wendling
0c082b811f
Emit the warning about the register list not being in ascending order only once.
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llvm-svn: 118653
2010-11-09 23:45:59 +00:00