1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-18 18:42:46 +02:00
Commit Graph

8661 Commits

Author SHA1 Message Date
Alok Kumar Sharma
5ffb093588 [Debuginfo][DW_OP_implicit_pointer] (1/7) Support for DW_OP_LLVM_implicit_pointer
New dwarf operator DW_OP_LLVM_implicit_pointer is introduced (present only in LLVM IR)
This operator is required as it is different than DWARF operator
DW_OP_implicit_pointer in representation and specification (number
and types of operands) and later can not be used as multiple level.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D84113
2021-01-15 14:45:04 +05:30
Stefan Gränitz
7d83b7c4c8 [docs] Update DebuggingJITedCode page after fix in LLDB
Generalize the documentation to include both, GDB and LLDB. Add a link to the interface
definition. Make a note on MCJIT's restriction to ELF. Mention the regression and bugfix
in LLDB as well as the jit-loader setting for macOS. Update the command line session to
use LLDB instead of GDB.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D90789
2021-01-14 15:43:11 +01:00
Jeroen Dobbelaere
8dd6e7c3bc [NFC] Use correct ssa.copy spelling when referring to the intrinsic
Split out from D91250. Fixes wrong ssa_copy naming.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D94310
2021-01-13 20:43:14 +01:00
Juneyoung Lee
38ff89f219 [LangRef] State that a nocapture pointer cannot be returned
This is a small patch stating that a nocapture pointer cannot be returned.

Discussed in D93189.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94386
2021-01-13 09:30:54 +09:00
Tony Tye
ecb293266f [NFC][AMDGPU] Clarify memory model support for volatile
Reorder the AMDGPUUage description of the memory model code sequences
for volatile so clear that it applies independent of the nontemporal
setting.

Differential Revision: https://reviews.llvm.org/D94358
2021-01-11 19:59:55 +00:00
Florian Hahn
1b17d90a73 [SimplifyCFG] Keep !dgb metadata of moved instruction, if they match.
Currently SimplifyCFG drops the debug locations of 'bonus' instructions.
Such instructions are moved before the first branch. The reason for the
current behavior is that this could lead to surprising debug stepping,
if the block that's folded is dead.

In case the first branch and the instructions to be folded have the same
debug location, this shouldn't be an issue and we can keep the debug
location.

Reviewed By: vsk

Differential Revision: https://reviews.llvm.org/D93662
2021-01-09 19:15:16 +00:00
Tony
ccb53c0a97 [AMDGPU] Add volatile support to SIMemoryLegalizer
Treat a non-atomic volatile load and store as a relaxed atomic at
system scope for the address spaces accessed. This will ensure all
relevant caches will be bypassed.

A volatile atomic is not changed and still only bypasses caches upto
the level specified by the SyncScope operand.

Differential Revision: https://reviews.llvm.org/D94214
2021-01-09 00:52:33 +00:00
Paul C. Anagnostopoulos
d74e81058e [TableGen] Add the assert statement, step 1
Differential Revision: https://reviews.llvm.org/D93911

This first step adds the assert statement and supports it at top level
and in record definitions. Later steps will support it in class
definitions and multiclasses.
2021-01-08 09:47:51 -05:00
Fangrui Song
171489a04d [sanitizer] Define SANITIZER_GLIBC to refine SANITIZER_LINUX feature detection and support musl
Several `#if SANITIZER_LINUX && !SANITIZER_ANDROID` guards are replaced
with the more appropriate `#if SANITIZER_GLIBC` (the headers are glibc
extensions, not specific to Linux (i.e. if we ever support GNU/kFreeBSD
or Hurd, the guards may automatically work)).

Several `#if SANITIZER_LINUX && !SANITIZER_ANDROID` guards are refined
with `#if SANITIZER_GLIBC` (the definitions are available on Linux glibc,
but may not be available on other libc (e.g. musl) implementations).

This patch makes `ninja asan cfi lsan msan stats tsan ubsan xray` build on a musl based Linux distribution (apk install musl-libintl)
Notes about disabled interceptors for musl:

* `SANITIZER_INTERCEPT_GLOB`: musl does not implement `GLOB_ALTDIRFUNC` (GNU extension)
* Some ioctl structs and functions operating on them.
* `SANITIZER_INTERCEPT___PRINTF_CHK`: `_FORTIFY_SOURCE` functions are GNU extension
* `SANITIZER_INTERCEPT___STRNDUP`: `dlsym(RTLD_NEXT, "__strndup")` errors so a diagnostic is formed. The diagnostic uses `write` which hasn't been intercepted => SIGSEGV
* `SANITIZER_INTERCEPT_*64`: the `_LARGEFILE64_SOURCE` functions are glibc specific. musl does something like `#define pread64 pread`
* Disabled `msg_iovlen msg_controllen cmsg_len` checks: musl is conforming while many implementations (Linux/FreeBSD/NetBSD/Solaris) are non-conforming. Since we pick the glibc definition, exclude the checks for musl (incompatible sizes but compatible offsets)

Pass through LIBCXX_HAS_MUSL_LIBC to make check-msan/check-tsan able to build libc++ (https://bugs.llvm.org/show_bug.cgi?id=48618).

Many sanitizer features are available now.

```
% ninja check-asan
(known issues:
* ASAN_OPTIONS=fast_unwind_on_malloc=0 odr-violations hangs
)
...
Testing Time: 53.69s
  Unsupported      : 185
  Passed           : 512
  Expectedly Failed:   1
  Failed           :  12

% ninja check-ubsan check-ubsan-minimal check-memprof # all passed

% ninja check-cfi
( all cross-dso/)
...
Testing Time: 8.68s
  Unsupported      : 264
  Passed           :  80
  Expectedly Failed:   8
  Failed           :  32

% ninja check-lsan
(With GetTls (D93972), 10 failures)
Testing Time: 4.09s
  Unsupported:  7
  Passed     : 65
  Failed     : 22

% ninja check-msan
(Many are due to functions not marked unsupported.)
Testing Time: 23.09s
  Unsupported      :   6
  Passed           : 764
  Expectedly Failed:   2
  Failed           :  58

% ninja check-tsan
Testing Time: 23.21s
  Unsupported      :  86
  Passed           : 295
  Expectedly Failed:   1
  Failed           :  25
```

Used `ASAN_OPTIONS=verbosity=2` to verify there is no unneeded interceptor.

Partly based on Jari Ronkainen's https://reviews.llvm.org/D63785#1921014

Note: we need to place `_FILE_OFFSET_BITS` above `#include "sanitizer_platform.h"` to avoid `#define __USE_FILE_OFFSET64 1` in 32-bit ARM `features.h`

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D93848
2021-01-06 10:55:40 -08:00
Alan Phipps
f85fa6973c [Coverage] Add support for Branch Coverage in LLVM Source-Based Code Coverage
This is an enhancement to LLVM Source-Based Code Coverage in clang to track how
many times individual branch-generating conditions are taken (evaluate to TRUE)
and not taken (evaluate to FALSE).  Individual conditions may comprise larger
boolean expressions using boolean logical operators.  This functionality is
very similar to what is supported by GCOV except that it is very closely
anchored to the ASTs.

Differential Revision: https://reviews.llvm.org/D84467
2021-01-05 09:51:51 -06:00
Chih-Ping Chen
1f73b986d5 [docs] Release notes for IsDecl in DIModule.
Please see https://reviews.llvm.org/D93462 for the actual code change.

Differential Revision: https://reviews.llvm.org/D93558
2021-01-04 07:03:34 -05:00
Nuno Lopes
4599be1fc4 LangRef: fix significand bits of fp128 2020-12-31 11:13:25 +00:00
Praveen Velliengiri
b88899815f [AMDGPU] Use MUBUF instructions for global address space access
Currently, the compiler crashes in instruction selection of global
load/stores in gfx600 due to the lack of FLAT instructions. This patch
fix the crash by selecting MUBUF instructions for global load/stores
in gfx600.

Authored-by: Praveen Velliengiri <Praveen.Velliengiri@amd.com>

Reviewed by: t-tye

Differential revision: https://reviews.llvm.org/D92483
2020-12-24 10:13:04 +00:00
Paul C. Anagnostopoulos
1c400b3882 [TableGen] Add the !substr() bang operator
Update the documentation and add a test.

Build failed: Change SIZE_MAX to std::numeric_limits<int64_t>::max().

Differential Revision: https://reviews.llvm.org/D93419
2020-12-23 10:59:33 -05:00
Arnold Schwaighofer
213a4b317b Add a llvm.coro.end.async intrinsic
The llvm.coro.end.async intrinsic allows to specify a function that is
to be called as the last action before returning. This function will be
inlined after coroutine splitting.

This function can contain a 'musttail' call to allow for guaranteed tail
calling as the last action.

Differential Revision: https://reviews.llvm.org/D93568
2020-12-22 10:52:28 -08:00
Tom Stellard
782aaa377e HowToReleaseLLVM: Update document to match the current release process
Change Summary:

* Clarify that release manager can commit without code owner approval
  (but are still highly encouraged to get approval).

* Clarify that there is no official release criteria.

* Document what types of changes are allowed in each release phase.

This is update is based on the RFC submitted here:
http://lists.llvm.org/pipermail/llvm-dev/2020-May/141730.html

Reviewed By: hans

Differential Revision: https://reviews.llvm.org/D93493
2020-12-21 15:16:11 -08:00
Hafiz Abid Qadeer
3476612836 Update references to 'master' branch.
This commit replace 'master' with 'main' in llvm/docs.

Reviewed By: sammccall, kristof.beyls

Differential Revision: https://reviews.llvm.org/D92831
2020-12-21 19:10:34 +00:00
Paul C. Anagnostopoulos
cb25df4369 Revert "[TableGen] Add the !substr() bang operator"
This reverts commit 3a675c777dd5788e2313cb06fb27b01f8a2e7573.
2020-12-21 10:46:25 -05:00
Paul C. Anagnostopoulos
415c2c940a [TableGen] Add the !substr() bang operator
Update the documentation and add a test.

Differential Revision: https://reviews.llvm.org/D93419
2020-12-21 09:41:59 -05:00
Jacques Pienaar
3733be80bf [FileCheck] Add a literal check directive modifier
Introduce CHECK modifiers that change the behavior of the CHECK
directive. Also add a LITERAL modifier for cases where matching could
end requiring escaping strings interpreted as regex where only
literal/fixed string matching is desired (making the CHECK's more
difficult to write/fragile and difficult to interpret).
2020-12-18 17:26:15 -08:00
Bjorn Pettersson
3774e2781f Add intrinsics for saturating float to int casts
This patch adds support for the fptoui.sat and fptosi.sat intrinsics,
which provide basically the same functionality as the existing fptoui
and fptosi instructions, but will saturate (or return 0 for NaN) on
values unrepresentable in the target type, instead of returning
poison. Related mailing list discussion can be found at:
https://groups.google.com/d/msg/llvm-dev/cgDFaBmCnDQ/CZAIMj4IBAAJ

The intrinsics have overloaded source and result type and support
vector operands:

    i32 @llvm.fptoui.sat.i32.f32(float %f)
    i100 @llvm.fptoui.sat.i100.f64(double %f)
    <4 x i32> @llvm.fptoui.sat.v4i32.v4f16(half %f)
    // etc

On the SelectionDAG layer two new ISD opcodes are added,
FP_TO_UINT_SAT and FP_TO_SINT_SAT. These opcodes have two operands
and one result. The second operand is an integer constant specifying
the scalar saturation width. The idea here is that initially the
second operand and the scalar width of the result type are the same,
but they may change during type legalization. For example:

    i19 @llvm.fptsi.sat.i19.f32(float %f)
    // builds
    i19 fp_to_sint_sat f, 19
    // type legalizes (through integer result promotion)
    i32 fp_to_sint_sat f, 19

I went for this approach, because saturated conversion does not
compose well. There is no good way of "adjusting" a saturating
conversion to i32 into one to i19 short of saturating twice.
Specifying the saturation width separately allows directly saturating
to the correct width.

There are two baseline expansions for the fp_to_xint_sat opcodes. If
the integer bounds can be exactly represented in the float type and
fminnum/fmaxnum are legal, we can expand to something like:

    f = fmaxnum f, FP(MIN)
    f = fminnum f, FP(MAX)
    i = fptoxi f
    i = select f uo f, 0, i # unnecessary if unsigned as 0 = MIN

If the bounds cannot be exactly represented, we expand to something
like this instead:

    i = fptoxi f
    i = select f ult FP(MIN), MIN, i
    i = select f ogt FP(MAX), MAX, i
    i = select f uo f, 0, i # unnecessary if unsigned as 0 = MIN

It should be noted that this expansion assumes a non-trapping fptoxi.

Initial tests are for AArch64, x86_64 and ARM. This exercises all of
the scalar and vector legalization. ARM is included to test float
softening.

Original patch by @nikic and @ebevhan (based on D54696).

Differential Revision: https://reviews.llvm.org/D54749
2020-12-18 11:09:41 +01:00
Rong Xu
92b9137fcb [IR][PGO] Add hot func attribute and use hot/cold attribute in func section
Clang FE currently has hot/cold function attribute. But we only have
cold function attribute in LLVM IR.

This patch adds support of hot function attribute to LLVM IR.  This
attribute will be used in setting function section prefix/suffix.
Currently .hot and .unlikely suffix only are added in PGO (Sample PGO)
compilation (through isFunctionHotInCallGraph and
isFunctionColdInCallGraph).

This patch changes the behavior. The new behavior is:
(1) If the user annotates a function as hot or isFunctionHotInCallGraph
    is true, this function will be marked as hot. Otherwise,
(2) If the user annotates a function as cold or
    isFunctionColdInCallGraph is true, this function will be marked as
    cold.

The changes are:
(1) user annotated function attribute will used in setting function
    section prefix/suffix.
(2) hot attribute overwrites profile count based hotness.
(3) profile count based hotness overwrite user annotated cold attribute.

The intention for these changes is to provide the user a way to mark
certain function as hot in cases where training input is hard to cover
all the hot functions.

Differential Revision: https://reviews.llvm.org/D92493
2020-12-17 18:41:12 -08:00
Tony
062d45d53c [NFC][AMDGPU] Reorganize description of scratch handling
Differential Revision: https://reviews.llvm.org/D93440
2020-12-17 19:33:14 +00:00
Fangrui Song
803a9c9668 [LangRef] Update new ssp/sspstrong/sspreq semantics after D91816
Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D93422
2020-12-17 09:16:37 -08:00
Jon Chesterfield
0309056e6e [amdgpu] Default to code object v3
[amdgpu] Default to code object v3
v4 is not yet readily available, and doesn't appear
to be implemented in the back end

Reviewed By: t-tye, yaxunl

Differential Revision: https://reviews.llvm.org/D93258
2020-12-17 16:09:33 +00:00
serge-sans-paille
71ab5028de Remove Python2 fallback and only advertise Python3 in the doc
Differential Revision: https://www.youtube.com/watch?v=RsL0cipURA0
2020-12-17 15:40:16 +01:00
Xiang1 Zhang
7ce08bafea [Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.

For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D91595
2020-12-16 22:17:25 -08:00
Xiang1 Zhang
085e55a045 Revert "[Debugify] Support checking Machine IR debug info"
This reverts commit 50aaa8c274910d78d7bf6c929a34fe58b1f45579.
2020-12-16 20:12:33 -08:00
Xiang1 Zhang
d9173ede20 [Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.

For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D91595
2020-12-16 18:04:05 -08:00
Kai Nacke
3d56a7203c [Doc][SystemZ] Add Linux/SystemZ to Getting Started guide.
The Linux/SystemZ platform is missing in the Getting Started guide
as platform on which LLVM is known to work.

Reviewed by: uweigand

Differential Revision: https://reviews.llvm.org/D93388
2020-12-16 10:46:05 -05:00
Matt Arsenault
a6f5a606fa LangRef: Update byval/sret description for required types 2020-12-16 10:25:36 -05:00
Fangrui Song
0d6e89041d [docs][unittest][Go][StackProtector] Migrate deprecated DebugInfo::get to DILocation::get 2020-12-15 14:17:04 -08:00
Tony
2b79dcd0a2 [AMDGPU] Clarify scratch initialization
- Clarify documentation on initializing scratch.
- Rename compute_pgm_rsrc2 field for enabling scratch from
  ENABLE_SGPR_PRIVATE_SEGMENT_WAVEFRONT_OFFSET to
  ENABLE_PRIVATE_SEGMENT to match hardware definition.

Differential Revision: https://reviews.llvm.org/D93271
2020-12-15 20:14:20 +00:00
Nico Weber
f3e89af5f2 Revert "[Debugify] Support checking Machine IR debug info"
This reverts commit c4d2d4337d50bed3cafd564daece1a197005b22b.
Necessary to revert 2a5675f11d3bc803a245c0e.
2020-12-14 22:14:48 -05:00
Nico Weber
d107b74361 Revert "[amdgpu] Default to code object v3"
This reverts commit 4b2e7d0215021d0d1df1a6319884b21d33936265.
Breaks check-clang, see https://reviews.llvm.org/D93258#2453600
2020-12-14 22:01:26 -05:00
Xiang1 Zhang
6d8bb495f3 [Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.

For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D91595
2020-12-14 17:53:46 -08:00
Xiang1 Zhang
4721afcdaa Revert "[Debugify] Support checking Machine IR debug info"
This reverts commit 57a3d9ec4a8c1422f07264bed9f12a4ea416707e.
2020-12-14 17:48:49 -08:00
Xiang1 Zhang
437fc18cdb [Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.

For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D95195
2020-12-14 17:38:01 -08:00
Jon Chesterfield
499614b729 [amdgpu] Default to code object v3
[amdgpu] Default to code object v3
v4 is not yet readily available, and doesn't appear
to be implemented in the back end

Reviewed By: t-tye

Differential Revision: https://reviews.llvm.org/D93258
2020-12-15 01:11:09 +00:00
Tony
0edbddc58e [NFC]{AMDGPU] Update AMDGPUUsage with AMD RDNA 2 reference
Differential Revision: https://reviews.llvm.org/D93172
2020-12-13 17:21:02 +00:00
Tony
313d9ab376 [NFC][AMDGPU] AMDGPUUsage updates
- Document which processors are supported by which runtimes.
- Add missing mappings for code object V2 note records

Differential Revision: https://reviews.llvm.org/D93016
2020-12-12 18:19:02 +00:00
Alexey Bader
bd81c828b4 [Doc] Update branch name in Phabricator documentation
master -> main

Differential Revision: https://reviews.llvm.org/D93020
2020-12-10 22:25:04 +03:00
Alina Sbirlea
1574bc6938 [MemorySSA/docs] Extend MemorySSA documentation. 2020-12-09 18:00:16 -08:00
Joe Ellis
eb525ef991 [SelectionDAG] Add llvm.vector.{extract,insert} intrinsics
This commit adds two new intrinsics.

- llvm.experimental.vector.insert: used to insert a vector into another
  vector starting at a given index.

- llvm.experimental.vector.extract: used to extract a subvector from a
  larger vector starting from a given index.

The codegen work for these intrinsics has already been completed; this
commit is simply exposing the existing ISD nodes to LLVM IR.

Reviewed By: cameron.mcinally

Differential Revision: https://reviews.llvm.org/D91362
2020-12-09 11:08:41 +00:00
Nigel Perks
71a6d4655c [XCore][docs] Fix XCore compiler writer documentation links.
Fix links to XMOS website. Add link for XS2 architecture.

Reviewed By: jryans

Differential Revision: https://reviews.llvm.org/D92019
2020-12-08 12:21:09 +00:00
Sjoerd Meijer
34ffe52cbc [LICM][docs] Document that LICM is also a canonicalization transform. NFC.
This documents that LICM is a canonicalization transform, which we discussed
recently in:

http://lists.llvm.org/pipermail/llvm-dev/2020-December/147184.html

but which was also discused earlier, e.g. in:

http://lists.llvm.org/pipermail/llvm-dev/2019-September/135058.html
2020-12-08 11:56:35 +00:00
Jeremy Morse
c408669a93 [DebugInfo][Docs] Document MIR language debug-info constructs
This patch documents the MIR syntax for a number of things relevant to
debugging information:
 * Trailing 'debug-location' metadata that becomes a DebugLoc,
 * Variable location metadata for stack slots,
 * Syntax for DBG_VALUE metainstructions,
 * Syntax for DBG_INSTR_REF, including trailing instruction numbers
   attached to MIR instructions.

Differential Revision: https://reviews.llvm.org/D89337
2020-12-08 11:01:55 +00:00
Tim Northover
0fd5aa6df8 UBSAN: emit distinctive traps
Sometimes people get minimal crash reports after a UBSAN incident. This change
tags each trap with an integer representing the kind of failure encountered,
which can aid in tracking down the root cause of the problem.
2020-12-08 10:28:26 +00:00
wlei
db7fa377e4 [CSSPGO][llvm-profgen] Context-sensitive profile data generation
This stack of changes introduces `llvm-profgen` utility which generates a profile data file from given perf script data files for sample-based PGO. It’s part of(not only) the CSSPGO work. Specifically to support context-sensitive with/without pseudo probe profile, it implements a series of functionalities including perf trace parsing, instruction symbolization, LBR stack/call frame stack unwinding, pseudo probe decoding, etc. Also high throughput is achieved by multiple levels of sample aggregation and compatible format with one stop is generated at the end. Please refer to: https://groups.google.com/g/llvm-dev/c/1p1rdYbL93s for the CSSPGO RFC.

This change supports context-sensitive profile data generation into llvm-profgen. With simultaneous sampling for LBR and call stack, we can identify leaf of LBR sample with calling context from stack sample . During the process of deriving fall through path from LBR entries, we unwind LBR by replaying all the calls and returns (including implicit calls/returns due to inlining) backwards on top of the sampled call stack. Then the state of call stack as we unwind through LBR always represents the calling context of current fall through path.

we have two types of virtual unwinding 1) LBR unwinding and 2) linear range unwinding.
Specifically, for each LBR entry which can be classified into call, return, regular branch, LBR unwinding will replay the operation by pushing, popping or switching leaf frame towards the call stack and since the initial call stack is most recently sampled, the replay should be in anti-execution order, i.e. for the regular case, pop the call stack when LBR is call, push frame on call stack when LBR is return. After each LBR processed, it also needs to align with the next LBR by going through instructions from previous LBR's target to current LBR's source, which we named linear unwinding. As instruction from linear range can come from different function by inlining, linear unwinding will do the range splitting and record counters through the range with same inline context.

With each fall through path from LBR unwinding, we aggregate each sample into counters by the calling context and eventually generate full context sensitive profile (without relying on inlining) to driver compiler's PGO/FDO.

A breakdown of noteworthy changes:
- Added `HybridSample` class as the abstraction perf sample including LBR stack and call stack
* Extended `PerfReader` to implement auto-detect whether input perf script output contains CS profile, then do the parsing. Multiple `HybridSample` are extracted
* Speed up by aggregating  `HybridSample` into `AggregatedSamples`
* Added VirtualUnwinder that consumes aggregated  `HybridSample` and implements unwinding of calls, returns, and linear path that contains implicit call/return from inlining. Ranges and branches counters are aggregated by the calling context.
 Here calling context is string type, each context is a pair of function name and callsite location info, the whole context is like `main:1 @ foo:2 @ bar`.
* Added PorfileGenerater that accumulates counters by ranges unfolding or branch target mapping, then generates context-sensitive function profile including function body, inferring callee's head sample, callsite target samples, eventually records into ProfileMap.

* Leveraged LLVM build-in(`SampleProfWriter`) writer to support different serialization format with no stop
- `getCanonicalFnName` for callee name and name from ELF section
- Added regression test for both unwinding and profile generation

Test Plan:
ninja & ninja check-llvm

Reviewed By: hoy, wenlei, wmi

Differential Revision: https://reviews.llvm.org/D89723
2020-12-07 13:48:58 -08:00
Nico Weber
2e1a73029c docs: Add pointer to cmake caches for PGO
Also add a link to end-user PGO documentation.

Differential Revision: https://reviews.llvm.org/D92768
2020-12-07 15:55:26 -05:00
Hans Wennborg
0bc6a17a7e Test commit 2020-12-07 17:27:03 +01:00
Tony
0a2da89f49 [NFC][AMDGPU] AMDGPUUsage updates
- Document code object V2 gfx800.
- Document amdpal is supported by Linux Pro.

Differential Revision: https://reviews.llvm.org/D92708
2020-12-05 02:13:17 +00:00
Sean Silva
bc224c8fad [SmallVector] Allow SmallVector<T>
This patch adds a capability to SmallVector to decide a number of
inlined elements automatically. The policy is:

- A minimum of 1 inlined elements, with more as long as
sizeof(SmallVector<T>) <= 64.
- If sizeof(T) is "too big", then trigger a static_assert: this dodges
the more pathological cases

This is expected to systematically improve SmallVector use in the
LLVM codebase, which has historically been plagued by semi-arbitrary /
cargo culted N parameters, often leading to bad outcomes due to
excessive sizeof(SmallVector<T, N>). This default also makes
programming more convenient by avoiding edit/rebuild cycles due to
forgetting to type the N parameter.

Differential Revision: https://reviews.llvm.org/D92522
2020-12-03 17:21:44 -08:00
Paul C. Anagnostopoulos
15379f2764 [TableGen] Eliminate the 'code' type
Update the documentation.

Rework various backends that relied on the code type.

Differential Revision: https://reviews.llvm.org/D92269
2020-12-03 10:19:11 -05:00
Fangrui Song
649f05aa24 Switch from llvm::is_trivially_copyable to std::is_trivially_copyable
GCC<5 did not support std::is_trivially_copyable. Now LLVM builds require 5.1
we can migrate to std::is_trivially_copyable.

The Optional.h change made MSVC choke
(https://buildkite.com/llvm-project/premerge-checks/builds/18587#cd1bb616-ffdc-4581-9795-b42c284196de)
so I leave it out for now.

Differential Revision: https://reviews.llvm.org/D92514
2020-12-02 22:02:48 -08:00
Reid Kleckner
7c87aeebfe Revert "Use std::is_trivially_copyable", breaks MSVC build
Revert "Delete llvm::is_trivially_copyable and CMake variable HAVE_STD_IS_TRIVIALLY_COPYABLE"

This reverts commit 4d4bd40b578d77b8c5bc349ded405fb58c333c78.

This reverts commit 557b00e0afb2dc1776f50948094ca8cc62d97be4.
2020-12-02 14:30:46 -08:00
Fangrui Song
dffdc25f75 Use std::is_trivially_copyable
GCC<5 did not support std::is_trivially_copyable. Now LLVM builds require 5.1
we can migrate to std::is_trivially_copyable.
2020-12-02 09:58:07 -08:00
Bardia Mahjour
fbc2c5ae27 [LV] Epilogue Vectorization with Optimal Control Flow (Recommit)
This is yet another attempt at providing support for epilogue
vectorization following discussions raised in RFC http://llvm.1065342.n5.nabble.com/llvm-dev-Proposal-RFC-Epilog-loop-vectorization-tt106322.html#none
and reviews D30247 and D88819.

Similar to D88819, this patch achieve epilogue vectorization by
executing a single vplan twice: once on the main loop and a second
time on the epilogue loop (using a different VF). However it's able
to handle more loops, and generates more optimal control flow for
cases where the trip count is too small to execute any code in vector
form.

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D89566
2020-12-02 10:09:56 -05:00
David Sherwood
6d7c7dcc2b [SVE] Add support for scalable vectors with vectorize.scalable.enable loop attribute
In this patch I have added support for a new loop hint called
vectorize.scalable.enable that says whether we should enable scalable
vectorization or not. If a user wants to instruct the compiler to
vectorize a loop with scalable vectors they can now do this as
follows:

  br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !2
  ...
  !2 = !{!2, !3, !4}
  !3 = !{!"llvm.loop.vectorize.width", i32 8}
  !4 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}

Setting the hint to false simply reverts the behaviour back to the
default, using fixed width vectors.

Differential Revision: https://reviews.llvm.org/D88962
2020-12-02 13:23:43 +00:00
Tony
545440c6ae [NFC][AMDGPU] Fix broken link to ClangOffloadBundler in AMDGPUUsage 2020-12-02 03:04:28 +00:00
Tony
ebb5d91fda [NFC][AMDGPU] AMDGPU code object V4 ABI documentation
- Documantation for AMDGPU code object V4.
- Documentation clarification for code object V2 and V3.
- Documentation for the clang-offload-bundler.
- Numerous other documentation clarifications.

Change-Id: I338b327cc9e75da6c987b7e081b496402a5a020e

Differential Revision: https://reviews.llvm.org/D92434
2020-12-01 23:31:04 +00:00
Bardia Mahjour
b7eee47753 Revert "[LV] Epilogue Vectorization with Optimal Control Flow"
This reverts commit 9c5504adceb544d9954ddb8ff3035a414f4b1423.
Reverting to investigate build failure in http://lab.llvm.org:8011/#/builders/98/builds/1461/steps/9
2020-12-01 12:50:36 -05:00
Bardia Mahjour
63b138b338 [LV] Epilogue Vectorization with Optimal Control Flow
This is yet another attempt at providing support for epilogue
vectorization following discussions raised in RFC http://llvm.1065342.n5.nabble.com/llvm-dev-Proposal-RFC-Epilog-loop-vectorization-tt106322.html#none
and reviews D30247 and D88819.

Similar to D88819, this patch achieve epilogue vectorization by
executing a single vplan twice: once on the main loop and a second
time on the epilogue loop (using a different VF). However it's able
to handle more loops, and generates more optimal control flow for
cases where the trip count is too small to execute any code in vector
form.

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D89566
2020-12-01 12:04:29 -05:00
Amy Huang
b375f49096 Recommit "[llvm-symbolizer] Switch to using native symbolizer by default on Windows"
This reverts commit 1b63177a56e8cd6196778d2b90295f03e96b5800.
2020-11-30 17:36:12 -08:00
Juneyoung Lee
b00d8684c3 [LangRef] missing link, minor fix 2020-11-30 23:09:36 +09:00
David Spickett
5c2736b6c2 [llvm-objdump] Document --mattr=help in --help output
This does the same as `--mcpu=help` but was only
documented in the user guide.

* Added a test for both options.
* Corrected the single dash in `-mcpu=help` text.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D92305
2020-11-30 12:52:54 +00:00
Juneyoung Lee
e5f43fdeb3 [LangRef] minor fixes to poison examples and well-defined values section (NFC) 2020-11-29 20:51:25 +09:00
Juneyoung Lee
7546d005c8 [LangRef] Add poison constant
This patch adds a description about the newly added poison constant to LangRef.

Differential Revision: https://reviews.llvm.org/D92162
2020-11-27 10:29:52 +09:00
Marek Kurdej
542b1725df [llvm-profgen] [docs] Fix invalid header. Add to ToC. NFC. 2020-11-26 10:45:05 +01:00
Amy Huang
2504c5bf49 Revert "[llvm-symbolizer] Switch to using native symbolizer by default on Windows"
Breaks some asan tests on the buildbot.

This reverts commit c74b427cb2a90309ee0c29df21ad1ca26390263c.
2020-11-23 16:29:45 -08:00
Amy Huang
f6737ef448 [llvm-symbolizer] Switch to using native symbolizer by default on Windows
llvm-symbolizer used to use the DIA SDK for symbolization on
Windows; this patch switches to using native symbolization, which was
implemented recently.

Users can still make the symbolizer use DIA by adding the `-dia` flag
in the LLVM_SYMBOLIZER_OPTS environment variable.

Differential Revision: https://reviews.llvm.org/D91814
2020-11-23 15:57:08 -08:00
Paul C. Anagnostopoulos
58226c6585 [TableGen] Eliminte source location from CodeInit
Step 1 in eliminating the 'code' type.

Differential Revision: https://reviews.llvm.org/D91932
2020-11-23 11:30:13 -05:00
Tony
7cfcd72ff5 [NFC][AMDGPU] Document kernel descriptor
- Document that the kernel descriptor defined is for code object V3.
  Document that it also applies to earlier code object formats for CP.

- Document the deprecated bits in kernel descriptor.

Differential Revision: https://reviews.llvm.org/D91458
2020-11-21 04:54:17 +00:00
wlei
dd799fc98b [llvm-profgen][NFC]Fix build failure on different platform
see titile
Test Plan:
ninja & ninja check-llvm

Reviewed By: hoy

Differential Revision: https://reviews.llvm.org/D91897
2020-11-20 16:36:04 -08:00
wlei
563627eb7b [CSSPGO][llvm-profgen] Disassemble text sections
This stack of changes introduces `llvm-profgen` utility which generates a profile data file from given perf script data files for sample-based PGO. It’s part of(not only) the CSSPGO work. Specifically to support context-sensitive with/without pseudo probe profile, it implements a series of functionalities including perf trace parsing, instruction symbolization, LBR stack/call frame stack unwinding, pseudo probe decoding, etc. Also high throughput is achieved by multiple levels of sample aggregation and compatible format with one stop is generated at the end. Please refer to: https://groups.google.com/g/llvm-dev/c/1p1rdYbL93s for the CSSPGO RFC.

This change enables disassembling the text sections to build various address maps that are potentially used by the virtual unwinder.  A switch `--show-disassembly` is being added to print the disassembly code.

Like the llvm-objdump tool, this change leverages existing LLVM components to parse and disassemble ELF binary files. So far X86 is supported.

Test Plan:

ninja check-llvm

Reviewed By: wmi, wenlei

Differential Revision: https://reviews.llvm.org/D89712
2020-11-20 14:26:26 -08:00
wlei
cc95d46ee1 [CSSPGO][llvm-profgen] Parse mmap events from perf script
This stack of changes introduces `llvm-profgen` utility which generates a profile data file from given perf script data files for sample-based PGO. It’s part of(not only) the CSSPGO work. Specifically to support context-sensitive with/without pseudo probe profile, it implements a series of functionalities including perf trace parsing, instruction symbolization, LBR stack/call frame stack unwinding, pseudo probe decoding, etc. Also high throughput is achieved by multiple levels of sample aggregation and compatible format with one stop is generated at the end. Please refer to: https://groups.google.com/g/llvm-dev/c/1p1rdYbL93s for the CSSPGO RFC.

As a starter, this change sets up an entry point by introducing PerfReader to load profiled binaries and perf traces(including perf events and perf samples). For the event, here it parses the mmap2 events from perf script to build the loader snaps, which is used to retrieve the image load address in the subsequent perf tracing parsing.

As described in llvm-profgen.rst, the tool being built aims to support multiple input perf data (preprocessed by perf script) as well as multiple input binary images. It should also support dynamic reload/unload shared objects by leveraging the loader snaps being built by this change

Reviewed By: wenlei, wmi

Differential Revision: https://reviews.llvm.org/D89707
2020-11-20 14:26:26 -08:00
Alex Richardson
9c96f39f77 Add a default address space for globals to DataLayout
This is similar to the existing alloca and program address spaces (D37052)
and should be used when creating/accessing global variables.
We need this in our CHERI fork of LLVM to place all globals in address space 200.
This ensures that values are accessed using CHERI load/store instructions
instead of the normal MIPS/RISC-V ones.

The problem this is trying to fix is that most of the time the type of
globals is created using a simple PointerType::getUnqual() (or ::get() with
the default address-space value of 0). This does not work for us and we get
assertion/compilation/instruction selection failures whenever a new call
is added that uses the default value of zero.

In our fork we have removed the default parameter value of zero for most
address space arguments and use DL.getProgramAddressSpace() or
DL.getGlobalsAddressSpace() whenever possible. If this change is accepted,
I will upstream follow-up patches to use DL.getGlobalsAddressSpace() instead
of relying on the default value of 0 for PointerType::get(), etc.

This patch and the follow-up changes will not have any functional changes
for existing backends with the default globals address space of zero.
A follow-up commit will change the default globals address space for
AMDGPU to 1.

Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D70947
2020-11-20 15:46:52 +00:00
Pavel Iliin
2529cb73ff [AArch64] Out-of-line atomics (-moutline-atomics) implementation.
This patch implements out of line atomics for LSE deployment
mechanism. Details how it works can be found in llvm/docs/Atomics.rst
Options -moutline-atomics and -mno-outline-atomics to enable and disable it
were added to clang driver. This is clang and llvm part of out-of-line atomics
interface, library part is already supported by libgcc. Compiler-rt
support is provided in separate patch.

Differential Revision: https://reviews.llvm.org/D91157
2020-11-20 13:30:12 +00:00
Leonard Chan
c24d9d2b01 [llvm][IR] Add dso_local_equivalent Constant
The `dso_local_equivalent` constant is a wrapper for functions that represents a
value which is functionally equivalent to the global passed to this. That is, if
this accepts a function, calling this constant should have the same effects as
calling the function directly. This could be a direct reference to the function,
the `@plt` modifier on X86/AArch64, a thunk, or anything that's equivalent to the
resolved function as a call target.

When lowered, the returned address must have a constant offset at link time from
some other symbol defined within the same binary. The address of this value is
also insignificant. The name is leveraged from `dso_local` where use of a function
or variable is resolved to a symbol in the same linkage unit.

In this patch:
- Addition of `dso_local_equivalent` and handling it
- Update Constant::needsRelocation() to strip constant inbound GEPs and take
  advantage of `dso_local_equivalent` for relative references

This is useful for the [Relative VTables C++ ABI](https://reviews.llvm.org/D72959)
which makes vtables readonly. This works by replacing the dynamic relocations for
function pointers in them with static relocations that represent the offset between
the vtable and virtual functions. If a function is externally defined,
`dso_local_equivalent` can be used as a generic wrapper for the function to still
allow for this static offset calculation to be done.

See [RFC](http://lists.llvm.org/pipermail/llvm-dev/2020-August/144469.html) for more details.

Differential Revision: https://reviews.llvm.org/D77248
2020-11-19 10:26:17 -08:00
Nick Desaulniers
b2b1b97849 Revert "[IR] add fn attr for no_stack_protector; prevent inlining on mismatch"
This reverts commit b7926ce6d7a83cdf70c68d82bc3389c04009b841.

Going with a simpler approach.
2020-11-17 17:27:14 -08:00
Florian Hahn
4864887dc5 [VPlan] Add VPDef class.
This patch introduces a new VPDef class, which can be used to
manage VPValues defined by recipes/VPInstructions.

The idea here is to mirror VPUser for values defined by a recipe. A
VPDef can produce either zero (e.g. a store recipe), one (most recipes)
or multiple (VPInterleaveRecipe) result VPValues.

To traverse the def-use chain from a VPDef to its users, one has to
traverse the users of all values defined by a VPDef.

VPValues now contain a pointer to their corresponding VPDef, if one
exists. To traverse the def-use chain upwards from a VPValue, we first
need to check if the VPValue is defined by a VPDef. If it does not have
a VPDef, this means we have a VPValue that is not directly defined
iniside the plan and we are done.

If we have a VPDef, it is defined inside the region by a recipe, which
is a VPUser, and the upwards def-use chain traversal continues by
traversing all its operands.

Note that we need to add an additional field to to VPVAlue to link them
to their defs. The space increase is going to be offset by being able to
remove the SubclassID field in future patches.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D90558
2020-11-17 16:18:11 +00:00
Michael Liao
f1ef8ad5ff [InferAddrSpace] Teach to handle assumed address space.
- In certain cases, a generic pointer could be assumed as a pointer to
  the global memory space or other spaces. With a dedicated target hook
  to query that address space from a given value, infer-address-space
  pass could infer and propagate that to all its users.

Differential Revision: https://reviews.llvm.org/D91121
2020-11-16 17:06:33 -05:00
Paul C. Anagnostopoulos
af5277fb13 [TableGen] Improve a couple of descriptions in the command guide
Differential Revision: https://reviews.llvm.org/D91484
2020-11-15 09:59:59 -05:00
Paul C. Anagnostopoulos
17cd31c30e [TableGen] Add frontend/backend phase timing capability.
Describe in the BackEnd Developer's Guide. Instrument a few backends.

Remove an old unused timing facility. Add a null backend for timing
the parser.

Differential Revision: https://reviews.llvm.org/D91388
2020-11-14 10:10:29 -05:00
Nikita Popov
effaed5675 [LangRef] Clarify GEP inbounds wrapping semantics
Clarify the semantics of GEP inbounds, in particular with regard
to what it means for wrapping. This cleans up some confusion on
when it is legal to apply nuw/nsw flags to various parts of the
GEP calculation.

Differential Revision: https://reviews.llvm.org/D90708
2020-11-13 17:49:41 +01:00
Paul C. Anagnostopoulos
82f80b36cd [TableGen] Enhance the six comparison bang operators.
Update the Programmer's Reference.

Differential Revision: https://reviews.llvm.org/D91036
2020-11-13 09:57:27 -05:00
serge-sans-paille
ae7304bdea llvmbuildectomy - compatibility with ocaml bindings
Use exact component name in add_ocaml_library.
Make expand_topologically compatible with new architecture.
Fix quoting in is_llvm_target_library.
Fix LLVMipo component name.
Write release note.
2020-11-13 14:35:52 +01:00
Florian Hahn
041da6277f Add !annotation metadata and remarks pass.
This patch adds a new !annotation metadata kind which can be used to
attach annotation strings to instructions.

It also adds a new pass that emits summary remarks per function with the
counts for each annotation kind.

The intended uses cases for this new metadata is annotating
'interesting' instructions and the remarks should provide additional
insight into transformations applied to a program.

To motivate this, consider these specific questions we would like to get answered:

* How many stores added for automatic variable initialization remain after optimizations? Where are they?
* How many runtime checks inserted by a frontend could be eliminated? Where are the ones that did not get eliminated?

Discussed on llvm-dev as part of 'RFC: Combining Annotation Metadata and Remarks'
(http://lists.llvm.org/pipermail/llvm-dev/2020-November/146393.html)

Reviewed By: thegameg, jdoerfert

Differential Revision: https://reviews.llvm.org/D91188
2020-11-13 13:24:10 +00:00
Florian Hahn
744ac7e74e [docs] Fix undefined reference in ORCv2 design doc.
This fixes a typo introduced in 984e87923f1096c815cef900cda0926c68286ddf
which caused the docs build to fail.
2020-11-13 09:44:48 +00:00
serge-sans-paille
82b6e6053d llvmbuildectomy - replace llvm-build by plain cmake
No longer rely on an external tool to build the llvm component layout.

Instead, leverage the existing `add_llvm_componentlibrary` cmake function and
introduce `add_llvm_component_group` to accurately describe component behavior.

These function store extra properties in the created targets. These properties
are processed once all components are defined to resolve library dependencies
and produce the header expected by llvm-config.

Differential Revision: https://reviews.llvm.org/D90848
2020-11-13 10:35:24 +01:00
Lang Hames
19bcc02c62 [docs] Fix formatting, clarify comment in ORCv2 doc 2020-11-12 13:11:01 +11:00
Lang Hames
56fbd9511b [docs] Fix formatting in ORCv2.rst.
Bold and fixed-width do not appear to mix well.
2020-11-12 11:08:58 +11:00
Lang Hames
f3031ea7aa [docs] Update ORCv2 design doc.
Fixes some formatting and wording, and adds a roadmap section.
2020-11-12 10:33:29 +11:00
Renato Golin
b0b9198036 [docs] link new support policy from developer policy
Adding new paragraphs under "Introducing New Components" section to
check the different levels of support we have, to help introduction of
smaller set of changes without overwhelming new collaborators and
potentially losing the contribution.

Differential Revision: D91013
2020-11-10 19:40:57 +00:00
David Green
f1fd013f54 [Sphinx] Fix langref formatting. NFC 2020-11-10 16:47:43 +00:00
David Green
0773b05cfa [ARM] Alter t2DoLoopStart to define lr
This changes the definition of t2DoLoopStart from
t2DoLoopStart rGPR
to
GPRlr = t2DoLoopStart rGPR

This will hopefully mean that low overhead loops are more tied together,
and we can more reliably generate loops without reverting or being at
the whims of the register allocator.

This is a fairly simple change in itself, but leads to a number of other
required alterations.

 - The hardware loop pass, if UsePhi is set, now generates loops of the
   form:
       %start = llvm.start.loop.iterations(%N)
     loop:
       %p = phi [%start], [%dec]
       %dec = llvm.loop.decrement.reg(%p, 1)
       %c = icmp ne %dec, 0
       br %c, loop, exit
 - For this a new llvm.start.loop.iterations intrinsic was added, identical
   to llvm.set.loop.iterations but produces a value as seen above, gluing
   the loop together more through def-use chains.
 - This new instrinsic conceptually produces the same output as input,
   which is taught to SCEV so that the checks in MVETailPredication are not
   affected.
 - Some minor changes are needed to the ARMLowOverheadLoop pass, but it has
   been left mostly as before. We should now more reliably be able to tell
   that the t2DoLoopStart is correct without having to prove it, but
   t2WhileLoopStart and tail-predicated loops will remain the same.
 - And all the tests have been updated. There are a lot of them!

This patch on it's own might cause more trouble that it helps, with more
tail-predicated loops being reverted, but some additional patches can
hopefully improve upon that to get to something that is better overall.

Differential Revision: https://reviews.llvm.org/D89881
2020-11-10 15:57:58 +00:00
Paul C. Anagnostopoulos
25ecf898fc [TableGen] Add the !filter bang operator.
Add a test. Update the Programmer's Reference.

Use it in some TableGen files.

Differential Revision: https://reviews.llvm.org/D91008
2020-11-09 10:56:55 -05:00
Sebastian Neubauer
7e4be9501b [AMDGPU] Add amdgpu_gfx calling convention
Add a calling convention called amdgpu_gfx for real function calls
within graphics shaders. For the moment, this uses the same calling
convention as other calls in amdgpu, with registers excluded for return
address, stack pointer and stack buffer descriptor.

Differential Revision: https://reviews.llvm.org/D88540
2020-11-09 16:51:44 +01:00
Renato Golin
5f28812127 [docs] Adding a Support Policy
As discussed in the mailing list [1-4], we need a separation of support
tiers when requiring support from the whole community versus a
sub-community. Essentially, if a sub-community is active enough and
takes maintenance into their own internal costs without affecting other
parts of the community's maintenance costs, then code that is not
immediately relevant to all parts (ie. not released, actively tested,
etc) can still find its way into the LLVM main repository without major
pain points.

The main benefit is to reduce the maintenance cost that those
sub-communities have outside of LLVM (for example, in duplicating common
code, applying the same patches on top of multiple user repositories or
downstream projects).

This document outlines the components and responsibilities of the
sub-communities with regards to maintenance costs and how they affect
the rest of the community.

It also adds an addendum on removal policies, which expand the existing
"new target removal" policy into something more generic, to encompass
any piece of code, scripts or documents in the repository.

[1] http://lists.llvm.org/pipermail/llvm-dev/2020-October/146249.html
[2] http://lists.llvm.org/pipermail/llvm-dev/2020-November/146335.html
[3] http://lists.llvm.org/pipermail/llvm-dev/2020-October/146138.html
[4] http://lists.llvm.org/pipermail/llvm-dev/2020-November/146298.html
2020-11-07 21:06:05 +00:00
Arnold Schwaighofer
3fe61868a9 llvm.coro.id.async lowering: Parameterize how-to restore the current's continutation context and restart the pipeline after splitting
The `llvm.coro.suspend.async` intrinsic takes a function pointer as its
argument that describes how-to restore the current continuation's
context from the context argument of the continuation function. Before
we assumed that the current context can be restored by loading from the
context arguments first pointer field (`first_arg->caller_context`).

This allows for defining suspension points that reuse the current
context for example.

Also:

llvm.coro.id.async lowering: Add llvm.coro.preprare.async intrinsic

Blocks inlining until after the async coroutine was split.

Also, change the async function pointer's context size position

   struct async_function_pointer {
     uint32_t relative_function_pointer_to_async_impl;
     uint32_t context_size;
   }

And make the position of the `async context` argument configurable. The
position is specified by the `llvm.coro.id.async` intrinsic.

rdar://70097093

Differential Revision: https://reviews.llvm.org/D90783
2020-11-06 06:22:46 -08:00
Paul C. Anagnostopoulos
af8abf220b [TableGen] Clarify text and fix errors in the Programmer's Reference
Differential Revision: https://reviews.llvm.org/D90881
2020-11-06 08:56:29 -05:00
Paul C. Anagnostopoulos
a49fe8891e [TableGen] Clean up documentation toctrees; clarify two paragraphs.
Differential Revision: https://reviews.llvm.org/D90804
2020-11-05 16:19:18 -05:00
Paul C. Anagnostopoulos
0830936d52 [TableGen] Add true and false literals to represent booleans
Update the Programmer's Reference document.

Add a test. Update a couple of tests with an improved error message.

Differential Revision: https://reviews.llvm.org/D90635
2020-11-05 09:07:21 -05:00
Atmn Patel
f818c9012a [LangRef] Adds llvm.loop.mustprogress loop metadata
This patch adds the llvm.loop.mustprogress loop metadata. This is to be
added to loops where the frontend language requires that the loop makes
observable interactions with the environment. This is the loop-level
equivalent to the function attribute `mustprogress` defined in D86233.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D88464
2020-11-04 22:32:50 -05:00
Arnold Schwaighofer
d90984c1dd Start of an llvm.coro.async implementation
This patch adds the `async` lowering of coroutines.

This will be used by the Swift frontend to lower async functions. In
contrast to the `retcon` lowering the frontend needs to be in control
over control-flow at suspend points as execution might be suspended at
these points.

This is very much work in progress and the implementation will change as
it evolves with the frontend. As such the documentation is lacking
detail as some of it might change.

rdar://70097093

Reapply with fix for memory sanitizer failure and sphinx failure.

Differential Revision: https://reviews.llvm.org/D90612
2020-11-04 10:29:21 -08:00
Arnold Schwaighofer
c8e9566a32 Revert "Start of an llvm.coro.async implementation"
This reverts commit ea606cced0583d1dbd4c44680601d1d4e9a56e58.

This patch causes memory sanitizer failures sanitizer-x86_64-linux-fast.
2020-11-04 08:26:20 -08:00
Arnold Schwaighofer
3e8facdd39 Start of an llvm.coro.async implementation
This patch adds the `async` lowering of coroutines.

This will be used by the Swift frontend to lower async functions. In
contrast to the `retcon` lowering the frontend needs to be in control
over control-flow at suspend points as execution might be suspended at
these points.

This is very much work in progress and the implementation will change as
it evolves with the frontend. As such the documentation is lacking
detail as some of it might change.

rdar://70097093

Differential Revision: https://reviews.llvm.org/D90612
2020-11-04 07:32:29 -08:00
Paul C. Anagnostopoulos
9295b21984 [TableGen] Add !interleave operator to concatenate a list of values with delimiters
Add a test. Use it in some TableGen files.

Differential Revision: https://reviews.llvm.org/D90469
2020-11-04 09:23:54 -05:00
Fangrui Song
955aec52ea [docs] Fix docs-llvm-html after recent TableGen changes D90617 2020-11-03 13:43:24 -08:00
Tony
05efac7ee2 [NFC][AMDGPU] Minor editorial improvements to AMDGPUUsage.rst
Differential Revision: https://reviews.llvm.org/D90661
2020-11-03 16:56:01 +00:00
Tim Renouf
83e3834a8d [AMDGPU] Add gfx1033 target
Differential Revision: https://reviews.llvm.org/D90447

Change-Id: If2650fc7f31bbdd49c76e74a9ca8e3734d769761
2020-11-03 16:27:48 +00:00
Tim Renouf
2a63696860 [AMDGPU] Add gfx90c target
This differentiates the Ryzen 4000/4300/4500/4700 series APUs that were
previously included in gfx909.

Differential Revision: https://reviews.llvm.org/D90419

Change-Id: Ia901a7157eb2f73ccd9f25dbacec38427312377d
2020-11-03 16:27:43 +00:00
Mircea Trofin
6041d3461b [Docs][FileCheck] Small fix. 2020-11-03 07:08:51 -08:00
Tony
da9521a27f [NFC][AMDGPU] Restructure the AMDGPU memory model description
Separate the AMDGPU memory model description into separate sections
for each architecture.

Differential Revision: https://reviews.llvm.org/D90548
2020-11-02 21:32:20 +00:00
Atmn Patel
4adb5d4209 [Coroutines][Docs] Remove frame packing as a TODO
This has already been done by @rjmccall in D76526 (49e5a97ec363), and
9514c048d89e. We should remove this from the docs.

Differential Revision: https://reviews.llvm.org/D90550
2020-11-02 15:57:04 -05:00
Mircea Trofin
f2bff76dd3 [FileCheck] Added documentation for --allow-unused-prefixes
Differential Revision: https://reviews.llvm.org/D90621
2020-11-02 12:15:45 -08:00
Paul C. Anagnostopoulos
e028635778 [TableGen] Fix a couple of minor issues regarding the paste operator.
Update the documentation to fully describe it.

Differential Revision: https://reviews.llvm.org/D90617
2020-11-02 12:21:54 -05:00
Caroline Concatto
d88ee71498 Revert "[AArch64][AsmParser] Remove 'x31' alias for 'sp/xzr' register."
This reverts commit 8b281bfaf35d00d42c2993fd5a80d749cc21f45e.
2020-11-02 08:15:50 +00:00
Caroline Concatto
19fb2444af [AArch64][AsmParser] Remove 'x31' alias for 'sp/xzr' register.
Only the aliases 'xzr' and 'sp' exist for the physical register x31.
The reason for wanting to remove the alias 'x31' is because it allows users
to write invalid asm that is not accepted by the GNU assembler.

Is there any objection to removing this alias? Or do we want to keep
this for compatibility with existing code that uses w31/x31?

Differential Revision: https://reviews.llvm.org/D90153
2020-11-02 07:57:05 +00:00
Liu, Chen3
0f29f1e458 [X86] Support Intel avxvnni
This patch mainly made the following changes:

1. Support AVX-VNNI instructions;
2. Introduce ExplicitVEXPrefix flag so that vpdpbusd/vpdpbusds/vpdpbusds/vpdpbusds instructions only use vex-encoding when user explicity add {vex} prefix.

Differential Revision: https://reviews.llvm.org/D89105
2020-10-31 12:39:51 +08:00
Tony
2aebcb4378 [NFC][AMDGPU] Minor cleanup to AMDGPU memory model table
Differential Revision: https://reviews.llvm.org/D90509
2020-10-30 22:50:22 +00:00
Scott Linder
3d87386ebf [NFC][AMDGPU] Resize Memory Model columns in AMDGPUUsage.rst
Make all of the "AMDGPU Machine Code GFX*" columns in the Memory Model
table a consistent width of 32-characters.

Best viewed with something like --word-diff

Differential Revision: https://reviews.llvm.org/D89977
2020-10-29 23:07:03 +00:00
Scott Linder
e2577bcfdc [AMDGPU] Update Memory Model in AMDGPUUsage.rst
Mostly NFC, but some changes are "bug fixes" rather than just e.g.
formatting changes or typo corrections.

- Fix typo "competing" -> "completing".
- Document why waintcnt is added to stores and not loads for
  sequentially consistent ordering.
- Lowercase some mentions of `buffer_gl{0,1}_inv`.
- Make mentions of `*cnt(0)` consistently include the `(0)` count.
- Remove some mentions of instructions for incorrect address spaces. For
  example, remove mention of `flat_load` from
  `load atomic acquire workgroup global`.
- Re-flow some text to get all the target columns to fit in a
  32-character wide column. Makes a future NFC patch to make these columns
  both 32-character wide more straightforward.

Modified cherry-pick of patch by Tony Tye

Reviewed By: t-tye

Differential Revision: https://reviews.llvm.org/D89596
2020-10-29 23:07:03 +00:00
Stefanos Baziotis
d9f0b9e2f4 [LCSSA] Doc for special treatment of PHIs
Differential Revision: https://reviews.llvm.org/D89739
2020-10-29 22:50:07 +02:00
Nikita Popov
261a4b21fb [CodeGen] Fix neutral value of vecreduce fadd in tests (NFC)
The neutral value is -0.0, not 0.0. This doesn't matter for "fast"
reductions due to nsz, but does matter for reassoc-only and seq
reductions.

Change tests to mostly use -0.0 where the neutral value was intended,
and add some additional test coverage in some places. Also update
LangRef to use the right value.
2020-10-29 21:26:14 +01:00
Tony
4b2fceb859 [AMDGPU] Update AMD GPU documentation
- AMDGPUUsage.rst: Correct AMD GPU DWARF address space table address
  sizes which are in bits and not bytes.

- clang/.../Options.td: Improve description of AMD GPU options.

- Re-generate ClangComamndLineReference.rst from clang/.../Options.td .

Differential Revision: https://reviews.llvm.org/D90364
2020-10-29 20:12:47 +00:00
Mehdi Amini
5e84d47808 Make the post-commit review expectations more explicit with respect to revert
See  http://lists.llvm.org/pipermail/llvm-dev/2016-March/096529.html for
context.

Reviewed By: silvas, rengolin, echristo, dexonsmith, gribozavr2

Differential Revision: https://reviews.llvm.org/D89995
2020-10-28 23:29:29 +00:00
Paul C. Anagnostopoulos
961a515ed0 [TableGen] [AMDGPU] Add !sub operator for subtraction
Use it in the AMDGPU target to eliminate !add(value1, !mul(value2, -1))

Differential Revision: https://reviews.llvm.org/D90107
2020-10-28 12:27:53 -04:00
Paul C. Anagnostopoulos
2be44969ba [TableGen] Command description file requires a hyphen in document title. 2020-10-28 09:31:31 -04:00
Paul C. Anagnostopoulos
f49b986f20 [TableGen] Update xxx-tblgen command document.
Add a few cross-references among TableGen documents.

Differential Revision: https://reviews.llvm.org/D90186

Add cross-references between TableGen documents.
2020-10-28 09:08:13 -04:00
Clement Courbet
6f015a2381 [llvm-exegesis][doc] Remove old FIXME.
This was fixed in a previous commit, the previous line in the
documentation explains how to proceed.
2020-10-28 10:53:23 +01:00
Clement Courbet
e9e3b95b0c [llvm-exegesis] Update doc.
We don't need an external script to scan all opcodes anymore, just use
`-opcode-index=-1`.
2020-10-28 08:42:38 +01:00
Johannes Doerfert
bf9703343b [LangRef] Clarify dereferenceable -> nonnull implication
If `null_pointer_is_valid` is present, `dereferenceable` does not imply
`nonnull`, make it clear.

Came up in D17993.

Reviewed By: aqjune

Differential Revision: https://reviews.llvm.org/D89417
2020-10-27 19:12:53 -05:00
Georgii Rymar
4708221cf7 [llvm-readelf] - Implement --section-details option.
--section-details/-t is a GNU readelf option that produce
an output that is an alternative to --sections.

Differential revision: https://reviews.llvm.org/D89304
2020-10-27 13:29:39 +03:00
Vedant Kumar
54baa09ec4 [cmake] Add LLVM_UBSAN_FLAGS, to allow overriding UBSan flags
Allow overriding the default set of flags used to enable UBSan when
building llvm.

This can be used to test new checks or opt out of certain checks.

Differential Revision: https://reviews.llvm.org/D89439
2020-10-26 15:48:19 -07:00
Benjamin Kramer
1f13ddec12 [X86] Add a stub for Intel's alderlake.
No scheduling, no autodetection.
2020-10-24 19:01:22 +02:00
Tony
a12729cc2b [AMDGPU] Cleanup AMDGPUUsage.rst
- Layout and typo improvements.
- Add memory spaces section.
- reStructure syntax fixes.

Differential Revision: https://reviews.llvm.org/D90002
2020-10-24 06:21:27 +00:00
Artur Pilipenko
31af2fa7ed GC-parseable element atomic memcpy/memmove
This change introduces a GC parseable lowering for element atomic
memcpy/memmove intrinsics. This way runtime can provide an
implementation which can take a safepoint during copy operation.

See "GC-parseable element atomic memcpy/memmove" thread on llvm-dev
for the background and details:
https://groups.google.com/g/llvm-dev/c/NnENHzmX-b8/m/3PyN8Y2pCAAJ

Differential Revision: https://reviews.llvm.org/D88861
2020-10-23 14:06:09 -07:00
Nick Desaulniers
e95a065d26 [IR] add fn attr for no_stack_protector; prevent inlining on mismatch
It's currently ambiguous in IR whether the source language explicitly
did not want a stack a stack protector (in C, via function attribute
no_stack_protector) or doesn't care for any given function.

It's common for code that manipulates the stack via inline assembly or
that has to set up its own stack canary (such as the Linux kernel) would
like to avoid stack protectors in certain functions. In this case, we've
been bitten by numerous bugs where a callee with a stack protector is
inlined into an __attribute__((__no_stack_protector__)) caller, which
generally breaks the caller's assumptions about not having a stack
protector. LTO exacerbates the issue.

While developers can avoid this by putting all no_stack_protector
functions in one translation unit together and compiling those with
-fno-stack-protector, it's generally not very ergonomic or as
ergonomic as a function attribute, and still doesn't work for LTO. See also:
https://lore.kernel.org/linux-pm/20200915172658.1432732-1-rkir@google.com/
https://lore.kernel.org/lkml/20200918201436.2932360-30-samitolvanen@google.com/T/#u

Typically, when inlining a callee into a caller, the caller will be
upgraded in its level of stack protection (see adjustCallerSSPLevel()).
By adding an explicit attribute in the IR when the function attribute is
used in the source language, we can now identify such cases and prevent
inlining.  Block inlining when the callee and caller differ in the case that one
contains `nossp` when the other has `ssp`, `sspstrong`, or `sspreq`.

Fixes pr/47479.

Reviewed By: void

Differential Revision: https://reviews.llvm.org/D87956
2020-10-23 11:55:39 -07:00
Paul C. Anagnostopoulos
a16b7dbf16 [TableGen] Change !getop and !setop to !getdagop and !setdagop.
Differential Revision: https://reviews.llvm.org/D89814
2020-10-23 10:36:05 -04:00
Nick Desaulniers
9d3871429a BitCodeFormat: update doc on new byref and mustprogress attrs; NFC
Forked from review of:
https://reviews.llvm.org/D87956
2020-10-22 16:29:56 -07:00
Tom Stellard
5454af6727 HowToReleaseLLVM: Clean up document and remove references to SVN
Reviewed By: hans

Differential Revision: https://reviews.llvm.org/D80395
2020-10-22 11:34:03 -07:00
Paul C. Anagnostopoulos
8a7a44c2c6 [TableGen] Update documents to make them more complete
Differential Revision: https://reviews.llvm.org/D89962
2020-10-22 13:19:19 -04:00
Arthur Eubanks
9d7ca40d8d Revert "[Docs] Clarify that FunctionPasses can't add/remove declarations"
This reverts commit 710676cf3a3c6f6ddf2f18e24cac017d20dac1ff.
2020-10-22 09:49:42 -07:00
Arthur Eubanks
4381b544ab [Docs] Clarify that FunctionPasses can't add/remove declarations
In preparation for potential future concurrency, a FunctionPass
shouldn't modify anything at the module level that other FunctionPasses
can also modify.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D89890
2020-10-22 09:03:42 -07:00
Paul C. Anagnostopoulos
e57a8ed671 [TableGen] Continue improving the comments for the data structures.
Differential Revision: https://reviews.llvm.org/D89901
2020-10-22 10:00:49 -04:00
Tianqing Wang
e6283a5b5d [X86] Add User Interrupts(UINTR) instructions
For more details about these instructions, please refer to the latest
ISE document:
https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D89301
2020-10-22 17:33:07 +08:00
Wang, Pengfei
a413347201 [X86] Add clang release notes for HRESET and minor change for llvm release notes. (NFC) 2020-10-21 15:59:42 +08:00
Konrad Kleine
310ff80e10 [doc] Apply buildbot worker terminology change: slave->worker
Recently [1], there was an upgrade to the version of buildbot being
deployed. The new setup will still work with old buildslaves but I
thought it might be a good idea to update the documentation to reflect,
that you now can use a newer buildbot version to when setting up your
worker (formely known as slave).

The upgrade from buildbot 0.8.5 to 2.8.5 went a long with a transition
to a new "worker" terminology [2] which is also reflected by this
change.

[1]: http://lists.llvm.org/pipermail/llvm-dev/2020-October/145629.html
[2]: http://docs.buildbot.net/0.9.12/manual/worker-transition.html

Reviewed By: gkistanova

Differential Revision: https://reviews.llvm.org/D89230
2020-10-20 06:43:09 -04:00
Artur Pilipenko
12e6efee22 Adding new Azul representative to security group
Adding myself as a new Azul representative to security group.

Differential Revision: https://reviews.llvm.org/D89287
2020-10-19 22:41:19 -07:00
Atmn Patel
cbe95c4921 [LangRef] Define mustprogress attribute
LLVM IR currently assumes some form of forward progress. This form is
not explicitly defined anywhere, and is the cause of miscompilations
in most languages that are not C++11 or later. This implicit forward progress
guarantee can not be opted out of on a function level nor on a loop
level. Languages such as C (C11 and later), C++ (pre-C++11), and Rust
have different forward progress requirements and this needs to be
evident in the IR.

Specifically, C11 and onwards (6.8.5, Paragraph 6) states that "An
iteration statement whose controlling expression is not a constant
expression, that performs no input/output operations, does not access
volatile objects, and performs no synchronization or atomic operations
in its body, controlling expression, or (in the case of for statement)
its expression-3, may be assumed by the implementation to terminate."
C++11 and onwards does not have this assumption, and instead assumes
that every thread must make progress as defined in [intro.progress] when
it comes to scheduling.

This was initially brought up in [0] as a bug, a solution was presented
in [1] which is the current workaround, and the predecessor to this
change was [2].

After defining a notion of forward progress for IR, there are two
options to address this:
1) Set the default to assuming Forward Progress and provide an opt-out for functions and an opt-in for loops.
2) Set the default to not assuming Forward Progress and provide an opt-in for functions, and an opt-in for loops.

Option 2) has been selected because only C++11 and onwards have a
forward progress requirement and it makes sense for them to opt-into it
via the defined `mustprogress` function attribute.  The `mustprogress`
function attribute indicates that the function is required to make
forward progress as defined. This is sharply in contrast to the status
quo where this is implicitly assumed. In addition, `willreturn` implies `mustprogress`.

The background for why this definition was chosen is in [3] and for why
the option was chosen is in [4] and the corresponding thread(s). The implementation is in D85393, the
clang patch is in D86841, the LoopDeletion patch is in D86844, the
Inliner patches are in D87180 and D87262, and there will be more
incoming.

[0] https://bugs.llvm.org/show_bug.cgi?id=965#c25
[1] https://lists.llvm.org/pipermail/llvm-dev/2017-October/118558.html
[2] https://reviews.llvm.org/D65718
[3] https://lists.llvm.org/pipermail/llvm-dev/2020-September/144919.html
[4] https://lists.llvm.org/pipermail/llvm-dev/2020-September/145023.html

Reviewed By: jdoerfert, efriedma, nikic

Differential Revision: https://reviews.llvm.org/D86233
2020-10-19 13:34:27 -04:00
Paul C. Anagnostopoulos
40d033740a [TableGen] Enhance !empty and !size to handle strings and DAGs.
Fix bug in the type checking for !empty, !head, !size, !tail.
2020-10-19 09:22:20 -04:00
Sam Parker
1e873328c1 [LangRef] Correct return type llvm.test.set.loop.iterations.*
The langref description for llvm.test.set.loop.iterations.* were
missing the i1 return type.

Differential Revision: https://reviews.llvm.org/D89564

Patch by: Janek van Oirschot
2020-10-19 12:56:38 +01:00
Lang Hames
18259b0a87 [ORC][examples] Update Kaleidoscope and BuildingAJIT tutorial series to OrcV2.
This patch updates the Kaleidoscope and BuildingAJIT tutorial series (chapter
1-4) to OrcV2. Chapter 5 of the BuildingAJIT series is removed -- it will be
re-instated once we have in-tree support for out-of-process JITing.

This patch only updates the tutorial code, not the text. Patches welcome for
that, otherwise I will try to update it in a few weeks.
2020-10-18 21:03:04 -07:00
Paul C. Anagnostopoulos
a667a4a9f8 [TableGen] Change Programmer's Reference to use "DAG argument" rather than "operand".
Differential Revision: https://reviews.llvm.org/D89624
2020-10-18 10:50:14 -04:00
Juneyoung Lee
e7de338270 Add support for !noundef metatdata on loads
This patch adds metadata !noundef and makes load instructions can optionally have it.
A load with !noundef always return a well-defined value (has no undef bit or isn't poison).
If the loaded value isn't well defined, the behavior is undefined.

This metadata can be used to encode the assumption from C/C++ that certain reads of variables should have well-defined values.
It is helpful for optimizing freeze instructions away, because freeze can be removed when its operand has well-defined value, and showing that a load from arbitrary location is well-defined is usually hard otherwise.

The same information can be encoded with llvm.assume with operand bundle; using metadata is chosen because I wasn't sure whether code motion can be freely done when llvm.assume is inserted from clang instead.
The existing codebase already is stripping unknown metadata when doing code motion, so using metadata is UB-safe as well.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D89050
2020-10-17 13:50:10 +09:00
Juneyoung Lee
59a2a236c5 [LangRef] Rename the names of metadata in load/store's syntax (NFC)
Discussed in D89050
2020-10-17 13:30:02 +09:00
Alok Kumar Sharma
b846ffc438 [DebugInfo] Support for DWARF operator DW_OP_over
LLVM rejects DWARF operator DW_OP_over. This DWARF operator is needed
for Flang to support assumed rank array.

  Summary:
Currently LLVM rejects DWARF operator DW_OP_over. Below error is
produced when llvm finds this operator.
[..]
invalid expression
!DIExpression(151, 20, 16, 48, 30, 35, 80, 34, 6)
warning: ignoring invalid debug info in over.ll
[..]
There were some parts missing in support of this operator, which are
now completed.

  Testing
-added a unit testcase
-check-debuginfo
-check-llvm

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D89208
2020-10-17 08:42:28 +05:30
Stanislav Mekhanoshin
9c088650a5 [AMDGPU] Fix gfx1032 description in AMDGPUUsage.rst. NFC.
Differential Revision: https://reviews.llvm.org/D89565
2020-10-16 13:29:20 -07:00
Vinicius Tinti
3f47e2d686 [llvm-objdump] Implement --prefix option
The prefix given to --prefix will be added to GNU absolute paths when
used with --source option (source interleaved with the disassembly).

This matches GNU's objdump behavior.

GNU and C++17 rules for absolute paths are different.

Differential Revision: https://reviews.llvm.org/D85024

Fixes PR46368.

Differential Revision: https://reviews.llvm.org/D85024
2020-10-16 17:50:42 +01:00
Matt Arsenault
e3bfefd3cc Reapply "OpaquePtr: Add type to sret attribute"
This reverts commit eb9f7c28e5fe6d75fed3587023e17f2997c8024b.

Previously this was incorrectly handling linking of the contained
type, so this merges the fixes from D88973.
2020-10-16 11:05:02 -04:00
Stanislav Mekhanoshin
86aeb69232 [AMDGPU] gfx1032 target
Differential Revision: https://reviews.llvm.org/D89487
2020-10-15 12:41:18 -07:00
Paul C. Anagnostopoulos
15f7b61423 [TableGen] Add the !not and !xor operators.
Update the TableGen Programmer's Reference.
2020-10-15 10:12:59 -04:00
Konstantin Zhuravlyov
5f87057393 AMDGPU: Update AMDHSA code object version handling
Differential Revision: https://reviews.llvm.org/D89076
2020-10-14 13:04:27 -04:00
Scott Linder
c5455cf70e [DebugInfo][docs] Document DILabel in LangRef
Add some minimal documentation for DILabel, originally introduced in
D45024. Update the name and semantics of the `variables:` field in the
documentation for `DISubprogram`; the field is now called
`retainedNodes:` and is a heterogeneous list of `DILocalVariable` and
`DILabel`.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D89082
2020-10-13 18:26:41 +00:00
Paul C. Anagnostopoulos
25ff50b32f [TableGen] Add new section to the TableGen Programmer's Reference.
Fix typos in it and the TableGen Backend Developer's Guide.
2020-10-13 09:59:13 -04:00
Pietro Albini
70207b468c Add expected response time and escalation path to the security docs
Following up on the discussion within the group during the roundtable at
the 2020 LLVM Developers Meeting, this commit adds to the security docs:

* How long we expect acknowledging security reports will take
* The escalation path the reporter can follow if they get no response

A temporary line inviting reporters to directly follow the escalation
path while the mailing list is being setup is also added.

Differential Revision: https://reviews.llvm.org/D89068
2020-10-13 10:57:06 +02:00
Tobias Hieta
34a683def6 [llvm-install-name-tool] Add -delete_all_rpaths option
This diff adds an option to remove all rpaths from a Mach-O binary.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D88674
2020-10-13 00:45:57 -07:00
Wang, Pengfei
4ae5349aa4 [X86] Add HRESET instruction.
For more details about these instructions, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D89102
2020-10-13 08:47:26 +08:00
Paul C. Anagnostopoulos
69c806cfe8 [TableGen] Add overload of RecordKeeper::getAllDerivedDefinitions()
and use in PseudoLowering backend.
Now the two getAllDerivedDefinitions() use StringRef and Arrayref.
Use all_of() in getAllDerivedDefinitions().
2020-10-12 16:40:09 -04:00
Tony
c338b755d2 [AMDGPU] Correct processor names for gfx1010 and gfx1011
Change-Id: Ie409f86876b0437d0b0405aff42872963708d926

Differential Revision: https://reviews.llvm.org/D89259
2020-10-12 20:16:12 +00:00
Fangrui Song
7466a25f11 [X86] Support -march=x86-64-v[234]
PR47686. These micro-architecture levels are defined in the x86-64 psABI:

https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/77566eb03bc6a326811cb7e9

GCC 11 will support these levels.

Note, -mtune=x86-64-v[234] are invalid and __builtin_cpu_is cannot be
used on them.

Reviewed By: craig.topper, RKSimon

Differential Revision: https://reviews.llvm.org/D89197
2020-10-12 10:29:46 -07:00
Philip Reames
f5a55066e4 Step down from security group
Resigning from security group as Azul representative as I have left Azul.  Previously communicated via email with security group.

Differential Revision: https://reviews.llvm.org/D88933
2020-10-10 09:48:02 -07:00
Tim Renouf
13991476f1 [AMDGPU] Add gfx602, gfx705, gfx805 targets
At AMD, in an internal audit of our code, we found some corner cases
where we were not quite differentiating targets enough for some old
hardware. This commit is part of fixing that by adding three new
targets:

* The "Oland" and "Hainan" variants of gfx601 are now split out into
  gfx602. LLPC (in the GPUOpen driver) and other front-ends could use
  that to avoid using the shaderZExport workaround on gfx602.

* One variant of gfx703 is now split out into gfx705. LLPC and other
  front-ends could use that to avoid using the
  shaderSpiCsRegAllocFragmentation workaround on gfx705.

* The "TongaPro" variant of gfx802 is now split out into gfx805.
  TongaPro has a faster 64-bit shift than its former friends in gfx802,
  and a subtarget feature could be set up for that to take advantage of
  it. This commit does not make that change; it just adds the target.

V2: Add clang changes. Put TargetParser list in order.
V3: AMDGCNGPUs table in TargetParser.cpp needs to be in GPUKind order,
    so fix the GPUKind order.

Differential Revision: https://reviews.llvm.org/D88916

Change-Id: Ia901a7157eb2f73ccd9f25dbacec38427312377d
2020-10-10 17:22:22 +01:00
Alok Kumar Sharma
0a8029e199 [DebugInfo] Support for DWARF attribute DW_AT_rank
This patch adds support for DWARF attribute DW_AT_rank.

  Summary:
Fortran assumed rank arrays have dynamic rank. DWARF attribute
DW_AT_rank is needed to support that.

  Testing:
unit test cases added (hand-written)
check llvm
check debug-info

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D89141
2020-10-10 17:51:12 +05:30
Zi Xuan Wu
e3b36cdf43 [CSKY 1/n] Add basic stub or infra of csky backend
This patch introduce files that just enough for lib/Target/CSKY to compile.
Notably a basic CSKYTargetMachine and CSKYTargetInfo.

Differential Revision: https://reviews.llvm.org/D88466
2020-10-10 10:44:08 +08:00
Rahman Lavaee
194be1c7dd Introduce and use a new section type for the bb_addr_map section.
This patch lets the bb_addr_map (renamed to __llvm_bb_addr_map) section use a special section type (SHT_LLVM_BB_ADDR_MAP) instead of SHT_PROGBITS. This would help parsers, dumpers and other tools to use the sh_type ELF field to identify this section rather than relying on string comparison on the section name.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D88199
2020-10-08 11:13:19 -07:00
Amara Emerson
bbd25a9a88 [GlobalISel] Add G_VECREDUCE_* opcodes for vector reductions.
These mirror the IR and SelectionDAG intrinsics & nodes.

Opcodes added:
G_VECREDUCE_SEQ_FADD
G_VECREDUCE_SEQ_FMUL
G_VECREDUCE_FADD
G_VECREDUCE_FMUL
G_VECREDUCE_FMAX
G_VECREDUCE_FMIN
G_VECREDUCE_ADD
G_VECREDUCE_MUL
G_VECREDUCE_AND
G_VECREDUCE_OR
G_VECREDUCE_XOR
G_VECREDUCE_SMAX
G_VECREDUCE_SMIN
G_VECREDUCE_UMAX
G_VECREDUCE_UMIN

Differential Revision: https://reviews.llvm.org/D88750
2020-10-08 10:33:19 -07:00
Luqman Aden
59baf6c915 [llvm-readobj] Add --coff-tls-directory flag to print TLS Directory & test.
Akin to dumpbin's /TLS option, this will print out the TLS directory, if
present, in the image.

Example output:
```
> llvm-readobj --coff-tls-directory test.exe
File: test.exe
Format: COFF-x86-64
Arch: x86_64
AddressSize: 64bit
TLSDirectory {
  StartAddressOfRawData: 0x140004000
  EndAddressOfRawData: 0x140004040
  AddressOfIndex: 0x140002000
  AddressOfCallBacks: 0x0
  SizeOfZeroFill: 0x0
  Characteristics [ (0x0)
  ]
}
```

Reviewed By: jhenderson, grimar

Differential Revision: https://reviews.llvm.org/D88635
2020-10-08 01:53:15 -07:00
Serge Guelton
2e4356ed42 Update documentation and implementation of stage3 build
Have the build work out of the box by forcing an LLD build.

That way, we don't require an external LTO-aware linker,
as we build one.

Also remove reference to the seemingly dead builder.

Differential Revision: https://reviews.llvm.org/D88990
2020-10-08 07:55:37 +02:00
Amara Emerson
59c2440372 [llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics.
This change renames the intrinsics to not have "experimental" in the name.

The autoupgrader will handle legacy intrinsics.

Relevant ML thread: http://lists.llvm.org/pipermail/llvm-dev/2020-April/140729.html

Differential Revision: https://reviews.llvm.org/D88787
2020-10-07 10:36:44 -07:00
Duncan P. N. Exon Smith
8fbfc2b8c5 docs: Emphasize ArrayRef over SmallVectorImpl
The section on SmallVector has a note about preferring SmallVectorImpl
for APIs but doesn't mention ArrayRef. Although ArrayRef is discussed
elsewhere, let's re-emphasize here.

Differential Revision: https://reviews.llvm.org/D49881
2020-10-06 18:13:52 -04:00
Michael Kruse
a5187b0c04 [docs] Revise loop terminology reference.
Motivated by D88183, this seeks to clarify the current loop nomenclature with added illustrations, examples for possibly unexpected situations (infinite loops not part of the "parent" loop, logical loops sharing the same header, ...), and clarification on what other sources may consider a loop. The current document also has multiple errors that are fixed here.

Some selected errors:
 * Loops a defined as strongly-connected components. A component a partition of all nodes, i.e. a subloop can never be a component. That is, the document as it currently is only covers top-level loops, even it also uses the term SCC for subloops.
 * "a block can be the header of two separate loops at the same time" (it is considered a single loop by LoopInfo)
 * "execute before some interesting event happens" (some interesting event is not well-defined)

Reviewed By: baziotis, Whitney

Differential Revision: https://reviews.llvm.org/D88408
2020-10-05 10:28:04 -05:00
Paul C. Anagnostopoulos
6ec902749c [TableGen] New backend to print detailed records.
Pertinent lints are fixed.
2020-10-02 10:22:13 -04:00
Chris Lattner
bff360bbf9 We don't need two different ways to get commit access, just simplify
the policy here so that old SVN users and new contributors do the same
thing.
2020-09-30 22:36:44 -07:00
Vedant Kumar
32d1049161 [docs] Recommend dropLocation() over setDebugLoc(DebugLoc()) 2020-09-29 17:07:14 -07:00
Tres Popp
59b6daf823 Revert "OpaquePtr: Add type to sret attribute"
This reverts commit 55c4ff91bd820d72014f63dcf7f3d5a0d3397986.

Issues were introduced as discussed in https://reviews.llvm.org/D88241
where this change made previous bugs in the linker and BitCodeWriter
visible.
2020-09-29 10:31:04 +02:00
Arthur Eubanks
ee468fc3e5 [Docs][NewPM] Add note about required passes
Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D88342
2020-09-28 21:45:14 -07:00
Paul C. Anagnostopoulos
2483a36836 [TableGen] Add/edit Doxygen comments to match "TableGen Backend Developer's Guide." 2020-09-26 09:09:22 -04:00
Juneyoung Lee
68fbee82fd [LangRef] Clarify the behavior of memory access instructions when pointers/sizes aren't well-defined
This is a patch to LangRef that clarifies the behavior of load/store/memset/memcpy/memmove when the pointers or sizes are not well-defined
as well.

MSan detects a case when e.g., only lower bits of address are garbage when `-msan-check-access-address` is enabled, and it does not directly conflict with this patch because a C program should not use a pointer with undef bits and reasonable optimizations do not convert a well-defined pointer into a pointer with undef bits.

This patch contains a definition of a well-defined value as well.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D87994
2020-09-26 08:13:27 +09:00
Matt Arsenault
0ec533bb8a OpaquePtr: Add type to sret attribute
Make the corresponding change that was made for byval in
b7141207a483d39b99c2b4da4eb3bb591eca9e1a. Like byval, this requires a
bulk update of the test IR tests to include the type before this can
be mandatory.
2020-09-25 14:07:30 -04:00
Ian Levesque
919066e494 [xray] Function coverage groups
Add the ability to selectively instrument a subset of functions by dividing the functions into N logical groups and then selecting a group to cover. By selecting different groups over time you could cover the entire application incrementally with lower overhead than instrumenting the entire application at once.

Differential Revision: https://reviews.llvm.org/D87953
2020-09-24 22:09:53 -04:00
Stefanos Baziotis
490925f87c [LoopTerminology][NFC] Fix formatting typo 2020-09-23 22:53:05 +03:00
Mehdi Amini
1d8405c45e Document the --verbatim flag from arc to update the description for a phabricator revision 2020-09-23 18:01:10 +00:00
Mehdi Amini
be10725056 Update Phabricator doc to remove the warning on "arc land": tags a properly handled server side now 2020-09-23 18:01:09 +00:00
SuJunda (Junda Su)
c1d4b9d633 [docs][llvm] Fix typos
I don't have commit access.
Please help me commit it.
Thanks : )

Reviewed By: Paul-C-Anagnostopoulos

Differential Revision: https://reviews.llvm.org/D88139
2020-09-23 10:19:02 -04:00
Florian Hahn
64c733fe5d [VPlan] Disconnect VPValue and VPUser.
This refactors VPuser to not inherit from VPValue to facilitate
introducing operations that introduce multiple VPValues (e.g.
VPInterleaveRecipe).

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D84679
2020-09-23 14:44:31 +01:00
antonio-cortes-perez
a3cd2113f4 [NFC][docs] Fix link.
The rendered html was (no hyperlink was generated):

(see Getting Started <GettingStarted.html#git-pre-push-hook>)

Now, it is (with proper hyperlink):

(see Git pre-push hook)

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D88116
2020-09-22 23:40:03 +00:00
Paul C. Anagnostopoulos
54f163f8a4 Two patches to fix the broken build.
One to fix a C++ compiler warning.
One to allow Sphinx to find a new document.
2020-09-22 16:00:31 -04:00
Paul C. Anagnostopoulos
82dfae475d Version 0.5 of the new "TableGen Backend Developer's Guide."
Files modified to take comments into account.
MLIR documentation updated for new TableGen documentation files.
2020-09-22 14:01:52 -04:00