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1784 Commits

Author SHA1 Message Date
Jim Grosbach
d382581509 Thumb2 assembly parsing and encoding for SMLAL. 
llvm-svn: 139902
 2011-09-16 16:38:00 +00:00
Jim Grosbach
5147a59e59 Thumb2 assembly parsing and encoding for SMLAD/SMLADX. 
llvm-svn: 139884
 2011-09-16 00:09:37 +00:00
Jim Grosbach
9fb6f7e9fc Thumb2 assembly parsing and encoding for SMLABB/SMLABT/SMLATB/SMLATT. 
llvm-svn: 139881
 2011-09-16 00:00:23 +00:00
Jim Grosbach
85838cdb51 Thumb2 assembly parsing and encoding for SHSUB16/SHSUB8. 
llvm-svn: 139880
 2011-09-15 23:58:56 +00:00
Jim Grosbach
eee3717b95 Thumb2 assembly parsing and encoding for SHADD16/SHADD8. 
llvm-svn: 139871
 2011-09-15 22:36:10 +00:00
Jim Grosbach
423aae30b2 Thumb2 assembly parsing and encoding for SHASX/SHSAX. 
llvm-svn: 139870
 2011-09-15 22:34:29 +00:00
Jim Grosbach
68e3ea237e Thumb2 assembly parsing and encoding for SEV.W. 
llvm-svn: 139866
 2011-09-15 22:24:20 +00:00
Jim Grosbach
29e503aec9 Thumb2 assembly parsing and encoding for SEL. 
llvm-svn: 139861
 2011-09-15 22:01:09 +00:00
Jim Grosbach
b9ba7e59b7 Thumb2 assembly parsing and encoding for SBFX. 
llvm-svn: 139858
 2011-09-15 21:58:42 +00:00
Jim Grosbach
aeb7320fa5 Add some missing 'CHECK' lines and tidy up others. 
llvm-svn: 139849
 2011-09-15 21:17:38 +00:00
Jim Grosbach
8ceb22b769 Thumb2 assembly parsing and encoding for SBC. 
llvm-svn: 139844
 2011-09-15 21:04:10 +00:00
Jim Grosbach
1ac9dd8a72 Thumb2 assembly parsing and encoding for SASX. 
llvm-svn: 139843
 2011-09-15 21:01:23 +00:00
Jim Grosbach
eaeb10930f Thumb2 assembly parsing and encoding for SADD16/SADD8. 
llvm-svn: 139841
 2011-09-15 20:57:39 +00:00
Jim Grosbach
553692fcce Thumb2 assembly parsing and encoding for RSB. 
llvm-svn: 139839
 2011-09-15 20:54:14 +00:00
Jim Grosbach
267610ed2a Thumb2 assembly parsing and encoding for RRX. 
llvm-svn: 139831
 2011-09-15 19:52:43 +00:00
Jim Grosbach
ee202d43fe Thumb2 assembly parsing and encoding for ROR. 
llvm-svn: 139830
 2011-09-15 19:50:04 +00:00
Jim Grosbach
50ee930e9a Thumb2 assembly parsing and encoding for REV16/REVSH. 
llvm-svn: 139828
 2011-09-15 19:46:13 +00:00
Jim Grosbach
9d7aa9bcbc Thumb2 assembly parsing and encoding for REV. 
llvm-svn: 139813
 2011-09-15 18:13:30 +00:00
Jim Grosbach
7c1422b068 Thumb2 assembly parsing and encoding for RBIT. 
llvm-svn: 139811
 2011-09-15 18:07:14 +00:00
Jim Grosbach
d6993cb54c Thumb2 assembly parsing and encoding for signed saturating arithmetic insns. 
llvm-svn: 139810
 2011-09-15 18:06:15 +00:00
Jim Grosbach
5742cbd63f Re-order test. 
llvm-svn: 139795
 2011-09-15 16:04:13 +00:00
Jim Grosbach
68de69f1c9 Thumb2 assembly parsing and encoding for PLI. 
llvm-svn: 139757
 2011-09-14 23:29:05 +00:00
Jim Grosbach
4d7b859fab Thumb2 assembly parsing and encoding for PLD. 
llvm-svn: 139756
 2011-09-14 23:26:12 +00:00
Jim Grosbach
669e269758 Thumb2 assembly parsing and encoding for PKH. 
llvm-svn: 139754
 2011-09-14 23:16:41 +00:00
Owen Anderson
86f1fb2955 Fix a crasher in Thumb2 MOV-immediate encoding for certain inputs. 
llvm-svn: 139747
 2011-09-14 22:46:14 +00:00
Jim Grosbach
3908f7f2b7 Thumb2 assembly parsing and encoding for ORR. 
llvm-svn: 139742
 2011-09-14 21:43:57 +00:00
Jim Grosbach
4d891badcb Thumb2 assembly parsing and encoding for ORN. 
llvm-svn: 139741
 2011-09-14 21:29:54 +00:00
Jim Grosbach
528142a13d Thumb2 assembly parsing and encoding for NOP.W. 
llvm-svn: 139740
 2011-09-14 21:26:25 +00:00
Jim Grosbach
e841adae12 Thumb2 assembly parsing and encoding for MVN. 
llvm-svn: 139739
 2011-09-14 21:24:41 +00:00
Jim Grosbach
585e3c779f Thumb2 assembly parsing and encoding for MUL. 
llvm-svn: 139735
 2011-09-14 21:00:40 +00:00
Jim Grosbach
b1c70aab3e Thumb2 assembly parsing and encoding for MSR/MRS. 
Fix a bug in handling default flags for both ARM and Thumb encodings.

llvm-svn: 139721
 2011-09-14 20:03:46 +00:00
Jim Grosbach
e260140b99 Thumb2 assembly parsing and encoding for MRC/MRC2/MRRC/MRRC2. 
llvm-svn: 139717
 2011-09-14 19:28:49 +00:00
Jim Grosbach
807e68b8db Thumb2 assembly parsing and encoding for MOVT. 
llvm-svn: 139715
 2011-09-14 19:15:15 +00:00
Jim Grosbach
932d409524 Thumb2 assembly parsing for MOV in IT block. 
Select the right 16 vs. 32 bit encoding in an IT block.

llvm-svn: 139714
 2011-09-14 19:12:11 +00:00
Jim Grosbach
41c8bdfdd9 ARM fix assembly parser handling of ranges in register lists. 
Clean up register list handling in general a bit to explicitly check things
like all the registers being from the same register class.

rdar://8883573

llvm-svn: 139707
 2011-09-14 18:08:35 +00:00
Craig Topper
60719c7bfb Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND from being recognized by disassembler. 
llvm-svn: 139691
 2011-09-14 06:41:26 +00:00
Craig Topper
25e81ae604 Make disassembling of VBLEND* print immediate as a XMM/YMM register name. Fixes PR10917. 
llvm-svn: 139690
 2011-09-14 05:55:28 +00:00
Craig Topper
d707457c41 Add test case for PR10851. 
llvm-svn: 139689
 2011-09-14 04:36:54 +00:00
Owen Anderson
1037a3e60b Make use of Eli's FileCheck sorcery to improve this test. 
llvm-svn: 139645
 2011-09-13 21:37:50 +00:00
Owen Anderson
d0121fe635 Correct disassembly printing of Thumb2 post-incremented LDRD and STRD. 
llvm-svn: 139639
 2011-09-13 20:46:26 +00:00
Owen Anderson
b4ed08c465 Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally. 
llvm-svn: 139610
 2011-09-13 17:59:19 +00:00
Owen Anderson
5982d4d51b Fix encoding of Thumb2 shifted register operands with RRX shifts. 
llvm-svn: 139606
 2011-09-13 17:34:32 +00:00
Craig Topper
03c833ff84 Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from being disassembled. Also added encodings for the other register/register form of these instructions. Fixes PR10848. 
llvm-svn: 139588
 2011-09-13 06:54:58 +00:00
Owen Anderson
ebcf543265 Fix a failing ELF Thumb test. I _think_ this is right, but it's not totally clear to me what this test is doing. Could someone on an ELF platform check? 
llvm-svn: 139549
 2011-09-12 22:40:31 +00:00
Owen Anderson
a1a10ed5c6 Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP either. 
llvm-svn: 139542
 2011-09-12 21:28:46 +00:00
Owen Anderson
0081444d87 Fix encoding of PC-relative LDRSHW with an immediate offset. 
llvm-svn: 139537
 2011-09-12 20:36:51 +00:00
Owen Anderson
05ef2c122d Port more encoding tests to decoding tests, and correct an improper Thumb2 pre-indexed load decoding this uncovered. 
llvm-svn: 139522
 2011-09-12 18:56:30 +00:00
Craig Topper
5ffd0cb080 Fix disassembling of one of the register/register forms of MOVUPS/MOVUPD/MOVAPS/MOVAPD/MOVSS/MOVSD and their VEX equivalents. Fixes PR10877. 
llvm-svn: 139486
 2011-09-11 23:19:54 +00:00
Craig Topper
a9b27eecc9 Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SBB/ADC/CMP/MOV. 
llvm-svn: 139485
 2011-09-11 21:41:45 +00:00
Craig Topper
8361de67b5 Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP disassembling to ignore OpSize and REX.W. 
llvm-svn: 139484
 2011-09-11 20:23:20 +00:00
Jim Grosbach
52492b1cf3 Thumb2 parsing and encoding for MOV(immediate). 
Some aliases for MOV(register) also to keep existing T1 tests happy when
run in thumbv7 mode.

llvm-svn: 139440
 2011-09-10 00:15:36 +00:00
Owen Anderson
9cd21ce8c9 LDM writeback is not allowed if Rn is in the target register list. 
llvm-svn: 139432
 2011-09-09 23:13:33 +00:00
Owen Anderson
dbe77fc5a1 Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands. 
llvm-svn: 139422
 2011-09-09 22:24:36 +00:00
Owen Anderson
a7838cb723 Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches. 
llvm-svn: 139415
 2011-09-09 21:48:23 +00:00
Jim Grosbach
6225a96bf5 Thumb2 assembly parsing and encoding for MLA and MLS. 
llvm-svn: 139399
 2011-09-09 20:24:45 +00:00
Jim Grosbach
5f87c06a64 Thumb2 assembly parsing and encoding for MCR, MCR2, MCRR, MCRR2. 
llvm-svn: 139397
 2011-09-09 20:19:28 +00:00
Jim Grosbach
f310295150 Tidy up formatting a bit. 
llvm-svn: 139396
 2011-09-09 20:17:49 +00:00
Jim Grosbach
f7d8e569b3 Thumb2 assembly parsing and encoding for LSL. 
llvm-svn: 139395
 2011-09-09 20:05:38 +00:00
Jim Grosbach
69e67f206d Thumb2 assembly parsing and encoding for LDRT. 
llvm-svn: 139393
 2011-09-09 20:02:15 +00:00
Jim Grosbach
abd54fb32c Thumb2 assembly parsing and encoding for LDRSHT. 
llvm-svn: 139392
 2011-09-09 20:01:18 +00:00
Jim Grosbach
c6aa5be010 Thumb2 assembly parsing and encoding for LDRSH. 
llvm-svn: 139391
 2011-09-09 19:54:30 +00:00
Jim Grosbach
022da868a5 Thumb2 assembly parsing and encoding for LDRSBT. 
llvm-svn: 139390
 2011-09-09 19:49:06 +00:00
Jim Grosbach
915ba5189e Thumb2 assembly parsing and encoding for LDRSB. 
llvm-svn: 139389
 2011-09-09 19:42:40 +00:00
Jim Grosbach
6faf547463 Thumb2 assembly parsing and encoding for LDRH. 
llvm-svn: 139386
 2011-09-09 19:13:53 +00:00
Jim Grosbach
26f684d4ff Shuffle a bit. 
llvm-svn: 139385
 2011-09-09 19:09:54 +00:00
Jim Grosbach
eb2d668899 Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH. 
llvm-svn: 139381
 2011-09-09 18:37:27 +00:00
Jim Grosbach
1091b2913d Add FIXME. 
llvm-svn: 139371
 2011-09-09 16:45:31 +00:00
Craig Topper
23adfa4738 Add disassembler test for Intel syntax. Tests r139353. 
llvm-svn: 139356
 2011-09-09 06:35:44 +00:00
Owen Anderson
d7127e0c27 Soft fail CBZ/CBNZ in the disassembler if they appear inside an IT block. 
llvm-svn: 139328
 2011-09-08 22:42:49 +00:00
Jim Grosbach
9f150bfedf Thumb2 assembly parsing and encoding for LDRD(immediate). 
Refactor operand handling for STRD as well. Tests for that forthcoming.

llvm-svn: 139322
 2011-09-08 22:07:06 +00:00
Kevin Enderby
16f9df1f05 Fix a Darwin x86_64 special case of a jmp to a temporary symbol from an atom 
without a base symbol that must not have a relocation entry.

llvm-svn: 139316
 2011-09-08 20:53:44 +00:00
Jim Grosbach
222a102bd1 Add tests for Thumb2 LDRB indexed addressing w/ writeback. 
llvm-svn: 139292
 2011-09-08 16:49:36 +00:00
Jim Grosbach
5ac3aa158b Thumb2 assembly parsing and encoding for LDR post-indexed. 
More cleanup of the general indexed addressing T2 instructions. Still more to
do, especially for stores.

llvm-svn: 139272
 2011-09-08 01:01:32 +00:00
Jim Grosbach
1aa191032a Thumb2 assembly parsing and encoding for LDR pre-indexed w/ writeback. 
Adjust encoding of writeback load/store instructions to better reflect the
way the operand types are represented.

llvm-svn: 139270
 2011-09-08 00:39:19 +00:00
Jim Grosbach
8b54d19514 Thumb2 assembly parsing and encoding for LDRBT. 
llvm-svn: 139267
 2011-09-07 23:39:14 +00:00
Jim Grosbach
7482c11b79 Thumb2 assembly parsing and encoding for LDRB(register). 
llvm-svn: 139266
 2011-09-07 23:17:00 +00:00
Jim Grosbach
a3ff9eeb85 Thumb2 assembly parsing and encoding for LDR(register). 
llvm-svn: 139264
 2011-09-07 23:10:15 +00:00
Jim Grosbach
d640c62856 Thumb2 assembly parsing and encoding for LDRB(immediate). 
llvm-svn: 139258
 2011-09-07 21:41:25 +00:00
Jim Grosbach
deb3c78242 Thumb2 assembly parsing and encoding for LDR(literal). 
Need branch relocation support to distinguish this encoding from the
16-bit Thumb1 encoding w/o the explicit .w suffix. That comes later, though.

llvm-svn: 139257
 2011-09-07 21:33:16 +00:00
Owen Anderson
26467730c1 Create Thumb2 versions of STC/LDC, and reenable the relevant tests. 
llvm-svn: 139256
 2011-09-07 21:10:42 +00:00
Jim Grosbach
53b836a088 Add tests for Thumb2 LDR(immediate) from r139254. 
llvm-svn: 139255
 2011-09-07 21:06:46 +00:00
Jim Grosbach
054b346e46 Thumb2 parsing and encoding for LDMDB. 
llvm-svn: 139251
 2011-09-07 19:57:53 +00:00
James Molloy
ac057f13a5 Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler. 
llvm-svn: 139250
 2011-09-07 19:42:28 +00:00
Jim Grosbach
f5f321c4ce Update test for 139243 
llvm-svn: 139244
 2011-09-07 18:40:06 +00:00
Jim Grosbach
20689d28e7 Thumb2 parsing and encoding for LDMIA. 
Choose 32-bit vs. 16-bit encoding when there's no .w suffix in post-processing
as match classes are insufficient to handle the context-sensitiveness of
the writeback operand's legality for the 16-bit encodings.

llvm-svn: 139242
 2011-09-07 18:05:34 +00:00
Owen Anderson
4106b9fb31 Port more assembler tests over to disassembler tests, and fix a minor logic error that exposed. 
llvm-svn: 139240
 2011-09-07 17:55:19 +00:00
Jim Grosbach
14720bed32 Thumb2 parsing and encoding for ISB. 
llvm-svn: 139200
 2011-09-06 22:53:27 +00:00
Jim Grosbach
521a061450 Thumb2 parsing and encoding for EOR. 
llvm-svn: 139199
 2011-09-06 22:44:50 +00:00
Jim Grosbach
463bf279d6 Thumb2 parsing and encoding for DSB. 
llvm-svn: 139194
 2011-09-06 22:19:40 +00:00
Jim Grosbach
276e51888c Thumb2 parsing and encoding for DMB. 
llvm-svn: 139193
 2011-09-06 22:14:58 +00:00
Jim Grosbach
c0aaa747a1 Thumb2 parsing and encoding for DBG. 
llvm-svn: 139191
 2011-09-06 22:06:40 +00:00
Jim Grosbach
4258d5ffba Thumb2 parsing and encoding for CMN and CMP. 
llvm-svn: 139188
 2011-09-06 21:44:58 +00:00
Jim Grosbach
45bc30cc7e Thumb2 parsing and encoding for CLZ. 
llvm-svn: 139177
 2011-09-06 20:44:17 +00:00
Jim Grosbach
b5dcc965a7 Thumb2 parsing and encoding for CLREX. 
llvm-svn: 139172
 2011-09-06 20:27:04 +00:00
Owen Anderson
23820ebb17 Port more encoding tests over to Thumb2 decoding tests. 
llvm-svn: 139171
 2011-09-06 20:26:34 +00:00
Jim Grosbach
3399db069a Thumb2 parsing and encoding for CDP/CDP2. 
llvm-svn: 139168
 2011-09-06 20:12:23 +00:00
Jim Grosbach
68afe301fc Thumb2 parsing and encoding for CBZ/CBNZ. 
llvm-svn: 139054
 2011-09-02 23:46:10 +00:00
Jim Grosbach
fb5e64e731 Thumb2 parsing and encoding for BXJ. 
llvm-svn: 139053
 2011-09-02 23:43:09 +00:00
Jim Grosbach
2ea035b027 Thumb2 parsing and encoding for BIC. 
llvm-svn: 139052
 2011-09-02 23:37:54 +00:00
Jim Grosbach
588f94c09b Thumb2 parsing and encoding for BFI. 
llvm-svn: 139051
 2011-09-02 23:28:46 +00:00
Jim Grosbach
7a45cb2b33 Thumb2 parsing and encoding for BFC. 
llvm-svn: 139050
 2011-09-02 23:25:46 +00:00
Jim Grosbach
44483a9ba5 Thumb2 parsing and encoding of B instruction. 
Tweak handling of IT blocks a bit to enable this. The differentiation between
B and Bcc needs special sauce.

llvm-svn: 139049
 2011-09-02 23:22:08 +00:00
Jim Grosbach
ba4ceeaae6 Thumb2 parsing and encoding for ASR. 
For other shift and rotate instructions, too. Tests for those forthcoming
as I work my way through the ISA.

llvm-svn: 139040
 2011-09-02 21:28:54 +00:00
Kevin Enderby
90a1526592 Change X86 disassembly to print immediates values as signed by default. Special 
case those instructions that the immediate is not sign-extend.  radr://8795217

llvm-svn: 139028
 2011-09-02 20:01:23 +00:00
Jim Grosbach
cbf37eebff Thumb2 parsing and encoding for AND (register). 
llvm-svn: 139021
 2011-09-02 18:41:35 +00:00
Jim Grosbach
dd0421034a Thumb2 parsing and encoding for ADD (register). 
llvm-svn: 139017
 2011-09-02 18:14:46 +00:00
Kevin Enderby
edfcba2f3c Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702. 
llvm-svn: 139014
 2011-09-02 18:03:03 +00:00
Jim Grosbach
32cf633f1c Tests for Thumb2 AND (immediate) instruction. 
llvm-svn: 139013
 2011-09-02 17:44:27 +00:00
Jim Grosbach
5b43c7fe81 Add FIXME. Thumb2 ADR encoding choice is non-trivial. 
llvm-svn: 139008
 2011-09-02 17:21:59 +00:00
Craig Topper
316c7bfe37 Make IC_VEX* not inherit from IC_*. Prevents instructions with no VEX form from disassembling to their non-VEX form. Also prevents weak filter collisons that were keeping valid VEX instructions from decoding properly. Make VEX_L* not inherit from VEX_* because the VEX.L bit always important. This stops packed int VEX encodings from being disassembled when specified with VEX.L=1. Fixes PR10831 and PR10806. 
llvm-svn: 138997
 2011-09-02 04:17:54 +00:00
Jim Grosbach
36ea6726dd ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code. 
llvm-svn: 138952
 2011-09-01 18:22:13 +00:00
Owen Anderson
d8157fabfb t2Bcc is allowed to have a predicate without a preceding IT instruction. 
llvm-svn: 138946
 2011-09-01 17:47:45 +00:00
Jim Grosbach
2b04342a91 Thumb2 assembly parsing and encoding for ADD(immediate). 
llvm-svn: 138922
 2011-09-01 00:28:52 +00:00
Owen Anderson
4024b91dbe Fix encoding for tBcc with immediate offset operand. 
llvm-svn: 138889
 2011-08-31 20:26:14 +00:00
Jim Grosbach
506f8078a8 Run the Thumb1 parser tests in Thumb2 mode, as well. 
Thumb2 is a superset of Thumb1, so all of the encodings should still work.

llvm-svn: 138883
 2011-08-31 19:50:28 +00:00
Jim Grosbach
98ba1f40ee Thumb NOP encoding varies depending on ARCH revision. 
llvm-svn: 138876
 2011-08-31 18:35:46 +00:00
Owen Anderson
f30633abbf Fix roundtripping of Thumb BL/BLX instructions with immediate offsets instead of labels. 
llvm-svn: 138874
 2011-08-31 18:30:20 +00:00
Jim Grosbach
a2f9012605 Thumb2 parsing and encoding for ADC(register). 
Also add instruction aliases for non-.w versions of SBC since they're the
same.

llvm-svn: 138871
 2011-08-31 18:23:08 +00:00
Jim Grosbach
a4c1e9d88a Tweak Thumb1 ADD encoding selection a bit. 
When the destination register of an add immediate instruction is
explicitly specified, encoding T1 is preferred, else encoding T2 is
preferred.

llvm-svn: 138862
 2011-08-31 17:07:33 +00:00
Owen Anderson
adac5b2109 Fix issues with disassembly of IT instructions involving condition codes other the EQ/NE. Discovered by roundtrip testing. 
llvm-svn: 138840
 2011-08-30 22:58:27 +00:00
Owen Anderson
a59d489162 Fix encoding of CBZ/CBNZ Thumb2 instructions with immediate offsets rather than labels. 
llvm-svn: 138837
 2011-08-30 22:15:17 +00:00
Owen Anderson
9465c7fee0 Fix encoding of PC-relative Thumb1 LDR's when using immediate offsets instead of labels. 
llvm-svn: 138835
 2011-08-30 22:10:03 +00:00
Owen Anderson
309c4b7ef6 Fix encoding of Thumb1 B instructions with immediate offsets, which is necessary for round-tripping. 
llvm-svn: 138834
 2011-08-30 22:03:20 +00:00
Owen Anderson
9d3407e7c2 Port Thumb2 assembler tests over to disassembler tests. 
llvm-svn: 138822
 2011-08-30 20:03:11 +00:00
Craig Topper
5556444bf7 Add vvvv support to disassembling of instructions with MRMDestMem and MRMDestReg form. Needed to support mem dest form of vmaskmovps/d. Fixes PR10807. 
llvm-svn: 138795
 2011-08-30 07:09:35 +00:00
Owen Anderson
4bd28c69c4 Add missing encoding information for some of the GPR<->FP register moves. 
llvm-svn: 138780
 2011-08-29 23:15:25 +00:00
Jim Grosbach
d71237315a Remove redundant tests from XFAIL'ed test file. 
llvm-svn: 138779
 2011-08-29 23:04:04 +00:00
Jim Grosbach
00dc3313fc Thumb2 assembly parsing and encoding support for ADC(immediate). 
llvm-svn: 138778
 2011-08-29 23:01:38 +00:00
Jim Grosbach
3bd8967df7 Remove test file. Superceded by other more exhaustive tests. 
llvm-svn: 138777
 2011-08-29 23:00:19 +00:00
Jim Grosbach
a1aa6a2e8b Thumb2 parsing and encoding for IT blocks. 
llvm-svn: 138773
 2011-08-29 22:24:09 +00:00
Kevin Enderby
f1aef98ad2 Fix the disassembly of the X86 crc32 instruction. Bug 10702 and rdar://8795217 
llvm-svn: 138771
 2011-08-29 22:06:28 +00:00
Owen Anderson
e14d6edccc Improve handling of #-0 offsets for many more pre-indexed addressing modes. 
llvm-svn: 138754
 2011-08-29 19:36:44 +00:00
Owen Anderson
8719e2c1c3 Add support for parsing #-0 on non-memory-operand immediate values, and add a testcase that necessitates it. 
llvm-svn: 138739
 2011-08-29 17:17:09 +00:00
Owen Anderson
fd21da3506 Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered. 
llvm-svn: 138675
 2011-08-26 23:32:08 +00:00
Owen Anderson
9b85a034c9 Correct encoding of BL with immediate offset. 
llvm-svn: 138673
 2011-08-26 22:54:51 +00:00
Owen Anderson
af51fd9868 invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure. 
llvm-svn: 138653
 2011-08-26 20:43:14 +00:00
Owen Anderson
86b11d01eb Support an extension of ARM asm syntax to allow immediate operands to ADR instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here. 
llvm-svn: 138635
 2011-08-26 18:09:22 +00:00
Owen Anderson
485eda7687 Add a testcase for r138625. 
llvm-svn: 138626
 2011-08-26 06:45:08 +00:00
Craig Topper
b20cee1e19 Fix disassembling of VCVTSD2SI 
llvm-svn: 138623
 2011-08-26 04:49:29 +00:00
Owen Anderson
d387b48b0b Port over additional encoding tests to decoding tests, and fix an operand ordering bug this exposed. 
llvm-svn: 138575
 2011-08-25 18:30:18 +00:00
Craig Topper
5af7ba783d Give ATTR_VEX higher priority when generating the disassembler context table. Fixes disassembling of VEX instructions with 'pp'=00. Fixes subset of PR10678. 
llvm-svn: 138552
 2011-08-25 07:42:00 +00:00
Craig Topper
06ed6cb856 Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be disassembled. Fixes PR10723. 
llvm-svn: 138551
 2011-08-25 06:57:46 +00:00
Evan Cheng
7bfc442b2d Some autoconf tests use module level inline asm to test compiler's handling of 
.cfi_startproc. e.g. libffi:

 $ cat confopt.c 
asm (".cfi_startproc\n\t.cfi_endproc");

int main () { return 0; }

Teach MC / dwarf emission to handle these cfi directives which essentially
create an empty frame.

rdar://10017184

llvm-svn: 138504
 2011-08-24 22:31:37 +00:00
Jim Grosbach
aae1749f65 Update tests for 138501. 
llvm-svn: 138502
 2011-08-24 22:30:18 +00:00
Jim Grosbach
effaf1e15d Thumb parsing and encoding for SUB (SP minu immediate). 
Fix FiXME in test file. Remove FIXME for SUB (SP minus register) since that
form is Thumb2 only.

llvm-svn: 138494
 2011-08-24 21:42:27 +00:00
Jim Grosbach
b2b155a93f Thumb parsing and encoding support for ADD SP instructions. 
Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.

llvm-svn: 138488
 2011-08-24 21:22:15 +00:00
Owen Anderson
6325690c08 Port over more encoding tests to decoding tests. 
llvm-svn: 138441
 2011-08-24 17:08:34 +00:00
Jim Grosbach
f5d628146a Thumb parsing and encoding for WFE, WFI and YIELD. 
llvm-svn: 138364
 2011-08-23 20:02:30 +00:00
Jim Grosbach
9f0be95d20 Thumb parsing and encoding for UXTB and UXTH. 
llvm-svn: 138363
 2011-08-23 19:59:32 +00:00
Jim Grosbach
87c7a2b16b Thumb parsing and encoding for TST. 
llvm-svn: 138362
 2011-08-23 19:53:17 +00:00
Jim Grosbach
7ceb45dd61 Thumb parsing and encoding for SXTB and SXTH. 
llvm-svn: 138361
 2011-08-23 19:51:42 +00:00
Jim Grosbach
1f5b8e9044 Thumb parsing and encoding for SVC. 
llvm-svn: 138360
 2011-08-23 19:49:10 +00:00
Jim Grosbach
d343e1a13f Thumb parsing and encoding for SUB. 
llvm-svn: 138359
 2011-08-23 19:45:45 +00:00
Jim Grosbach
9795206370 Thumb parsing and encoding for STRH. 
llvm-svn: 138352
 2011-08-23 18:56:20 +00:00
Jim Grosbach
d507a9c6b9 Thumb parsing and encoding for STRB. 
llvm-svn: 138349
 2011-08-23 18:43:06 +00:00
Jim Grosbach
f9bc99b518 Thumb parsing and encoding for tSTRspi. 
llvm-svn: 138348
 2011-08-23 18:39:41 +00:00
Jim Grosbach
7ece5d431c Thumb parsing and encoding for STR. 
Not including tSTRspi.

llvm-svn: 138347
 2011-08-23 18:33:38 +00:00
Jim Grosbach
3b20e779cd Thumb parsing and encoding for STM. 
llvm-svn: 138345
 2011-08-23 18:15:37 +00:00
Owen Anderson
3de2d7656d Fix decoding of Thumb2 prefetch instructions, which account for all the remaining Thumb2 decoding failures found by randomized testing so far. 
llvm-svn: 138341
 2011-08-23 17:51:38 +00:00
Owen Anderson
9d5074746f Fix two more instances of mis-matched operand names breaking disassembly. Found by randomized testing. 
llvm-svn: 138337
 2011-08-23 17:37:32 +00:00
Owen Anderson
b97912374e Port more assemble tests over to disassembly tests. 
llvm-svn: 138336
 2011-08-23 17:26:35 +00:00
Jim Grosbach
455795fb04 Thumb parsing and encoding for SETEND. 
llvm-svn: 138312
 2011-08-22 23:58:02 +00:00
Jim Grosbach
d299db0857 Thumb parsing and encoding for SBC. 
llvm-svn: 138311
 2011-08-22 23:55:58 +00:00
Jim Grosbach
5ae40d73a6 Thumb parsing and encoding for RSB. 
llvm-svn: 138308
 2011-08-22 23:47:13 +00:00
Jim Grosbach
9aa40e0f7c Thumb parsing and encoding for ROR. 
llvm-svn: 138304
 2011-08-22 23:40:51 +00:00
Jim Grosbach
c4109eef36 Thumb parsing and encoding for REV/REV16/REVSH. 
llvm-svn: 138303
 2011-08-22 23:39:25 +00:00
Owen Anderson
d5b7d73696 t2SMLAD is a four-register instruction, not a three-register one. 
llvm-svn: 138301
 2011-08-22 23:31:45 +00:00
Owen Anderson
c395a07c42 Correct operand naming of t2USAT16 to allow proper decoding. 
llvm-svn: 138300
 2011-08-22 23:27:47 +00:00
Owen Anderson
9e750147fb Match operand naming to allow correct decoding of t2LDRSH_POST. 
llvm-svn: 138298
 2011-08-22 23:22:05 +00:00
Jim Grosbach
54234257fa Improve error checking for tPUSH and tPOP register lists. 
llvm-svn: 138295
 2011-08-22 23:17:34 +00:00
Jim Grosbach
3ebeefcb5a Tidy up. Trailing whitespace. 
llvm-svn: 138293
 2011-08-22 23:13:54 +00:00
Owen Anderson
b400952853 Provide a correct decoder hook for Thumb2 shifted registers. Found by randomized testing. 
llvm-svn: 138292
 2011-08-22 23:10:16 +00:00
Jim Grosbach
1f5445e9d3 Thumb parsing and encoding for PUSH. 
llvm-svn: 138290
 2011-08-22 23:05:11 +00:00
Jim Grosbach
04e6944000 Fix think-o. 
llvm-svn: 138288
 2011-08-22 23:04:26 +00:00
Jim Grosbach
ec3958e68e Thumb assemmbly parsing diagnostic improvements for LDM. 
llvm-svn: 138287
 2011-08-22 23:01:07 +00:00
Jim Grosbach
059b0d9a14 Thumb assembly parsing and encoding for POP. 
llvm-svn: 138286
 2011-08-22 23:00:19 +00:00
Owen Anderson
a2231fad2e Provide operand encoding information for half-precision VCVT instructions. Found by randomized testing. 
llvm-svn: 138273
 2011-08-22 21:34:00 +00:00
Owen Anderson
39d3f234f7 Fix decoding of VMOVSRR and VMOVRRS, which account for the overwhelming majority of decoder crashes detected by randomized testing. 
llvm-svn: 138269
 2011-08-22 20:27:12 +00:00
Owen Anderson
926f360e53 Fix another batch of VLD/VST decoding crashes discovered by randomized testing. 
llvm-svn: 138255
 2011-08-22 18:42:13 +00:00
Owen Anderson
816f5524f8 Correct writeback handling of duplicating VLD instructions. Discovered by randomized testing. 
llvm-svn: 138251
 2011-08-22 18:22:06 +00:00
Owen Anderson
e70aed2df9 Port another swathe of Thumb1 encoding tests over to decoding tests. 
llvm-svn: 138250
 2011-08-22 18:05:49 +00:00
Owen Anderson
59178665b5 Fix an incorrect shift when decoding SP-relative stores in Thumb1-mode. Add more tests. 
llvm-svn: 138246
 2011-08-22 17:56:58 +00:00
Jim Grosbach
3a232fc83e Thumb assembly parsing and encoding for ORR. 
llvm-svn: 138245
 2011-08-22 17:41:44 +00:00
Jim Grosbach
a6e1ed8f2b Fix AsmParser binary precedence for shift operators. 
rdar://9976729

llvm-svn: 138208
 2011-08-20 16:24:13 +00:00
Jim Grosbach
eb5b09fa5a Tidy up. Whitespace. 
llvm-svn: 138207
 2011-08-20 16:10:09 +00:00
Jim Grosbach
be94868d66 Thumb parsing and encoding support for NOP. 
The irony is not lost that this is not a completely trivial patchset.

llvm-svn: 138143
 2011-08-19 23:24:36 +00:00
Jim Grosbach
326e78be7a Thumb assembly parsing and encoding for NEG. 
llvm-svn: 138131
 2011-08-19 22:51:03 +00:00
Jim Grosbach
a97661cac4 Be more lenient on tied operand matching for MUL. 
llvm-svn: 138124
 2011-08-19 22:30:46 +00:00
Bruno Cardoso Lopes
9979e44f1b Re-write part of VEX encoding logic, to be more easy to read! Also fix 
a bug and add a testcase!

llvm-svn: 138123
 2011-08-19 22:27:29 +00:00
Jim Grosbach
c1186a4afb Thumb assembly parsing and encoding for MVN. 
llvm-svn: 138109
 2011-08-19 22:09:23 +00:00
Jim Grosbach
8e2d4a63dc Thumb assembly parsing and encoding for MUL. 
llvm-svn: 138108
 2011-08-19 22:07:46 +00:00
Jim Grosbach
71ef1b39b1 Add FIXME. 
llvm-svn: 138077
 2011-08-19 20:48:54 +00:00
Jim Grosbach
cf35d78b16 Thumb assembly parsing and encoding for MOV. 
llvm-svn: 138076
 2011-08-19 20:46:54 +00:00
Jim Grosbach
a32aa55506 Thumb assembly parsing and encoding for LSR. 
llvm-svn: 138065
 2011-08-19 19:34:22 +00:00
Jim Grosbach
ea8b606660 Thumb assembly parsing and encoding for LSL(register). 
llvm-svn: 138064
 2011-08-19 19:30:58 +00:00
Jim Grosbach
7d707b4fb1 Thumb assembly parsing and encoding for LSL(immediate). 
llvm-svn: 138063
 2011-08-19 19:29:25 +00:00
Jim Grosbach
9174714826 Thumb assembly parsing and encoding for LDRSB and LDRSH. 
llvm-svn: 138061
 2011-08-19 19:17:58 +00:00
Jim Grosbach
27001ee5fd Thumb assembly parsing and encoding for LDRH. 
llvm-svn: 138060
 2011-08-19 18:55:51 +00:00
Jim Grosbach
36fb75a109 Thumb assembly parsing and encoding for LDRB. 
llvm-svn: 138059
 2011-08-19 18:49:59 +00:00
Jim Grosbach
5a05787b9a Thumb assembly parsing and encoding for LDR(register). 
llvm-svn: 138056
 2011-08-19 18:35:06 +00:00
Jim Grosbach
6d9a3e68bb Thumb assembly parsing and encoding for LDR(literal). 
llvm-svn: 138052
 2011-08-19 18:20:48 +00:00
Jim Grosbach
d429ab26cb Thumb assembly parsing and encoding for LDR(immediate) form T2. 
llvm-svn: 138050
 2011-08-19 18:13:48 +00:00
Jim Grosbach
35b968afdc Thumb assembly parsing and encoding for LDR(immediate) form T1. 
llvm-svn: 138047
 2011-08-19 17:55:24 +00:00
Craig Topper
f68d77215d Add TB encoding to VEX versions of SSE fp logical operations to fix disassembler 
llvm-svn: 138034
 2011-08-19 05:28:50 +00:00
Bruno Cardoso Lopes
306110c29a Fix PR10677. Initial patch and idea by Peter Cooper but I've changed the 
implementation!

llvm-svn: 138029
 2011-08-19 02:23:56 +00:00
Owen Anderson
421e30086e STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST for the purposes of decoding all operands except the predicate. 
Found by randomized testing.

llvm-svn: 138003
 2011-08-18 22:47:44 +00:00
Owen Anderson
d113a59074 Fix the decoding of RFE instruction. RFEs have the load bit set, while SRSs have it unset. 
llvm-svn: 138000
 2011-08-18 22:31:17 +00:00
Owen Anderson
d121f0e77c Improve handling of failure and unpredictable cases for CPS, STR, and SMLA instructions. 
Fixes a large class of disassembler crashes found by randomized testing.

llvm-svn: 137995
 2011-08-18 22:11:02 +00:00
Jim Grosbach
7ecefeb594 Thumb assembly parsing and encoding for LDM instruction. 
Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.

llvm-svn: 137986
 2011-08-18 21:50:53 +00:00
Owen Anderson
b4bc7704ec More Thumb1 decoding tests. 
llvm-svn: 137974
 2011-08-18 20:05:06 +00:00
Jim Grosbach
e5d4c35c23 Thumb assembly parsing and encoding for EOR. 
llvm-svn: 137964
 2011-08-18 18:10:38 +00:00
Jim Grosbach
d14d4c0aa8 Thumb assembly parsing and encoding for CMP. 
llvm-svn: 137963
 2011-08-18 18:08:29 +00:00
James Molloy
5d9ba3b5aa Test commit; adding test for invalid LDRD which was part of the patch for r137647 but seemingly didn't get svn add'ed. 
llvm-svn: 137960
 2011-08-18 18:03:02 +00:00
Jim Grosbach
a76d04e29e Thumb assembly parsing and encoding test for CMN. 
llvm-svn: 137957
 2011-08-18 17:55:03 +00:00
Owen Anderson
366ac95879 Port over BL/BLX to disassembly tests. 
llvm-svn: 137954
 2011-08-18 17:43:52 +00:00
Jim Grosbach
54d054dba4 ARM assembly parsing and encoding test for BX/BLX (register). 
llvm-svn: 137949
 2011-08-18 17:02:28 +00:00
Jim Grosbach
1a63bca66c ARM assembly parsing and encoding test for BL/BLX (immediate). 
llvm-svn: 137948
 2011-08-18 17:00:09 +00:00
Owen Anderson
eb5c093d8d Port new Thumb1 encoding tests over to decoding tests. 
llvm-svn: 137902
 2011-08-17 23:37:33 +00:00
Jim Grosbach
d4e9b9844d ARM assembly parsing and encoding test for BKPT. 
llvm-svn: 137898
 2011-08-17 23:11:13 +00:00
Jim Grosbach
fefc732dd9 ARM assembly parsing and encoding test for BIC. 
llvm-svn: 137895
 2011-08-17 23:00:53 +00:00
Jim Grosbach
b0e8cd2bfa Thumb assembly parsing and encoding for B. 
llvm-svn: 137891
 2011-08-17 22:57:40 +00:00
Jim Grosbach
1b761bd2d5 Thumb assembly parsing and encoding for ASR. 
llvm-svn: 137889
 2011-08-17 22:49:09 +00:00
Jim Grosbach
0115c6f75b Thumb assembly parsing and encoding for ADR. 
llvm-svn: 137864
 2011-08-17 20:37:40 +00:00
Jim Grosbach
20329b9f8e Add a couple of FIXMEs. 
llvm-svn: 137861
 2011-08-17 20:35:57 +00:00
Owen Anderson
4c26beae4c Start building a Thumb1 decoding test file based on the Thumb1 parsing/encoding test file. 
llvm-svn: 137840
 2011-08-17 18:21:36 +00:00
Jim Grosbach
39af673350 Thumb assembly parsing and encoding for ADC(register) instruction. 
llvm-svn: 137833
 2011-08-17 17:55:28 +00:00
Jim Grosbach
c93201cb25 Add missing '@' delimiter. 
llvm-svn: 137832
 2011-08-17 17:46:01 +00:00
Owen Anderson
3146968039 Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment. 
Patch by James Molloy.

llvm-svn: 137830
 2011-08-17 17:44:15 +00:00
Jim Grosbach
ae9f7f938f Thumb ADD(immediate) parsing support. 
llvm-svn: 137788
 2011-08-16 23:57:34 +00:00
Jim Grosbach
7a5c6948ca Thumb parsing diagnostics for low-reg requirements on ADD and MOV. 
llvm-svn: 137779
 2011-08-16 22:20:01 +00:00
Jim Grosbach
850f937ecc Thumb assembly parsing and encoding for ADD(register) instruction. 
llvm-svn: 137759
 2011-08-16 21:34:08 +00:00
Jim Grosbach
192f298228 Add testcase for r137746. 
llvm-svn: 137754
 2011-08-16 21:11:21 +00:00
Jim Grosbach
06f3a3b427 Tidy up formatting. 
llvm-svn: 137747
 2011-08-16 20:55:41 +00:00
Jim Grosbach
8d67a0e07c ARM thumb assembly parsing for arithmetic flag setting instructions. 
Thumb one requires that many arithmetic instruction forms have an 'S'
suffix. For Thumb2, the whether the suffix is required or precluded depends
on whether the instruction is in an IT block. Use target parser predicates
to check for these sorts of context-sensitive constraints.

llvm-svn: 137746
 2011-08-16 20:45:50 +00:00
Jim Grosbach
90387c44f4 ARM .align NOP padding uses different encoding pre-ARMv6. 
Patch by Kristof Beyls and James Malloy.

llvm-svn: 137723
 2011-08-16 17:06:20 +00:00
Owen Anderson
6549866051 Add a test file for Thumb2 NEON. 
llvm-svn: 137687
 2011-08-15 23:42:20 +00:00
Bruno Cardoso Lopes
1e817d1451 Reorder declarations of vmovmskp* and also put the necessary AVX 
predicate and TB encoding fields. This fix the encoding for the
attached testcase. This fixes PR10625.

llvm-svn: 137684
 2011-08-15 23:36:45 +00:00
Owen Anderson
54ded8463c Add some more comprehensive VFP decoding tests. 
llvm-svn: 137657
 2011-08-15 21:29:01 +00:00
Owen Anderson
42946000dd Enforce the constraint that Rt must be even on LDRD/STRD instructions in ARM mode. Update tests to reflect this fact. 
Patch by James Molloy.

llvm-svn: 137647
 2011-08-15 20:51:32 +00:00
Owen Anderson
43b6d1c14e Add a test for Thumb1 LDRSH decoding. 
llvm-svn: 137645
 2011-08-15 20:15:43 +00:00
Owen Anderson
aed8eff14b Add testcase for STRH. Patch by James Molloy. 
llvm-svn: 137644
 2011-08-15 20:12:03 +00:00
Owen Anderson
4854258d9c Fix incorrect encoding of UMAAL and friends. Patch by James Molloy. 
llvm-svn: 137641
 2011-08-15 20:08:25 +00:00
Owen Anderson
cd94fca93d Fix decoding LDRSB and LDRSH in Thumb1 mode. Patch by James Molloy. 
llvm-svn: 137636
 2011-08-15 19:00:06 +00:00
Owen Anderson
894585de33 Fix problems decoding the to/from-lane NEON memory instructions, and add a comprehensive NEON decoding testcase. 
llvm-svn: 137635
 2011-08-15 18:44:44 +00:00
Owen Anderson
2ea55a0881 Fix some remaining issues with decoding ARM-mode memory instructions, and add another batch of tests. 
llvm-svn: 137502
 2011-08-12 20:36:11 +00:00
Owen Anderson
9d85cab3d5 Port over the basic ARM encodings test file to a decoding test file. Greatly increases our test coverage of basic ARM-mode instructions. 
llvm-svn: 137495
 2011-08-12 19:42:45 +00:00
Jim Grosbach
d154fc4c8f Tidy up formatting. 
llvm-svn: 137471
 2011-08-12 17:43:31 +00:00
Jim Grosbach
1cfe8c24d5 Tidy up formatting. 
llvm-svn: 137464
 2011-08-12 17:01:02 +00:00
Benjamin Kramer
e404b3e2d1 MachOWriter: Don't crash on fixups with arithmetic, emit a relocation instead. This matches what as does. 
llvm-svn: 137414
 2011-08-12 01:51:29 +00:00
Jim Grosbach
ade39d38e1 Clean up formatting a bit. 
llvm-svn: 137393
 2011-08-11 23:57:17 +00:00