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13722 Commits

Author SHA1 Message Date
Chris Lattner
e314cf19ba Adjust to change in Intrinsics.gen interface. 
llvm-svn: 27344
 2006-04-02 03:35:01 +00:00
Chris Lattner
104db817c8 Constant fold all of the vector binops. This allows us to compile this: 
"vector unsigned char mergeLowHigh = (vector unsigned char)
( 8, 9, 10, 11, 16, 17, 18, 19, 12, 13, 14, 15, 20, 21, 22, 23 );
vector unsigned char mergeHighLow = vec_xor( mergeLowHigh, vec_splat_u8(8));"

aka:

void %test2(<16 x sbyte>* %P) {
  store <16 x sbyte> cast (<4 x int> xor (<4 x int> cast (<16 x ubyte> < ubyte 8, ubyte 9, ubyte 10, ubyte 11, ubyte 16, ubyte 17, ubyte 18, ubyte 19, ubyte 12, ubyte 13, ubyte 14, ubyte 15, ubyte 20, ubyte 21, ubyte 22, ubyte 23 > to <4 x int>), <4 x int> cast (<16 x sbyte> < sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8 > to <4 x int>)) to <16 x sbyte>), <16 x sbyte> * %P
  ret void
}

into this:

_test2:
        mfspr r2, 256
        oris r4, r2, 32768
        mtspr 256, r4
        li r4, lo16(LCPI2_0)
        lis r5, ha16(LCPI2_0)
        lvx v0, r5, r4
        stvx v0, 0, r3
        mtspr 256, r2
        blr

instead of this:

_test2:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI2_0)
        lis r5, ha16(LCPI2_0)
        vspltisb v0, 8
        lvx v1, r5, r4
        vxor v0, v1, v0
        stvx v0, 0, r3
        mtspr 256, r2
        blr

... which occurs here:
http://developer.apple.com/hardware/ve/calcspeed.html

llvm-svn: 27343
 2006-04-02 03:25:57 +00:00
Chris Lattner
badebf1c9b Add a new -view-legalize-dags command line option 
llvm-svn: 27342
 2006-04-02 03:07:27 +00:00
Chris Lattner
52732a272f Implement constant folding of bit_convert of arbitrary constant vbuild_vector nodes. 
llvm-svn: 27341
 2006-04-02 02:53:43 +00:00
Chris Lattner
8a66373ad7 These entries already exist 
llvm-svn: 27340
 2006-04-02 02:51:27 +00:00
Chris Lattner
5eefd8e0b3 Add some missing node names 
llvm-svn: 27339
 2006-04-02 02:41:18 +00:00
Chris Lattner
2a24d68439 New note 
llvm-svn: 27337
 2006-04-02 01:47:20 +00:00
Chris Lattner
3aa0246b4a Constant fold casts from things like <4 x int> -> <4 x uint>, likewise int<->fp. 
llvm-svn: 27336
 2006-04-02 01:38:28 +00:00
Chris Lattner
da4217646a Custom lower all BUILD_VECTOR's so that we can compile vec_splat_u8(8) into 
"vspltisb v0, 8" instead of a constant pool load.

llvm-svn: 27335
 2006-04-02 00:43:36 +00:00
Chris Lattner
13e8d5973c Prefer larger register classes over smaller ones when a register occurs in 
multiple register classes.  This fixes PowerPC/2006-04-01-FloatDoubleExtend.ll

llvm-svn: 27334
 2006-04-02 00:24:45 +00:00
Chris Lattner
704770bfe7 add valuemapper support for inline asm 
llvm-svn: 27332
 2006-04-01 23:17:11 +00:00
Chris Lattner
38318b2706 Implement vnot using VNOR instead of using 'vspltisb v0, -1' and vxor 
llvm-svn: 27331
 2006-04-01 22:41:47 +00:00
Chris Lattner
c2e9b030da Fix InstCombine/2006-04-01-InfLoop.ll 
llvm-svn: 27330
 2006-04-01 22:05:01 +00:00
Chris Lattner
497bbd4650 Fold A^(B&A) -> (B&A)^A 
Fold (B&A)^A == ~B & A

This implements InstCombine/xor.ll:test2[56]

llvm-svn: 27328
 2006-04-01 08:03:55 +00:00
Chris Lattner
a76347d917 Fix Transforms/IndVarsSimplify/2006-03-31-NegativeStride.ll and 
PR726 by performing consistent signed division, not consistent unsigned
division when evaluating scev's.  Do not touch udivs.

llvm-svn: 27326
 2006-04-01 04:48:52 +00:00
Chris Lattner
894231e63e ADd a note 
llvm-svn: 27324
 2006-04-01 04:08:29 +00:00
Chris Lattner
79819f52dc If we can look through vector operations to find the scalar version of an 
extract_element'd value, do so.

llvm-svn: 27323
 2006-03-31 23:01:56 +00:00
Chris Lattner
32bb17a5f3 Shrinkify some more intrinsic definitions. 
llvm-svn: 27322
 2006-03-31 22:41:56 +00:00
Evan Cheng
403cd8f787 An entry about packed type alignments. 
llvm-svn: 27321
 2006-03-31 22:35:14 +00:00
Chris Lattner
12e9ce7104 Pull operand asm string into base class, shrinkifying intrinsic definitions. 
No functionality change.

llvm-svn: 27320
 2006-03-31 22:34:05 +00:00
Evan Cheng
fc0a2ac06e TargetData.cpp::getTypeInfo() was returning alignment of element type as the 
alignment of a packed type. This is obviously wrong. Added a workaround that
returns the size of the packed type as its alignment. The correct fix would
be to return a target dependent alignment value provided via TargetLowering
(or some other interface).

llvm-svn: 27319
 2006-03-31 22:33:42 +00:00
Chris Lattner
b088cfc01a Delete identity shuffles, implementing CodeGen/Generic/vector-identity-shuffle.ll 
llvm-svn: 27317
 2006-03-31 22:16:43 +00:00
Chris Lattner
3d6e5f8a05 Fix 80 column violations :) 
llvm-svn: 27315
 2006-03-31 21:57:36 +00:00
Evan Cheng
4623ebd3d0 Use a X86 target specific node X86ISD::PINSRW instead of a mal-formed 
INSERT_VECTOR_ELT to insert a 16-bit value in a 128-bit vector.

llvm-svn: 27314
 2006-03-31 21:55:24 +00:00
Evan Cheng
fb980688f1 Added support for SSE3 horizontal ops: haddp{s|d} and hsub{s|d}. 
llvm-svn: 27310
 2006-03-31 21:29:33 +00:00
Chris Lattner
d66dd2a4ee fix a pasto 
llvm-svn: 27308
 2006-03-31 21:19:06 +00:00
Chris Lattner
28219f34bc Add vperm support for all datatypes 
llvm-svn: 27307
 2006-03-31 20:00:35 +00:00
Chris Lattner
336d6646ab Rearrange code a bit 
llvm-svn: 27306
 2006-03-31 19:52:36 +00:00
Chris Lattner
786f782398 Add, sub and shuffle are legal for all vector types 
llvm-svn: 27305
 2006-03-31 19:48:58 +00:00
Evan Cheng
7b9a0c6d7a Add support to use pextrw and pinsrw to extract and insert a word element 
from a 128-bit vector.

llvm-svn: 27304
 2006-03-31 19:22:53 +00:00
Evan Cheng
5da48f30bb Add vector_extract and vector_insert nodes. 
llvm-svn: 27303
 2006-03-31 19:21:16 +00:00
Chris Lattner
d27ced882b add a note 
llvm-svn: 27302
 2006-03-31 19:00:22 +00:00
Chris Lattner
8e584affdb constant fold extractelement with undef operands. 
llvm-svn: 27301
 2006-03-31 18:31:40 +00:00
Chris Lattner
0af2e8be73 extractelement(undef,x) -> undef 
llvm-svn: 27300
 2006-03-31 18:25:14 +00:00
Chris Lattner
774bdd598c Do not endian swap split vector loads. This fixes UnitTests/Vector/sumarray-dbl on PPC. 
Now all UnitTests/Vector/* tests pass on PPC.

llvm-svn: 27299
 2006-03-31 18:22:37 +00:00
Chris Lattner
ffa44397a5 Do not endian swap the operands to a store if the operands came from a vector. 
This fixes UnitTests/Vector/simple.c with altivec.

llvm-svn: 27298
 2006-03-31 18:20:46 +00:00
Chris Lattner
0e7da656a7 Remove dead *extloads. This allows us to codegen vector.ll:test_extract_elt 
to:

test_extract_elt:
        alloc r3 = ar.pfs,0,1,0,0
        adds r8 = 12, r32
        ;;
        ldfs f8 = [r8]
        mov ar.pfs = r3
        br.ret.sptk.many rp

instead of:

test_extract_elt:
        alloc r3 = ar.pfs,0,1,0,0
        adds r8 = 28, r32
        adds r9 = 24, r32
        adds r10 = 20, r32
        adds r11 = 16, r32
        ;;
        ldfs f6 = [r8]
        ;;
        ldfs f6 = [r9]
        adds r8 = 12, r32
        adds r9 = 8, r32
        adds r14 = 4, r32
        ;;
        ldfs f6 = [r10]
        ;;
        ldfs f6 = [r11]
        ldfs f8 = [r8]
        ;;
        ldfs f6 = [r9]
        ;;
        ldfs f6 = [r14]
        ;;
        ldfs f6 = [r32]
        mov ar.pfs = r3
        br.ret.sptk.many rp

llvm-svn: 27297
 2006-03-31 18:10:41 +00:00
Chris Lattner
c3be332547 Delete dead loads in the dag. This allows us to compile 
vector.ll:test_extract_elt2 into:

_test_extract_elt2:
        lfd f1, 32(r3)
        blr

instead of:

_test_extract_elt2:
        lfd f0, 56(r3)
        lfd f0, 48(r3)
        lfd f0, 40(r3)
        lfd f1, 32(r3)
        lfd f0, 24(r3)
        lfd f0, 16(r3)
        lfd f0, 8(r3)
        lfd f0, 0(r3)
        blr

llvm-svn: 27296
 2006-03-31 18:06:18 +00:00
Chris Lattner
9d379a4ef3 Implement PromoteOp for VEXTRACT_VECTOR_ELT. Thsi fixes 
Generic/vector.ll:test_extract_elt on non-sse X86 systems.

llvm-svn: 27294
 2006-03-31 17:55:51 +00:00
Chris Lattner
e05a1ec544 Scalarized vector stores need not be legal, e.g. if the vector element type 
needs to be promoted or expanded.  Relegalize the scalar store once created.
This fixes CodeGen/Generic/vector.ll:test1 on non-SSE x86 targets.

llvm-svn: 27293
 2006-03-31 17:37:22 +00:00
Jeff Cohen
6c699c72a8 Fix build breakage. 
llvm-svn: 27292
 2006-03-31 07:22:05 +00:00
Chris Lattner
e3774da014 note to self: *save* file, then check it in 
llvm-svn: 27291
 2006-03-31 06:04:53 +00:00
Chris Lattner
95d358dbdb Implement an item from the readme, folding vcmp/vcmp. instructions with 
identical instructions into a single instruction.  For example, for:

void test(vector float *x, vector float *y, int *P) {
  int v = vec_any_out(*x, *y);
  *x = (vector float)vec_cmpb(*x, *y);
  *P = v;
}

we now generate:

_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        lvx v0, 0, r4
        lvx v1, 0, r3
        vcmpbfp. v0, v1, v0
        mfcr r4, 2
        stvx v0, 0, r3
        rlwinm r3, r4, 27, 31, 31
        xori r3, r3, 1
        stw r3, 0(r5)
        mtspr 256, r2
        blr

instead of:

_test:
        mfspr r2, 256
        oris r6, r2, 57344
        mtspr 256, r6
        lvx v0, 0, r4
        lvx v1, 0, r3
        vcmpbfp. v2, v1, v0
        mfcr r4, 2
***     vcmpbfp v0, v1, v0
        rlwinm r4, r4, 27, 31, 31
        stvx v0, 0, r3
        xori r3, r4, 1
        stw r3, 0(r5)
        mtspr 256, r2
        blr

Testcase here: CodeGen/PowerPC/vcmp-fold.ll

llvm-svn: 27290
 2006-03-31 06:02:07 +00:00
Chris Lattner
560f734320 compactify some more instruction definitions 
llvm-svn: 27288
 2006-03-31 05:38:32 +00:00
Chris Lattner
2c3d6bdb55 Compactify comparisons. 
llvm-svn: 27287
 2006-03-31 05:32:57 +00:00
Chris Lattner
e330741a6c Lower vector compares to VCMP nodes, just like we lower vector comparison 
predicates to VCMPo nodes.

llvm-svn: 27285
 2006-03-31 05:13:27 +00:00
Chris Lattner
a7a7c035b3 These are done 
llvm-svn: 27284
 2006-03-31 04:53:21 +00:00
Chris Lattner
17549e4da1 Add a new method to verify intrinsic function prototypes. 
llvm-svn: 27282
 2006-03-31 04:46:47 +00:00
Chris Lattner
f30369b9b1 Make sure to pass enough values to phi nodes when we are dealing with 
decimated vectors.  This fixes UnitTests/Vector/sumarray-dbl.c

llvm-svn: 27280
 2006-03-31 02:12:18 +00:00
Chris Lattner
82a0e17dd7 Significantly improve handling of vectors that are live across basic blocks, 
handling cases where the vector elements need promotion, expansion, and when
the vector type itself needs to be decimated.

llvm-svn: 27278
 2006-03-31 02:06:56 +00:00
Chris Lattner
00921c047c Was returning the wrong type. 
llvm-svn: 27277
 2006-03-31 01:50:09 +00:00
Chris Lattner
a31d719e0a Mark INSERT_VECTOR_ELT as expand 
llvm-svn: 27276
 2006-03-31 01:48:55 +00:00
Evan Cheng
4ca9bbc1bb Expand all INSERT_VECTOR_ELT (obviously bad) for now. 
llvm-svn: 27275
 2006-03-31 01:30:39 +00:00
Evan Cheng
873c48a51a Expand INSERT_VECTOR_ELT to store vec, sp; store elt, sp+k; vec = load sp; 
llvm-svn: 27274
 2006-03-31 01:27:51 +00:00
Chris Lattner
8e0dfe133c Modify the TargetLowering::getPackedTypeBreakdown method to also return the 
unpromoted element type.

llvm-svn: 27273
 2006-03-31 00:46:36 +00:00
Evan Cheng
5d9fc9fdd0 Typo 
llvm-svn: 27272
 2006-03-31 00:33:57 +00:00
Evan Cheng
c55052da81 Ok for vector_shuffle mask to contain undef elements. 
llvm-svn: 27271
 2006-03-31 00:30:29 +00:00
Chris Lattner
7f48037ef1 Implement TargetLowering::getPackedTypeBreakdown 
llvm-svn: 27270
 2006-03-31 00:28:56 +00:00
Chris Lattner
87d3a2e045 Add the rest of the vmul instructions and the vmulsum* instructions. 
llvm-svn: 27268
 2006-03-30 23:39:06 +00:00
Chris Lattner
22b7e551f1 Use a new tblgen feature to significantly shrinkify instruction definitions that 
directly correspond to intrinsics.

llvm-svn: 27266
 2006-03-30 23:21:27 +00:00
Chris Lattner
6aca6013d2 Add a bunch of new instructions for intrinsics. 
llvm-svn: 27265
 2006-03-30 23:07:36 +00:00
Chris Lattner
e57e873543 Fix Transforms/InstCombine/2006-03-30-ExtractElement.ll 
llvm-svn: 27261
 2006-03-30 22:02:40 +00:00
Evan Cheng
d3c692650f Make sure all possible shuffles are matched. 
Use pshufd, pshuhw, and pshulw to shuffle v4f32 if shufps doesn't match.
Use shufps to shuffle v4f32 if pshufd, pshuhw, and pshulw don't match.

llvm-svn: 27259
 2006-03-30 19:54:57 +00:00
Evan Cheng
4150ec59a3 More logical ops patterns 
llvm-svn: 27257
 2006-03-30 07:33:32 +00:00
Evan Cheng
57d481a78a Add support for _mm_cmp{cc}_ss and _mm_cmp{cc}_ps intrinsics 
llvm-svn: 27256
 2006-03-30 06:21:22 +00:00
Evan Cheng
82d2a6910f Add 128-bit pmovmskb intrinsic support. 
llvm-svn: 27255
 2006-03-30 00:33:26 +00:00
Evan Cheng
9ebe75e915 Change SSE pack operation definitions to fit what the intrinsics expected. 
For example, packsswb actually creates a v16i8 from a pair of v8i16. But since
the intrinsic specification forces the output type to match the operands.

llvm-svn: 27254
 2006-03-29 23:53:14 +00:00
Evan Cheng
7bc3bc8246 - Added some SSE2 128-bit packed integer ops. 
- Added SSE2 128-bit integer pack with signed saturation ops.
- Added pshufhw and pshuflw ops.

llvm-svn: 27252
 2006-03-29 23:07:14 +00:00
Evan Cheng
d0d3eade59 Need to special case splat after all. Make the second operand of splat 
vector_shuffle undef.

llvm-svn: 27250
 2006-03-29 19:02:40 +00:00
Evan Cheng
e7701928bb Floating point logical operation patterns should match bit_convert. Or else 
integer vector logical operations would match andp{s|d} instead of pand.

llvm-svn: 27248
 2006-03-29 18:47:40 +00:00
Evan Cheng
02b5de9b3e - More shuffle related bug fixes. 
- Whenever possible use ops of the right packed types for vector shuffles /
  splats.

llvm-svn: 27246
 2006-03-29 03:04:49 +00:00
Evan Cheng
6e8b924416 Another entry about shuffles. 
llvm-svn: 27245
 2006-03-29 03:03:46 +00:00
Evan Cheng
5194a37602 - Only use pshufd for v4i32 vector shuffles. 
- Other shuffle related fixes.

llvm-svn: 27244
 2006-03-29 01:30:51 +00:00
Chris Lattner
1a773f8f18 add a note 
llvm-svn: 27243
 2006-03-29 00:24:13 +00:00
Chris Lattner
9a46d1605c Bug fixes: handle constantexpr insert/extract element operations 
Handle constantpacked vectors with constantexpr elements.

This fixes CodeGen/Generic/vector-constantexpr.ll

llvm-svn: 27241
 2006-03-29 00:11:43 +00:00
Evan Cheng
e7a50a5851 Added aliases to scalar SSE instructions, e.g. addss, to match x86 intrinsics. 
The source operands type are v4sf with upper bits passes through.
Added matching code for these.

llvm-svn: 27240
 2006-03-28 23:51:43 +00:00
Evan Cheng
178e36174a Fixing buggy code. 
llvm-svn: 27239
 2006-03-28 23:41:33 +00:00
Chris Lattner
95a8c4fb11 When building a VVECTOR_SHUFFLE node from extract_element operations, make 
sure to build it as SHUFFLE(X, undef, mask), not SHUFFLE(X, X, mask).

The later is not canonical form, and prevents the PPC splat pattern from
matching.  For a particular splat, we go from generating this:

	li r10, lo16(LCPI1_0)
	lis r11, ha16(LCPI1_0)
	lvx v3, r11, r10
	vperm v3, v2, v2, v3

to generating:

	vspltw v3, v2, 3

llvm-svn: 27236
 2006-03-28 22:19:47 +00:00
Chris Lattner
017e8f1798 Canonicalize VECTOR_SHUFFLE(X, X, Y) -> VECTOR_SHUFFLE(X,undef,Y') 
llvm-svn: 27235
 2006-03-28 22:11:53 +00:00
Chris Lattner
a623f6f696 Turn a series of extract_element's feeding a build_vector into a 
vector_shuffle node.  For this:

void test(__m128 *res, __m128 *A, __m128 *B) {
  *res = _mm_unpacklo_ps(*A, *B);
}

we now produce this code:

_test:
        movl 8(%esp), %eax
        movaps (%eax), %xmm0
        movl 12(%esp), %eax
        unpcklps (%eax), %xmm0
        movl 4(%esp), %eax
        movaps %xmm0, (%eax)
        ret

instead of this:

_test:
        subl $76, %esp
        movl 88(%esp), %eax
        movaps (%eax), %xmm0
        movaps %xmm0, (%esp)
        movaps %xmm0, 32(%esp)
        movss 4(%esp), %xmm0
        movss 32(%esp), %xmm1
        unpcklps %xmm0, %xmm1
        movl 84(%esp), %eax
        movaps (%eax), %xmm0
        movaps %xmm0, 16(%esp)
        movaps %xmm0, 48(%esp)
        movss 20(%esp), %xmm0
        movss 48(%esp), %xmm2
        unpcklps %xmm0, %xmm2
        unpcklps %xmm1, %xmm2
        movl 80(%esp), %eax
        movaps %xmm2, (%eax)
        addl $76, %esp
        ret

GCC produces this (with -fomit-frame-pointer):

_test:
        subl    $12, %esp
        movl    20(%esp), %eax
        movaps  (%eax), %xmm0
        movl    24(%esp), %eax
        unpcklps        (%eax), %xmm0
        movl    16(%esp), %eax
        movaps  %xmm0, (%eax)
        addl    $12, %esp
        ret

llvm-svn: 27233
 2006-03-28 20:28:38 +00:00
Chris Lattner
c6e37432b5 Teach Legalize how to pack VVECTOR_SHUFFLE nodes into VECTOR_SHUFFLE nodes. 
llvm-svn: 27232
 2006-03-28 20:24:43 +00:00
Chris Lattner
5b8467460a new node 
llvm-svn: 27231
 2006-03-28 19:54:42 +00:00
Chris Lattner
cad173698d Don't crash on X^X if X is a vector. Instead, produce a vector of zeros. 
llvm-svn: 27229
 2006-03-28 19:11:05 +00:00
Chris Lattner
6af8c19e4f Add an assertion 
llvm-svn: 27228
 2006-03-28 19:04:49 +00:00
Chris Lattner
93559450b8 add a note 
llvm-svn: 27227
 2006-03-28 18:56:23 +00:00
Jim Laskey
4c2d4d1912 Refactor address attributes. Add base register to frame info. 
llvm-svn: 27226
 2006-03-28 14:58:32 +00:00
Jim Laskey
eb38a3e83a Expose base register for DwarfWriter. Refactor code accordingly. 
llvm-svn: 27225
 2006-03-28 13:48:33 +00:00
Jim Laskey
a9e74309d9 More bulletproofing of llvm.dbg.declare. 
llvm-svn: 27224
 2006-03-28 13:45:20 +00:00
Jim Laskey
fa6dfa9212 Added missing paren on behalf of Ramana Radhakrishnan. 
llvm-svn: 27223
 2006-03-28 10:17:11 +00:00
Evan Cheng
0305cec743 Missed X86::isUNPCKHMask 
llvm-svn: 27222
 2006-03-28 08:27:15 +00:00
Evan Cheng
7b7954f53f movlps and movlpd should be modeled as two address code. 
llvm-svn: 27221
 2006-03-28 07:01:28 +00:00
Evan Cheng
a96380ba3f Update 
llvm-svn: 27220
 2006-03-28 06:55:45 +00:00
Evan Cheng
9f0e244187 Typo 
llvm-svn: 27219
 2006-03-28 06:53:49 +00:00
Evan Cheng
fb4b2bfc7d * Prefer using operation of matching types. e.g unpcklpd rather than movlhps. 
* Bug fixes.

llvm-svn: 27218
 2006-03-28 06:50:32 +00:00
Nate Begeman
d432d66cc8 Fix a couple typos 
llvm-svn: 27216
 2006-03-28 04:18:18 +00:00
Nate Begeman
5a82c8ccbd Add a few more altivec intrinsics 
llvm-svn: 27215
 2006-03-28 04:15:58 +00:00
Evan Cheng
ca067debe3 Added a couple of entries about movhps and movlhps. 
llvm-svn: 27212
 2006-03-28 02:49:12 +00:00
Evan Cheng
9accac09cd All unpack cases are now being handled. 
llvm-svn: 27211
 2006-03-28 02:44:05 +00:00
Evan Cheng
4d554dae17 - Clean up / consoladate various shuffle masks. 
- Some misc. bug fixes.
- Use MOVHPDrm to load from m64 to upper half of a XMM register.

llvm-svn: 27210
 2006-03-28 02:43:26 +00:00
Chris Lattner
a570305421 implement a bunch more intrinsics. 
llvm-svn: 27209
 2006-03-28 02:29:37 +00:00
Chris Lattner
ac98e20cc9 Use normal lvx for scalar_to_vector instead of lve*x. They do the exact 
same thing and we have a dag node for the former.

llvm-svn: 27205
 2006-03-28 01:43:22 +00:00
Jim Laskey
702240530d More bulletproofing of DebugInfoDesc verify. 
llvm-svn: 27203
 2006-03-28 01:30:18 +00:00
Chris Lattner
d5da541d42 Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums. 
llvm-svn: 27201
 2006-03-28 00:40:33 +00:00
Evan Cheng
d8d7ec47bd Model unpack lower and interleave as vector_shuffle so we can lower the 
intrinsics as such.

llvm-svn: 27200
 2006-03-28 00:39:58 +00:00
Andrew Lenharth
4130ea834c If adding a link to a collapsed, node, ignore offset. 
Fixes 2006-03-27-LinkedCollapsed.ll

llvm-svn: 27194
 2006-03-27 23:39:58 +00:00
Jim Laskey
d2619bb575 Reactivate llvm.dbg.declare. 
llvm-svn: 27192
 2006-03-27 23:31:10 +00:00
Chris Lattner
0b857e9ffc Disable dbg_declare, it currently breaks the CFE build 
llvm-svn: 27182
 2006-03-27 21:36:03 +00:00
Chris Lattner
d3368b1114 Fix legalization of intrinsics with chain and result values 
llvm-svn: 27181
 2006-03-27 20:28:29 +00:00
Jim Laskey
8688957c53 Translate llvm target registers to dwarf register numbers properly. 
llvm-svn: 27180
 2006-03-27 20:18:45 +00:00
Chris Lattner
b64eb6593a unbreak the build 
llvm-svn: 27174
 2006-03-27 16:52:45 +00:00
Chris Lattner
f5de9e0ab3 Unbreak the build on non-apple compilers :-( 
llvm-svn: 27173
 2006-03-27 16:10:59 +00:00
Evan Cheng
11d2b6217d Try again 
llvm-svn: 27171
 2006-03-27 08:10:26 +00:00
Chris Lattner
dab8425129 Add a bunch of notes from my journey thus far. 
llvm-svn: 27170
 2006-03-27 07:41:00 +00:00
Evan Cheng
73d281ae4c Incorrect check for FP all one's 
llvm-svn: 27169
 2006-03-27 07:26:17 +00:00
Chris Lattner
f1d6a9483f Split out altivec notes into their own README 
llvm-svn: 27168
 2006-03-27 07:04:16 +00:00
Evan Cheng
0865274fa5 Use pcmpeq to generate vector of all ones. 
llvm-svn: 27167
 2006-03-27 07:00:16 +00:00
Evan Cheng
2a36326bb0 Changed isBuildVectorAllOnesInteger to isBuildVectorAllOnes. 
llvm-svn: 27166
 2006-03-27 06:59:32 +00:00
Evan Cheng
4667bd17cb Change isBuildVectorAllOnesInteger to isBuildVectorAllOnes. Also check for 
floating point cases.

llvm-svn: 27165
 2006-03-27 06:58:47 +00:00
Chris Lattner
c508c91acb Instead of printing "INTRINSIC" on intrinsic node, print the intrinsic name. 
llvm-svn: 27164
 2006-03-27 06:45:25 +00:00
Chris Lattner
dc5d97a341 teach the inliner to work with packed constants 
llvm-svn: 27161
 2006-03-27 05:50:18 +00:00
Chris Lattner
4b0fc38fe7 Fix the JIT encoding of VSEL 
llvm-svn: 27160
 2006-03-27 03:34:17 +00:00
Chris Lattner
b5efa3e0f5 Fix the JIT encoding of VSPLTI* 
llvm-svn: 27159
 2006-03-27 03:28:57 +00:00
Jim Laskey
c195040bcf Pass llvm/test/Regression/CodeGen/Generic/debug-info.ll. 
llvm-svn: 27158
 2006-03-27 01:51:47 +00:00
Nate Begeman
3d518334b9 SelectionDAGISel can now natively handle Switch instructions, in the same 
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.

llvm-svn: 27156
 2006-03-27 01:32:24 +00:00
Jim Laskey
fb55c2c6a7 Bullet proof against undefined args produced by upgrading ols-style debug info. 
llvm-svn: 27155
 2006-03-26 22:46:27 +00:00
Jim Laskey
278ca1e735 How to be dumb on $5/day. Need a tri-state to track valid debug descriptors. 
llvm-svn: 27154
 2006-03-26 22:45:20 +00:00
Chris Lattner
03ad35fd49 add vsel 
llvm-svn: 27153
 2006-03-26 22:38:43 +00:00
Nate Begeman
507e293848 Readme note 
llvm-svn: 27152
 2006-03-26 19:19:27 +00:00
Chris Lattner
65a455b060 Codegen vector predicate compares. 
llvm-svn: 27151
 2006-03-26 10:06:40 +00:00
Evan Cheng
1dfbede1d1 Remove X86:isZeroVector, use ISD::isBuildVectorAllZeros instead; some fixes / cleanups 
llvm-svn: 27150
 2006-03-26 09:53:12 +00:00
Evan Cheng
b17bbf8ccb Remove PPC:isZeroVector, use ISD::isBuildVectorAllZeros instead 
llvm-svn: 27149
 2006-03-26 09:52:32 +00:00
Evan Cheng
5809827989 Add immAllZerosV helper 
llvm-svn: 27148
 2006-03-26 09:51:39 +00:00
Evan Cheng
ef3b33b847 Add ISD::isBuildVectorAllZeros predicate 
llvm-svn: 27147
 2006-03-26 09:50:58 +00:00
Chris Lattner
aef813a8cf Allow targets to custom lower their own intrinsics if desired. 
llvm-svn: 27146
 2006-03-26 09:12:51 +00:00
Chris Lattner
dc8250447f Update dependencies to reflect split of the Intrinsics.td file 
llvm-svn: 27144
 2006-03-26 07:45:48 +00:00
Chris Lattner
f0c36b99e6 Add all of the altivec comparison instructions. Add patterns for the 
non-predicate altivec compare intrinsics.

llvm-svn: 27143
 2006-03-26 04:57:17 +00:00
Chris Lattner
4e0a78ea30 Add and 8/16-bit adds, add all integer subtracts, add saturating subtract 
intrinsics.

llvm-svn: 27142
 2006-03-26 02:39:02 +00:00
Chris Lattner
d33ef7a1bc implement the vsldoi intrinsic. 
llvm-svn: 27139
 2006-03-26 00:41:48 +00:00
Chris Lattner
7d557e00f3 fix the pattern for vandc, it's NOT vnand 
llvm-svn: 27136
 2006-03-25 23:10:40 +00:00
Chris Lattner
88a0c65463 add patterns for VANDC/VNOR, implementing 
CodeGen/PowerPC/eqv-andc-orc-nor.ll:VNOR/VANDC

llvm-svn: 27135
 2006-03-25 23:05:29 +00:00
Chris Lattner
8b6f0daaae Add some comments. 
llvm-svn: 27133
 2006-03-25 23:00:56 +00:00
Chris Lattner
f83db1efe6 add a vnot helper node for matching 'not' on vectors 
llvm-svn: 27132
 2006-03-25 23:00:08 +00:00
Chris Lattner
f9c8e9646d Fix a bug in ISD::isBuildVectorAllOnesInteger that caused it to always return 
false

llvm-svn: 27131
 2006-03-25 22:59:28 +00:00
Chris Lattner
d89668e503 Implement the ISD::isBuildVectorAllOnesInteger predicate 
llvm-svn: 27130
 2006-03-25 22:57:01 +00:00
Chris Lattner
62185c0496 Don't call SimplifyDemandedBits on vectors 
llvm-svn: 27128
 2006-03-25 22:19:00 +00:00
Chris Lattner
f80b39f9b1 Add some logical operations 
llvm-svn: 27127
 2006-03-25 22:16:05 +00:00
Chris Lattner
bc48efc7fa Don't crash on packed logical ops 
llvm-svn: 27125
 2006-03-25 21:58:26 +00:00
Chris Lattner
a458878f87 Teach BinaryOperator::createNot to work with packed integer types 
llvm-svn: 27124
 2006-03-25 21:54:21 +00:00
Jim Laskey
5a27f03274 Cast instruction not inserted into basic block. 
llvm-svn: 27122
 2006-03-25 18:40:47 +00:00
Evan Cheng
875c895b0f Added missing (any_extend (load ...)) patterns. 
llvm-svn: 27120
 2006-03-25 09:45:48 +00:00
Evan Cheng
e5807f6b47 Build arbitrary vector with more than 2 distinct scalar elements with a 
series of unpack and interleave ops.

llvm-svn: 27119
 2006-03-25 09:37:23 +00:00
Chris Lattner
d2823658b4 implement a bunch of intrinsics 
llvm-svn: 27118
 2006-03-25 08:01:02 +00:00
Chris Lattner
cb5f9269a9 Move all Altivec stuff out into a new PPCInstrAltivec.td file. 
Add a bunch of patterns for different datatypes, e.g. bit_convert, undef and
zero vector support.

llvm-svn: 27117
 2006-03-25 07:51:43 +00:00
Chris Lattner
57064915a6 Add some basic patterns for other datatypes 
llvm-svn: 27116
 2006-03-25 07:39:07 +00:00
Chris Lattner
7f5fba9c67 add all supported formats to the vector register file 
llvm-svn: 27115
 2006-03-25 07:36:56 +00:00
Chris Lattner
2fa3a6c436 Add support for __builtin_altivec_vnmsubfp /vmaddfp 
llvm-svn: 27112
 2006-03-25 07:05:55 +00:00
Chris Lattner
e199d55073 #include Intrinsics.h into all dag isels 
llvm-svn: 27109
 2006-03-25 06:47:10 +00:00
Chris Lattner
b014b3c7ab Implement Intrinsic::getName 
llvm-svn: 27108
 2006-03-25 06:32:47 +00:00
Chris Lattner
0899b16b2d Codegen things like: 
<int -1, int -1, int -1, int -1>
and
 <int 65537, int 65537, int 65537, int 65537>

Using things like:
  vspltisb v0, -1
and:
  vspltish v0, 1

instead of using constant pool loads.

This implements CodeGen/PowerPC/vec_splat.ll:splat_imm_i{32|16}.

llvm-svn: 27106
 2006-03-25 06:12:06 +00:00
Evan Cheng
8601147e68 Added SSE cachebility ops 
llvm-svn: 27103
 2006-03-25 06:03:26 +00:00
Evan Cheng
cad90504fe Instruction encoding bug 
llvm-svn: 27102
 2006-03-25 06:00:03 +00:00
Chris Lattner
b0e8c6dd7f Add new intrinsic node definitions for tblgen use 
llvm-svn: 27100
 2006-03-25 02:29:35 +00:00
Evan Cheng
234090b386 Added 128-bit packed integer subtraction. 
llvm-svn: 27096
 2006-03-25 01:33:37 +00:00
Evan Cheng
b280b34497 Added CVTTPS2PI. 
llvm-svn: 27095
 2006-03-25 01:31:59 +00:00
Evan Cheng
041c9c534b Added CVTSS2SI. 
llvm-svn: 27094
 2006-03-25 01:00:18 +00:00
Evan Cheng
bdb85b387f Support for scalar to vector with zero extension. 
llvm-svn: 27091
 2006-03-24 23:15:12 +00:00
Chris Lattner
1e4694ed84 fix inverted conditional 
llvm-svn: 27089
 2006-03-24 22:49:42 +00:00
Jim Laskey
37a8c245ce D'oh - should be even numbered. 
llvm-svn: 27088
 2006-03-24 22:48:02 +00:00
Evan Cheng
33dad39b46 Added LDMXCSR 
llvm-svn: 27087
 2006-03-24 22:28:37 +00:00
Chris Lattner
2d08e8aee1 plug the intrinsics into the patterns for movmsk* 
llvm-svn: 27083
 2006-03-24 21:49:18 +00:00
Jim Laskey
1716e53341 Add dwarf register numbering to register data. 
llvm-svn: 27081
 2006-03-24 21:15:58 +00:00
Jim Laskey
d577317f38 Add support for dwarf register numbering. 
llvm-svn: 27080
 2006-03-24 21:13:21 +00:00
Jim Laskey
a39264632c Hack no more. 
llvm-svn: 27079
 2006-03-24 21:10:36 +00:00
Chris Lattner
8840036091 add another note 
llvm-svn: 27077
 2006-03-24 20:04:27 +00:00
Chris Lattner
045f6bf0ef add a note 
llvm-svn: 27076
 2006-03-24 19:59:17 +00:00
Chris Lattner
b979b51e39 Shuffle some includes around 
llvm-svn: 27073
 2006-03-24 18:52:35 +00:00
Evan Cheng
ff1db97bca Only to vector shuffle for {x,x,y,y} cases when SCALAR_TO_VECTOR is free. 
llvm-svn: 27071
 2006-03-24 18:45:20 +00:00
Chris Lattner
8e14f3544b expose intrinsic info to the targets. 
llvm-svn: 27070
 2006-03-24 18:44:11 +00:00
Chris Lattner
21abff3712 Fix a bad JIT encoding of VPERM. Why is VPERM D,A,B,C but vfmadd is D,A,C,B ?? 
llvm-svn: 27069
 2006-03-24 18:24:43 +00:00
Chris Lattner
3133dafd4b Like the comment says, prefer to use the implicit add done by [r+r] addressing 
modes than emitting an explicit add and using a base of r0.  This implements
Regression/CodeGen/PowerPC/mem-rr-addr-mode.ll

llvm-svn: 27068
 2006-03-24 17:58:06 +00:00
Jim Laskey
704b1e07a3 Fix indent. 
llvm-svn: 27065
 2006-03-24 10:08:23 +00:00
Jim Laskey
06c78bb995 Clean up some commentary. 
llvm-svn: 27064
 2006-03-24 10:00:56 +00:00
Jim Laskey
0d63725a26 Rename for truth in advertising. 
llvm-svn: 27063
 2006-03-24 09:50:27 +00:00
Chris Lattner
303dc30593 Disable the i32->float G5 optimization. It is unsafe, as documented in the 
comment.

This fixes 177.mesa, and McCat/09-vor with the td scheduler.

llvm-svn: 27060
 2006-03-24 07:53:47 +00:00
Chris Lattner
ba4966c16c add support for using vxor to build zero vectors. This implements 
Regression/CodeGen/PowerPC/vec_zero.ll

llvm-svn: 27059
 2006-03-24 07:48:08 +00:00
Evan Cheng
d58d54cf3e Handle BUILD_VECTOR with all zero elements. 
llvm-svn: 27056
 2006-03-24 07:29:27 +00:00
Chris Lattner
62b04677c0 prefer to generate constant pool loads over splats. This prevents us from 
using a splat for {1.0,1.0,1.0,1.0}

llvm-svn: 27055
 2006-03-24 07:29:17 +00:00
Chris Lattner
b2b32e9283 fix spello 
llvm-svn: 27053
 2006-03-24 07:15:07 +00:00
Chris Lattner
826dbd7173 Fix spello 
llvm-svn: 27052
 2006-03-24 07:14:34 +00:00
Chris Lattner
37951daad5 add the actual cost to the debug info 
llvm-svn: 27051
 2006-03-24 07:14:00 +00:00
Chris Lattner
ace2d0d227 Gabor points out that we can't spell. :) 
llvm-svn: 27049
 2006-03-24 07:12:19 +00:00
Evan Cheng
8507228441 All v2f64 shuffle cases can be handled. 
llvm-svn: 27044
 2006-03-24 06:40:32 +00:00
Evan Cheng
3028b04057 More efficient v2f64 shuffle using movlhps, movhlps, unpckhpd, and unpcklpd. 
llvm-svn: 27040
 2006-03-24 02:58:06 +00:00
Evan Cheng
184c4b937e A new entry 
llvm-svn: 27039
 2006-03-24 02:57:03 +00:00
Jeff Cohen
dab30f45d8 Get JIT/Interpreter working on Windows again. 
llvm-svn: 27037
 2006-03-24 02:53:49 +00:00
Chris Lattner
f7ceb5fdd4 legalize vbit_convert nodes whose result is a legal type. 
Legalize intrinsic nodes.

llvm-svn: 27036
 2006-03-24 02:26:29 +00:00
Chris Lattner
041588d953 Lower target intrinsics into an INTRINSIC node 
llvm-svn: 27035
 2006-03-24 02:22:33 +00:00
Reid Spencer
845084b469 Ignore the burg output files. 
llvm-svn: 27033
 2006-03-24 02:21:35 +00:00
Chris Lattner
3c7f31ad32 fix some bogus assertions: noop bitconverts are legal 
llvm-svn: 27032
 2006-03-24 02:20:47 +00:00
Evan Cheng
68410804f0 Handle more shuffle cases with SHUFP* instructions. 
llvm-svn: 27024
 2006-03-24 01:18:28 +00:00
Evan Cheng
a54a9fbe05 Lower BUILD_VECTOR to VECTOR_SHUFFLE if there are two distinct nodes (and if 
the target can handle it). Issue two SCALAR_TO_VECTOR ops followed by a
VECTOR_SHUFFLE to select from the two vectors.

llvm-svn: 27023
 2006-03-24 01:17:21 +00:00
Chris Lattner
c5c9034e7f Identify the INTRINSIC node 
llvm-svn: 27020
 2006-03-24 01:04:30 +00:00
Reid Spencer
69e6b844d6 Add new generated files. 
llvm-svn: 27013
 2006-03-23 23:48:12 +00:00
Evan Cheng
7528344998 Typo 
llvm-svn: 27008
 2006-03-23 23:24:51 +00:00
Jim Laskey
27e9f1bfa5 Unneeded forward. 
llvm-svn: 27004
 2006-03-23 23:05:52 +00:00
Jim Laskey
4ab13dc9be Make sure types are allocated in the scope of their use. 
llvm-svn: 27002
 2006-03-23 23:02:34 +00:00
Chris Lattner
2e5162fa6e add a note 
llvm-svn: 27000
 2006-03-23 21:28:44 +00:00
Chris Lattner
175ac8ea20 add support for splitting casts. This implements 
CodeGen/Generic/vector.ll:test_cast_2.

llvm-svn: 26999
 2006-03-23 21:16:34 +00:00
Evan Cheng
daa75ed684 Typo 
llvm-svn: 26997
 2006-03-23 20:26:04 +00:00
Jim Laskey
6e1c75ab01 Add some more bulletproofing to auto upgrade of llvm.dbg intrinsics. 
llvm-svn: 26996
 2006-03-23 20:13:25 +00:00
Chris Lattner
974982c89c Add PPC vector bit-convert support 
llvm-svn: 26995
 2006-03-23 19:54:27 +00:00
Jim Laskey
cec9c18c62 Add support to locate local variables in frames (early version.) 
llvm-svn: 26994
 2006-03-23 18:12:57 +00:00
Jim Laskey
88493ace30 Strip changes to llvm.dbg intrinsics. 
llvm-svn: 26993
 2006-03-23 18:11:33 +00:00
Jim Laskey
5df6eab07d Can't combine anymore - we don't have a chain through llvm.dbg intrinsics. 
llvm-svn: 26992
 2006-03-23 18:10:42 +00:00
Jim Laskey
f3cc740d75 Change interface to DwarfWriter. 
llvm-svn: 26991
 2006-03-23 18:09:44 +00:00
Jim Laskey
f47cb47216 Modify how CBE handles #lines. 
llvm-svn: 26990
 2006-03-23 18:08:29 +00:00
Jim Laskey
867301543c Generate local variable and scope information and equivalent dwarf forms. 
llvm-svn: 26989
 2006-03-23 18:07:55 +00:00
Jim Laskey
b0ebfecdbf Handle new forms of llvm.dbg intrinsics. 
llvm-svn: 26988
 2006-03-23 18:06:46 +00:00
Jim Laskey
47de3793e3 Simplify handling of llvm.dbg intrinsic operands to one spot. 
llvm-svn: 26987
 2006-03-23 18:05:12 +00:00
Jim Laskey
570a3973ab Change the argument types of llvm.dbg intrinsics. 
llvm-svn: 26985
 2006-03-23 18:03:20 +00:00
Chris Lattner
ec3f1b5cd1 Fix the encodings of these new instructions, hopefully fixing the JIT 
failures from last night

llvm-svn: 26981
 2006-03-23 16:13:50 +00:00
Evan Cheng
a6dc6e535d Following icc's lead: use movdqa to load / store 128-bit integer vectors 
llvm-svn: 26980
 2006-03-23 07:44:07 +00:00
Chris Lattner
56a6600a72 prune #includes 
llvm-svn: 26975
 2006-03-23 05:43:58 +00:00
Chris Lattner
89e0790edb Eliminate IntrinsicLowering from TargetMachine. 
Make the CBE and V9 backends create their own, since they're the only ones that use it.

llvm-svn: 26974
 2006-03-23 05:43:16 +00:00
Chris Lattner
7db942251a simplify some code 
llvm-svn: 26972
 2006-03-23 05:29:04 +00:00
Chris Lattner
3d5ca510c9 remove always-null IntrinsicLowering argument. 
llvm-svn: 26971
 2006-03-23 05:28:02 +00:00
Chris Lattner
2aa3f9a6b5 remove the intrinsiclowering hook 
llvm-svn: 26970
 2006-03-23 05:22:51 +00:00
Evan Cheng
c1fe87ea8b Add v4i32 <-> v4f32 bitconvert patterns. 
llvm-svn: 26969
 2006-03-23 02:36:37 +00:00
Evan Cheng
5f7cf963db Add 128-bit integer vector load and add (for testing). 
llvm-svn: 26967
 2006-03-23 01:57:24 +00:00
Nate Begeman
0ec15cd042 Add support for 8 bit immediates with 16/32 bit cmp instructions 
llvm-svn: 26966
 2006-03-23 01:29:48 +00:00
Chris Lattner
2ef03f3a43 Fix a typo 
llvm-svn: 26965
 2006-03-22 22:20:49 +00:00
Evan Cheng
54215cd1ea Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do 
64-bit vector shuffle.

llvm-svn: 26964
 2006-03-22 22:07:06 +00:00
Chris Lattner
7eaf8fa583 Implement simple support for vector casting. This can currently only handle 
casts between legal vector types.

llvm-svn: 26961
 2006-03-22 20:09:35 +00:00
Evan Cheng
56b67b2c4f SHUFP* are two address code. 
llvm-svn: 26959
 2006-03-22 20:08:18 +00:00
Evan Cheng
7cb4e14749 Some clean up. 
llvm-svn: 26957
 2006-03-22 19:22:18 +00:00
Evan Cheng
ae6a39ea92 - Supposely movlhps is faster / better than unpcklpd. 
- Don't forget pshufd is only available with sse2.

llvm-svn: 26956
 2006-03-22 19:16:21 +00:00
Evan Cheng
cff38e19c3 - Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support 
splat and PSHUFD cases.
- Clean up shuffle / splat matching code.

llvm-svn: 26954
 2006-03-22 18:59:22 +00:00
Chris Lattner
a779db7473 silence a bogus gcc warning 
llvm-svn: 26953
 2006-03-22 17:27:24 +00:00
Evan Cheng
f6dc0a7f5e - VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches 
PSHUFD. We can make permutes entries which point to the undef pointing
  anything we want.
- Change some names to appease Chris.

llvm-svn: 26951
 2006-03-22 08:01:21 +00:00
Chris Lattner
64be951e06 add a note 
llvm-svn: 26950
 2006-03-22 07:33:46 +00:00
Evan Cheng
25440d19b1 Fix PSHUF* and SHUF* jit code emission problems 
llvm-svn: 26949
 2006-03-22 07:10:28 +00:00
Chris Lattner
ab22cd5c33 Eliminate the dependency of ExecutionEngine on the JIT/Interpreter libraries. 
Now you can build a tool with just the JIT or just the interpreter.

llvm-svn: 26946
 2006-03-22 06:07:50 +00:00
Chris Lattner
5141ebb2c4 This has been implemented. Tweak it into another note 
llvm-svn: 26944
 2006-03-22 05:33:23 +00:00
Chris Lattner
f84f3bf95b When possible, custom lower 32-bit SINT_TO_FP to this: 
_foo2:
        extsw r2, r3
        std r2, -8(r1)
        lfd f0, -8(r1)
        fcfid f0, f0
        frsp f1, f0
        blr

instead of this:

_foo2:
        lis r2, ha16(LCPI2_0)
        lis r4, 17200
        xoris r3, r3, 32768
        stw r3, -4(r1)
        stw r4, -8(r1)
        lfs f0, lo16(LCPI2_0)(r2)
        lfd f1, -8(r1)
        fsub f0, f1, f0
        frsp f1, f0
        blr

This speeds up Misc/pi from 2.44s->2.09s with LLC and from 3.01->2.18s
with llcbeta (16.7% and 38.1% respectively).

llvm-svn: 26943
 2006-03-22 05:30:33 +00:00
Chris Lattner
cfbce5186a Add support for "ri" addressing modes where the immediate is a 14-bit field 
which is shifted left two bits before use.  Instructions like STD use this
addressing mode.

llvm-svn: 26942
 2006-03-22 05:26:03 +00:00
Chris Lattner
1554bf155e fix a warning 
llvm-svn: 26941
 2006-03-22 04:18:34 +00:00
Evan Cheng
7aac4350c7 Some splat and shuffle support. 
llvm-svn: 26940
 2006-03-22 02:53:00 +00:00
Evan Cheng
b6c46ed8c9 Add a couple more pseudo instructions. 
llvm-svn: 26939
 2006-03-22 02:52:03 +00:00
Chris Lattner
c8696247e5 Endianness does not affect the order of vector fields. This fixes 
SingleSource/UnitTests/Vector/build.c

llvm-svn: 26936
 2006-03-22 01:46:54 +00:00
Chris Lattner
2e606dc60f Fix the JIT encoding of the VAForm_1 instructions, including vmaddfp 
llvm-svn: 26935
 2006-03-22 01:44:36 +00:00