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Commit Graph

44319 Commits

Author SHA1 Message Date
Jason W Kim
b5cc5dad79 First cut of ARM/MC/ELF PIC relocations.
Test has fixme, to move to .s -> .o test when AsmParser works better.

llvm-svn: 121732
2010-12-13 23:16:07 +00:00
Bob Wilson
33e5e902b0 Remove the rest of the *_sfp Neon instruction patterns.
Use the same COPY_TO_REGCLASS approach as for the 2-register *_sfp instructions.
This change made a big difference in the code generated for the
CodeGen/Thumb2/cross-rc-coalescing-2.ll test: The coalescer is still doing
a fine job, but some instructions that were previously moved outside the loop
are not moved now.  It's using fewer VFP registers now, which is generally
a good thing, so I think the estimates for register pressure changed and that
affected the LICM behavior.  Since that isn't obviously wrong, I've just
changed the test file.  This completes the work for Radar 8711675.

llvm-svn: 121730
2010-12-13 23:02:37 +00:00
Bob Wilson
b189b77d9b Simplify N2VSPat, removing some unnecessary type arguments.
llvm-svn: 121729
2010-12-13 23:02:31 +00:00
Chris Lattner
dcba81d96f temporarily disable part of my previous patch, which causes an iterator invalidation issue, causing a crash on some versions of perlbmk.
llvm-svn: 121728
2010-12-13 23:02:19 +00:00
Dan Gohman
1baada041e Update a comment.
llvm-svn: 121727
2010-12-13 22:53:18 +00:00
Owen Anderson
af1dde2673 Revert r121721, which broke buildbots.
llvm-svn: 121726
2010-12-13 22:51:08 +00:00
Dan Gohman
b187cce266 Reapply r121520, PartialAlias implementation for BasicAA, now that
memdep is updated to handle it.

llvm-svn: 121725
2010-12-13 22:50:24 +00:00
Dan Gohman
f4e1d91b8e Update memdep to handle PartialAlias as MayAlias.
llvm-svn: 121723
2010-12-13 22:47:57 +00:00
Owen Anderson
c298c8ed4d Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provide correct fixups for Thumb2 ADR,
which is _of course_ different from ARM ADR fixups, or any other Thumb2 fixup.

llvm-svn: 121721
2010-12-13 22:29:52 +00:00
Bob Wilson
203303291f Delete a line that I forgot to revert previously.
llvm-svn: 121719
2010-12-13 22:05:55 +00:00
Bob Wilson
074095ddf2 Use COPY_TO_REGCLASS instead of pseudo instructions for Neon FP patterns.
Jakob Olesen suggested that we can avoid the need for separate pseudo
instructions here by using COPY_TO_REGCLASS in the patterns.  The pattern
gets pretty ugly but it seems to work well.  Partial fix for Radar 8711675.

llvm-svn: 121718
2010-12-13 21:58:05 +00:00
Bob Wilson
56b41f8b81 Use pseudo instructions for 2-register Neon instructions for scalar FP.
Partial fix for Radar 8711675.

llvm-svn: 121716
2010-12-13 21:05:52 +00:00
Bob Wilson
9a6d75a499 Remove unused instruction class arguments.
llvm-svn: 121715
2010-12-13 21:05:44 +00:00
Evan Cheng
c90b20fb74 Generalize BFI isel lowering a bit.
llvm-svn: 121714
2010-12-13 20:32:54 +00:00
Chris Lattner
759d8aa712 add some DEBUG's.
llvm-svn: 121711
2010-12-13 19:55:30 +00:00
Owen Anderson
4ec912b842 In Thumb2, direct branches can be encoded as either a "short" conditional branch with a null predicate, or
as a "long" direct branch.  While the mnemonics are the same, they encode the branch offset differently, and
the Darwin assembler appears to prefer the "long" form for direct branches.  Thus, in the name of bitwise
equivalence, provide encoding and fixup support for it.

llvm-svn: 121710
2010-12-13 19:31:11 +00:00
Jim Grosbach
9a282f2202 Use 32-bit types for 32-bit values.
llvm-svn: 121709
2010-12-13 19:25:46 +00:00
Jim Grosbach
ad058bd082 Trailing whitespace.
llvm-svn: 121708
2010-12-13 19:18:13 +00:00
Benjamin Kramer
7f1cdac1e4 Fix sort predicate. qsort(3)'s predicate semantics differ from std::sort's. Fixes PR 8780.
llvm-svn: 121705
2010-12-13 18:20:38 +00:00
Chris Lattner
14810c808b Add a couple dag combines to transform mulhi/mullo into a wider multiply
when the wider type is legal.  This allows us to compile:

define zeroext i16 @test1(i16 zeroext %x) nounwind {
entry:
	%div = udiv i16 %x, 33
	ret i16 %div
}

into:

test1:                                  # @test1
	movzwl	4(%esp), %eax
	imull	$63551, %eax, %eax      # imm = 0xF83F
	shrl	$21, %eax
	ret

instead of:

test1:                                  # @test1
        movw    $-1985, %ax             # imm = 0xFFFFFFFFFFFFF83F
        mulw    4(%esp)
        andl    $65504, %edx            # imm = 0xFFE0
        movl    %edx, %eax
        shrl    $5, %eax
        ret

Implementing rdar://8760399 and example #4 from:
http://blog.regehr.org/archives/320

We should implement the same thing for [su]mul_hilo, but I don't
have immediate plans to do this.

llvm-svn: 121696
2010-12-13 08:39:01 +00:00
Chris Lattner
0368bf7457 reinstate my patch: the miscompile was caused by an inverted branch in the
'and' case.

llvm-svn: 121695
2010-12-13 08:12:19 +00:00
Chris Lattner
caad324345 Completely disable the optimization I added in r121680 until
I can track down a miscompile.  This should bring the buildbots
back to life

llvm-svn: 121693
2010-12-13 07:41:29 +00:00
Chris Lattner
324f849088 remove the verbose-asm "constant pool double" comments that we were printing
for each constant pool entry.  Using WriteTypeSymbolic here takes time
proportional to the size of the module, for each constant pool entry.

This speeds up -verbose-asm llc on 252.eon (a random testcase at my disposal)
from 4.4s to 2.137s.  llc takes 2.11s with asm-verbose off, so this is now a
pretty reasonable cost for verbose comments.

llvm-svn: 121691
2010-12-13 07:35:47 +00:00
Chris Lattner
5ce3e42d80 Make simplifycfg reprocess newly formed "br (cond1 | cond2)" conditions
when simplifying, allowing them to be eagerly turned into switches.  This
is the last step required to get "Example 7" from this blog post:
http://blog.regehr.org/archives/320

On X86, we now generate this machine code, which (to my eye) seems better
than the ICC generated code:

_crud:                                  ## @crud
## BB#0:                                ## %entry
	cmpb	$33, %dil
	jb	LBB0_4
## BB#1:                                ## %switch.early.test
	addb	$-34, %dil
	cmpb	$58, %dil
	ja	LBB0_3
## BB#2:                                ## %switch.early.test
	movzbl	%dil, %eax
	movabsq	$288230376537592865, %rcx ## imm = 0x400000017001421
	btq	%rax, %rcx
	jb	LBB0_4
LBB0_3:                                 ## %lor.rhs
	xorl	%eax, %eax
	ret
LBB0_4:                                 ## %lor.end
	movl	$1, %eax
	ret

llvm-svn: 121690
2010-12-13 07:00:06 +00:00
Chris Lattner
20b9e84c7e make this logic a bit simpler.
llvm-svn: 121689
2010-12-13 06:36:51 +00:00
Chris Lattner
74d917e19d split all the guts of SimplifyCFGOpt::run out into one function
per terminator kind.

llvm-svn: 121688
2010-12-13 06:25:44 +00:00
Chris Lattner
ea15ce73be fix a bug in r121680 that upset the various buildbots.
llvm-svn: 121687
2010-12-13 05:34:18 +00:00
Chris Lattner
1eb2e235c8 refactor the speculative execution logic to be factored into the cond branch code instead of
doing a cfg search for every block simplified.

llvm-svn: 121686
2010-12-13 05:26:52 +00:00
Chris Lattner
4b9e3a31b0 simplify a bunch of code.
llvm-svn: 121685
2010-12-13 05:20:28 +00:00
Chris Lattner
d79dd057bf move HoistThenElseCodeToIf up to a more logical and efficient-to-handle place.
llvm-svn: 121684
2010-12-13 05:15:29 +00:00
Chris Lattner
80f8577d74 move 'MergeBlocksIntoPredecessor' call earlier. Use
getSinglePredecessor to simplify code.

llvm-svn: 121683
2010-12-13 05:10:48 +00:00
Chris Lattner
7ad8e06c3b factor new code out to a SimplifyBranchOnICmpChain helper function.
llvm-svn: 121681
2010-12-13 05:03:41 +00:00
Chris Lattner
5cbbcc56ad enhance the "change or icmp's into switch" xform to handle one value in an
'or sequence' that it doesn't understand.  This allows us to optimize
something insane like this:

int crud (unsigned char c, unsigned x)
 {
   if(((((((((( (int) c <= 32 ||
                    (int) c == 46) || (int) c == 44)
                  || (int) c == 58) || (int) c == 59) || (int) c == 60)
               || (int) c == 62) || (int) c == 34) || (int) c == 92)
            || (int) c == 39) != 0)
     foo();
 }

into:

define i32 @crud(i8 zeroext %c, i32 %x) nounwind ssp noredzone {
entry:
  %cmp = icmp ult i8 %c, 33
  br i1 %cmp, label %if.then, label %switch.early.test

switch.early.test:                                ; preds = %entry
  switch i8 %c, label %if.end [
    i8 39, label %if.then
    i8 44, label %if.then
    i8 58, label %if.then
    i8 59, label %if.then
    i8 60, label %if.then
    i8 62, label %if.then
    i8 46, label %if.then
    i8 92, label %if.then
    i8 34, label %if.then
  ]

by pulling the < comparison out ahead of the newly formed switch.

llvm-svn: 121680
2010-12-13 04:50:38 +00:00
Chris Lattner
f6be61e969 merge two very similar functions into one that has a bool argument.
llvm-svn: 121678
2010-12-13 04:26:26 +00:00
Evan Cheng
190ff7fa88 Disable auto-detection of AVX support since AVX codegen support is not ready.
llvm-svn: 121677
2010-12-13 04:23:53 +00:00
Chris Lattner
003b79e2d3 don't bother handling non-canonical icmp's
llvm-svn: 121676
2010-12-13 04:18:32 +00:00
Chris Lattner
9bd0b12342 inline a function, making the result much simpler.
llvm-svn: 121675
2010-12-13 04:15:19 +00:00
Chris Lattner
25b642edfd Fix my previous patch to handle a degenerate case that the llvm-gcc
bootstrap buildbot tripped over.

llvm-svn: 121674
2010-12-13 03:43:57 +00:00
Chris Lattner
9b089512e9 convert some methods to be static functions
llvm-svn: 121673
2010-12-13 03:30:12 +00:00
Chris Lattner
46cc5158bb zap two more std::sorts.
llvm-svn: 121672
2010-12-13 03:24:30 +00:00
Chris Lattner
a21c02e807 fix a fairly serious oversight with switch formation from
or'd conditions.  Previously we'd compile something like this:

int crud (unsigned char c) {
   return c == 62 || c == 34 || c == 92;
}

into:

  switch i8 %c, label %lor.rhs [
    i8 62, label %lor.end
    i8 34, label %lor.end
  ]

lor.rhs:                                          ; preds = %entry
  %cmp8 = icmp eq i8 %c, 92
  br label %lor.end

lor.end:                                          ; preds = %entry, %entry, %lor.rhs
  %0 = phi i1 [ true, %entry ], [ %cmp8, %lor.rhs ], [ true, %entry ]
  %lor.ext = zext i1 %0 to i32
  ret i32 %lor.ext

which failed to merge the compare-with-92 into the switch.  With this patch
we simplify this all the way to:

  switch i8 %c, label %lor.rhs [
    i8 62, label %lor.end
    i8 34, label %lor.end
    i8 92, label %lor.end
  ]

lor.rhs:                                          ; preds = %entry
  br label %lor.end

lor.end:                                          ; preds = %entry, %entry, %entry, %lor.rhs
  %0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
  %lor.ext = zext i1 %0 to i32
  ret i32 %lor.ext

which is much better for codegen's switch lowering stuff.  This kicks in 33 times
on 176.gcc (for example) cutting 103 instructions off the generated code.

llvm-svn: 121671
2010-12-13 03:18:54 +00:00
Chris Lattner
6d4df726a6 simplify code and reduce indentation
llvm-svn: 121670
2010-12-13 02:38:13 +00:00
Chris Lattner
134d892049 convert an std::sort to array_pod_sort.
llvm-svn: 121669
2010-12-13 02:00:58 +00:00
Chris Lattner
153b680cdd move the "br (X == 0 | X == 1), T, F" -> switch optimization to a new
location in simplifycfg.  In the old days, SimplifyCFG was never run on
the entry block, so we had to scan over all preds of the BB passed into
simplifycfg to do this xform, now we can just check blocks ending with
a condbranch.  This avoids a scan over all preds of every simplified 
block, which should be a significant compile-time perf win on functions
with lots of edges.  No functionality change.

llvm-svn: 121668
2010-12-13 01:57:34 +00:00
Chris Lattner
644a93e06b reduce indentation and generally simplify code, no functionality change.
llvm-svn: 121667
2010-12-13 01:47:07 +00:00
Chris Lattner
859fad7373 use getFirstNonPHIOrDbg to simplify this code.
llvm-svn: 121664
2010-12-13 01:28:06 +00:00
Chris Lattner
6df4d5d88e reduce indentation by using continue, no functionality change.
llvm-svn: 121662
2010-12-13 01:11:17 +00:00
Chris Lattner
72f03b62a9 add a note
llvm-svn: 121656
2010-12-13 00:15:25 +00:00
Wesley Peck
f842b79b4b Missed some ADDI <-> ADDIK conversions in 121649.
llvm-svn: 121652
2010-12-12 22:53:14 +00:00
Wesley Peck
95cebfc460 MBlaze delay slot filler was not capable of using ADDK and variants to fill delay slots. This broke several test cases when 121649 was committed. This fixes the regression.
llvm-svn: 121650
2010-12-12 22:22:49 +00:00
Wesley Peck
38688d020c The ADD and ADDK (and all variants) instructions where flip-flopped in the MBlaze backend. This bug fix makes 64-bit math work on the MBlaze backend.
llvm-svn: 121649
2010-12-12 22:02:31 +00:00
Tobias Grosser
cd3d63e102 Remove useless dynamic_cast<>().
Thanks Peter for pointing me to something that should have never been
committed to the llvm code base.

llvm-svn: 121648
2010-12-12 21:58:28 +00:00
Wesley Peck
7274c73974 1. Change MBlaze indirect branches to use absolute branch BRALD instead of pc relative branch BRLD.
2. Make sure that the MBlaze stack is aligned to 4-byte boundaries.
3. Determine frame indexes that should be placed in the callers stack frame, as per the MBlaze ABI, and place them in the correct locations.

llvm-svn: 121639
2010-12-12 20:52:31 +00:00
Duncan Sands
47a4bbd31d Catch attempts to remove a deleted node from the CSE maps. Better to
catch this here rather than later after accessing uninitialized memory
etc.  Fires when compiling the testcase in PR8237.

llvm-svn: 121635
2010-12-12 13:22:50 +00:00
Benjamin Kramer
a638216447 Generalize the and-icmp-select instcombine further by allowing selects of the form
(x & 2^n) ? 2^m+C : C

we can offset both arms by C to get the "(x & 2^n) ? 2^m : 0" form, optimize the
select to a shift and apply the offset afterwards.

llvm-svn: 121609
2010-12-11 10:49:22 +00:00
Benjamin Kramer
5a1721f4ac Factor the (x & 2^n) ? 2^m : 0 instcombine into its own method and generalize it
to catch cases where n != m with a shift.

llvm-svn: 121608
2010-12-11 09:42:59 +00:00
Evan Cheng
b6773d7e1f (or (and (shl A, #shamt), mask), B) => ARMbfi B, A, ~mask where lsb(mask) == #shamt. rdar://8752056
llvm-svn: 121606
2010-12-11 04:11:38 +00:00
Jakob Stoklund Olesen
a523d5f048 Add named timer groups for the different stages of register allocation.
llvm-svn: 121604
2010-12-11 00:19:56 +00:00
Jakob Stoklund Olesen
ef80efea1d Move MRI into RegAllocBase. Clean up debug output a bit.
llvm-svn: 121599
2010-12-10 23:49:00 +00:00
Jim Grosbach
98dcdf10c2 Add FIXME
llvm-svn: 121598
2010-12-10 23:41:10 +00:00
Nick Lewycky
46a6ed1f0f Remove extraneous close parenthesis.
Fix build breakage.

llvm-svn: 121596
2010-12-10 23:14:35 +00:00
Nick Lewycky
9afbedbc48 Move variable that's unused in an NDEBUG build inside the DEBUG() macro, fixing
lib/CodeGen/RegAllocGreedy.cpp:233: error: unused variable 'TRC' [-Wunused-variable]

llvm-svn: 121594
2010-12-10 23:05:10 +00:00
Owen Anderson
47a78db79b Attempt to get Thumb2 branch fixups working properly.
llvm-svn: 121593
2010-12-10 23:02:28 +00:00
Jakob Stoklund Olesen
6cd6e644e7 Force the greedy register allocator to always use the inline spiller.
Soon, RegAllocGreedy will start splitting live ranges, and then deferred
spilling won't work anyway.

llvm-svn: 121591
2010-12-10 22:54:44 +00:00
Jakob Stoklund Olesen
cbd4bac09d Rip out live range splitting support from the inline spiller.
The spiller should only spill. The register allocator will drive live range
splitting, it has the needed information about register pressure and
interferences.

llvm-svn: 121590
2010-12-10 22:54:40 +00:00
Owen Anderson
8424ab65e2 Fix merge error in my last fix to Thumb2 vldr fixups.
llvm-svn: 121588
2010-12-10 22:53:48 +00:00
Owen Anderson
f310c92333 Fixups for Thumb2 vldr's need to have the effective PC aligned as well.
llvm-svn: 121587
2010-12-10 22:46:47 +00:00
Bill Wendling
7f1cea7009 The MCFixupKindInfo table needs to be in the order that the enums were
declared. Add a note specifying this and spruce up the list a bit.

llvm-svn: 121586
2010-12-10 22:37:19 +00:00
Owen Anderson
e85fabac75 Provide the necessary post-encoder hook for Thumb2 encodings of VMOV and friends.
llvm-svn: 121585
2010-12-10 22:32:08 +00:00
Jakob Stoklund Olesen
5ab6552845 Use AllocationOrder in RegAllocGreedy, fix a bug in the hint calculation.
llvm-svn: 121584
2010-12-10 22:21:05 +00:00
Bob Wilson
d30768fe3e Add float patterns for Neon vld1-lane/dup and vst1-lane operations.
llvm-svn: 121583
2010-12-10 22:13:32 +00:00
Bob Wilson
ae683e722f Remove unused arguments.
llvm-svn: 121582
2010-12-10 22:13:24 +00:00
Owen Anderson
aaf97da84b Fix encoding of Thumb1 LDRB and STRB.
llvm-svn: 121581
2010-12-10 22:11:13 +00:00
Jim Grosbach
d7f424dec3 Trailing whitespace.
llvm-svn: 121580
2010-12-10 21:57:34 +00:00
Owen Anderson
44ad90c850 Fix Thumb2 encodings of STREX and LDREX.
llvm-svn: 121579
2010-12-10 21:52:38 +00:00
Dan Gohman
18e2a55c07 Revert r121520, which may have introduced miscompilations.
llvm-svn: 121573
2010-12-10 21:48:28 +00:00
Jim Grosbach
82dd80c956 Correct encoding of rotation immediate for Thumb2 instructions. rdar://8755999
llvm-svn: 121525
2010-12-10 21:24:18 +00:00
Jim Grosbach
63853d61e1 Fix encoding of 'U' bit for Thumb2 STRD/LDRD instructions. rdar://8755726
llvm-svn: 121524
2010-12-10 21:05:07 +00:00
Jim Grosbach
467e860805 More trivial cleanup. No need to define the EncoderMethod property type. Can
just assign to it.

llvm-svn: 121523
2010-12-10 20:53:44 +00:00
Jim Grosbach
5696d964ca Tidy up.
llvm-svn: 121522
2010-12-10 20:51:35 +00:00
Jim Grosbach
401391235f Trailing whitespace.
llvm-svn: 121521
2010-12-10 20:47:29 +00:00
Dan Gohman
d1bf1d8013 Implement PartialAlias checking in BasicAA.
llvm-svn: 121520
2010-12-10 20:47:03 +00:00
Jakob Stoklund Olesen
ea59381fc8 Fix miscompilation caused by trivial logic error in the reassignVReg()
interference check.

llvm-svn: 121519
2010-12-10 20:45:04 +00:00
Dan Gohman
b0fa0f7849 Minimally update this code to handle PartialAlias.
llvm-svn: 121518
2010-12-10 20:14:49 +00:00
Dan Gohman
98f5b2ae22 Use PartialAlias to do better noalias lint checking.
llvm-svn: 121514
2010-12-10 20:04:06 +00:00
Dan Gohman
cbee92bb65 Teach AliasAnalysisCounter about PartialAlias.
llvm-svn: 121513
2010-12-10 19:53:05 +00:00
Dan Gohman
26e1b4ac11 Teach AliasAnalysisEvaluator about PartialAlias.
llvm-svn: 121512
2010-12-10 19:52:40 +00:00
Dan Gohman
9e03ffc789 Update this code to handle PartialAlias as MayAlias.
llvm-svn: 121508
2010-12-10 19:40:47 +00:00
Bob Wilson
5ff13f9d5c Fix some invalid alignments for Neon vld-dup and vld/st-lane instructions.
Alignments smaller than the total size of the memory being loaded or stored,
unless the alignment is 8 bytes, are not allowed.  Add tests for this, too.

llvm-svn: 121506
2010-12-10 19:37:42 +00:00
Jim Grosbach
4a414e1973 Teach isCSRestore() that ARM/Thumb2 functions will use post-modify LDR
instructions to restore a single register rather than an LDM instruction.
rdar://8754999

llvm-svn: 121498
2010-12-10 18:41:15 +00:00
Jakob Stoklund Olesen
e3924a3c85 Add an AllocationOrder class that can iterate over the allocatable physical
registers for a given virtual register.

Reserved registers are filtered from the allocation order, and any valid hint is
returned as the first suggestion.

For target dependent hints, a number of arcane target hooks are invoked.

llvm-svn: 121497
2010-12-10 18:36:02 +00:00
Jim Grosbach
a378c43eae Thumb unconditional branch binary encoding. rdar://8754994
llvm-svn: 121496
2010-12-10 18:21:33 +00:00
Jim Grosbach
905301a7d8 Thumb conditional branch binary encodings. rdar://8745367
llvm-svn: 121493
2010-12-10 17:13:40 +00:00
Rafael Espindola
0e665e502d Fixed version of 121434 with no new memory leaks.
llvm-svn: 121471
2010-12-10 07:39:47 +00:00
Daniel Dunbar
fd96efb8e9 Mach-O: Tweak field name.
llvm-svn: 121465
2010-12-10 06:19:39 +00:00
Rafael Espindola
676ea9d9b4 Fix cmake build.
llvm-svn: 121462
2010-12-10 04:28:37 +00:00
Rafael Espindola
011e168728 Revert my previous patch to make the valgrind bots happy.
llvm-svn: 121461
2010-12-10 04:01:09 +00:00
NAKAMURA Takumi
e3f485b0dc lib/Target/CMakeLists.txt: Add missing lib/Target/TargetAsmInfo.cpp, following up to r121434.
llvm-svn: 121454
2010-12-10 02:15:24 +00:00
Kevin Enderby
a2efb1ad4e Fix the leak from r121401 of the Operands erased in the list but not deleted.
llvm-svn: 121450
2010-12-10 01:41:56 +00:00
Nate Begeman
8c00ecd290 Add some missing predicates.
llvm-svn: 121445
2010-12-10 00:54:26 +00:00
Nate Begeman
cb6d1c8193 Formalize the notion that AVX and SSE are non-overlapping extensions from the compiler's point of view. Per email discussion, we either want to always use VEX-prefixed instructions or never use them, and are taking "HasAVX" to mean "Always use VEX". Passing -mattr=-avx,+sse42 should serve to restore legacy SSE support when desirable.
llvm-svn: 121439
2010-12-10 00:26:57 +00:00
Rafael Espindola
03ad1e8f1f Initial support for the cfi directives. This is just enough to get
f:
        .cfi_startproc
        nop
        .cfi_endproc

assembled (on ELF).

llvm-svn: 121434
2010-12-09 23:48:29 +00:00
Rafael Espindola
ebe4cab1db Use const references.
llvm-svn: 121426
2010-12-09 23:08:35 +00:00
Bill Wendling
f8eaf8a243 Thumb ldr reg+imm offsets were encoded incorrectly. The scaling factor of the
t_addrmode_s# address modes is used for ASM printing, not for encoding.
<rdar://problem/8745375>

llvm-svn: 121417
2010-12-09 21:49:07 +00:00
Nate Begeman
4a62a3e229 Add support for AVX to materialize +0.0 when doing scalar FP.
llvm-svn: 121415
2010-12-09 21:43:51 +00:00
Owen Anderson
4be3b6db5c Use the new IsAligned fixup flag to improve fixup encodings for Thumb2 branches. This is still not perfect,
but it gets many more of them correct than it did previously.

llvm-svn: 121414
2010-12-09 21:34:47 +00:00
Stuart Hastings
f7bba0cfe3 Initial support for nested CALLSEQ_START/CALLSEQ_END constructs in LegalizeDAG.
Necessary for byval support on ARM.  Radar 7662569.

llvm-svn: 121412
2010-12-09 21:25:20 +00:00
Jakob Stoklund Olesen
fe4b9ee934 Remember to filter out reserved rergisters from the allocation order.
llvm-svn: 121411
2010-12-09 21:20:46 +00:00
Jakob Stoklund Olesen
5bb5c67227 Add a forgotten initializer for CheckedFirstInterference.
llvm-svn: 121410
2010-12-09 21:20:44 +00:00
Owen Anderson
a8ac35b468 Fix an issue in some Thumb fixups, where the effective PC address needs to be 4-byte aligned when calculating
the offset.  Add a new fixup flag to represent this, and use it for the one fixups that I have a testcase for needing
this.  It's quite likely that the other Thumb fixups will need this too, and to have their fixup encoding logic
adjusted accordingly.

llvm-svn: 121408
2010-12-09 20:27:52 +00:00
Jim Grosbach
61fe7b9ee5 Rename CB/CBZ specific fixup accordingly.
llvm-svn: 121404
2010-12-09 19:50:12 +00:00
Devang Patel
bef09ddec8 Add assert to catch an attempt to emit .byte 256
llvm-svn: 121402
2010-12-09 19:26:21 +00:00
Kevin Enderby
55cb19813e Add support for parsing ARM arithmetic instructions that update or don't update
the condition codes.  Where the ones that do have an 's' suffix and the ones
that don't don't have the suffix.  The trick is if MatchInstructionImpl() fails
we try again after adding a CCOut operand with the correct value and removing
the 's' if present.  Four simple test cases added for now, lots more to come.

llvm-svn: 121401
2010-12-09 19:19:43 +00:00
Jim Grosbach
9b3730fc77 Rename the encoder method for t_cbtarget to match.
llvm-svn: 121399
2010-12-09 19:04:53 +00:00
Jim Grosbach
57d420438a Thumb needs a few different encoding schemes for branch targets. Rename
t_brtarget to be more specific.

llvm-svn: 121398
2010-12-09 19:01:46 +00:00
Jim Grosbach
8bc33cc6e5 ARM stm/ldm instructions require more than one register in the register list.
Otherwise, a plain str/ldr should be used instead. Make sure we account for
that in prologue/epilogue code generation.
rdar://8745460

llvm-svn: 121391
2010-12-09 18:31:13 +00:00
Andrew Trick
ec37b93b07 Added register reassignment prototype to RAGreedy. It's a simple
heuristic to reshuffle register assignments when we can't find an
available reg.

llvm-svn: 121388
2010-12-09 18:15:21 +00:00
Michael J. Spencer
3dbfb7c62e Support/Windows/PathV2: Fix header comment.
llvm-svn: 121383
2010-12-09 17:37:42 +00:00
Michael J. Spencer
95b8bf9f67 Fix whitespace.
llvm-svn: 121382
2010-12-09 17:37:32 +00:00
Michael J. Spencer
c4c4e1133d Support: Move c_str from SmallVector back to SmallString and add a free standing
templated c_str in Windows.h to replace it.

llvm-svn: 121381
2010-12-09 17:37:18 +00:00
Michael J. Spencer
1d95a8f9bc Support/FileSystem: Change file_status predicate functions that cannot fail to
return their result instead of an error_code. Also add some missing predicate
functions.

llvm-svn: 121380
2010-12-09 17:37:02 +00:00
Michael J. Spencer
15483143ec Support/MemoryBuffer: Replace all uses of std::string *ErrMsg with error_code &ec. And fix clients.
llvm-svn: 121379
2010-12-09 17:36:48 +00:00
Bruno Cardoso Lopes
93e5c2fb64 Add ROTR and ROTRV mips32 instructions. Patch by Akira Hatanaka
llvm-svn: 121377
2010-12-09 17:32:30 +00:00
Bruno Cardoso Lopes
0f5478218e Fix delay slot filler for non mips1 targets. Patch by Akira Hatanaka
llvm-svn: 121376
2010-12-09 17:31:11 +00:00
Kalle Raiskila
18da80f675 Dont' feed ILA two inputs - it takes just one.
llvm-svn: 121372
2010-12-09 16:17:31 +00:00
Jim Grosbach
4ad6abd006 tidy up.
llvm-svn: 121371
2010-12-09 16:15:41 +00:00
Jim Grosbach
9adf657f1a 80 columns.
llvm-svn: 121370
2010-12-09 16:14:46 +00:00
Chris Lattner
996691e79c enhance memcpyopt to zap memcpy's that have the same src/dst.
llvm-svn: 121362
2010-12-09 07:45:45 +00:00
Chris Lattner
4fef82afa0 fix PR8753, eliminating a case where we'd infinitely make a
substitution because it doesn't actually change the IR.  Patch by
Jakub Staszak!

llvm-svn: 121361
2010-12-09 07:39:50 +00:00
Eric Christopher
0e40452eb0 Rewrite the darwin tlv support to use a chain and return to copying
the output to the correct register. Fixes a hidden problem uncovered
by the last patch where we'd try to DAG combine our MVT::Other node
oddly.

llvm-svn: 121358
2010-12-09 06:25:53 +00:00
Owen Anderson
a882a78d4b Take the first step towards making LVI non-recursive: get rid of the LVIQuery abstraction.
llvm-svn: 121357
2010-12-09 06:14:58 +00:00
Eric Christopher
ebd7ab9857 80-col fixups.
llvm-svn: 121356
2010-12-09 04:48:06 +00:00
Wesley Peck
33ba317cf6 Reworking the stack layout generated by the MBlaze backend.
llvm-svn: 121355
2010-12-09 03:42:04 +00:00
Owen Anderson
96545f21b9 Fix encoding of the immediate operands on post-indexed LDR and friends.
llvm-svn: 121354
2010-12-09 02:56:12 +00:00
Dan Gohman
3d9fc7db03 Really check that the bits that will become zero are actually already zero
before eliminating the operation that zeros them. This fixes rdar://8739316.

llvm-svn: 121353
2010-12-09 02:52:17 +00:00
Eric Christopher
ea350b4c4b Fix up some comments.
llvm-svn: 121351
2010-12-09 01:57:45 +00:00
Owen Anderson
767a95816d Fix Thumb2 fixups for ldr.
llvm-svn: 121350
2010-12-09 01:51:07 +00:00
Jim Grosbach
5658d982b4 Add a textual message to the assert.
llvm-svn: 121349
2010-12-09 01:23:51 +00:00
Jim Grosbach
da9353523f Add a sanity check assert() for t2ADD/SUBrSPi instructions that they really are
referencing the stack pointer as they say they are.

llvm-svn: 121347
2010-12-09 01:22:19 +00:00
Jim Grosbach
fb71e10e93 When using multiple instructions to reference a frame index, make sure to
update the opcode when necessary as well as the source register.

llvm-svn: 121346
2010-12-09 01:22:13 +00:00
Jim Grosbach
e38a2a39c6 The add/sub SP instructions are really pseudos. The assembler should ignore
them.

llvm-svn: 121345
2010-12-09 01:21:27 +00:00
Jakob Stoklund Olesen
17b2e8c293 IntervalMap iterators are heavyweight, so avoid copying them around and use
references instead.

Similarly, IntervalMap::begin() is almost as expensive as find(), so use find(x)
instead of begin().advanceTo(x);

This makes RegAllocBasic run another 5% faster.

llvm-svn: 121344
2010-12-09 01:06:52 +00:00
Matt Beaumont-Gay
a8aa446938 Remove unused variables
llvm-svn: 121343
2010-12-09 01:04:43 +00:00
Owen Anderson
43177d405a Fix typo in Thumb2 branch fixup.
llvm-svn: 121342
2010-12-09 01:02:09 +00:00
Eric Christopher
64e662fce9 Stop confusing people, it's not really a chain, or a tumor.
llvm-svn: 121340
2010-12-09 00:57:19 +00:00
Bill Wendling
baf852a1d6 Remove extraneous semicolon.
llvm-svn: 121338
2010-12-09 00:51:54 +00:00
Bill Wendling
9205cc6ea8 Attempt to make the bit-twiddling readable resulted in the binary value being
overwritten.

llvm-svn: 121337
2010-12-09 00:44:33 +00:00
Bill Wendling
cd8fdfd65f The BLX instruction is encoded differently than the BL, because why not? In
particular, the immediate has 20-bits of value instead of 21. And bit 0 is '0'
always. Going through the BL fixup encoding was trashing the "bit 0 is '0'"
invariant.

Attempt to get the encoding at slightly more correct with this.

llvm-svn: 121336
2010-12-09 00:39:08 +00:00
Eric Christopher
0100a8fda4 Remove extraneous copy from DAG conversion for darwin tls. This was
popping up at O0 when it wasn't folded and the fast allocator would
complain.

llvm-svn: 121330
2010-12-09 00:27:58 +00:00
Owen Anderson
b956593730 Fix Thumb2 BCC encoding and fixups.
llvm-svn: 121329
2010-12-09 00:27:41 +00:00
Eric Christopher
cc8a622ca4 Add rsp to the uses for the same reason as 32-bit.
llvm-svn: 121328
2010-12-09 00:26:41 +00:00
Devang Patel
b3e0d80b1f DW_FORM_data1 may not provide sufficient room for vtable index, use _udata instead.
This fixes radar 8730409.

llvm-svn: 121323
2010-12-09 00:10:40 +00:00
Kevin Enderby
988dab6b5c Allow a slash, '/', as a prefix separator for X86. rdar://8741045
llvm-svn: 121320
2010-12-08 23:57:59 +00:00
Jakob Stoklund Olesen
ffc0f6586a Properly deal with empty intervals when checking for interference.
llvm-svn: 121319
2010-12-08 23:51:35 +00:00
Jason W Kim
e270068021 Style nit and whitespace cleanup
llvm-svn: 121317
2010-12-08 23:35:25 +00:00
Jim Grosbach
5a00173ead Clean up the add/sub w/ SP source reg instructions in Thumb2 a bit. Add a FIXME
for more thorough cleanup.

llvm-svn: 121315
2010-12-08 23:30:19 +00:00
Jim Grosbach
2eda2e0be9 Fix T2TwoRegImm and use it for t2ADDrSPi12 and friends.
llvm-svn: 121314
2010-12-08 23:24:29 +00:00
Jason W Kim
e8047d9ec4 Removed dead comment.
llvm-svn: 121313
2010-12-08 23:19:44 +00:00
Jason W Kim
2e6e50c1b0 ARM/MC/ELF TPsoft is now a proper pseudo inst.
Added test to check bl __aeabi_read_tp gets emitted properly for ELF/ASM
as well as ELF/OBJ (including fixup)

Also added support for ELF::R_ARM_TLS_IE32

llvm-svn: 121312
2010-12-08 23:14:44 +00:00
Jim Grosbach
7a9e43e642 T2TwoRegImm isn't right for t2SUBrSPi12. Use T2I instead.
llvm-svn: 121311
2010-12-08 23:13:01 +00:00
Jim Grosbach
4f11f0f871 Add operand encoding for Thumb2 subw SP + imm. rdar://8745434
llvm-svn: 121310
2010-12-08 23:12:09 +00:00
Jim Grosbach
a423fbc4c7 Add operand encoding for Thumb2 addw Rn + imm. rdar://8745434
llvm-svn: 121309
2010-12-08 23:04:16 +00:00
Bill Wendling
9756f7c7b0 Support the "target" encodings for the CB[N]Z instructions.
llvm-svn: 121308
2010-12-08 23:01:43 +00:00
Evan Cheng
9fcb62eed1 Fix an obvious cut-n-paste error.
llvm-svn: 121307
2010-12-08 23:01:18 +00:00
Jakob Stoklund Olesen
37df3f04c2 Implement very primitive hinting support in RegAllocGreedy.
The hint is simply tried first and then forgotten if it couldn't be allocated
immediately.

llvm-svn: 121306
2010-12-08 22:57:16 +00:00
Jim Grosbach
51082ed2a4 Add operand encoding for Thumb2 addw SP + imm. rdar://8745434
llvm-svn: 121305
2010-12-08 22:50:19 +00:00
Jim Grosbach
e1eb84a44a Parameterize opcode encoding bits for Thumb2 extended precision integer
multiply instructions.

llvm-svn: 121301
2010-12-08 22:38:41 +00:00
Jim Grosbach
13c16125f1 Fix operand encoding for Thumb2 extended precision multiplies. rdar://8745555
llvm-svn: 121297
2010-12-08 22:29:28 +00:00
Jakob Stoklund Olesen
3c81b6a50b Store (priority,regnum) pairs in the priority queue instead of providing an
abstract priority queue interface in subclasses that want to override the
priority calculations.

Subclasses must provide a getPriority() implementation instead.

This approach requires less code as long as priorities are expressable as simple
floats, and it avoids the dangers of defining potentially expensive priority
comparison functions.

It also should speed up priority_queue operations since they no longer have to
chase pointers when comparing registers. This is not measurable, though.

Preferably, we shouldn't use floats to guide code generation. The use of floats
here is derived from the use of floats for spill weights. Spill weights have a
dynamic range that doesn't lend itself easily to a fixpoint implementation.

When someone invents a stable spill weight representation, it can be reused for
allocation priorities.

llvm-svn: 121294
2010-12-08 22:22:41 +00:00
Eric Christopher
d492f798d1 Reword comment slightly.
llvm-svn: 121293
2010-12-08 22:21:42 +00:00
Jim Grosbach
063c38c6df Simplify T2 operand assignment notation a bit. No need to specify a bit range
for the source field when it's the whole thing that's being referenced.

llvm-svn: 121291
2010-12-08 22:10:43 +00:00
Devang Patel
e515e18523 Use type's file info while describing inheritance relationship.
llvm-svn: 121289
2010-12-08 21:46:37 +00:00
Eric Christopher
77d3a7b3fb Fix comment.
llvm-svn: 121285
2010-12-08 21:35:09 +00:00
Jakob Stoklund Olesen
f04d283db1 Trim includes.
llvm-svn: 121283
2010-12-08 21:12:00 +00:00
Devang Patel
90fd70aa09 Add support to create debug info for functions and methods.
llvm-svn: 121281
2010-12-08 20:42:44 +00:00
Jim Grosbach
5e900612ff Tweak ARM fixup value adjustments for Thumb to better handle the half-word
ordering of thumb mode.

llvm-svn: 121280
2010-12-08 20:32:07 +00:00
Devang Patel
53f05af4c1 Add support to create class type.
llvm-svn: 121279
2010-12-08 20:18:20 +00:00
Andrew Trick
fb72ca2129 Generalize PostRAHazardRecognizer so it can be used in any pass for
both forward and backward scheduling. Rename it to
ScoreboardHazardRecognizer (Scoreboard is one word). Remove integer
division from the scoreboard's critical path.

llvm-svn: 121274
2010-12-08 20:04:29 +00:00
Owen Anderson
d5c17d5981 Improve comment.
llvm-svn: 121272
2010-12-08 19:31:11 +00:00
Jim Grosbach
16cdaf34bc Add initializer.
llvm-svn: 121262
2010-12-08 15:36:45 +00:00
Evan Cheng
5582f058f4 Add comments.
llvm-svn: 121238
2010-12-08 06:29:02 +00:00
Jakob Stoklund Olesen
d638b989f2 Stub out RegAllocGreedy.
This new register allocator is initially identical to RegAllocBasic, but it will
receive all of the tricks that RegAllocBasic won't get.

RegAllocGreedy will eventually replace linear scan.

llvm-svn: 121234
2010-12-08 03:26:16 +00:00
Bill Wendling
dac1f24d98 Add support for loading from a constant pool.
llvm-svn: 121226
2010-12-08 01:57:09 +00:00
Devang Patel
b7a7988b6b Add support to create vector, array, enums etc...
llvm-svn: 121224
2010-12-08 01:50:15 +00:00
Jim Grosbach
d4eea7c10d Let target asm backends see assembler flags as they go by. Use that to handle
thumb vs. arm mode differences in WriteNopData().

llvm-svn: 121219
2010-12-08 01:16:55 +00:00
Jakob Stoklund Olesen
77e7ad803a Move RABasic::addMBBLiveIns to the base class, it is generally useful.
Minor optimization to the use of IntervalMap iterators. They are fairly
heavyweight, so prefer SI.valid() over SI != end().

llvm-svn: 121217
2010-12-08 01:06:06 +00:00
Owen Anderson
d00dc39a11 Simplify the byte reordering logic slightly.
llvm-svn: 121216
2010-12-08 00:21:33 +00:00
Owen Anderson
ba5edcfe05 VLDR fixups need special handling under Thumb. While the encoding is the same,
the order of the bytes in the data stream is flipped around.

llvm-svn: 121215
2010-12-08 00:18:36 +00:00
Devang Patel
0c0accf6bc Global variable does not need linkage name.
llvm-svn: 121212
2010-12-08 00:06:22 +00:00
Devang Patel
bdbff5f106 Add support to create local variable's debug info.
llvm-svn: 121211
2010-12-07 23:58:00 +00:00
Rafael Espindola
790fe1d064 Layout each section independently. With the testcase in PR8711:
before:
        4 assembler - Number of assembler layout and relaxation steps
    78563 assembler - Number of emitted assembler fragments
  8693904 assembler - Number of emitted object file bytes
   271223 assembler - Number of evaluated fixups
330771677 assembler - Number of fragment layouts
     5958 assembler - Number of relaxed instructions
  2508361 mcexpr    - Number of MCExpr evaluations

real	0m26.123s
user	0m25.694s
sys	0m0.388s

after:

      4 assembler - Number of assembler layout and relaxation steps
  78563 assembler - Number of emitted assembler fragments
8693904 assembler - Number of emitted object file bytes
 271223 assembler - Number of evaluated fixups
 231507 assembler - Number of fragment layouts
   5958 assembler - Number of relaxed instructions
2508361 mcexpr    - Number of MCExpr evaluations

real	0m2.500s
user	0m2.113s
sys	0m0.273s

And yes, the outputs are identical :-)

llvm-svn: 121207
2010-12-07 23:32:26 +00:00
Matt Beaumont-Gay
5e680ad101 Fix a warning about a variable which is only used in an assertion.
llvm-svn: 121206
2010-12-07 23:26:21 +00:00
Devang Patel
cef2982b39 Add support to create variables, structs etc.. using DIBuilder.
This is still work in progress.

llvm-svn: 121205
2010-12-07 23:25:47 +00:00
Jakob Stoklund Olesen
9d6472e894 Switch LiveIntervalUnion from std::set to IntervalMap.
This speeds up RegAllocBasic by 20%, not counting releaseMemory which becomes
way faster.

llvm-svn: 121201
2010-12-07 23:18:47 +00:00
Bill Wendling
45bdb13970 Cleanup in the Darwin end. No functionality change.
llvm-svn: 121198
2010-12-07 23:11:00 +00:00
Evan Cheng
3bd9b95b4d Fix a bad prologue / epilogue codegen bug where the compiler would emit illegal
vpush instructions to save / restore VFP / NEON registers like this:
vpush {d8,d10,d11}
vpop {d8,d10,d11}

vpush and vpop do not allow gaps in the register list.
rdar://8728956

llvm-svn: 121197
2010-12-07 23:08:38 +00:00
Bill Wendling
4399d09458 A bit of cleanup: early exit ApplyFixup and cache the Fixup offset. No
functionality change.

llvm-svn: 121195
2010-12-07 23:05:20 +00:00
Jim Grosbach
77b631549c Binary encoding for ARM tLDRspi and tSTRspi.
llvm-svn: 121186
2010-12-07 21:50:47 +00:00
Owen Anderson
a23e10f29d Fix Thumb2 encoding of the S bit.
llvm-svn: 121182
2010-12-07 20:50:15 +00:00
Jim Grosbach
1aa6a676cf Refactor the ARM CMPz* patterns to just use the normal CMP instructions when
possible. They were duplicates for everything exception the source pattern
before.

llvm-svn: 121179
2010-12-07 20:41:06 +00:00
Evan Cheng
9af09ebf8b Code clean up; no functionality change.
llvm-svn: 121176
2010-12-07 20:11:46 +00:00
Evan Cheng
0295c17fbc Code clean up; no functionality change.
llvm-svn: 121172
2010-12-07 19:59:34 +00:00
Dan Gohman
54a78a9787 Remove the code from Function::dropAllReferences which replaced
uses of the function's blocks with undef. This code isn't needed,
because BasicBlock's destructor handles such uses. Also, undef isn't
correct, since blockaddresses may still be used for comparisons
with null.

llvm-svn: 121170
2010-12-07 19:56:51 +00:00
Bruno Cardoso Lopes
e11d870459 Remove target specific node MipsISD::CMov, which is not used because all conditional moves are directly matched using tablegen patterns. If there's a need in the future, we can introduce it again
llvm-svn: 121164
2010-12-07 19:04:14 +00:00
Bruno Cardoso Lopes
0e14644599 Match a pattern generated by a dag combiner opt where:
(select (load (load tga0)) (load tga1)) => (load (select (load tga0) tga1))

Thanks to Akira for pointing that.

llvm-svn: 121163
2010-12-07 19:00:20 +00:00
Jakob Stoklund Olesen
39e22e19bf Simplify assertion.
llvm-svn: 121162
2010-12-07 18:51:27 +00:00
Michael J. Spencer
3885add959 Support: Remove Alarm. It is unused (via local grep and google code search).
llvm-svn: 121160
2010-12-07 18:41:59 +00:00
Michael J. Spencer
3dc94b3cc1 Support/PathV2: Remove const from bool return types.
llvm-svn: 121157
2010-12-07 18:12:07 +00:00
Jim Grosbach
c99517ecc6 Encode the literal field for tCMPzi instruction.
llvm-svn: 121153
2010-12-07 17:48:24 +00:00
Rafael Espindola
866531d633 Fix absolute recording of differences of symbols in two sections. Reduced from ctor_dtor_count-2.cpp.
llvm-svn: 121152
2010-12-07 17:12:32 +00:00
Michael J. Spencer
7979bb402f Support/PathV2: Change most functions in the path namespace to return their work
via their return value instead of an out parameter.

llvm-svn: 121149
2010-12-07 17:04:04 +00:00
Daniel Dunbar
6d79685e20 build: Go back to dropping __eprintf reference when building with Clang, see
comment.

llvm-svn: 121146
2010-12-07 16:29:44 +00:00
Benjamin Kramer
fb17a54866 Add parens to pacify gcc.
llvm-svn: 121142
2010-12-07 15:50:35 +00:00
Frits van Bommel
e7f51111ce Remove some dead code from the jump threading pass.
The last uses of these functions were removed in r113852 when LazyValueInfo was permanently enabled and removed the need for them.

llvm-svn: 121133
2010-12-07 13:08:07 +00:00
Jay Foad
79e18ed269 PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and
zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead of modifying the
object in place.

llvm-svn: 121120
2010-12-07 08:25:19 +00:00
Owen Anderson
4ad5307d6a Don't leak the mutex when loading dynamic libraries.
llvm-svn: 121119
2010-12-07 07:56:20 +00:00
Rafael Espindola
da64b6aa50 Fix relocations with weak definitions.
llvm-svn: 121114
2010-12-07 05:57:28 +00:00
Chris Lattner
12c2c17ac7 reapply r121100 with a tweak to constant fold ConstExprs with TargetData
(if available) as we go so that we get simple constantexprs not insane ones.
This fixes the failure of clang/test/CodeGenCXX/virtual-base-ctor.cpp
that the previous iteration of this patch had.

llvm-svn: 121111
2010-12-07 04:33:29 +00:00
Michael J. Spencer
0ce07529b3 Support/PathV2: Cleanup separator handling.
llvm-svn: 121110
2010-12-07 03:57:48 +00:00
Michael J. Spencer
a96fe51fa6 Support/PathV2: Remove the error_code return type from all functions in the path
namespace. None of them return anything except for success anyway. These will be
converted to returning their result soon.

llvm-svn: 121109
2010-12-07 03:57:37 +00:00
Michael J. Spencer
7c3efd63d4 Support/PathV2: Move make_absolute from path to fs.
llvm-svn: 121108
2010-12-07 03:57:17 +00:00
Rafael Espindola
9ede5ef045 Fix pcrel relocations that cross sections.
llvm-svn: 121107
2010-12-07 03:50:14 +00:00
NAKAMURA Takumi
7947c9770a lib/Target/X86/X86MCAsmInfo.cpp: [PR8741] On Win64, specify explicit PrivateGlobalPrefix as ".L".
Or, global symbols @Lxxxx might be treated as temporal symbol by MCSymbol.

llvm-svn: 121103
2010-12-07 02:43:45 +00:00
Eric Christopher
cab6997dc8 Temporarily revert r121100 as it's causing clang to fail
CodeGenCXX/virtual-base-ctor.cpp.

llvm-svn: 121102
2010-12-07 02:41:11 +00:00
Chris Lattner
5996a47663 fix PR8710 - teach global opt that some constantexprs are too complex to
put in a global variable's initializer.

llvm-svn: 121100
2010-12-07 01:59:32 +00:00
Jakob Stoklund Olesen
48ba44334f Remove unused member.
llvm-svn: 121098
2010-12-07 01:32:45 +00:00
Michael J. Spencer
2953ba9e66 Support/Unix/PathV2: Return the real error from realpath instead of any error
that close or unlink set.

llvm-svn: 121094
2010-12-07 01:23:39 +00:00
Michael J. Spencer
6874ebd344 Support/Unix/PathV2: Use 0770 instead of 0700 when creating a directory. Also use
the standard macros instead of octal notation.

llvm-svn: 121093
2010-12-07 01:23:29 +00:00
Michael J. Spencer
cfd185355b Support/PathV2: Use SmallVector::clear instead of set_size.
llvm-svn: 121092
2010-12-07 01:23:19 +00:00
Michael J. Spencer
a59a7b3965 Support/PathV2: Clarify and correct documentation.
llvm-svn: 121091
2010-12-07 01:23:08 +00:00
Michael J. Spencer
898af0f235 Support/PathV2: Move current_path from path to fs and fix the Unix implementation.
Unix bug spotted by Dan Gohman.

llvm-svn: 121090
2010-12-07 01:22:31 +00:00
Rafael Espindola
c98cc0b286 Fix a crash reduced from gcc produced assembly.
llvm-svn: 121085
2010-12-07 01:09:54 +00:00
Owen Anderson
81f8b084e6 Second attempt at converting Thumb2's LDRpci, including updating the gazillion places that need to know about it.
llvm-svn: 121082
2010-12-07 00:45:21 +00:00
Rafael Espindola
8dad37785c Sorry for such a large commit. The summary is that only MachO cares about the
actuall addresses in a .o file, so it is better to let the MachO writer compute
it.

This is good for two reasons. First, areas that shouldn't care about
addresses now don't have access to it. Second, the layout of each section
is independent. I should use this in a subsequent commit to speed it up.

Most of the patch is just removing the section address computation. The two
interesting parts are the change on how we handle padding in the end
of sections and how MachO can get the address of a-b when a and b are in
different sections.

Since now the expression evaluation normally doesn't know the section address,
it will think that a-b needs relocation and let the MachO writer know. Once
it has computed the section addresses, it calls back the expression evaluation
with the section addresses to resolve these expressions.

The remaining problem is the handling of padding. Currently it will create
a special alignment fragment at the end. Since that fragment doesn't update
the alignment of the section, it needs the real address to be computed.

Since now the layout will not compute a-b with a and b in different sections,
the only effect that the special alignment fragment has is update the
address size of the section. This can also be done by the MachO writer.

llvm-svn: 121076
2010-12-07 00:27:36 +00:00
Jim Grosbach
2d361b9318 Add fixup for Thumb1 BL/BLX instructions.
llvm-svn: 121072
2010-12-06 23:57:07 +00:00
Frits van Bommel
1494a2f6fe Implement jump threading of 'indirectbr' by keeping track of whether we're looking for ConstantInt*s or BlockAddress*s.
llvm-svn: 121066
2010-12-06 23:36:56 +00:00
Devang Patel
12459bc442 Undefined value in reg 0 may need a marker to identify end of source range.
This will be used to truncate live range of DBG_VALUE instruction by register allocator and friends.

llvm-svn: 121061
2010-12-06 22:48:22 +00:00
Devang Patel
6fe7fe8dd4 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.
llvm-svn: 121059
2010-12-06 22:39:26 +00:00
Rafael Espindola
82d3d8dc2c Use references to simplify the code a bit.
llvm-svn: 121050
2010-12-06 22:30:54 +00:00
Wesley Peck
ffdbf99b57 Adding bug fix that was suppose to be part of 121044.
patch contributed by Jack Whitham!

llvm-svn: 121049
2010-12-06 22:19:28 +00:00
Wesley Peck
996c76c27e Fixed reversed operands for IDIV and CMP instructions in MBlaze backend.
Use BRAD instead of BRD for indirect branches in MBlaze backend.

patch contributed by Jack Whitham!

llvm-svn: 121044
2010-12-06 22:06:49 +00:00
Jason W Kim
672ef014da Refactor ELFObjectWriter.
+ ARM/X86/MBlaze now share a common RecordRelocation
+ ARM/X86/MBlaze arch specific routines are limited to GetRelocType()

llvm-svn: 121043
2010-12-06 21:57:34 +00:00
Chris Lattner
599e271a46 replace a linear scan with a symtab lookup, reduce indentation.
No functionality change.

llvm-svn: 121042
2010-12-06 21:53:07 +00:00
Rafael Espindola
c726be7d0a use getSymbolOffset.
llvm-svn: 121041
2010-12-06 21:51:55 +00:00
Chris Lattner
2f134ca2cc Use a stronger predicate here, pointed out by Duncan
llvm-svn: 121040
2010-12-06 21:48:10 +00:00
Chris Lattner
2907722386 add some DEBUG statements.
llvm-svn: 121038
2010-12-06 21:13:51 +00:00
Wesley Peck
b168ddedaa Fix a 16-bit immediate value detection bug in the MBlaze delay slot filler.
Address more hazards in the MBlaze delay slot filler.

patch contributed by Jack Whitham!

llvm-svn: 121037
2010-12-06 21:11:01 +00:00
Rafael Espindola
fd0cc5d13f Another use of getSymbolOffset.
llvm-svn: 121034
2010-12-06 19:55:05 +00:00
Rafael Espindola
65c25aef87 Remove the instruction fragment to data fragment lowering since it was causing
freed data to be read. I will open a bug to track it being reenabled.

llvm-svn: 121028
2010-12-06 19:08:48 +00:00
Owen Anderson
8e9cb84ea2 Revert r121021, which broke the buildbots.
llvm-svn: 121026
2010-12-06 18:57:40 +00:00
Jim Grosbach
f2e0e808ba Trailing whitespace.
llvm-svn: 121024
2010-12-06 18:47:44 +00:00
Owen Anderson
0c51a02230 Improve handling of Thumb2 PC-relative loads by converting LDRpci (and friends) to Pseudos.
llvm-svn: 121021
2010-12-06 18:35:51 +00:00
Jim Grosbach
6c27b4f3cf Encode the register operand of ARM CondCode operands correctly. ARM::CPSR if
the instruction is predicated, reg0 otherwise.

llvm-svn: 121020
2010-12-06 18:30:57 +00:00
Jim Grosbach
c79c6290ee The ARM AsmMatcher needs to know that the CCOut operand is a register value,
not an immediate. It stores either ARM::CPSR or reg0.

llvm-svn: 121018
2010-12-06 18:21:12 +00:00
Rafael Espindola
3e954d16f4 Second try at making direct object emission produce the same results
as llc + llvm-mc. This time ELF is not changed and I tested that llvm-gcc
bootstrap on darwin10 using darwin9's assembler and linker.

llvm-svn: 121006
2010-12-06 17:27:56 +00:00
Rafael Espindola
4ec917db9b Revert previous two patches while I try to find out how to make both
linux and darwin assemblers happy :-(

llvm-svn: 121004
2010-12-06 15:35:15 +00:00
Rafael Espindola
3dc2b4cba7 Add an EmitAbsValue helper method and use it in cases where we want to be sure
that no relocations are used (on MochO).
Fixes llc producing different output from llc + llvm-mc.

llvm-svn: 121000
2010-12-06 14:53:14 +00:00
Chris Lattner
48a7310e08 Fix PR8735, a really terrible problem in the inliner's "alloca merging"
optimization.

Consider:
static void foo() {
  A = alloca
  ...
}

static void bar() {
  B = alloca
  ...
  call foo();
}

void main() {
  bar()
}

The inliner proceeds bottom up, but lets pretend it decides not to inline foo
into bar.  When it gets to main, it inlines bar into main(), and says "hey, I
just inlined an alloca "B" into main, lets remember that.  Then it keeps going
and finds that it now contains a call to foo.  It decides to inline foo into
main, and says "hey, foo has an alloca A, and I have an alloca B from another
inlined call site, lets reuse it".  The problem with this of course, is that 
the lifetime of A and B are nested, not disjoint.

Unfortunately I can't create a reasonable testcase for this: the one in the
PR is both huge and extremely sensitive, because you minor tweaks end up
causing foo to get inlined into bar too early.  We already have tests for the
basic alloca merging optimization and this does not break them.

llvm-svn: 120995
2010-12-06 07:52:42 +00:00
Chris Lattner
21587c9f65 improve comment
llvm-svn: 120994
2010-12-06 07:43:04 +00:00
Chris Lattner
71a4c43942 improve -debug output and comments a little.
llvm-svn: 120993
2010-12-06 07:38:40 +00:00
Michael J. Spencer
b31b7d5b4e Support/Windows: Make MinGW happy.
llvm-svn: 120991
2010-12-06 06:02:07 +00:00
Michael J. Spencer
244b426701 Support/FileSystem: Add directory_iterator implementation.
llvm-svn: 120989
2010-12-06 04:28:42 +00:00
Michael J. Spencer
36a2df800d Support/PathV2: Fix append to not add a slash to empty or root paths.
llvm-svn: 120988
2010-12-06 04:28:23 +00:00
Michael J. Spencer
61043e9f3a Support/Windows: Add ScopedHandle and move some clients over to it.
llvm-svn: 120987
2010-12-06 04:28:13 +00:00
Che-Liang Chiou
cd2878d421 ptx: add shift instructions
llvm-svn: 120982
2010-12-06 04:00:03 +00:00
Rafael Espindola
0ba01a5b5c Remove the getAddress getter, initialize Ordinal in the constructor and use
that on the ELF writer to detect a section we created.

llvm-svn: 120981
2010-12-06 03:48:09 +00:00
Rafael Espindola
bf001eed4c Simplify a bit.
llvm-svn: 120980
2010-12-06 03:36:43 +00:00
Rafael Espindola
d361a448af Use getSymbolOffset on the COFF writer.
llvm-svn: 120979
2010-12-06 03:24:04 +00:00
Rafael Espindola
f56c11276e Don't use PadSectionToAlignment on windows.
llvm-svn: 120978
2010-12-06 03:03:44 +00:00
Rafael Espindola
1b2090ef24 Add a getSymbolOffset method and use it in the ELF writer.
llvm-svn: 120977
2010-12-06 02:57:26 +00:00
Chris Lattner
db6c348f31 Fix PR8728, a miscompilation I recently introduced. When optimizing
memcpy's like:
  memcpy(A, B)
  memcpy(A, C)

we cannot delete the first memcpy as dead if A and C might be aliases.
If so, we actually get:

  memcpy(A, B)
  memcpy(A, A)

which is not correct to transform into:

  memcpy(A, A)

This patch was heavily influenced by Jakub Staszak's patch in PR8728, thanks
Jakub!

llvm-svn: 120974
2010-12-06 01:48:06 +00:00
Evan Cheng
4d9d54e44e Eliminate unneeded #include's.
llvm-svn: 120971
2010-12-05 23:41:43 +00:00
NAKAMURA Takumi
594d4094ca ARM/CMakeLists.txt: Add missing MLxExpansionPass.cpp since r120960.
llvm-svn: 120966
2010-12-05 23:08:57 +00:00
Evan Cheng
12561e250d Code clean up.
llvm-svn: 120965
2010-12-05 23:03:45 +00:00
Evan Cheng
854ec53564 Remove an unused variable.
llvm-svn: 120964
2010-12-05 23:03:35 +00:00
Cameron Zwarich
f56ba80bb2 Some cleanup before I start committing some incremental progress on
StrongPHIElimination.

llvm-svn: 120961
2010-12-05 22:34:08 +00:00
Evan Cheng
fc78767730 Making use of VFP / NEON floating point multiply-accumulate / subtraction is
difficult on current ARM implementations for a few reasons.
1. Even though a single vmla has latency that is one cycle shorter than a pair
   of vmul + vadd, a RAW hazard during the first (4? on Cortex-a8) can cause
   additional pipeline stall. So it's frequently better to single codegen
   vmul + vadd.
2. A vmla folowed by a vmul, vmadd, or vsub causes the second fp instruction to
   stall for 4 cycles. We need to schedule them apart.
3. A vmla followed vmla is a special case. Obvious issuing back to back RAW
   vmla + vmla is very bad. But this isn't ideal either:
     vmul
     vadd
     vmla
   Instead, we want to expand the second vmla:
     vmla
     vmul
     vadd
   Even with the 4 cycle vmul stall, the second sequence is still 2 cycles
   faster.

Up to now, isel simply avoid codegen'ing fp vmla / vmls. This works well enough
but it isn't the optimial solution. This patch attempts to make it possible to
use vmla / vmls in cases where it is profitable.

A. Add missing isel predicates which cause vmla to be codegen'ed.
B. Make sure the fmul in (fadd (fmul)) has a single use. We don't want to
   compute a fmul and a fmla.
C. Add additional isel checks for vmla, avoid cases where vmla is feeding into
   fp instructions (except for the #3 exceptional case).
D. Add ARM hazard recognizer to model the vmla / vmls hazards.
E. Add a special pre-regalloc case to expand vmla / vmls when it's likely the
   vmla / vmls will trigger one of the special hazards.

Work in progress, only A+B are enabled.

llvm-svn: 120960
2010-12-05 22:04:16 +00:00
Cameron Zwarich
f64c26bb9e Remove the PHIElimination.h header, as it is no longer needed.
llvm-svn: 120959
2010-12-05 21:39:42 +00:00
Frits van Bommel
e390b379ae Fix PR 4170 by having ExtractValueInst::getIndexedType() reject out-of-bounds indexing.
Also add asserts that the indices are valid in InsertValueInst::init(). ExtractValueInst already asserts when constructed with invalid indices.

llvm-svn: 120956
2010-12-05 20:50:26 +00:00
Cameron Zwarich
fbe9e91d97 I forgot to actually remove the FindCopyInsertPoint() declaration from
PHIElimination.h.

llvm-svn: 120953
2010-12-05 19:58:57 +00:00
Cameron Zwarich
cb613dcf69 Remove the SplitCriticalEdge() method declaration from PHIElimination.h. At one
time, this method existed, but now PHIElimination uses the method of the same
name on MachineBasicBlock.

llvm-svn: 120952
2010-12-05 19:54:23 +00:00
Cameron Zwarich
c680f44c1b Move the FindCopyInsertPoint method of PHIElimination to a new standalone
function so that it can be shared with StrongPHIElimination.

llvm-svn: 120951
2010-12-05 19:51:05 +00:00
Frits van Bommel
b95594885e Refactor jump threading.
Should have no functional change other than the order of two transformations that are mutually-exclusive and the exact formatting of debug output.
Internally, it now stores the ConstantInt*s as Constant*s, and actual undef values instead of nulls.

llvm-svn: 120946
2010-12-05 19:06:41 +00:00
Frits van Bommel
4f39797ac2 Remove trailing whitespace.
llvm-svn: 120945
2010-12-05 19:02:47 +00:00
Frits van Bommel
31cf7b99f9 Teach SimplifyCFG to turn
(indirectbr (select cond, blockaddress(@fn, BlockA),
                            blockaddress(@fn, BlockB)))
into
  (br cond, BlockA, BlockB).

llvm-svn: 120943
2010-12-05 18:29:03 +00:00
Chris Lattner
e30adfb732 Teach X86ISelLowering that the second result of X86ISD::UMUL is a flags
result.  This allows us to compile:

void *test12(long count) {
      return new int[count];
}

into:

test12:
	movl	$4, %ecx
	movq	%rdi, %rax
	mulq	%rcx
	movq	$-1, %rdi
	cmovnoq	%rax, %rdi
	jmp	__Znam                  ## TAILCALL

instead of:

test12:
	movl	$4, %ecx
	movq	%rdi, %rax
	mulq	%rcx
	seto	%cl
	testb	%cl, %cl
	movq	$-1, %rdi
	cmoveq	%rax, %rdi
	jmp	__Znam

Of course it would be even better if the regalloc inverted the cmov to 'cmovoq',
which would eliminate the need for the 'movq %rdi, %rax'.

llvm-svn: 120936
2010-12-05 07:49:54 +00:00
Chris Lattner
76601e7a99 it turns out that when ".with.overflow" intrinsics were added to the X86
backend that they were all implemented except umul.  This one fell back
to the default implementation that did a hi/lo multiply and compared the
top.  Fix this to check the overflow flag that the 'mul' instruction
sets, so we can avoid an explicit test.  Now we compile:

void *func(long count) {
      return new int[count];
}

into:

__Z4funcl:                              ## @_Z4funcl
	movl	$4, %ecx                ## encoding: [0xb9,0x04,0x00,0x00,0x00]
	movq	%rdi, %rax              ## encoding: [0x48,0x89,0xf8]
	mulq	%rcx                    ## encoding: [0x48,0xf7,0xe1]
	seto	%cl                     ## encoding: [0x0f,0x90,0xc1]
	testb	%cl, %cl                ## encoding: [0x84,0xc9]
	movq	$-1, %rdi               ## encoding: [0x48,0xc7,0xc7,0xff,0xff,0xff,0xff]
	cmoveq	%rax, %rdi              ## encoding: [0x48,0x0f,0x44,0xf8]
	jmp	__Znam                  ## TAILCALL

instead of:

__Z4funcl:                              ## @_Z4funcl
	movl	$4, %ecx                ## encoding: [0xb9,0x04,0x00,0x00,0x00]
	movq	%rdi, %rax              ## encoding: [0x48,0x89,0xf8]
	mulq	%rcx                    ## encoding: [0x48,0xf7,0xe1]
	testq	%rdx, %rdx              ## encoding: [0x48,0x85,0xd2]
	movq	$-1, %rdi               ## encoding: [0x48,0xc7,0xc7,0xff,0xff,0xff,0xff]
	cmoveq	%rax, %rdi              ## encoding: [0x48,0x0f,0x44,0xf8]
	jmp	__Znam                  ## TAILCALL

Other than the silly seto+test, this is using the o bit directly, so it's going in the right
direction.

llvm-svn: 120935
2010-12-05 07:30:36 +00:00
Chris Lattner
16bafb2414 generalize the previous check to handle -1 on either side of the
select, inserting a not to compensate.  Add a missing isZero check
that I lost somehow.

This improves codegen of:

void *func(long count) {
      return new int[count];
}

from:

__Z4funcl:                              ## @_Z4funcl
	movl	$4, %ecx                ## encoding: [0xb9,0x04,0x00,0x00,0x00]
	movq	%rdi, %rax              ## encoding: [0x48,0x89,0xf8]
	mulq	%rcx                    ## encoding: [0x48,0xf7,0xe1]
	testq	%rdx, %rdx              ## encoding: [0x48,0x85,0xd2]
	movq	$-1, %rdi               ## encoding: [0x48,0xc7,0xc7,0xff,0xff,0xff,0xff]
	cmoveq	%rax, %rdi              ## encoding: [0x48,0x0f,0x44,0xf8]
	jmp	__Znam                  ## TAILCALL
                                        ## encoding: [0xeb,A]

to:

__Z4funcl:                              ## @_Z4funcl
	movl	$4, %ecx                ## encoding: [0xb9,0x04,0x00,0x00,0x00]
	movq	%rdi, %rax              ## encoding: [0x48,0x89,0xf8]
	mulq	%rcx                    ## encoding: [0x48,0xf7,0xe1]
	cmpq	$1, %rdx                ## encoding: [0x48,0x83,0xfa,0x01]
	sbbq	%rdi, %rdi              ## encoding: [0x48,0x19,0xff]
	notq	%rdi                    ## encoding: [0x48,0xf7,0xd7]
	orq	%rax, %rdi              ## encoding: [0x48,0x09,0xc7]
	jmp	__Znam                  ## TAILCALL
                                        ## encoding: [0xeb,A]

llvm-svn: 120932
2010-12-05 02:00:51 +00:00
Chris Lattner
474ed0aa9b Improve an integer select optimization in two ways:
1. generalize 
    (select (x == 0), -1, 0) -> (sign_bit (x - 1))
to:
    (select (x == 0), -1, y) -> (sign_bit (x - 1)) | y

2. Handle the identical pattern that happens with !=:
   (select (x != 0), y, -1) -> (sign_bit (x - 1)) | y

cmov is often high latency and can't fold immediates or
memory operands.  For example for (x == 0) ? -1 : 1, before 
we got:

< 	testb	%sil, %sil
< 	movl	$-1, %ecx
< 	movl	$1, %eax
< 	cmovel	%ecx, %eax

now we get:

> 	cmpb	$1, %sil
> 	sbbl	%eax, %eax
> 	orl	$1, %eax

llvm-svn: 120929
2010-12-05 01:23:24 +00:00
Bill Wendling
2b53c0830d Initialize HasPOPCNT.
llvm-svn: 120923
2010-12-04 23:57:24 +00:00
Rafael Espindola
310b851621 Once the layout is done we don't need to keep updating which fragments are
valid. Addresses will not change.

llvm-svn: 120921
2010-12-04 22:47:22 +00:00
Rafael Espindola
1bf8d261f1 Remember the contents of leb and dwarfline fragments when relaxing. This avoids
having to evaluate the expression again when writing.

llvm-svn: 120920
2010-12-04 21:58:52 +00:00
Cameron Zwarich
5e3c712e67 Remove PHIElimination's private copy of SkipPHIsAndLabels.
llvm-svn: 120918
2010-12-04 20:40:15 +00:00
Benjamin Kramer
851691ddb2 Add patterns for the x86 popcnt instruction.
- Also adds a new POPCNT subtarget feature that is currently enabled if the target
  supports SSE4.2 (nehalem) or SSE4A (barcelona).

llvm-svn: 120917
2010-12-04 20:32:23 +00:00
Bill Wendling
18e834f217 Silence 'may be used uninitialized in this function' warnings. Static analysis
may determine that they cannot be used uninitialized. But that might be a bit
too much for the compiler to determine.

llvm-svn: 120916
2010-12-04 20:20:34 +00:00
Michael J. Spencer
2cd429339f Support/PathV2: Remove redundant calls to make_error_code.
llvm-svn: 120913
2010-12-04 18:45:32 +00:00
Benjamin Kramer
e2e8053264 APInt: microoptimize a few methods.
llvm-svn: 120912
2010-12-04 18:05:36 +00:00
Benjamin Kramer
009451fddc Remove unneeded zero arrays.
llvm-svn: 120910
2010-12-04 15:28:22 +00:00
Benjamin Kramer
612c7225ee Apparently APFloat::getZero doesn't like PPCDoubleDoubles.
llvm-svn: 120909
2010-12-04 14:43:08 +00:00
Benjamin Kramer
77faee6ba1 Simplify code. No functionality change.
llvm-svn: 120907
2010-12-04 14:22:24 +00:00