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Commit Graph

5994 Commits

Author SHA1 Message Date
Jim Laskey
d266d999cb Use S_debug for dwarf info.
llvm-svn: 30994
2006-10-17 11:30:57 +00:00
Evan Cheng
bf3e5a1d7a Proper fix.
llvm-svn: 30993
2006-10-17 00:24:49 +00:00
Evan Cheng
36ab7976a0 One more try.
llvm-svn: 30992
2006-10-16 23:44:08 +00:00
Evan Cheng
1cf362ec18 Unbreak x86-64 build.
llvm-svn: 30990
2006-10-16 22:53:28 +00:00
Rafael Espindola
a156538e34 add fdivs e fdivd
llvm-svn: 30988
2006-10-16 21:50:04 +00:00
Rafael Espindola
4f61431679 expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTS
llvm-svn: 30987
2006-10-16 21:10:32 +00:00
Evan Cheng
04bec886a9 Added a X86CompilationCallback variant which saves XMM argument registers for targets with SSE.
llvm-svn: 30986
2006-10-16 21:01:55 +00:00
Evan Cheng
b4d8323e54 Proper fix for rdar://problem/4770604 Thanks to Stuart Hastings!
llvm-svn: 30985
2006-10-16 21:00:37 +00:00
Rafael Espindola
25fbeb5ec2 define the DFPBinOp class
llvm-svn: 30981
2006-10-16 18:39:22 +00:00
Rafael Espindola
57dc40a3a8 add the FPBinOp class
llvm-svn: 30980
2006-10-16 18:32:36 +00:00
Rafael Espindola
8a40de94f2 define the Addr1BinOp class
llvm-svn: 30979
2006-10-16 18:18:14 +00:00
Rafael Espindola
6554b1014d define the IntBinOp class and use it to implement the multiply instructions
llvm-svn: 30978
2006-10-16 17:57:20 +00:00
Rafael Espindola
71ae8c3d4a fix assembly syntax
llvm-svn: 30977
2006-10-16 17:38:12 +00:00
Rafael Espindola
d255bfb09b implement LDRB, LDRSB, LDRH and LDRSH
llvm-svn: 30976
2006-10-16 17:17:22 +00:00
Rafael Espindola
93359fa883 implement smull and umull
llvm-svn: 30975
2006-10-16 16:33:29 +00:00
Evan Cheng
ca5eaf4020 Avoid getting into an infinite loop when -disable-x86-shuffle-opti is specified.
llvm-svn: 30974
2006-10-16 06:36:00 +00:00
Evan Cheng
c73547a71d SelectScalarSSELoad should call CanBeFoldedBy as well.
llvm-svn: 30973
2006-10-16 06:34:55 +00:00
Anton Korobeynikov
61d88967b9 Align stack size to DWORD boundary
llvm-svn: 30964
2006-10-14 20:53:35 +00:00
Rafael Espindola
c426cede28 expand ISD::BRCOND
llvm-svn: 30963
2006-10-14 17:59:54 +00:00
Rafael Espindola
38c602f658 fix some fp condition codes
use non trapping comparison instructions

llvm-svn: 30962
2006-10-14 13:42:53 +00:00
Evan Cheng
6c8de88f88 Corrected load folding check. We need to start from the root of the sub-dag
being matched and ensure there isn't a non-direct path to the load (i.e. a
path that goes out of the sub-dag.)

llvm-svn: 30958
2006-10-14 08:33:25 +00:00
Chris Lattner
b90d66b7da implement branch inspection/modification methods.
llvm-svn: 30946
2006-10-13 21:21:17 +00:00
Evan Cheng
fe5bb5dbe6 Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
llvm-svn: 30945
2006-10-13 21:14:26 +00:00
Chris Lattner
bea7a9de50 remove some dead code
llvm-svn: 30938
2006-10-13 20:40:42 +00:00
Chris Lattner
b22754853b add note
llvm-svn: 30937
2006-10-13 20:20:58 +00:00
Chris Lattner
14f18d4896 set isBarrier correctly
llvm-svn: 30936
2006-10-13 19:10:34 +00:00
Chris Lattner
a3f4e611a4 Correctly handle instruction separators.
llvm-svn: 30935
2006-10-13 17:56:02 +00:00
Chris Lattner
63ec35db20 Expose method and ivars for measuring inline asm length properly.
llvm-svn: 30934
2006-10-13 17:50:07 +00:00
Rafael Espindola
1f85e7a2a1 add FNEGS and FNEGD
llvm-svn: 30932
2006-10-13 17:37:35 +00:00
Rafael Espindola
042e61af25 add SBCS and SUBS
llvm-svn: 30930
2006-10-13 17:19:20 +00:00
Rafael Espindola
24d7976d1d implement calls to functions that return long
llvm-svn: 30929
2006-10-13 16:47:22 +00:00
Rafael Espindola
bd50a4d757 implement unordered floating point compares
llvm-svn: 30928
2006-10-13 13:14:59 +00:00
Chris Lattner
9777da8fb7 add a note
llvm-svn: 30921
2006-10-12 22:01:26 +00:00
Evan Cheng
76d365ac84 Doh. This wasn't causing problems by luck.
llvm-svn: 30914
2006-10-12 19:13:59 +00:00
Evan Cheng
d07e2f081a Some X86ISD::CMP were created with wrong ValueType's.
llvm-svn: 30913
2006-10-12 19:12:56 +00:00
Chris Lattner
b7ff3d59f7 mark call adjustments as modifying the SP
llvm-svn: 30911
2006-10-12 18:00:26 +00:00
Chris Lattner
80790cad34 adjcallstack up/down clobbers the sp
llvm-svn: 30910
2006-10-12 18:00:14 +00:00
Chris Lattner
e7ea164744 adjcallstackup/down clobbers the stack pointer
llvm-svn: 30909
2006-10-12 17:57:58 +00:00
Chris Lattner
e4e8893807 mark adjcallstack up/down as clobbering and using the SP
llvm-svn: 30908
2006-10-12 17:56:34 +00:00
Chris Lattner
b25677f5ca Move the Imp tblgen class from the X86 backend to common code.
llvm-svn: 30907
2006-10-12 17:49:27 +00:00
Chris Lattner
a678c5bac1 Mark ADJCALLSTACKUP/DOWN as clobbering ESP so that virtregmap will notice
that it can't assume ESP is unmodified across the instrs.

llvm-svn: 30905
2006-10-12 17:42:56 +00:00
Chris Lattner
fde6859201 fix compilation failure of smg2000
llvm-svn: 30900
2006-10-12 03:55:48 +00:00
Chris Lattner
502246c4a6 Fold "zero extending vector loads" now that evan added the chain manip stuff.
This compiles both tests in X86/vec_ss_load_fold.ll into:

_test1:
        movss 4(%esp), %xmm0
        subss LCPI1_0, %xmm0
        mulss LCPI1_1, %xmm0
        minss LCPI1_2, %xmm0
        xorps %xmm1, %xmm1
        maxss %xmm1, %xmm0
        cvttss2si %xmm0, %eax
        andl $65535, %eax
        ret

instead of:

_test1:
        movss LCPI1_0, %xmm0
        movss 4(%esp), %xmm1
        subss %xmm0, %xmm1
        movss LCPI1_1, %xmm0
        mulss %xmm0, %xmm1
        movss LCPI1_2, %xmm0
        minss %xmm0, %xmm1
        xorps %xmm0, %xmm0
        maxss %xmm0, %xmm1
        cvttss2si %xmm1, %eax
        andl $65535, %eax
        ret

llvm-svn: 30894
2006-10-11 22:09:58 +00:00
Evan Cheng
95140c9c64 ComplexPatterns sse_load_f32 and sse_load_f64 returns in / out chain operands.
llvm-svn: 30892
2006-10-11 21:06:01 +00:00
Evan Cheng
ca66f49574 Add properties to ComplexPattern.
llvm-svn: 30891
2006-10-11 21:03:53 +00:00
Andrew Lenharth
55db991b47 Reduce the amount of state in the lowering code and drop old pattern ISel functions
llvm-svn: 30881
2006-10-11 16:24:51 +00:00
Evan Cheng
9b31a4d4ed Naming consistency.
llvm-svn: 30878
2006-10-11 07:10:22 +00:00
Chris Lattner
b9c1ea6dcc Use cute tblgen tricks to make zap handling more powerful. Specifically,
when the dag combiner simplifies an and mask, notice this and allow those bits
to be missing from the zap mask.

This compiles Alpha/zapnot4.ll into:

        sll $16,3,$0
        zapnot $0,3,$0
        ret $31,($26),1

instead of:

        ldah $0,1($31)
        lda $0,-8($0)
        sll $16,3,$1
        and $1,$0,$0
        ret $31,($26),1

It would be *really* nice to replace the hunk of code in the
AlphaISelDAGToDAG.cpp file that matches (and (srl (x, C), c2) into
(SRL (ZAPNOTi)) with a similar pattern, but I've spent enough time poking
at alpha.  Make andrew will do this.

llvm-svn: 30875
2006-10-11 05:13:56 +00:00
Andrew Lenharth
4b783303e5 Jimptables working again on alpha.
As a bonus, use the GOT node instead of the AlphaISD::GOT for internal stuff.

llvm-svn: 30873
2006-10-11 04:29:42 +00:00
Chris Lattner
95a8905db2 Remove dead/redundant instructions. These are handled by ZAPNOTi
llvm-svn: 30872
2006-10-11 04:12:39 +00:00