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2083 Commits

Author SHA1 Message Date
Anton Korobeynikov
5845c41e4d Fix use of declaration inside case block 
llvm-svn: 41584
 2007-08-29 23:18:48 +00:00
Anton Korobeynikov
a3531f71ca Lower FRAME_TO_ADDR_OFFSET to zero by default (if not custom lowered) 
llvm-svn: 41578
 2007-08-29 19:28:29 +00:00
Dan Gohman
cbb2ee9062 Add an option, -view-sunit-dags, for viewing the actual SUnit DAGs used by 
scheduling.

llvm-svn: 41556
 2007-08-28 20:32:58 +00:00
Dan Gohman
123b8effaa Make DAGCombiner's global alias analysis query more precise in the case 
where both pointers have non-zero offsets.

llvm-svn: 41491
 2007-08-27 16:32:11 +00:00
Dan Gohman
2e7e251f24 If the source and destination pointers in an llvm.memmove are known 
to not alias each other, it can be translated as an llvm.memcpy.

llvm-svn: 41489
 2007-08-27 16:26:13 +00:00
Duncan Sands
883740b39f There is an impedance matching problem between LLVM and 
gcc exception handling: if an exception unwinds through
an invoke, then execution must branch to the invoke's
unwind target.  We previously tried to enforce this by
appending a cleanup action to every selector, however
this does not always work correctly due to an optimization
in the C++ unwinding runtime: if only cleanups would be
run while unwinding an exception, then the program just
terminates without actually executing the cleanups, as
invoke semantics would require.  I was hoping this
wouldn't be a problem, but in fact it turns out to be the
cause of all the remaining failures in the LLVM testsuite
(these also fail with -enable-correct-eh-support, so turning
on -enable-eh didn't make things worse!).  Instead we need
to append a full-blown catch-all to the end of each
selector.  The correct way of doing this depends on the
personality function, i.e. it is language dependent, so
can only be done by gcc.  Thus this patch which generalizes
the eh.selector intrinsic so that it can handle all possible
kinds of action table entries (before it didn't accomodate
cleanups): now 0 indicates a cleanup, and filters have to be
specified using the number of type infos plus one rather than
the number of type infos.  Related gcc patches will cause
Ada to pass a cleanup (0) to force the selector to always
fire, while C++ will use a C++ catch-all (null).

llvm-svn: 41484
 2007-08-27 15:47:50 +00:00
Dale Johannesen
2ceade197b Revise per review comments. 
llvm-svn: 41409
 2007-08-26 01:18:27 +00:00
Dale Johannesen
b52093236e Add APFloat interface to ConstantFPSDNode. Change 
over uses in DAGCombiner.  Fix interfaces to work
with APFloats.

llvm-svn: 41407
 2007-08-25 22:10:57 +00:00
Chris Lattner
093144e147 Allow target constants to be illegal types. The target should 
know how to handle them.  This fixes 
test/CodeGen/Generic/asm-large-immediate.ll

llvm-svn: 41388
 2007-08-25 01:00:22 +00:00
Chris Lattner
666f15ac0a Teach the dag scheduler to handle inline asm nodes with multi-value immediate operands. 
llvm-svn: 41386
 2007-08-25 00:53:07 +00:00
Chris Lattner
1e089aac3a rename isOperandValidForConstraint to LowerAsmOperandForConstraint, 
changing the interface to allow for future changes.

llvm-svn: 41384
 2007-08-25 00:47:38 +00:00
Dale Johannesen
9ec1e28e79 Poison APFloat::operator==. Replace existing uses with bitwiseIsEqual. 
This means backing out the preceding change to Constants.cpp, alas.

llvm-svn: 41378
 2007-08-24 22:09:56 +00:00
Dale Johannesen
5c0b0ec1d6 Use APFloat internally for ConstantFPSDNode. 
llvm-svn: 41372
 2007-08-24 20:59:15 +00:00
Anton Korobeynikov
9451c871c5 Perform correct codegen for eh_dwarf_cfa intrinsic. 
llvm-svn: 41316
 2007-08-23 07:21:06 +00:00
Dan Gohman
23db01efea Minor cleanups to reduce some spurious differences between different 
scheduler implementations.

llvm-svn: 41191
 2007-08-20 19:28:38 +00:00
Rafael Espindola
68d95ff2b1 Partial implementation of calling functions with byval arguments: 
*) The needed information is propagated to the DAG
 *) The X86-64 backend detects it and aborts

llvm-svn: 41179
 2007-08-20 15:18:24 +00:00
Evan Cheng
a65c956119 Fold C ? 0 : 1 to ~C or zext(~C) or trunc(~C) depending the types. 
llvm-svn: 41163
 2007-08-18 05:57:05 +00:00
Evan Cheng
930acafa5b Avoid issue on 64-bit hosts. 
llvm-svn: 41143
 2007-08-17 18:02:22 +00:00
David Greene
1d1b7f793d Fix GLIBCXX_DEBUG error of comparing two singular iterators 
llvm-svn: 41139
 2007-08-17 15:13:55 +00:00
Evan Cheng
11fa8d0f62 If dynamic_stackalloc alignment is > stack alignment, first issue an instruction to align the stack ptr before the decrement. 
llvm-svn: 41133
 2007-08-16 23:50:06 +00:00
Evan Cheng
9a05381a81 - If a dynamic_stackalloc alignment requirement is <= stack alignment, then the alignment argument is ignored. 
- *Always* round up the size of the allocation to multiples of stack
alignment to ensure the stack ptr is never left in an invalid state after a dynamic_stackalloc.

llvm-svn: 41132
 2007-08-16 23:46:29 +00:00
Lauro Ramos Venancio
9f9e5b3971 Implement FPOWI ExpandOp. 
Fix PR1287.

llvm-svn: 41112
 2007-08-15 22:13:27 +00:00
Dan Gohman
f18e94535f Fix EXTRACT_ELEMENT, EXTRACT_SUBVECTOR, and EXTRACT_VECTOR_ELT to 
use an intptr ValueType instead of i32 for the index operand in
getCopyToParts.

llvm-svn: 40987
 2007-08-10 14:59:38 +00:00
Rafael Espindola
b20b9e985a propagate struct size and alignment of byval arguments to the DAG 
llvm-svn: 40986
 2007-08-10 14:44:42 +00:00
Dale Johannesen
a1340d5916 Update per review comments. 
llvm-svn: 40965
 2007-08-09 17:27:48 +00:00
Dale Johannesen
79551baaad long double 9 of N. This finishes up the X86-32 bits 
(constants are still not handled).  Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).

llvm-svn: 40958
 2007-08-09 01:04:01 +00:00
Scott Michel
86052f49c0 If a target really needs to custom lower constants, it should be allowed 
to do so.

llvm-svn: 40955
 2007-08-08 23:23:31 +00:00
Chandler Carruth
00e56b0e81 This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future. 
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.

llvm-svn: 40807
 2007-08-04 01:51:18 +00:00
Chris Lattner
9319dfc93a don't redefine a parameter 
llvm-svn: 40748
 2007-08-02 18:08:16 +00:00
Evan Cheng
a06b9cf09f Do not emit copies for physical register output if it's not used. 
llvm-svn: 40722
 2007-08-02 05:29:38 +00:00
Scott Michel
199544367f Style police: Expand the tabs to spaces! 
llvm-svn: 40712
 2007-08-02 02:22:46 +00:00
Evan Cheng
14bd520741 Instead of adding copyfromreg's to handle physical definitions. Now isel can 
simply specify them as results and let scheduledag handle them. That
is, instead of
SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...)
SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag)

Just write:
SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...)

And let scheduledag emit the move from X86::EAX to a virtual register.

llvm-svn: 40710
 2007-08-02 00:28:15 +00:00
Lauro Ramos Venancio
1ef30713de Expand unaligned loads/stores when the target doesn't support them. (PR1548) 
llvm-svn: 40682
 2007-08-01 19:34:21 +00:00
Scott Michel
c65b4c8eeb - Allow custom lowering for CTPOP, CTTZ, CTLZ. 
- Fixed an existing unexpanded tab.

llvm-svn: 40605
 2007-07-30 21:00:31 +00:00
Dan Gohman
375d541183 Fix a bug in getCopyFromParts turned up in the testcase for PR1132. 
llvm-svn: 40598
 2007-07-30 19:09:17 +00:00
Duncan Sands
e8bb2c6d32 Support for trampolines, except for X86 codegen which is 
still under discussion.

llvm-svn: 40549
 2007-07-27 12:58:54 +00:00
Dan Gohman
249090568d Fix the alias analysis query in DAGCombiner to not add in two 
offsets. The SrcValueOffset values are the real offsets from the
SrcValue base pointers.

llvm-svn: 40534
 2007-07-26 16:14:06 +00:00
Christopher Lamb
08bcd5c0f8 Teach DAG scheduling how to properly emit subreg insert/extract machine instructions. PR1350 
llvm-svn: 40520
 2007-07-26 08:12:07 +00:00
Christopher Lamb
73c3cd47cc Add selection DAG nodes for subreg insert/extract. PR1350 
llvm-svn: 40516
 2007-07-26 07:34:40 +00:00
Christopher Lamb
b178ecbbc0 Fix infinite recursion for when extract_vector_elt is legal. Unfortunately no public targets use this code-path, so no test. 
llvm-svn: 40510
 2007-07-26 03:33:13 +00:00
Dan Gohman
1444c5840b Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask. 
llvm-svn: 40480
 2007-07-24 23:00:27 +00:00
Dan Gohman
54b8032d64 Fix some uses of dyn_cast to be uses of cast. 
llvm-svn: 40443
 2007-07-23 20:24:29 +00:00
Duncan Sands
840594467f As pointed out by g++-4.2, the original code didn't do 
what it thought it was doing.

llvm-svn: 40044
 2007-07-19 07:31:58 +00:00
Dan Gohman
4c140b7128 It's not necessary to do rounding for alloca operations when the requested 
alignment is equal to the stack alignment.

llvm-svn: 40004
 2007-07-18 16:29:46 +00:00
Dan Gohman
0ba554c0c8 Fix comments about vectors to use the current wording. 
llvm-svn: 39921
 2007-07-16 14:29:03 +00:00
Nick Lewycky
05e4170839 Fix the build. Patch from Holger Schurig. 
llvm-svn: 39856
 2007-07-14 15:11:14 +00:00
Anton Korobeynikov
5635277c36 Long live the exception handling! 
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be 
thought as 'finished': I expect many small and not so small glitches
everywhere.

llvm-svn: 39855
 2007-07-14 14:06:15 +00:00
Dan Gohman
44771cf8e8 Fix the comment for LegalizeOp to more accurately reflect what it does. 
llvm-svn: 39827
 2007-07-13 20:14:11 +00:00
Dan Gohman
1f4580ceb4 Don't call SimplifyVBinOp for non-vector operations, following earlier review 
feedback. This theoretically makes the common (scalar) case more efficient.

llvm-svn: 39823
 2007-07-13 20:03:40 +00:00
Dale Johannesen
469ed8e17e Skeleton of post-RA scheduler; doesn't do anything yet. 
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.

llvm-svn: 39816
 2007-07-13 17:13:54 +00:00
Dan Gohman
629311ca52 Change the peep for EXTRACT_VECTOR_ELT of BUILD_PAIR to look for 
the new CONCAT_VECTORS node type instead, as that's what legalize
uses now. And add a peep for EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT.

llvm-svn: 38503
 2007-07-10 18:20:44 +00:00
Evan Cheng
d80c2821af If the operand is marked M_OPTIONAL_DEF_OPERAND, then it's a def. 
llvm-svn: 38496
 2007-07-10 17:52:20 +00:00
Dan Gohman
bd0ff28e1c Fix a bug in the folding of binary operators to undef. 
Thanks to Lauro for spotting this!

llvm-svn: 38491
 2007-07-10 15:19:29 +00:00
Dan Gohman
6b21e11f1c Fix the folding of undef in several binary operators to recognize 
undef in either the left or right operand.

llvm-svn: 38489
 2007-07-10 14:20:37 +00:00
Evan Cheng
cf3b1c89a9 When a node value is only used by a CopyToReg, use the user's dest. This should not be restricted to nodes that produce only a single value. 
llvm-svn: 38485
 2007-07-10 07:08:32 +00:00
Evan Cheng
23dc96f640 Move DenseMapKeyInfo<SDOperand> from LegalizeDAG.cpp to SelectionDAGNodes.h 
llvm-svn: 38484
 2007-07-10 06:59:55 +00:00
Dan Gohman
150487b166 Preserve volatililty and alignment information when lowering or 
simplifying loads and stores.

llvm-svn: 38473
 2007-07-09 22:18:38 +00:00
Dan Gohman
81cfdc2f19 Change getCopyToParts and getCopyFromParts to always use target-endian 
register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.

llvm-svn: 38471
 2007-07-09 20:59:04 +00:00
Dan Gohman
be352027e6 Initialize the IndexedModeActions array with memset before 
updating it with calls to setIndexedLoadAction/setIndexedStoreAction,
which only update a few bits at a time. This avoids ostensible
undefined behavior of operationg on values which may be
trap-representations, and as a practical matter fixes errors from
valgrind, which doesn't track uninitialized memory with bit
granularity.

llvm-svn: 38468
 2007-07-09 20:49:44 +00:00
Chris Lattner
aff9a84b7a Fix this warning: 
DAGCombiner.cpp: In member function 'llvm::SDOperand<unnamed>::DAGCombiner::visitOR(llvm::SDNode*)':
DAGCombiner.cpp:1608: warning: passing negative value '-0x00000000000000001' for argument 1 to 'llvm::SDOperand llvm::SelectionDAG::getConstant(uint64_t, llvm::MVT::ValueType, bool)'

oiy.

llvm-svn: 38458
 2007-07-09 16:16:34 +00:00
Duncan Sands
f926a3080c The exception handling intrinsics return values, 
so must be lowered to a value, not nothing at all.
Subtle point: I made eh_selector return 0 and
eh_typeid_for return 1.  This means that only
cleanups (destructors) will be run as the exception
unwinds [if eh_typeid_for returned 0 then it would
be as if the first catch always matched, and the
corresponding handler would be run], which is
probably want you want in the CBE.

llvm-svn: 37947
 2007-07-06 14:46:23 +00:00
Rafael Espindola
7b3de98989 Add the byval attribute 
llvm-svn: 37940
 2007-07-06 10:57:03 +00:00
Duncan Sands
7e50c11edd Remove propagateEHRegister in favour of a more limited 
fix, that is adequate while PR1508 remains unresolved.

llvm-svn: 37938
 2007-07-06 09:18:59 +00:00
Duncan Sands
e7650d2b1e Remove ExtractGlobalVariable - use StripPointerCasts 
instead.

llvm-svn: 37937
 2007-07-06 09:10:03 +00:00
Evan Cheng
bae19254f0 Workaround of getCopyToRegs and getCopyFromRegs bugs for big-endian machines. 
llvm-svn: 37935
 2007-07-06 01:47:35 +00:00
Evan Cheng
22957164aa Change CalculateHeights and CalculateDepths to be non-recursive. 
llvm-svn: 37934
 2007-07-06 01:37:28 +00:00
Dan Gohman
cd6f6a0a58 Make the debug string for ISD::MERGE_VALUES consistent with the others. 
llvm-svn: 37922
 2007-07-05 20:15:43 +00:00
Dan Gohman
90c6b87b31 Add a parameter to getCopyToParts and getCopyFromParts to specify whether 
endian swapping should be done, and update the code to use it. This fixes
some register ordering issues on big-endian systems, such as PowerPC,
introduced by the recent illegal by-val arguments changes.

llvm-svn: 37921
 2007-07-05 20:12:34 +00:00
Duncan Sands
4441eff1ac Extend eh.selector to support both catches and filters. 
Drop the eh.filter intrinsic.

llvm-svn: 37875
 2007-07-04 20:52:51 +00:00
Dan Gohman
d2d18267e6 Fix several over-aggressive folds for undef nodes in dagcombine, to 
follow the rules for undef used in instcombine.

llvm-svn: 37851
 2007-07-03 14:03:57 +00:00
Dale Johannesen
7af19491d3 Fix for PR 1505 (and 1489). Rewrite X87 register 
model to include f32 variants.  Some factoring
improvments forthcoming.

llvm-svn: 37847
 2007-07-03 00:53:03 +00:00
Dan Gohman
68f0cbccfb Replace ExpandScalarFormalArgs and ExpandScalarCallArgs with the newly 
refactored getCopyFromParts and getCopyToParts, which are more general.
This effectively adds support for lowering illegal by-val vector call
arguments.

llvm-svn: 37843
 2007-07-02 16:18:06 +00:00
Dan Gohman
5fe8266d04 Teach GetNegatedExpression to negate 0-B to B in UnsafeFPMath mode, and 
visitFSUB to fold 0-B to -B in UnsafeFPMath mode. Also change visitFNEG
to use isNegatibleForFree/GetNegatedExpression instead of doing a subset
of the same thing manually.

This fixes test/CodeGen/X86/negative-sin.ll.

llvm-svn: 37842
 2007-07-02 15:48:56 +00:00
Evan Cheng
a1a06d1763 Only do FNEG xform when the vector type is a floating point type. 
llvm-svn: 37818
 2007-06-29 21:44:35 +00:00
David Greene
75e58e2207 Remove unused variables. 
llvm-svn: 37816
 2007-06-29 21:42:03 +00:00
Evan Cheng
a6add260b3 Fix a vector FP constant CSE bug. 
llvm-svn: 37814
 2007-06-29 21:36:04 +00:00
David Greene
0942edd414 Remove unnecessary attributions in comments. 
llvm-svn: 37799
 2007-06-29 03:42:23 +00:00
David Greene
df6a87ea1c Fix reference to cached end iterator invalidated by an erase operation. 
Uncovered by _GLIBCXX_DEBUG.

llvm-svn: 37795
 2007-06-29 02:49:11 +00:00
David Greene
244fb44f6b Remove the "special tie breaker" because it resulted in inconsistent 
ordering and thus violated the strict weak ordering requirement of
priority_queue.  Uncovered by _GLIBCXX_DEBUG.

llvm-svn: 37794
 2007-06-29 02:48:09 +00:00
Dan Gohman
ad9cbaba40 Fix an assertion failure in legalizing bitcast operators on targets where 
vectors are split down to single elements as part of legalization.

llvm-svn: 37785
 2007-06-29 00:09:08 +00:00
Dan Gohman
c6bdcfa8c0 Add new TargetLowering code to provide the final register type that an 
illegal value type will be transformed to, for code that needs the
register type after all transformations instead of just after the first
transformation.

Factor out the code that uses this information to do copy-from-regs and
copy-to-regs for various purposes into separate functions so that they
are done consistently.

llvm-svn: 37781
 2007-06-28 23:29:44 +00:00
Evan Cheng
26542e347a Partial fix for PR1502: If a EH register is needed in a successor of landing pad, add it as livein to all the blocks in the paths between the landing pad and the specified block. 
llvm-svn: 37763
 2007-06-27 18:45:32 +00:00
Dan Gohman
cb89e19a6d Rename ("shrinkify") MVT::isExtendedValueType to MVT::isExtendedVT. 
llvm-svn: 37758
 2007-06-27 16:08:04 +00:00
Dan Gohman
c1c4b0972f Use getVectorTypeBreakdown in FunctionLoweringInfo::CreateRegForValue 
to compute the number and type of registers needed for vector values
instead of computing it manually. This fixes PR1529.

llvm-svn: 37755
 2007-06-27 14:34:07 +00:00
Dan Gohman
69a6154359 Make the comment for ScalarizeVectorOp mention that it is only for use 
with single-element vectors.

llvm-svn: 37752
 2007-06-27 14:06:22 +00:00
Dan Gohman
354f02e03d Generalize MVT::ValueType and associated functions to be able to represent 
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.

This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.

llvm-svn: 37719
 2007-06-25 16:23:39 +00:00
Dan Gohman
a62327ea40 Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from 
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.

llvm-svn: 37704
 2007-06-22 14:59:07 +00:00
Evan Cheng
85169b9b40 std::set is really really terrible. Switch to SmallPtrSet to reduce compile time. For Duraid's example. The overall isel time is reduced from 0.6255 sec to 0.1876 sec. 
llvm-svn: 37701
 2007-06-22 01:35:51 +00:00
Dan Gohman
72af1305fb Tidy up ValueType names in comments. 
llvm-svn: 37688
 2007-06-21 14:48:26 +00:00
Dan Gohman
1815e9bdb3 Rename TargetLowering::getNumElements and friends to 
TargetLowering::getNumRegisters and similar, to avoid confusion with
the actual number of elements for vector types.

llvm-svn: 37687
 2007-06-21 14:42:22 +00:00
Evan Cheng
f26fc091ac Xforms: 
(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))
(sub x, (select cc, 0, c)) -> (select cc, x, (sub, x, c))

llvm-svn: 37685
 2007-06-21 07:39:16 +00:00
Dan Gohman
485cb57eab Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration 
for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-specific nodes.

llvm-svn: 37656
 2007-06-19 14:13:56 +00:00
Chris Lattner
68f9f9fa3b add isVarArg to CCState 
llvm-svn: 37640
 2007-06-19 00:11:09 +00:00
Chris Lattner
5b93ff84b9 make ComputeTopDownOrdering significantly faster and use less stack space 
by making it non-recursive

llvm-svn: 37629
 2007-06-18 21:28:10 +00:00
Dan Gohman
46f036ccb0 Make chain dependencies blue, in addition to being dashed. 
llvm-svn: 37626
 2007-06-18 15:30:16 +00:00
Tanya Lattner
4c078c1ace Codegen support (stripped out) for the annotate attribute. 
llvm-svn: 37608
 2007-06-15 22:26:58 +00:00
Chris Lattner
c08e8abb53 Fix CodeGen/X86/inline-asm-x-scalar.ll:test4, by retaining regclass info 
for tied register constraints.

llvm-svn: 37601
 2007-06-15 19:11:01 +00:00
Duncan Sands
deef6fe78b Workaround for PR1508. 
llvm-svn: 37597
 2007-06-15 19:04:19 +00:00
Dan Gohman
2fd7d26df8 Rename MVT::getVectorBaseType to MVT::getVectorElementType. 
llvm-svn: 37579
 2007-06-14 22:58:02 +00:00
Duncan Sands
51e6294637 Only correctly lower exception handing intrinsics if exception handling is 
turned on.  Likewise for scanning of invokes to mark landing pads.

llvm-svn: 37570
 2007-06-13 16:53:21 +00:00
Dan Gohman
6415b2548e Introduce new SelectionDAG node opcodes VEXTRACT_SUBVECTOR and 
VCONCAT_VECTORS. Use these for CopyToReg and CopyFromReg legalizing in
the case that the full register is to be split into subvectors instead
of scalars. This replaces uses of VBIT_CONVERT to present values as
vector-of-vector types in order to make whole subvectors accessible via
BUILD_VECTOR and EXTRACT_VECTOR_ELT.

This is in preparation for adding extended ValueType values, where
having vector-of-vector types is undesirable.

llvm-svn: 37569
 2007-06-13 15:12:02 +00:00
Dan Gohman
3bc1455d49 When creating CopyFromReg nodes, always use legal types. And use the 
correct types for the result vector, even though it is currently bitcasted
to a different type immediately.

llvm-svn: 37568
 2007-06-13 14:55:16 +00:00
Duncan Sands
32eaa9b30a The fix that was applied for PR1224 stops the compiler 
crashing but breaks exception handling.  The problem
described in PR1224 is that invoke is a terminator that
can produce a value.  The value may be needed in other
blocks.  The code that writes to registers values needed
in other blocks runs before terminators are lowered (in
this case invoke) so asserted because the value was not
yet available.  The fix that was applied was to do invoke
lowering earlier, before writing values to registers.

The problem this causes is that the code to copy values
to registers can be output after the invoke call.  If
an exception is raised and control is passed to the
landing pad then this copy-code will never execute.  If
the value is needed in some code path reached via the
landing pad then that code will get something bogus.

So revert the original fix and simply skip invoke values
in the general copying to registers code.  Instead copy
the invoke value to a register in the invoke lowering code.

llvm-svn: 37567
 2007-06-13 05:51:31 +00:00
Dale Johannesen
0f3c011fd5 Do not change the size of function arguments. PR 1489. 
llvm-svn: 37496
 2007-06-07 21:07:15 +00:00
Duncan Sands
484bdb927b Additional fix for PR1422: make sure the landing pad label is placed in the 
correct machine basic block - do not rely on the eh.exception intrinsic
being in the landing pad: the loop optimizers can move it out.

llvm-svn: 37463
 2007-06-06 10:05:18 +00:00
Dan Gohman
e6c827b537 Pass the DAG to SDNode::dump to let it do more detailed dumps in some cases. 
llvm-svn: 37413
 2007-06-04 16:17:33 +00:00
Dan Gohman
b69321ca1d Resolve implicit alignment before computing the FoldingSet information so 
that the CSE map always contains explicit alignment information. This allows
more loads to be CSE'd when there is a mix of explicit-alignment loads and
implicit-alignment loads.

Also, in SelectionDAG::FindModifiedNodeSlot, add the operands to the
FoldingSetNodeID before the load/store information instead of after, so
that it matches what is done elsewhere.

llvm-svn: 37411
 2007-06-04 15:49:41 +00:00
Duncan Sands
37925d3f39 Integrate exception filter support and exception catch support. This 
simplifies the code in DwarfWriter, allows for multiple filters and
makes it trivial to specify filters accompanied by cleanups or catch-all
specifications (see next patch).  What a deal!  Patch blessed by Anton.

llvm-svn: 37398
 2007-06-02 16:53:42 +00:00
Duncan Sands
b1cc3f9881 Since TypeInfos are passed as i8 pointers, a NULL TypeInfo should be passed 
as a null i8 pointer not as a 0 i32.

llvm-svn: 37383
 2007-06-01 08:18:30 +00:00
Chris Lattner
14bcacb40b Fix CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll, and PR1473. 
llvm-svn: 37362
 2007-05-30 16:30:06 +00:00
Chris Lattner
5161203d52 tighten up recursion depth again 
llvm-svn: 37330
 2007-05-25 02:19:06 +00:00
Dan Gohman
2c5d31ee81 Minor comment cleanups. 
llvm-svn: 37321
 2007-05-24 14:36:04 +00:00
Dan Gohman
1b1932dda5 Add explicit qualification for namespace MVT members. 
llvm-svn: 37320
 2007-05-24 14:33:05 +00:00
Evan Cheng
439bf58dc2 Fix a typo that caused combiner to create mal-formed pre-indexed store where value store is the same as the base pointer. 
llvm-svn: 37318
 2007-05-24 02:35:39 +00:00
Anton Korobeynikov
0f184e86ab Mark all calls as "could throw", when exceptions are enabled. Emit necessary LP info too. This fixes PR1439 
llvm-svn: 37311
 2007-05-23 11:08:31 +00:00
Chris Lattner
d540c6429f prevent exponential recursion in isNegatibleForFree 
llvm-svn: 37310
 2007-05-23 07:35:22 +00:00
Chris Lattner
27b469b945 same patch as the previous one, but the symmetric case 
llvm-svn: 37249
 2007-05-19 00:46:51 +00:00
Chris Lattner
2430b7c4aa Disable the (A == (B-A)) -> 2*A == B xform when the sub has multiple uses (in 
this case, the xform introduces an extra operation).  This compiles
PowerPC/compare-duplicate.ll into:

_test:
        subf r2, r3, r4
        cmplw cr0, r2, r3
        bne cr0, LBB1_2 ;F

instead of:

_test:
        slwi r2, r3, 1
        subf r3, r3, r4
        cmplw cr0, r4, r2
        bne cr0, LBB1_2 ;F

This is target independent of course.

llvm-svn: 37246
 2007-05-19 00:43:44 +00:00
Dan Gohman
b593ad9fb0 Qualify calls to getTypeForValueType with MVT:: too. 
llvm-svn: 37233
 2007-05-18 18:41:29 +00:00
Dan Gohman
d6a33914fb Qualify several calls to functions in the MVT namespace, for consistency. 
llvm-svn: 37230
 2007-05-18 17:52:13 +00:00
Chris Lattner
910abfbfd1 disable MaskedValueIsZero, ComputeMaskedBits, and SimplifyDemandedBits for 
i128 integers.  The 64-bit masks are not wide enough to represent the results.
These should be converted to APInt someday.

llvm-svn: 37169
 2007-05-17 18:19:23 +00:00
Chris Lattner
d441344214 add expand support for ADDC/SUBC/ADDE/SUBE so we can codegen 128-bit add/sub on 32-bit (or less) targets 
llvm-svn: 37168
 2007-05-17 18:15:41 +00:00
Evan Cheng
3163b77d5e Add target hook to specify block size limit for if-conversion. 
llvm-svn: 37134
 2007-05-16 23:45:53 +00:00
Dale Johannesen
cc99a6fc32 Don't fold bitconvert(load) for preinc/postdec loads. Likewise stores. 
llvm-svn: 37130
 2007-05-16 22:45:30 +00:00
Chris Lattner
a18b36cf45 Use a ptr set instead of a linear search to unique TokenFactor operands. 
This fixes PR1423

llvm-svn: 37102
 2007-05-16 06:37:59 +00:00
Evan Cheng
a781c7788a Bug fix: should check ABI alignment, not pref. alignment. 
llvm-svn: 37094
 2007-05-16 02:04:50 +00:00
Lauro Ramos Venancio
251ea5ab65 Fix an infinite recursion in GetNegatedExpression. 
llvm-svn: 37086
 2007-05-15 17:05:43 +00:00
Chris Lattner
ba648e0d45 Fix some subtle issues handling immediate values. This fixes 
test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll

llvm-svn: 37069
 2007-05-15 01:33:58 +00:00
Chris Lattner
eba1b74df3 implement a simple fneg optimization/propagation thing. This compiles: 
CodeGen/PowerPC/fneg.ll into:

_t4:
        fmul f0, f3, f4
        fmadd f1, f1, f2, f0
        blr

instead of:

_t4:
        fneg f0, f3
        fmul f0, f0, f4
        fmsub f1, f1, f2, f0
        blr

llvm-svn: 37054
 2007-05-14 22:04:50 +00:00
Evan Cheng
649f25dad1 Can't fold the bit_convert is the store is a truncating store. 
llvm-svn: 36962
 2007-05-09 21:49:47 +00:00
Anton Korobeynikov
4423f1a3fd Do not assert, when case range split metric is zero and JTs are not allowed: just emit binary tree in this case. This 
fixes PR1403.

llvm-svn: 36959
 2007-05-09 20:07:08 +00:00
Evan Cheng
e18b87868d Forgot a check. 
llvm-svn: 36910
 2007-05-07 21:36:06 +00:00
Evan Cheng
18d994d6d6 Enable a couple of xforms: 
- (store (bitconvert v)) -> (store v) if resultant store does not require
higher alignment
- (bitconvert (load v)) -> (load (bitconvert*)v) if resultant load does not
require higher alignment

llvm-svn: 36908
 2007-05-07 21:27:48 +00:00
Duncan Sands
20a9ed0e20 Parameter attributes on invoke calls were being lost due to the wrong 
attribute index being used.  Fix proposed by Anton Korobeynikov, who
asked me to implement and commit it for him.  This is PR1398.

llvm-svn: 36906
 2007-05-07 20:49:28 +00:00
Anton Korobeynikov
3765489a61 Detabify 
llvm-svn: 36891
 2007-05-06 20:14:21 +00:00
Chris Lattner
d1534330ee Propagate alignment/volatility in two places. 
Implement support for expanding a bitcast from an illegal vector type to
a legal one (e.g. 4xi32 -> 4xf32 in SSE1).  This fixes PR1371 and
CodeGen/X86/2007-05-05-VecCastExpand.ll

llvm-svn: 36787
 2007-05-05 19:39:05 +00:00
Duncan Sands
f2323ca89c A bitcast of a global variable may have been constant folded to a GEP - 
handle this case too.

llvm-svn: 36745
 2007-05-04 17:12:26 +00:00
Evan Cheng
8c8b6ce116 Don't create indexed load / store with zero offset! 
llvm-svn: 36716
 2007-05-03 23:52:19 +00:00
Chris Lattner
e95894e9f9 Allow i/s to match (gv+c). This fixes CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll 
and PR1382

llvm-svn: 36672
 2007-05-03 16:54:34 +00:00
Devang Patel
cd45427a87 Drop 'const' 
llvm-svn: 36662
 2007-05-03 01:11:54 +00:00
Anton Korobeynikov
ca71b83e50 Properly set arguments bitwidth of EHSELECT node 
llvm-svn: 36654
 2007-05-02 22:15:48 +00:00
Devang Patel
8ee9065162 Use 'static const char' instead of 'static const int'. 
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.

llvm-svn: 36652
 2007-05-02 21:39:20 +00:00
Devang Patel
38a66bc82e Do not use typeinfo to identify pass in pass manager. 
llvm-svn: 36632
 2007-05-01 21:15:47 +00:00
Evan Cheng
6dc02c2b07 Forgot about chain result; also UNDEF cannot have multiple values. 
llvm-svn: 36622
 2007-05-01 08:53:39 +00:00
Evan Cheng
fe933cd6ca * Only turn a load to UNDEF if all of its outputs have no uses (indexed loads 
produce two results.)
* Do not touch volatile loads.

llvm-svn: 36604
 2007-05-01 00:38:21 +00:00
Chris Lattner
3b2c717e6a Continue refactoring inline asm code. If there is an earlyclobber output 
register, preallocate all input registers and the early clobbered output.

This fixes PR1357 and CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll

llvm-svn: 36599
 2007-04-30 21:11:17 +00:00
Chris Lattner
4ac6ba02d1 refactor GetRegistersForValue to take OpInfo as an argument instead of various 
pieces of it.  No functionality change.

llvm-svn: 36592
 2007-04-30 17:29:31 +00:00
Chris Lattner
e3f7f2afcb refactor some code, no functionality change 
llvm-svn: 36590
 2007-04-30 17:16:27 +00:00
Chris Lattner
087a1aaaab generalize aggregate handling 
llvm-svn: 36568
 2007-04-29 18:58:03 +00:00
Chris Lattner
85e1cac6b7 memory operands that have a direct operand should have their stores created 
before the copies into physregs are done.  This avoids having flag operands
skip the store, causing cycles in the dag at sched time.  This fixes infinite
loops on these tests:

test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll for PR1308
test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll
test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll for PR828

llvm-svn: 36547
 2007-04-28 21:12:06 +00:00
Chris Lattner
97d396d928 eliminate more redundant constraint type analysis 
llvm-svn: 36546
 2007-04-28 21:03:16 +00:00
Chris Lattner
4153538017 merge constraint type analysis stuff together. 
llvm-svn: 36545
 2007-04-28 21:01:43 +00:00
Chris Lattner
0e0d379b5d Significant refactoring of the inline asm stuff, to support future changes. 
No functionality change.

llvm-svn: 36544
 2007-04-28 20:49:53 +00:00
Chris Lattner
4c7178e326 memory inputs to an inline asm are required to have an address available. 
If the operand is not already an indirect operand, spill it to a constant
pool entry or a stack slot.

This fixes PR1356 and CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll

llvm-svn: 36536
 2007-04-28 06:42:38 +00:00
Chris Lattner
0e2a4a7890 Fix CodeGen/Generic/2007-04-27-LargeMemObject.ll and 
CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll

llvm-svn: 36534
 2007-04-28 06:08:13 +00:00
Chris Lattner
0a0983b493 Fix this to match change to InlineAsm class. 
llvm-svn: 36524
 2007-04-28 04:05:59 +00:00
Chris Lattner
51c23d862d Fix incorrect legalization of EHSELECTOR. This fixes 
CodeGen/Generic/2007-04-14-EHSelectorCrash.ll and PR1326

llvm-svn: 36510
 2007-04-27 17:12:52 +00:00
Evan Cheng
96a4c5fb05 Expand UINT_TO_FP in turns of SINT_TO_FP when UINTTOFP_* libcalls are not available. 
llvm-svn: 36501
 2007-04-27 07:33:31 +00:00
Chris Lattner
eef11c75d4 improve EH global handling, patch by Duncan Sands. 
llvm-svn: 36499
 2007-04-27 01:20:11 +00:00
Chris Lattner
92bff16acb enable Anton's shift/and switch lowering stuff! It now passes ppc bootstrap 
successfully! woohoo...

llvm-svn: 36496
 2007-04-26 21:09:43 +00:00
Anton Korobeynikov
3e0f9076d0 Fixx off-by-one bug, which prevents llvm-gcc bootstrap on ppc32 
llvm-svn: 36490
 2007-04-26 20:44:04 +00:00
Dan Gohman
bda4470e76 Fix a typo in a comment. 
llvm-svn: 36485
 2007-04-26 19:40:56 +00:00
Evan Cheng
c713a5ea36 This was lefted out. Fixed sumarray-dbl. 
llvm-svn: 36445
 2007-04-25 18:33:21 +00:00
Chris Lattner
8860742825 allow support for 64-bit stack objects 
llvm-svn: 36420
 2007-04-25 04:08:28 +00:00
Chris Lattner
64bb6c0a08 Be more careful about folding op(x, undef) when we have vector operands. 
This fixes CodeGen/X86/2007-04-24-VectorCrash.ll

llvm-svn: 36413
 2007-04-25 00:00:45 +00:00
Bill Wendling
b3b0427654 Assertion when using a 1-element vector for an add operation. Get the 
real vector type in this case.

llvm-svn: 36402
 2007-04-24 21:13:23 +00:00
Scott Michel
5a33297ae3 Use '-1U' where '-1UL' is obvious overkill, eliminating gcc warnings about 
tests always being true in the process.

llvm-svn: 36387
 2007-04-24 01:24:20 +00:00
Christopher Lamb
a157874a8a PR400 phase 2. Propagate attributed load/store information through DAGs. 
llvm-svn: 36356
 2007-04-22 23:15:30 +00:00
Lauro Ramos Venancio
3b60b9546e X86 TLS: Implement review feedback. 
llvm-svn: 36318
 2007-04-21 20:56:26 +00:00
Reid Spencer
81070d52da Revert Christopher Lamb's load/store alignment changes. 
llvm-svn: 36309
 2007-04-21 18:36:27 +00:00
Christopher Lamb
b56b6a7ad7 add support for alignment attributes on load/store instructions 
llvm-svn: 36301
 2007-04-21 08:16:25 +00:00
Lauro Ramos Venancio
a6bb7b3907 Allow the lowering of ISD::GLOBAL_OFFSET_TABLE. 
llvm-svn: 36290
 2007-04-20 23:02:39 +00:00
Lauro Ramos Venancio
bc32d90b46 Implement "general dynamic", "initial exec" and "local exec" TLS models for 
X86 32 bits.

llvm-svn: 36283
 2007-04-20 21:38:10 +00:00
Chris Lattner
ea3c945817 allow SRL to simplify its operands, as it doesn't demand all bits as input. 
llvm-svn: 36245
 2007-04-18 03:06:49 +00:00
Chris Lattner
4ce8602d58 When replacing a node in SimplifyDemandedBits, if the old node used any 
single-use nodes, they will be dead soon.  Make sure to remove them before
processing other nodes.  This implements CodeGen/X86/shl_elim.ll

llvm-svn: 36244
 2007-04-18 03:05:22 +00:00
Chris Lattner
639f807048 fix a pasto 
llvm-svn: 36242
 2007-04-18 03:01:40 +00:00
Chris Lattner
1677782ef0 Fix a bug in my previous patch, grabbing the shift amount width from the 
wrong operand.

llvm-svn: 36223
 2007-04-17 22:53:02 +00:00
Chris Lattner
b55496c660 Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used. 
This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }

into:
_baz:
        srwi r2, r3, 1
        extsh r3, r2
        blr

on PPC, instead of:
_baz:
        slwi r2, r3, 8
        srwi r2, r2, 9
        extsh r3, r2
        blr

GCC produces:
_baz:
        srwi r10,r4,24
        insrwi r10,r3,24,0
        srawi r9,r3,24
        srawi r3,r10,9
        extsh r3,r3
        blr

This implements CodeGen/PowerPC/shl_elim.ll

llvm-svn: 36221
 2007-04-17 21:14:16 +00:00
Chris Lattner
9ad682ad80 SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBits 
a chance to hack on it.  This compiles:

int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }

into:
_baz:
        slwi r2, r3, 8
        srwi r2, r2, 9
        extsh r3, r2
        blr

instead of:

_baz:
        srwi r2, r4, 24
        rlwimi r2, r3, 8, 0, 23
        srwi r2, r2, 9
        extsh r3, r2
        blr

This implements CodeGen/PowerPC/sign_ext_inreg1.ll

llvm-svn: 36212
 2007-04-17 19:03:21 +00:00
Anton Korobeynikov
f3e62a428a Removed tabs everywhere except autogenerated & external files. Add make 
target for tabs checking.

llvm-svn: 36146
 2007-04-16 18:10:23 +00:00
Chris Lattner
357a11fcbb disable switch lowering using shift/and. It still breaks ppc bootstrap for 
some reason.  :(  Will investigate.

llvm-svn: 36011
 2007-04-14 19:39:41 +00:00
Anton Korobeynikov
bdb4f560da Fix PR1325: Case range optimization was performed in the case it 
shouldn't. Also fix some "latent" bug on 64-bit platforms

llvm-svn: 35990
 2007-04-14 13:25:55 +00:00
Chris Lattner
6e71d21892 disable shift/and lowering to work around PR1325 for now. 
llvm-svn: 35985
 2007-04-14 02:26:56 +00:00
Anton Korobeynikov
5bb6590218 Fix PR1323 : we haven't updated phi nodes in good manner :) 
llvm-svn: 35963
 2007-04-13 06:53:51 +00:00
Chris Lattner
0da8de5848 the result of an inline asm copy can be an arbitrary VT that the register 
class supports.  In the case of vectors, this means we often get the wrong
type (e.g. we get v4f32 instead of v8i16).  Make sure to convert the vector
result to the right type.  This fixes CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll

llvm-svn: 35944
 2007-04-12 06:00:20 +00:00
Chris Lattner
7acaf64d70 fold noop vbitconvert instructions 
llvm-svn: 35943
 2007-04-12 05:58:43 +00:00
Chris Lattner
2f221a83ec Fix weirdness handling single element vectors. 
llvm-svn: 35941
 2007-04-12 04:44:28 +00:00
Reid Spencer
82da0eb67c For PR1284: 
Implement the "part_set" intrinsic.

llvm-svn: 35938
 2007-04-12 02:48:46 +00:00
Chris Lattner
f29ad16397 fix an infinite loop compiling ldecod, notice by JeffC. 
llvm-svn: 35910
 2007-04-11 16:51:53 +00:00
Chris Lattner
1d20292190 Fix this harder. 
llvm-svn: 35888
 2007-04-11 06:50:51 +00:00
Chris Lattner
01ebc25b36 don't create shifts by zero, fix some problems with my previous patch 
llvm-svn: 35887
 2007-04-11 06:43:25 +00:00
Chris Lattner
0289490285 Teach the codegen to turn [aez]ext (setcc) -> selectcc of 1/0, which often 
allows other simplifications.  For example, this compiles:
int isnegative(unsigned int X) {
   return !(X < 2147483648U);
}

Into this code:

x86:
        movl 4(%esp), %eax
        shrl $31, %eax
        ret
arm:
        mov r0, r0, lsr #31
        bx lr
thumb:
        lsr r0, r0, #31
        bx lr

instead of:

x86:
        cmpl $0, 4(%esp)
        sets %al
        movzbl %al, %eax
        ret

arm:
        mov r3, #0
        cmp r0, #0
        movlt r3, #1
        mov r0, r3
        bx lr

thumb:
        mov r2, #1
        mov r1, #0
        cmp r0, #0
        blt LBB1_2      @entry
LBB1_1: @entry
        cpy r2, r1
LBB1_2: @entry
        cpy r0, r2
        bx lr

Testcase here: test/CodeGen/Generic/ispositive.ll

llvm-svn: 35883
 2007-04-11 05:32:27 +00:00
Chris Lattner
3f0e49403c Codegen integer abs more efficiently using the trick from the PPC CWG. This 
improves codegen on many architectures.  Tests committed as CodeGen/*/iabs.ll

X86 Old:			X86 New:
_test:				_test:
   movl 4(%esp), %ecx		   movl 4(%esp), %eax
   movl %ecx, %eax		   movl %eax, %ecx
   negl %eax			   sarl $31, %ecx
   testl %ecx, %ecx		   addl %ecx, %eax
   cmovns %ecx, %eax		   xorl %ecx, %eax
   ret				   ret

PPC Old:			PPC New:
_test:				_test:
   cmpwi cr0, r3, -1		   srawi r2, r3, 31
   neg r2, r3			   add r3, r3, r2
   bgt cr0, LBB1_2 ;		   xor r3, r3, r2
LBB1_1: ;			   blr
   mr r3, r2
LBB1_2: ;
   blr

ARM Old:			ARM New:
_test:				_test:
   rsb r3, r0, #0		   add r3, r0, r0, asr #31
   cmp r0, #0			   eor r0, r3, r0, asr #31
   movge r3, r0			   bx lr
   mov r0, r3
   bx lr

Thumb Old:			Thumb New:
_test:				_test:
   neg r2, r0			   asr r2, r0, #31
   cmp r0, #0			   add r0, r0, r2
   bge LBB1_2			   eor r0, r2
LBB1_1: @			   bx lr
   cpy r0, r2
LBB1_2: @
   bx lr


Sparc Old:			Sparc New:
test:				test:
   save -96, %o6, %o6		   save -96, %o6, %o6
   sethi 0, %l0			   sra %i0, 31, %l0
   sub %l0, %i0, %l0		   add %i0, %l0, %l1
   subcc %i0, -1, %l1		   xor %l1, %l0, %i0
   bg .BB1_2			   restore %g0, %g0, %g0
   nop				   retl
.BB1_1:				   nop
   or %g0, %l0, %i0
.BB1_2:
   restore %g0, %g0, %g0
   retl
   nop

It also helps alpha/ia64 :)

llvm-svn: 35881
 2007-04-11 05:11:38 +00:00
Reid Spencer
2792e203c5 For PR1146: 
Put the parameter attributes in their own ParamAttr name space. Adjust the
rest of llvm as a result.

llvm-svn: 35877
 2007-04-11 02:44:20 +00:00
Chris Lattner
e2444f7ec8 apparently some people commit without building the tree, or they forget to 
commit a LOT of files.

llvm-svn: 35858
 2007-04-10 03:20:39 +00:00
Jeff Cohen
bd7d060e79 No longer needed. 
llvm-svn: 35850
 2007-04-09 23:42:32 +00:00
Chris Lattner
461f7ed33b remove dead target hooks. 
llvm-svn: 35847
 2007-04-09 23:34:08 +00:00
Chris Lattner
ae6e2c0ee5 remove some dead target hooks, subsumed by isLegalAddressingMode 
llvm-svn: 35840
 2007-04-09 22:27:04 +00:00
Anton Korobeynikov
6e6b2d493a Use integer log for metric calculation 
llvm-svn: 35834
 2007-04-09 21:57:03 +00:00
Jeff Cohen
b3d61e6c05 Unbreak VC++ build. 
llvm-svn: 35817
 2007-04-09 14:32:59 +00:00
Anton Korobeynikov
6ee97ee42a Next stage into switch lowering refactoring 
1. Fix some bugs in the jump table lowering threshold
2. Implement much better metric for optimal pivot selection
3. Tune thresholds for different lowering methods
4. Implement shift-and trick for lowering small (<machine word
length) cases with few destinations. Good testcase will follow.

llvm-svn: 35816
 2007-04-09 12:31:58 +00:00
Reid Spencer
2660b8dccb For PR1146: 
Adapt handling of parameter attributes to use the new ParamAttrsList class.

llvm-svn: 35814
 2007-04-09 06:17:21 +00:00
Chris Lattner
13a530ec7f implement CodeGen/X86/inline-asm-x-scalar.ll:test3 
llvm-svn: 35802
 2007-04-09 05:31:20 +00:00
Chris Lattner
c360f69afe add some assertions 
llvm-svn: 35800
 2007-04-09 05:23:13 +00:00
Chris Lattner
5f8b0c2acc Fix PR1316 
llvm-svn: 35783
 2007-04-09 00:33:58 +00:00
Chris Lattner
f9506a185b Fix for CodeGen/X86/2007-04-08-InlineAsmCrash.ll and PR1314 
llvm-svn: 35779
 2007-04-08 22:23:26 +00:00
Chris Lattner
b39a2df066 minor comment fix 
llvm-svn: 35696
 2007-04-06 17:47:14 +00:00
Reid Spencer
aad0b4536b Change the bit_part_select (non)implementation from "return 0" to abort. 
llvm-svn: 35679
 2007-04-05 01:20:18 +00:00
Reid Spencer
6eb55df794 Implement the llvm.bit.part_select.iN.iN.iN overloaded intrinsic. 
llvm-svn: 35678
 2007-04-04 23:48:25 +00:00
Anton Korobeynikov
e16f421e0e Properly emit range comparisons for switch cases, where neighbour cases 
go to the same destination. Now we're producing really good code for
switch-lower-feature.ll testcase

llvm-svn: 35672
 2007-04-04 21:14:49 +00:00
Scott Michel
d6b3d3d6ab 1. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL. 
2. Help DAGCombiner recognize zero/sign/any-extended versions of ROTR and ROTL
patterns. This was motivated by the X86/rotate.ll testcase, which should now
generate code for other platforms (and soon-to-come platforms.) Rewrote code
slightly to make it easier to read.

llvm-svn: 35605
 2007-04-02 21:36:32 +00:00
Reid Spencer
4a28a16efb For PR1297: 
Adjust for changes in the bit counting intrinsics. They all return i32
now so we have to trunc/zext the DAG node accordingly.

llvm-svn: 35546
 2007-04-01 07:34:11 +00:00
Reid Spencer
77c46f6cf5 For PR1297: 
Change getOperationName to return std::string instead of const char*

llvm-svn: 35545
 2007-04-01 07:32:19 +00:00
Chris Lattner
f01b0a800b move a bunch of code out of the sdisel pass into its own opt pass "codegenprepare". 
llvm-svn: 35529
 2007-03-31 04:18:03 +00:00
Chris Lattner
8747705792 switch TL::getValueType to use MVT::getValueType. 
llvm-svn: 35527
 2007-03-31 04:05:24 +00:00
Chris Lattner
143464e05f add one addressing mode description hook to rule them all. 
llvm-svn: 35520
 2007-03-30 23:14:50 +00:00
Dale Johannesen
d4ab7d28e9 Fix incorrect combination of different loads. Reenable zext-over-truncate 
combination.

llvm-svn: 35517
 2007-03-30 21:38:07 +00:00
Evan Cheng
2d09850760 Disable load width reduction xform of variant (zext (truncate load x)) for 
big endian targets until llvm-gcc build issue has been resolved.

llvm-svn: 35449
 2007-03-29 07:56:46 +00:00
Evan Cheng
13cc34e91b Scale 1 is always ok. 
llvm-svn: 35407
 2007-03-28 01:55:52 +00:00
Evan Cheng
a55449c051 Remove isLegalAddressImmediate. 
llvm-svn: 35406
 2007-03-28 01:53:55 +00:00
Evan Cheng
6056fd729d GEP index sinking fixes: 
1) Take address scale into consideration. e.g. i32* -> scale 4.
2) Examine all the users of GEP.
3) Generalize to inter-block GEP's (no longer uses loopinfo).
4) Don't do xform if GEP has other variable index(es).

llvm-svn: 35403
 2007-03-28 01:49:39 +00:00
Anton Korobeynikov
64622a0ddf Remove dead code 
llvm-svn: 35380
 2007-03-27 12:05:48 +00:00
Anton Korobeynikov
b58a93156f Split big monster into small helpers. No functionality change. 
llvm-svn: 35379
 2007-03-27 11:29:11 +00:00
Evan Cheng
7218d782fe SDISel does not preserve all, it changes CFG and other info. 
llvm-svn: 35376
 2007-03-27 00:53:36 +00:00
Evan Cheng
5b1c21d27b SIGN_EXTEND_INREG requires one extra operand, a ValueType node. 
llvm-svn: 35350
 2007-03-26 07:12:51 +00:00
Anton Korobeynikov
6f78c59650 First step of switch lowering refactoring: perform worklist-driven 
strategy, emit JT's where possible.

llvm-svn: 35338
 2007-03-25 15:07:15 +00:00
Chris Lattner
6f17a615cb Implement support for vector operands to inline asm, implementing 
CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll

llvm-svn: 35332
 2007-03-25 05:00:54 +00:00
Chris Lattner
4a7feb72f5 implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll 
llvm-svn: 35327
 2007-03-25 04:35:41 +00:00
Chris Lattner
91adfbe0ff Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll 
llvm-svn: 35324
 2007-03-25 02:18:14 +00:00
Chris Lattner
b19069959d switch TargetLowering::getConstraintType to take the entire constraint, 
not just the first letter.  No functionality change.

llvm-svn: 35322
 2007-03-25 02:14:49 +00:00
Chris Lattner
57d0c197e6 don't rely on ADL 
llvm-svn: 35299
 2007-03-24 17:37:03 +00:00
Evan Cheng
a484f31d4b Adjust offset to compensate for big endian machines. 
llvm-svn: 35293
 2007-03-24 00:02:43 +00:00
Evan Cheng
84aecc56e7 Make sure SEXTLOAD of the specific type is supported on the target. 
llvm-svn: 35289
 2007-03-23 22:13:36 +00:00
Evan Cheng
7dd7666120 Also replace uses of SRL if that's also folded during ReduceLoadWidth(). 
llvm-svn: 35286
 2007-03-23 20:55:21 +00:00
Evan Cheng
62ccdaea67 A couple of bug fixes for reducing load width xform: 
1. Address offset is in bytes.
2. Make sure truncate node uses are replaced with new load.

llvm-svn: 35274
 2007-03-23 02:16:52 +00:00
Dan Gohman
d0a0ea9916 Change uses of Function::front to Function::getEntryBlock for readability. 
llvm-svn: 35265
 2007-03-22 16:38:57 +00:00
Evan Cheng
d7be4893f4 More opportunities to reduce load size. 
llvm-svn: 35254
 2007-03-22 01:54:19 +00:00
Dale Johannesen
44c0a5d545 repair x86 performance, dejagnu problems from previous change 
llvm-svn: 35245
 2007-03-21 21:51:52 +00:00
Evan Cheng
9867632e64 fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits)) 
llvm-svn: 35239
 2007-03-21 20:14:05 +00:00
Dale Johannesen
3e422e3b49 do not share old induction variables when this would result in invalid 
instructions (that would have to be split later)

llvm-svn: 35227
 2007-03-20 21:54:54 +00:00
Jeff Cohen
8dea6ada6f Fix some VC++ warnings. 
llvm-svn: 35224
 2007-03-20 20:43:18 +00:00
Lauro Ramos Venancio
632ac0e289 Code clean up. 
llvm-svn: 35220
 2007-03-20 20:09:03 +00:00
Evan Cheng
fe301e0f29 Minor bug. 
llvm-svn: 35219
 2007-03-20 19:32:11 +00:00
Lauro Ramos Venancio
9659c8befc CopyToReg source operand can be a physical register. 
llvm-svn: 35213
 2007-03-20 16:46:44 +00:00
Evan Cheng
65d69fe08d Use SmallSet instead of std::set. 
llvm-svn: 35133
 2007-03-17 08:53:30 +00:00
Evan Cheng
8552300ab1 If sdisel has decided to sink GEP index expression into any BB. Replace all uses 
in that BB.

llvm-svn: 35132
 2007-03-17 08:22:49 +00:00
Evan Cheng
77099bef05 Turn on GEP index sinking by default. 
llvm-svn: 35127
 2007-03-16 18:32:30 +00:00
Evan Cheng
449900b988 Stupid bug. 
llvm-svn: 35126
 2007-03-16 17:50:20 +00:00
Evan Cheng
c3e7d4b884 Sink a binary expression into its use blocks if it is a loop invariant 
computation used as GEP indexes and if the expression can be folded into
target addressing mode of GEP load / store use types.

llvm-svn: 35123
 2007-03-16 08:46:27 +00:00
Evan Cheng
ce8b779c6c Added isLegalAddressExpression hook to test if the given expression can be 
folded into target addressing mode for the given type.

llvm-svn: 35121
 2007-03-16 08:42:32 +00:00
Evan Cheng
dc6ba035bc Estimate a cost using the possible number of scratch registers required and use 
it as a late BURR scheduling tie-breaker.
Intuitively, it's good to push down instructions whose results are liveout so
their long live ranges won't conflict with other values which are needed inside
the BB. Further prioritize liveout instructions by the number of operands which
are calculated within the BB.

llvm-svn: 35109
 2007-03-14 22:43:40 +00:00
Evan Cheng
399f56eac2 Try schedule def + use closer whne Sethi-Ullman numbers are the same. 
e.g.
t1 = op t2, c1
t3 = op t4, c2
and the following instructions are both ready.
t2 = op c3
t4 = op c4

Then schedule t2 = op first.
i.e.
t4 = op c4
t2 = op c3
t1 = op t2, c1
t3 = op t4, c2

This creates more short live intervals which work better with the register
allocator.

llvm-svn: 35089
 2007-03-13 23:25:11 +00:00
Evan Cheng
b2a5499d86 More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. 
llvm-svn: 35076
 2007-03-12 23:37:10 +00:00
Chris Lattner
dfe5b3bd1d implement support for floating point constants used as inline asm memory operands. 
llvm-svn: 35033
 2007-03-08 22:29:47 +00:00
Chris Lattner
7e516796f6 make this fail even in non-assert builds. 
llvm-svn: 35025
 2007-03-08 07:07:03 +00:00
Anton Korobeynikov
85d6c1ebad Refactoring of formal parameter flags. Enable properly use of 
zext/sext/aext stuff.

llvm-svn: 35008
 2007-03-07 16:25:09 +00:00
Evan Cheng
2f55532e84 Avoid combining indexed load further. 
llvm-svn: 35005
 2007-03-07 08:07:03 +00:00
Chris Lattner
cf70993bba big endian 32-bit systems (e.g. ppc32) want to return the high reg first, not 
the lo-reg first.  This is fallout from my ppc calling conv change yesterday,
it fixes test/ExecutionEngine/2003-05-06-LivenessClobber.llx

llvm-svn: 34983
 2007-03-06 20:01:06 +00:00
Anton Korobeynikov
4558f01db9 Enumerate SDISel formal parameter attributes. Make use of new 
enumeration.

llvm-svn: 34960
 2007-03-06 06:10:33 +00:00
Jeff Cohen
98c99a3a02 Unbreak VC++ build. 
llvm-svn: 34917
 2007-03-05 00:00:42 +00:00
Chris Lattner
8c7d418eaf fold away addc nodes when we know there cannot be a carry-out. 
llvm-svn: 34913
 2007-03-04 20:40:38 +00:00
Chris Lattner
7021449d8b generalize 
llvm-svn: 34910
 2007-03-04 20:08:45 +00:00
Chris Lattner
06e4ea2b21 canonicalize constants to the RHS of addc/adde. If nothing uses the carry out of 
addc, turn it into add.

This allows us to compile:

long long test(long long A, unsigned B) {
  return (A + ((long long)B << 32)) & 123;
}

into:

_test:
        movl $123, %eax
        andl 4(%esp), %eax
        xorl %edx, %edx
        ret

instead of:
_test:
        xorl %edx, %edx
        movl %edx, %eax
        addl 4(%esp), %eax   ;; add of zero
        andl $123, %eax
        ret

llvm-svn: 34909
 2007-03-04 20:03:15 +00:00
Chris Lattner
bac1a46d92 eliminate some ops if they have an undef RHS 
llvm-svn: 34908
 2007-03-04 20:01:46 +00:00
Chris Lattner
9c1328fdbb Fix CodeGen/Generic/fpowi-promote.ll and PR1239 
llvm-svn: 34893
 2007-03-03 23:43:21 +00:00
Chris Lattner
4275ffd6ff Add an expand action for ISD label which just deletes the label. 
This "fixes" PR1238.

llvm-svn: 34890
 2007-03-03 19:21:38 +00:00
Jim Laskey
5f932644e9 Lower eh filter intrinsic. 
llvm-svn: 34802
 2007-03-01 20:24:30 +00:00
Jim Laskey
6dd0f88e75 Chain is on second operand. 
llvm-svn: 34759
 2007-02-28 20:43:58 +00:00
Jim Laskey
83d6baee5b MERGE_VALUES unnecessary. 
llvm-svn: 34750
 2007-02-28 18:37:04 +00:00
Chris Lattner
6d383bd2f1 add methods for analysis of call results and return nodes. 
llvm-svn: 34738
 2007-02-28 07:09:40 +00:00
Chris Lattner
a68a949ba5 add methods to analyze calls and formals. 
llvm-svn: 34736
 2007-02-28 06:56:37 +00:00
Chris Lattner
11a1c2113c Minor refactoring of CC Lowering interfaces 
llvm-svn: 34656
 2007-02-27 05:13:54 +00:00
Chris Lattner
e34136f6d5 move CC Lowering stuff to its own public interface 
llvm-svn: 34655
 2007-02-27 04:43:02 +00:00
Chris Lattner
65de507797 Fold (sext (truncate x)) more aggressively, by avoiding creation of a 
sextinreg if not needed.   This is useful in two cases: before legalize,
it avoids creating a sextinreg that will be trivially removed.  After legalize
if the target doesn't support sextinreg, the trunc/sext would not have been
removed before.

llvm-svn: 34621
 2007-02-26 03:13:59 +00:00
Chris Lattner
38db1ad2ab track signedness of formal argument, though we have a fixme here. 
llvm-svn: 34620
 2007-02-26 02:56:58 +00:00
Jim Laskey
c2e9ceb475 Fix for PR1224. 
llvm-svn: 34610
 2007-02-25 21:43:59 +00:00
Chris Lattner
a9c561b9e6 optimize duplicate ValueMap lookups 
llvm-svn: 34599
 2007-02-25 18:40:32 +00:00
Chris Lattner
e9c4c19b27 fold trivial token factor nodes. This allows us to compile 
test/CodeGen/X86/fp-stack-ret.ll into:

        movl 4(%esp), %eax
        fldl (%eax)
        ret

instead of:

        subl $12, %esp
        movl 16(%esp), %eax
        movsd (%eax), %xmm0
        movsd %xmm0, (%esp)
        fldl (%esp)
        addl $12, %esp
        ret

by eliminating a token factor that blocked a check.

llvm-svn: 34584
 2007-02-25 08:24:27 +00:00
Chris Lattner
b9f2992e38 initialize a instance variable 
llvm-svn: 34567
 2007-02-25 01:28:05 +00:00
Jim Laskey
53e71a9657 Deal with cases when MMI is not requested. 
llvm-svn: 34556
 2007-02-24 09:45:44 +00:00
Jim Laskey
10c6c6b46d Drop unused operand. 
llvm-svn: 34555
 2007-02-24 09:44:17 +00:00
Chris Lattner
6faf9e8e97 Fix CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll and PR1219 
llvm-svn: 34551
 2007-02-24 02:09:29 +00:00
Jim Laskey
dda4a7577f Handle improper cast. 
llvm-svn: 34535
 2007-02-23 21:45:01 +00:00
Jim Laskey
f29366635a Need to init. 
llvm-svn: 34499
 2007-02-22 18:04:49 +00:00
Jim Laskey
f6f24530c0 Tighten up error checking of args. 
llvm-svn: 34493
 2007-02-22 16:10:05 +00:00
Jim Laskey
dccc6d3a82 Handle lowering invoke to call correctly. 
llvm-svn: 34492
 2007-02-22 15:38:06 +00:00
Jim Laskey
655bea55fe Simplify lowering and selection of exception ops. 
llvm-svn: 34491
 2007-02-22 15:37:19 +00:00
Jim Laskey
58eaac9160 Selection and lowering for exception handling. 
llvm-svn: 34481
 2007-02-21 22:53:45 +00:00
Chris Lattner
8f3acb68cb print target nodes nicely 
llvm-svn: 34369
 2007-02-17 06:38:37 +00:00
Chris Lattner
871a3e6c91 Implement i/n/s constraints correctly. This fixes 
test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll

llvm-svn: 34368
 2007-02-17 06:00:35 +00:00
Chris Lattner
c3d976fb65 fix indentation 
llvm-svn: 34307
 2007-02-15 18:19:15 +00:00
Chris Lattner
c4bca38e6e Apply B Scott Michel's patch for PR1184, which improves diagnostics in an 
abort case.

llvm-svn: 34306
 2007-02-15 18:17:56 +00:00
Reid Spencer
e7ff3305d6 For PR1195: 
Change use of "packed" term to "vector" in comments, strings, variable
names, etc.

llvm-svn: 34300
 2007-02-15 03:39:18 +00:00
Reid Spencer
55e4e98a2a For PR1195: 
Rename PackedType -> VectorType, ConstantPacked -> ConstantVector, and
PackedTyID -> VectorTyID. No functional changes.

llvm-svn: 34293
 2007-02-15 02:26:10 +00:00
Chris Lattner
f9ef252d00 fix a warning 
llvm-svn: 34272
 2007-02-14 07:34:56 +00:00
Chris Lattner
0c973a02d9 Refix CodeGen/Generic/switch-lower.ll. In contrast to my previous patch, 
this doesn't miscompile lots of programs :)

llvm-svn: 34268
 2007-02-14 07:18:16 +00:00
Chris Lattner
5cece73ec8 Generalize TargetData strings, to support more interesting forms of data. 
Patch by Scott Michel.

llvm-svn: 34266
 2007-02-14 05:52:17 +00:00
Chris Lattner
1b57f8bbdf implement expand of truncate. This allows truncates from i128 to i64 to 
be supported on 32-bit hosts.

llvm-svn: 34257
 2007-02-13 23:55:16 +00:00
Chris Lattner
c305c08493 Fix PR1198, by adding initial i128 support. Patch by Dan Gohman. 
llvm-svn: 34256
 2007-02-13 23:41:38 +00:00
Chris Lattner
656f6a6fdd revert my previous switch lowering change, which miscompiles a few programs. 
This will break a dj test until I have time to investigate.

llvm-svn: 34247
 2007-02-13 20:09:07 +00:00
Lauro Ramos Venancio
7465000f94 Add a space between // and the comment. 
llvm-svn: 34244
 2007-02-13 18:10:13 +00:00
Lauro Ramos Venancio
4aecadf112 Add "original alignment" to function arguments flags. 
llvm-svn: 34240
 2007-02-13 13:50:08 +00:00
Chris Lattner
9ea0b706d9 Fix switch lowering to order cases in zext order, which is how we emit the 
comparisons.  This fixes an infinite loop on CodeGen/Generic/switch-lower.ll
and PR1197

llvm-svn: 34216
 2007-02-13 01:05:56 +00:00
Chris Lattner
9dafd9fe90 Privatize StructLayout::MemberOffsets, adding an accessor 
llvm-svn: 34156
 2007-02-10 19:55:17 +00:00
Evan Cheng
a86214b294 Add function live-ins to entry block live-in set. 
llvm-svn: 34112
 2007-02-10 02:43:39 +00:00
Evan Cheng
14f837357e Rename some variables to avoid confusion with SelectionDAGISel::BB. 
llvm-svn: 34110
 2007-02-10 01:08:18 +00:00
Evan Cheng
14f4a6715d Make use of TLI.SimplifySetCC() in LegalizeSetCCOperands(). 
llvm-svn: 34066
 2007-02-08 22:16:19 +00:00
Evan Cheng
1b155ac243 Move SimplifySetCC to TargetLowering and allow it to be shared with legalizer. 
llvm-svn: 34065
 2007-02-08 22:13:59 +00:00
Chris Lattner
15fb4ef992 switch the VRBaseMap in the scheduler from an std::map to a DenseMap. This 
speeds up the isel pass from 2.5570s to 2.4722s on kc++ (3.4%).

llvm-svn: 33879
 2007-02-04 08:47:20 +00:00
Chris Lattner
59d7c680b5 Introduce new UnarySDNode/BinarySDNode/TernarySDNode nodes, which coallocate 
their operands with the node itself.  This reduces malloc traffic for operand
lists.  This reduces isel time on kc++ from 2.6164 to 2.5570s, about 2.3%.

llvm-svn: 33878
 2007-02-04 08:35:21 +00:00
Chris Lattner
dcdf1edd93 eliminate the SDNode::setValueTypes method. 
llvm-svn: 33876
 2007-02-04 07:37:24 +00:00
Chris Lattner
2b6734a983 eliminate a bunch of duplicate ctors and helper functions. 
llvm-svn: 33875
 2007-02-04 07:28:00 +00:00
Chris Lattner
8bbd45cd6e move MorphNode to out of line and merge setNodeOperands into it. There is 
no behavior or performance change here.

llvm-svn: 33869
 2007-02-04 02:49:29 +00:00
Chris Lattner
ccd1f36346 simplify MorphNodeTo to take a VTList operand. 
llvm-svn: 33868
 2007-02-04 02:41:42 +00:00
Chris Lattner
7e8b8e7a68 eliminate some extraneous methods in SDNode 
llvm-svn: 33867
 2007-02-04 02:32:44 +00:00
Chris Lattner
f3b4a0cc95 Give each selectiondag node class a home for it's vtable and rtti info 
llvm-svn: 33866
 2007-02-04 02:23:32 +00:00
Chris Lattner
1d3dd991ca Switch VAlueMap from std::map to DenseMap. 
llvm-svn: 33863
 2007-02-04 01:35:11 +00:00
Chris Lattner
e5eccb6d76 Switch NodeMap from std::map to DenseMap, this speeds up isel by 2.3% 
llvm-svn: 33862
 2007-02-04 01:31:47 +00:00
Chris Lattner
4ca925808f swtich vector-> smallvector, speeding up selectiondag stuff 1% 
llvm-svn: 33861
 2007-02-04 01:20:02 +00:00
Chris Lattner
135ccecbfb Switch promoted/expanded ops over to using a DenseMap. Vector related maps 
aren't worth it.

llvm-svn: 33860
 2007-02-04 01:17:38 +00:00
Chris Lattner
703db6bfd8 switch LegalizedNodes from std::map to a DenseMap. This speeds up isel 
time as a whole on kc++ by 11%.

llvm-svn: 33857
 2007-02-04 00:50:02 +00:00
Chris Lattner
3ff6e94719 Eliminate some malloc traffic from LegalizeAllNodesNotLeadingTo, speeding 
up isel on kimwitu by 0.7%.

llvm-svn: 33853
 2007-02-04 00:27:56 +00:00
Chris Lattner
6af2a892de Eliminate some std::sets. This speeds up isel of kimwitu by about 0.9% 
llvm-svn: 33852
 2007-02-04 00:24:41 +00:00
Chris Lattner
ff53aecb1a Switch SelectionDAG::ReplaceAllUsesOfValueWith to use a SmallSetVector for 
the users set (most nodes have 1 or 2 users).  This speeds up the isel pass
3.2% on kimwitu.

llvm-svn: 33849
 2007-02-04 00:14:31 +00:00
Chris Lattner
b35593a1c5 switch the sched unit map over to use a DenseMap instead of std::map. This 
speeds up isel as a whole time by 2.6%.

llvm-svn: 33810
 2007-02-03 01:34:13 +00:00
Chris Lattner
f1b9b2068c Switch ComputeTopDownOrdering over to using a densemap. This speeds up 
isel as a whole by 3.3%.

llvm-svn: 33809
 2007-02-03 01:12:36 +00:00
Evan Cheng
99236f5cfe Pasto 
llvm-svn: 33806
 2007-02-03 00:43:46 +00:00
Reid Spencer
591bfa1e0b Changes to support making the shift instructions be true BinaryOperators. 
This feature is needed in order to support shifts of more than 255 bits
on large integer types.  This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
   shl i32 %X, 1
instead of
   shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.

llvm-svn: 33776
 2007-02-02 02:16:23 +00:00
Anton Korobeynikov
c469cbc2e7 Fixed uninitialized stuff inside LegalizeDAG. Fortunately, the only 
affected part is codegen of "memove" inside x86 backend. This fixes
PR1144

llvm-svn: 33752
 2007-02-01 08:39:52 +00:00
Chris Lattner
36dbbd2550 Fit in 80 columns 
llvm-svn: 33745
 2007-02-01 04:55:59 +00:00
Chris Lattner
18483c395e Emit a better assertion message for PR1133 
llvm-svn: 33736
 2007-02-01 01:21:12 +00:00
Evan Cheng
3ec2e08a37 Allow the target to override the ISD::CondCode that's to be used to test the 
result of the comparison libcall against zero.

llvm-svn: 33701
 2007-01-31 09:29:11 +00:00
Reid Spencer
19af04a142 For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid 
confusion with external linkage types.

llvm-svn: 33663
 2007-01-30 20:08:39 +00:00
Chris Lattner
ad740ef059 add initial support for handling inline asms with multiple constraints. 
This doesn't do the "right thing" but will probably work in most cases.

This implements CodeGen/PowerPC/2007-01-29-lbrx-asm.ll.

llvm-svn: 33643
 2007-01-29 23:45:14 +00:00
Nate Begeman
dc46021355 Finish off bug 680, allowing targets to custom lower frame and return 
address nodes.

llvm-svn: 33636
 2007-01-29 22:58:52 +00:00
Anton Korobeynikov
95a00ad495 Arguments are counting from 1. not from 0. Maybe we should change 
numbering somehow? E.g. make return argument the last?

llvm-svn: 33606
 2007-01-28 18:01:49 +00:00
Anton Korobeynikov
f2a1c60bb4 More cleanup 
llvm-svn: 33605
 2007-01-28 16:04:40 +00:00
Anton Korobeynikov
611d5e2eda Propagate changes from my local tree. This patch includes: 
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.

NOTEs: 1. Documentation will be updated soon.
       2. llvm-upgrade should be improved to translate csret => sret.
          Before this, there will be some unexpected test fails.
llvm-svn: 33597
 2007-01-28 13:31:35 +00:00
Jim Laskey
64f4242072 Change the MachineDebugInfo to MachineModuleInfo to better reflect usage 
for debugging and exception handling.

llvm-svn: 33550
 2007-01-26 21:22:28 +00:00
Jim Laskey
23ed7d2625 Make LABEL a builtin opcode. 
llvm-svn: 33537
 2007-01-26 14:34:52 +00:00
Evan Cheng
bfd7e70770 Renamed getTypeAlignmentShift() to getPreferredTypeAlignmentShift(). 
llvm-svn: 33482
 2007-01-24 07:03:39 +00:00
Evan Cheng
cea1d1c5f8 Remove the DoubleTy special case. 
llvm-svn: 33449
 2007-01-22 23:13:55 +00:00
Reid Spencer
e33c18f4d2 For PR970: 
Clean up handling of isFloatingPoint() and dealing with PackedType.
Patch by Gordon Henriksen!

llvm-svn: 33415
 2007-01-21 00:29:26 +00:00
Chris Lattner
9df9e3e57b Teach TargetData to handle 'preferred' alignment for each target, and use 
these alignment amounts to align scalars when we can.  Patch by Scott Michel!

llvm-svn: 33409
 2007-01-20 22:35:55 +00:00
Evan Cheng
ae02dfb090 Fix for PR1108: type of insert_vector_elt index operand is PtrVT, not MVT::i32. 
llvm-svn: 33398
 2007-01-20 10:10:26 +00:00
Reid Spencer
14b42c0040 For PR1043: 
This is the final patch for this PR. It implements some minor cleanup
in the use of IntegerType, to wit:
1. Type::getIntegerTypeMask -> IntegerType::getBitMask
2. Type::Int*Ty changed to IntegerType* from Type*
3. ConstantInt::getType() returns IntegerType* now, not Type*

This also fixes PR1120.

Patch by Sheng Zhou.

llvm-svn: 33370
 2007-01-19 21:13:56 +00:00
Evan Cheng
ced4fcb608 Remove this xform: 
(shl (add x, c1), c2) -> (add (shl x, c2), c1<<c2)
Replace it with:
(add (shl (add x, c1), c2), ) -> (add (add (shl x, c2), c1<<c2), )

This fixes test/CodeGen/ARM/smul.ll

llvm-svn: 33361
 2007-01-19 17:51:44 +00:00
Chris Lattner
3af776359d Fix PR1114 and CodeGen/Generic/2007-01-15-LoadSelectCycle.ll by being 
careful when folding "c ? load p : load q" that C doesn't reach either load.
If so, folding this into load (c ? p : q) will induce a cycle in the graph.

llvm-svn: 33251
 2007-01-16 05:59:59 +00:00
Chris Lattner
7560c5f913 add options to view the dags before the first or second pass of dag combine. 
llvm-svn: 33249
 2007-01-16 04:55:25 +00:00
Reid Spencer
6d0992dc3d Compensate for loss of DerivedTypes.h in TargetLowering.h 
llvm-svn: 33159
 2007-01-12 23:31:12 +00:00