Chris Lattner
30ac1d4dbb
Fix a miscompilation in crafty due to a recent patch
...
llvm-svn: 24706
2005-12-14 07:58:38 +00:00
Evan Cheng
65498e21ad
Fold (zext (load x) to (zextload x).
...
llvm-svn: 24702
2005-12-14 02:19:23 +00:00
Chris Lattner
eff6e46178
Don't lump the filename and working dir together
...
llvm-svn: 24697
2005-12-13 17:40:33 +00:00
Chris Lattner
d27892a194
Add a couple more fields, move ctor init list to .cpp file, add support
...
for emitting the ctor/dtor list for common targets.
llvm-svn: 24694
2005-12-13 06:32:10 +00:00
Nate Begeman
3d420d73e2
Lowering constant pool entries on ppc exposed a bug in the recently added
...
ConstantVec legalizing code, which would return constantpool nodes that
were not of the target's pointer type.
llvm-svn: 24691
2005-12-13 03:03:23 +00:00
Chris Lattner
b0b4e53b55
Accept and ignore prefetches for now
...
llvm-svn: 24678
2005-12-12 22:51:16 +00:00
Chris Lattner
ea3d25b64a
Fix CodeGen/Generic/2005-12-12-ExpandSextInreg.ll
...
llvm-svn: 24677
2005-12-12 22:27:43 +00:00
Chris Lattner
a54452fd4f
Minor tweak to get isel opt
...
llvm-svn: 24663
2005-12-11 09:05:13 +00:00
Nate Begeman
a0e26b25f4
Add support for TargetConstantPool nodes to the dag isel emitter, and use
...
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.
llvm-svn: 24657
2005-12-10 02:36:00 +00:00
Evan Cheng
0b7a482921
Added new getNode and getTargetNode variants for X86 stores.
...
llvm-svn: 24653
2005-12-10 00:37:58 +00:00
Chris Lattner
3b6d02d4fc
Avoid emitting two tabs when switching to a named section
...
llvm-svn: 24646
2005-12-09 19:28:49 +00:00
Chris Lattner
8f28525f54
Teach legalize how to promote sext_inreg to fix a problem Andrew pointed
...
out to me.
llvm-svn: 24644
2005-12-09 17:32:47 +00:00
Chris Lattner
e27671119a
improve code insertion in two ways:
...
1. Only forward subst offsets into loads and stores, not into arbitrary
things, where it will likely become a load.
2. If the source is a cast from pointer, forward subst the cast as well,
allowing us to fold the cast away (improving cases when the cast is
from an alloca or global).
This hasn't been fully tested, but does appear to further reduce register
pressure and improve code. Lets let the testers grind on it a bit. :)
llvm-svn: 24640
2005-12-08 08:00:12 +00:00
Nate Begeman
589dff9a20
Fix a crash where ConstantVec nodes were being generated with the wrong
...
type when the target did not support them. Also teach Legalize how to
expand ConstantVecs.
This allows us to generate
_test:
lwz r2, 12(r3)
lwz r4, 8(r3)
lwz r5, 4(r3)
lwz r6, 0(r3)
addi r2, r2, 4
addi r4, r4, 3
addi r5, r5, 2
addi r6, r6, 1
stw r2, 12(r3)
stw r4, 8(r3)
stw r5, 4(r3)
stw r6, 0(r3)
blr
For:
void %test(%v4i *%P) {
%T = load %v4i* %P
%S = add %v4i %T, <int 1, int 2, int 3, int 4>
store %v4i %S, %v4i * %P
ret void
}
On PowerPC.
llvm-svn: 24633
2005-12-07 19:48:11 +00:00
Chris Lattner
055ecd8533
Only transform (sext (truncate x)) -> (sextinreg x) if before legalize or
...
if the target supports the resultant sextinreg
llvm-svn: 24632
2005-12-07 18:02:05 +00:00
Chris Lattner
8f17c95cc2
Teach the dag combiner to turn a truncate/sign_extend pair into a sextinreg
...
when the types match up. This allows the X86 backend to compile:
sbyte %toggle_value(sbyte* %tmp.1) {
%tmp.2 = load sbyte* %tmp.1
ret sbyte %tmp.2
}
to this:
_toggle_value:
mov %EAX, DWORD PTR [%ESP + 4]
movsx %EAX, BYTE PTR [%EAX]
ret
instead of this:
_toggle_value:
mov %EAX, DWORD PTR [%ESP + 4]
movsx %EAX, BYTE PTR [%EAX]
movsx %EAX, %AL
ret
noticed in Shootout/objinst.
-Chris
llvm-svn: 24630
2005-12-07 07:11:03 +00:00
Nate Begeman
6c1b8712c5
Teach the SelectionDAG ISel how to turn ConstantPacked values into
...
constant nodes with vector types. Also teach the asm printer how to print
ConstantPacked constant pool entries. This allows us to generate altivec
code such as the following, which adds a vector constantto a packed float.
LCPI1_0: <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 >
.space 4
.space 4
.space 4
.long 1065353216 ; float 1
.text
.align 4
.globl _foo
_foo:
lis r2, ha16(LCPI1_0)
la r2, lo16(LCPI1_0)(r2)
li r4, 0
lvx v0, r4, r2
lvx v1, r4, r3
vaddfp v0, v1, v0
stvx v0, r4, r3
blr
For the llvm code:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 >
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
llvm-svn: 24616
2005-12-06 06:18:55 +00:00
Chris Lattner
46ac4d0810
Fix the #1 code quality problem that I have seen on X86 (and it also affects
...
PPC and other targets). In a particular, consider code like this:
struct Vector3 { double x, y, z; };
struct Matrix3 { Vector3 a, b, c; };
double dot(Vector3 &a, Vector3 &b) {
return a.x * b.x + a.y * b.y + a.z * b.z;
}
Vector3 mul(Vector3 &a, Matrix3 &b) {
Vector3 r;
r.x = dot( a, b.a );
r.y = dot( a, b.b );
r.z = dot( a, b.c );
return r;
}
void transform(Matrix3 &m, Vector3 *x, int n) {
for (int i = 0; i < n; i++)
x[i] = mul( x[i], m );
}
we compile transform to a loop with all of the GEP instructions for indexing
into 'm' pulled out of the loop (9 of them). Because isel occurs a bb at a time
we are unable to fold the constant index into the loads in the loop, leading to
PPC code that looks like this:
LBB3_1: ; no_exit.preheader
li r2, 0
addi r6, r3, 64 ;; 9 values live across the loop body!
addi r7, r3, 56
addi r8, r3, 48
addi r9, r3, 40
addi r10, r3, 32
addi r11, r3, 24
addi r12, r3, 16
addi r30, r3, 8
LBB3_2: ; no_exit
lfd f0, 0(r30)
lfd f1, 8(r4)
fmul f0, f1, f0
lfd f2, 0(r3) ;; no constant indices folded into the loads!
lfd f3, 0(r4)
lfd f4, 0(r10)
lfd f5, 0(r6)
lfd f6, 0(r7)
lfd f7, 0(r8)
lfd f8, 0(r9)
lfd f9, 0(r11)
lfd f10, 0(r12)
lfd f11, 16(r4)
fmadd f0, f3, f2, f0
fmul f2, f1, f4
fmadd f0, f11, f10, f0
fmadd f2, f3, f9, f2
fmul f1, f1, f6
stfd f0, 0(r4)
fmadd f0, f11, f8, f2
fmadd f1, f3, f7, f1
stfd f0, 8(r4)
fmadd f0, f11, f5, f1
addi r29, r4, 24
stfd f0, 16(r4)
addi r2, r2, 1
cmpw cr0, r2, r5
or r4, r29, r29
bne cr0, LBB3_2 ; no_exit
uh, yuck. With this patch, we now sink the constant offsets into the loop, producing
this code:
LBB3_1: ; no_exit.preheader
li r2, 0
LBB3_2: ; no_exit
lfd f0, 8(r3)
lfd f1, 8(r4)
fmul f0, f1, f0
lfd f2, 0(r3)
lfd f3, 0(r4)
lfd f4, 32(r3) ;; much nicer.
lfd f5, 64(r3)
lfd f6, 56(r3)
lfd f7, 48(r3)
lfd f8, 40(r3)
lfd f9, 24(r3)
lfd f10, 16(r3)
lfd f11, 16(r4)
fmadd f0, f3, f2, f0
fmul f2, f1, f4
fmadd f0, f11, f10, f0
fmadd f2, f3, f9, f2
fmul f1, f1, f6
stfd f0, 0(r4)
fmadd f0, f11, f8, f2
fmadd f1, f3, f7, f1
stfd f0, 8(r4)
fmadd f0, f11, f5, f1
addi r6, r4, 24
stfd f0, 16(r4)
addi r2, r2, 1
cmpw cr0, r2, r5
or r4, r6, r6
bne cr0, LBB3_2 ; no_exit
This is much nicer as it reduces register pressure in the loop a lot. On X86,
this takes the function from having 9 spilled registers to 2. This should help
some spec programs on X86 (gzip?)
This is currently only enabled with -enable-gep-isel-opt to allow perf testing
tonight.
llvm-svn: 24606
2005-12-05 07:10:48 +00:00
Chris Lattner
07f4a0cb99
dbg.stoppoint returns a value, don't forget to init it
...
llvm-svn: 24583
2005-12-03 18:50:48 +00:00
Andrew Lenharth
a38ab7b996
bah, must generate all results
...
llvm-svn: 24574
2005-12-02 06:08:08 +00:00
Andrew Lenharth
9662af8cdc
cycle counter fix
...
llvm-svn: 24573
2005-12-02 04:56:24 +00:00
Chris Lattner
b5cc216fad
Don't remove two operand, two result nodes from the binary ops map. These
...
should come from the arbitrary ops map.
This fixes Regression/CodeGen/PowerPC/2005-12-01-Crash.ll
llvm-svn: 24571
2005-12-01 23:14:50 +00:00
Chris Lattner
29f6c8928b
Promote line and column number information for our friendly 64-bit targets.
...
llvm-svn: 24568
2005-12-01 18:21:35 +00:00
Chris Lattner
282123f7fc
This is a bugfix for SelectNodeTo. In certain situations, we could be
...
selecting a node and use a mix of getTargetNode() and SelectNodeTo. Because
SelectNodeTo didn't check the CSE maps for a preexisting node and didn't insert
its result into the CSE maps, we would sometimes miss a CSE opportunity.
This is extremely rare, but worth fixing for completeness.
llvm-svn: 24565
2005-12-01 18:00:57 +00:00
Nate Begeman
811a41a87c
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
...
work. This change has no effect on generated code.
llvm-svn: 24563
2005-12-01 04:51:06 +00:00
Chris Lattner
7bed501258
Make SelectNodeTo return N
...
llvm-svn: 24548
2005-11-30 22:45:14 +00:00
Chris Lattner
5af54cb0fe
CALLSEQ_START/END nodes don't get memoized, do not add them in when
...
replaceAllUses'ing.
llvm-svn: 24539
2005-11-30 18:20:52 +00:00
Andrew Lenharth
3836ea30ac
At long last, you can say that f32 isn't supported for setcc
...
llvm-svn: 24537
2005-11-30 17:12:26 +00:00
Nate Begeman
31121419c8
First chunk of actually generating vector code for packed types. These
...
changes allow us to generate the following code:
_foo:
li r2, 0
lvx v0, r2, r3
vaddfp v0, v0, v0
stvx v0, r2, r3
blr
for this llvm:
void %foo(<4 x float>* %a) {
entry:
%tmp1 = load <4 x float>* %a
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float>* %a
ret void
}
llvm-svn: 24534
2005-11-30 08:22:07 +00:00
Andrew Lenharth
e14b9bfddf
add support for custom lowering SINT_TO_FP
...
llvm-svn: 24531
2005-11-30 06:43:03 +00:00
Reid Spencer
3bac59d2f0
Fix a problem with llvm-ranlib that (on some platforms) caused the archive
...
file to become corrupted due to interactions between mmap'd memory segments
and file descriptors closing. The problem is completely avoiding by using
a third temporary file.
Patch provided by Evan Jones
llvm-svn: 24527
2005-11-30 05:21:10 +00:00
Evan Cheng
08ab45044b
Fixed a bug introduced by my last commit: TargetGlobalValues should key on
...
GlobalValue * and index pair. Update getGlobalAddress() for symmetry.
llvm-svn: 24524
2005-11-30 02:49:21 +00:00
Evan Cheng
025dab1137
Added an index field to GlobalAddressSDNode so it can represent X+12, etc.
...
llvm-svn: 24523
2005-11-30 02:04:11 +00:00
Chris Lattner
22327b9d12
Add support for a new STRING and LOCATION node for line number support, patch
...
contributed by Daniel Berlin, with a few cleanups here and there by me.
llvm-svn: 24515
2005-11-29 06:21:05 +00:00
Nate Begeman
a1c2df2471
Add the majority of the vector machien value types we expect to support,
...
and make a few changes to the legalization machinery to support more than
16 types.
llvm-svn: 24511
2005-11-29 05:45:29 +00:00
Nate Begeman
a90bb6d9b1
Check in code to scalarize arbitrarily wide packed types for some simple
...
vector operations (load, add, sub, mul).
This allows us to codegen:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
on ppc as:
_foo:
lfs f0, 12(r3)
lfs f1, 8(r3)
lfs f2, 4(r3)
lfs f3, 0(r3)
fadds f0, f0, f0
fadds f1, f1, f1
fadds f2, f2, f2
fadds f3, f3, f3
stfs f0, 12(r3)
stfs f1, 8(r3)
stfs f2, 4(r3)
stfs f3, 0(r3)
blr
llvm-svn: 24484
2005-11-22 18:16:00 +00:00
Nate Begeman
d2f6fcf327
Rather than attempting to legalize 1 x float, make sure the SD ISel never
...
generates it. Make MVT::Vector expand-only, and remove the code in
Legalize that attempts to legalize it.
The plan for supporting N x Type is to continually epxand it in ExpandOp
until it gets down to 2 x Type, where it will be scalarized into a pair of
scalars.
llvm-svn: 24482
2005-11-22 01:29:36 +00:00
Duraid Madina
04be8e167c
I think I know what you meant here, but just to be safe I'll let you
...
do it. :)
<_sabre_> excuses excuses
llvm-svn: 24471
2005-11-21 14:09:40 +00:00
Chris Lattner
3820bdc84c
Allow target to customize directive used to switch to arbitrary section in SwitchSection,
...
add generic constant pool emitter
llvm-svn: 24464
2005-11-21 08:25:09 +00:00
Chris Lattner
3ad9bee9a4
increment the function number in SetupMachineFunction
...
llvm-svn: 24461
2005-11-21 08:13:27 +00:00
Chris Lattner
4c1efb2a29
Adjust to capitalized asmprinter method names
...
llvm-svn: 24457
2005-11-21 07:51:36 +00:00
Chris Lattner
f78eca1416
Add section switching to common code generator code. Add a couple of
...
asserts.
llvm-svn: 24445
2005-11-21 07:06:27 +00:00
Chris Lattner
bc0a6be68a
Legalize MERGE_VALUES, expand READCYCLECOUNTER correctly, so it doesn't
...
break control dependence.
llvm-svn: 24437
2005-11-20 22:56:56 +00:00
Andrew Lenharth
b44263313a
The first patch of X86 support for read cycle counter
...
llvm-svn: 24429
2005-11-20 21:32:07 +00:00
Chris Lattner
c830542c70
more progress towards bug 291 being finished. Patch by Owen Anderson,
...
HAVE_GV case fixed up by me.
llvm-svn: 24428
2005-11-20 03:45:52 +00:00
Chris Lattner
517942843d
Unbreak codegen of bools. This should fix the llc/jit/llc-beta failures
...
from last night.
llvm-svn: 24427
2005-11-19 18:40:42 +00:00
Chris Lattner
fc1975aa3b
Improve Selection DAG printer portability. Patch by Owen Anderson!
...
llvm-svn: 24425
2005-11-19 07:44:09 +00:00
Chris Lattner
72dc36da76
Teach the graph viewer to handle register operands that are zero.
...
llvm-svn: 24421
2005-11-19 06:58:46 +00:00
Chris Lattner
3a1a1557e1
Silence a bogus warning
...
llvm-svn: 24420
2005-11-19 05:51:46 +00:00
Chris Lattner
89056c7145
Add some method variants, patch by Evan Cheng
...
llvm-svn: 24418
2005-11-19 01:44:53 +00:00
Nate Begeman
7d513f65ae
Teach LLVM how to scalarize packed types. Currently, this only works on
...
packed types with an element count of 1, although more generic support is
coming. This allows LLVM to turn the following code:
void %foo(<1 x float> * %a) {
entry:
%tmp1 = load <1 x float> * %a;
%tmp2 = add <1 x float> %tmp1, %tmp1
store <1 x float> %tmp2, <1 x float> *%a
ret void
}
Into:
_foo:
lfs f0, 0(r3)
fadds f0, f0, f0
stfs f0, 0(r3)
blr
llvm-svn: 24416
2005-11-19 00:36:38 +00:00
Nate Begeman
78ac456d32
Split out the shift code from visitBinary.
...
llvm-svn: 24412
2005-11-18 07:42:56 +00:00
Chris Lattner
0b177075c2
Allow targets to custom legalize leaf nodes like GlobalAddress.
...
llvm-svn: 24387
2005-11-17 06:41:44 +00:00
Chris Lattner
48668daec3
Teach legalize about targetglobaladdress
...
llvm-svn: 24385
2005-11-17 05:52:24 +00:00
Chris Lattner
2095b19912
when debugging lower dbg intrinsics to calls
...
llvm-svn: 24377
2005-11-16 07:22:30 +00:00
Chris Lattner
5d9032c0e9
Remove extraneous parents around constants when using a constant expr cast.
...
llvm-svn: 24357
2005-11-15 00:03:16 +00:00
Chris Lattner
389e3bfb0c
Teach emitAlignment to handle explicit alignment requests by globals.
...
llvm-svn: 24354
2005-11-14 19:00:06 +00:00
Jeff Cohen
566c6d987a
Fix operator precedence bug caught by VC++.
...
llvm-svn: 24318
2005-11-12 00:59:01 +00:00
Andrew Lenharth
9b036b1bdb
added a chain output
...
llvm-svn: 24306
2005-11-11 22:48:54 +00:00
Andrew Lenharth
dca2f13e76
continued readcyclecounter support
...
llvm-svn: 24300
2005-11-11 16:47:30 +00:00
Chris Lattner
b6d5dcd181
nuke blank line
...
llvm-svn: 24278
2005-11-10 18:49:46 +00:00
Chris Lattner
4868465cb6
Get rid of casts by #including the right header
...
llvm-svn: 24275
2005-11-10 18:36:17 +00:00
Chris Lattner
aa86c10fe6
Compile C strings to:
...
l1__2E_str_1: ; '.str_1'
.asciz "foo"
not:
.align 0
l1__2E_str_1: ; '.str_1'
.asciz "foo"
llvm-svn: 24273
2005-11-10 18:09:27 +00:00
Chris Lattner
88c7013f18
add support for .asciz, and enable it by default. If your target assemblerdoesn't support .asciz, just set AscizDirective to null in your asmprinter.
...
This compiles C strings to:
l1__2E_str_1: ; '.str_1'
.asciz "foo"
instead of:
l1__2E_str_1: ; '.str_1'
.ascii "foo\000"
llvm-svn: 24272
2005-11-10 18:06:33 +00:00
Chris Lattner
29585fd8c8
Switch the allnodes list from a vector of pointers to an ilist of nodes.This eliminates the vector, allows constant time removal of a node froma graph, and makes iteration over the all nodes list stable when adding
...
nodes to the graph.
llvm-svn: 24263
2005-11-09 23:47:37 +00:00
Chris Lattner
11d12a572e
Refactor intrinsic lowering stuff out of visitCall
...
llvm-svn: 24261
2005-11-09 19:44:01 +00:00
Chris Lattner
8052f32866
Handle the trivial (but common) two-op case more efficiently
...
llvm-svn: 24259
2005-11-09 18:48:57 +00:00
Chris Lattner
82596272da
Nuke noop copies.
...
llvm-svn: 24258
2005-11-09 18:22:42 +00:00
Chris Lattner
306c386a79
Fix CodeGen/X86/shift-folding.ll:test3 on X86
...
llvm-svn: 24256
2005-11-09 16:50:40 +00:00
Chris Lattner
90e4c8a2a7
Disable some overly-aggressive checking code. This speeds up the local
...
allocator from 23s to 11s on kc++ in debug mode.
llvm-svn: 24255
2005-11-09 05:28:45 +00:00
Chris Lattner
798441d725
Avoid creating a token factor node in trivially redundant cases. This
...
eliminates almost one node per block in common cases.
llvm-svn: 24254
2005-11-09 05:03:03 +00:00
Chris Lattner
948932a624
Handle GEP's a bit more intelligently. Fold constant indices early and
...
turn power-of-two multiplies into shifts early to improve compile time.
llvm-svn: 24253
2005-11-09 04:45:33 +00:00
Chris Lattner
90eff65d1c
Allocate the right amount of memory for this vector up front.
...
llvm-svn: 24252
2005-11-08 23:32:44 +00:00
Chris Lattner
89f1b405f4
Change the ValueList array for each node to be shared instead of individuallyallocated. Further, in the common case where a node has a single value, justreference an element from a small array. This is a small compile-time win.
...
llvm-svn: 24251
2005-11-08 23:30:28 +00:00
Chris Lattner
cffd7d5bdc
Switch the operandlist/valuelist from being vectors to being just an array.This saves 12 bytes from SDNode, but doesn't speed things up substantially
...
(our graphs apparently already fit within the cache on my g5). In any case
this reduces memory usage.
llvm-svn: 24249
2005-11-08 22:07:03 +00:00
Chris Lattner
80717f007c
Explicitly initialize some instance vars
...
llvm-svn: 24247
2005-11-08 21:54:57 +00:00
Chris Lattner
e394cb13bd
Clean up RemoveDeadNodes significantly, by eliminating the need for a temporary
...
set and eliminating the need to iterate whenever something is removed (which
can be really slow in some cases). Thx to Jim for pointing out something silly
I was getting stuck on. :)
llvm-svn: 24241
2005-11-08 18:52:27 +00:00
Jim Laskey
0c65e09865
Let's try ignoring resource utilization on the backward pass.
...
llvm-svn: 24231
2005-11-07 19:08:53 +00:00
Chris Lattner
fc76f9f0c1
Always compute max align.
...
llvm-svn: 24227
2005-11-06 17:43:20 +00:00
Nate Begeman
aecebc076b
Add the necessary support to the ISel to allow targets to codegen the new
...
alignment information appropriately. Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack. Support for
arbitrarily aligned dynamic allocas coming soon.
llvm-svn: 24224
2005-11-06 09:00:38 +00:00
Jim Laskey
5a3005b7d0
Fix logic bug in finding retry slot in tally.
...
llvm-svn: 24188
2005-11-05 00:01:25 +00:00
Jim Laskey
305647f84e
Fix a warning
...
llvm-svn: 24187
2005-11-04 18:26:02 +00:00
Jim Laskey
670144ec9e
Scheduling now uses itinerary data.
...
llvm-svn: 24180
2005-11-04 04:05:35 +00:00
Nate Begeman
d6ddce1ced
Fix a crash that Andrew noticed, and add a pair of braces to unfconfuse
...
XCode's indenting.
llvm-svn: 24159
2005-11-02 18:42:59 +00:00
Chris Lattner
7b5cc7c0e4
Fix a source of undefined behavior when dealing with 64-bit types. This
...
may fix PR652. Thanks to Andrew for tracking down the problem.
llvm-svn: 24145
2005-11-02 01:47:04 +00:00
Jim Laskey
8a0072ec92
1. Embed and not inherit vector for NodeGroup.
...
2. Iterate operands and not uses (performance.)
3. Some long pending comment changes.
llvm-svn: 24119
2005-10-31 12:49:09 +00:00
Chris Lattner
d7ef6d6774
Significantly simplify this code and make it more aggressive. Instead of having
...
a special case hack for X86, make the hack more general: if an incoming argument
register is not used in any block other than the entry block, don't copy it to
a vreg. This helps us compile code like this:
%struct.foo = type { int, int, [0 x ubyte] }
int %test(%struct.foo* %X) {
%tmp1 = getelementptr %struct.foo* %X, int 0, uint 2, int 100
%tmp = load ubyte* %tmp1 ; <ubyte> [#uses=1]
%tmp2 = cast ubyte %tmp to int ; <int> [#uses=1]
ret int %tmp2
}
to:
_test:
lbz r3, 108(r3)
blr
instead of:
_test:
lbz r2, 108(r3)
or r3, r2, r2
blr
The (dead) copy emitted to copy r3 into a vreg for extra-block uses was
increasing the live range of r3 past the load, preventing the coallescing.
This implements CodeGen/PowerPC/reg-coallesce-simple.ll
llvm-svn: 24115
2005-10-30 19:42:35 +00:00
Chris Lattner
b0c50d1b7d
Reduce the number of copies emitted as machine instructions by
...
generating results in vregs that will need them. In the case of something
like this: CopyToReg((add X, Y), reg1024), we no longer emit code like
this:
reg1025 = add X, Y
reg1024 = reg 1025
Instead, we emit:
reg1024 = add X, Y
Whoa! :)
llvm-svn: 24111
2005-10-30 18:54:27 +00:00
Chris Lattner
26841f9e6b
Codegen mul by negative power of two with a shift and negate.
...
This implements test/Regression/CodeGen/PowerPC/mul-neg-power-2.ll,
producing:
_foo:
slwi r2, r3, 1
subfic r3, r2, 63
blr
instead of:
_foo:
mulli r2, r3, -2
addi r3, r2, 63
blr
llvm-svn: 24106
2005-10-30 06:41:49 +00:00
Chris Lattner
24c5aebb55
Fix DSE to not nuke dead stores unless they redundant store is the same
...
VT as the killing one. Fix fixes PR491
llvm-svn: 24034
2005-10-27 07:10:34 +00:00
Chris Lattner
83a994e57c
Add a simple xform that is useful for bitfield operations.
...
llvm-svn: 24029
2005-10-27 05:06:38 +00:00
Chris Lattner
daf6a48dae
Fix some spello's pointed out by Gabor Greif
...
llvm-svn: 24019
2005-10-26 18:41:41 +00:00
Nate Begeman
98c5495992
Allow custom lowered FP_TO_SINT ops in the check for whether a larger
...
FP_TO_SINT is preferred to a larger FP_TO_UINT. This seems to be begging
for a TLI.isOperationCustom() helper function.
llvm-svn: 23992
2005-10-25 23:47:25 +00:00
Chris Lattner
6627f9d9e3
Clear a bit in this file that was causing a miscompilation of 178.galgel.
...
llvm-svn: 23980
2005-10-25 18:57:30 +00:00
Chris Lattner
e3bfc9618d
Alkis agrees that that iterative scan allocator isn't going to be worked on
...
in the future, remove it.
llvm-svn: 23952
2005-10-24 04:14:30 +00:00
Jeff Cohen
a38c737e85
When a function takes a variable number of pointer arguments, with a zero
...
pointer marking the end of the list, the zero *must* be cast to the pointer
type. An un-cast zero is a 32-bit int, and at least on x86_64, gcc will
not extend the zero to 64 bits, thus allowing the upper 32 bits to be
random junk.
The new END_WITH_NULL macro may be used to annotate a such a function
so that GCC (version 4 or newer) will detect the use of un-casted zero
at compile time.
llvm-svn: 23888
2005-10-23 04:37:20 +00:00
Andrew Lenharth
9fad56d2d2
add TargetExternalSymbol
...
llvm-svn: 23886
2005-10-23 03:40:17 +00:00
Chris Lattner
d308f398c0
BuildSDIV and BuildUDIV only work for i32/i64, but they don't check that
...
the input is that type, this caused a failure on gs on X86 last night.
Move the hard checks into Build[US]Div since that is where decisions like
this should be made.
llvm-svn: 23881
2005-10-22 18:50:15 +00:00
Chris Lattner
9f1b2541f5
add a case missing from the dag combiner that exposed the failure on
...
2005-10-21-longlonggtu.ll.
llvm-svn: 23875
2005-10-21 21:23:25 +00:00
Chris Lattner
5a9eb6d07b
Make the coallescer a bit smarter, allowing it to join more live ranges.
...
For example, we can now join things like [0-30:0)[31-40:1)[52-59:2)
with [40:60:0) if the 52-59 range is defined by a copy from the 40-60 range.
The resultant range ends up being [0-30:0)[31-60:1).
This fires a lot through-out the test suite (e.g. shrinking bc from
19492 -> 18509 machineinstrs) though most gains are smaller (e.g. about
50 copies eliminated from crafty).
llvm-svn: 23866
2005-10-21 06:49:50 +00:00
Chris Lattner
393200c3c6
Fix LiveInterval::getOverlapingRanges to take things in the right order
...
(an unused method).
Fix the merger so that it can merge ranges like this [10:12)[16:40) with
[12:38) into [10:40) instead of bogus ranges. This sort of input will be
possible for the merger coming shortly
llvm-svn: 23865
2005-10-21 06:41:30 +00:00
Nate Begeman
eee9e70716
Fix a typo in the dag combiner, so that this can work on i64 targets
...
llvm-svn: 23856
2005-10-21 01:51:45 +00:00
Nate Begeman
6c42f509bc
Invert the TargetLowering flag that controls divide by consant expansion.
...
Add a new flag to TargetLowering indicating if the target has really cheap
signed division by powers of two, make ppc use it. This will probably go
away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.
llvm-svn: 23853
2005-10-21 00:02:42 +00:00
Chris Lattner
04c1fe840d
Fix a conditional so we don't access past the end of the range. Thanks to
...
Andrew for bringing this to my attn.
llvm-svn: 23850
2005-10-20 22:50:10 +00:00
Nate Begeman
44712926a0
Fix a couple bugs in the const div stuff where we'd generate MULHS/MULHU
...
for types that aren't legal, and fail a divisor is less than zero
comparison, which would cause us to drop a subtract.
llvm-svn: 23846
2005-10-20 17:45:03 +00:00
Chris Lattner
1f9a14683a
don't use llabs with apparently VC++ doesn't have
...
llvm-svn: 23845
2005-10-20 17:01:00 +00:00
Chris Lattner
3c1570debb
Fix order of eval problem from when I refactored this into a function.
...
llvm-svn: 23844
2005-10-20 16:56:40 +00:00
Chris Lattner
ad14e0db81
add a new method, play around with some code.
...
Fix a *bug* in the extendIntervalEndTo method. In particular, if adding
[2:10) to an interval containing [0:2),[10:30), we produced [0:10),[10,30).
Which is not the most smart thing to do. Now produce [0:30).
llvm-svn: 23841
2005-10-20 07:39:25 +00:00
Chris Lattner
13d804c465
Refactor some code, pulling it out into a function. No functionality change.
...
llvm-svn: 23839
2005-10-20 06:06:30 +00:00
Nate Begeman
dc1a2a1f19
Move the target constant divide optimization up into the dag combiner, so
...
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend. Alpha will probably want this too.
llvm-svn: 23835
2005-10-20 02:15:44 +00:00
Nate Begeman
957648f18b
Teach Legalize how to do something with EXTRACT_ELEMENT when the type of
...
the pair of elements is a legal type.
llvm-svn: 23804
2005-10-19 00:06:56 +00:00
Nate Begeman
ee581735d9
Add the ability to lower return instructions to TargetLowering. This
...
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).
llvm-svn: 23802
2005-10-18 23:23:37 +00:00
Chris Lattner
016497a971
Fix Generic/2005-10-18-ZeroSizeStackObject.ll by not requesting a zero
...
sized stack object if either the array size or the type size is zero.
llvm-svn: 23801
2005-10-18 22:14:06 +00:00
Chris Lattner
82258b6abb
remove hack
...
llvm-svn: 23797
2005-10-18 22:11:42 +00:00
Chris Lattner
824a8efa08
Fold (select C, load A, load B) -> load (select C, A, B). This happens quite
...
a lot throughout many programs. In particular, specfp triggers it a bunch for
constant FP nodes when you have code like cond ? 1.0 : -1.0.
If the PPC ISel exposed the loads implicit in pic references to external globals,
we would be able to eliminate a load in cases like this as well:
%X = external global int
%Y = external global int
int* %test4(bool %C) {
%G = select bool %C, int* %X, int* %Y
ret int* %G
}
Note that this breaks things that use SrcValue's (see the fixme), but since nothing
uses them yet, this is ok.
Also, simplify some code to use hasOneUse() on an SDOperand instead of hasNUsesOfValue directly.
llvm-svn: 23781
2005-10-18 06:04:22 +00:00
Nate Begeman
b9627ab955
Implement some feedback from Chris re: constant canonicalization
...
llvm-svn: 23777
2005-10-18 00:28:13 +00:00
Nate Begeman
f495ec2497
Legalize BUILD_PAIR appropriately for upcoming 64 bit PowerPC work.
...
llvm-svn: 23776
2005-10-18 00:27:41 +00:00
Nate Begeman
b2f472ec56
fold fmul X, +2.0 -> fadd X, X;
...
llvm-svn: 23774
2005-10-17 20:40:11 +00:00
Chris Lattner
27d166c9bf
add a trivial fold
...
llvm-svn: 23764
2005-10-17 01:07:11 +00:00
Chris Lattner
d22af0377d
Fix this logic.
...
llvm-svn: 23756
2005-10-15 22:35:40 +00:00
Chris Lattner
f2d781b780
Add a case we were missing that was causing us to fail CodeGen/PowerPC/rlwinm.ll:test3
...
llvm-svn: 23755
2005-10-15 22:18:08 +00:00
Chris Lattner
346dc6fed1
Use getExtLoad here instead of getNode, as extloads produce two values. This
...
fixes a legalize failure on SPASS for itanium.
llvm-svn: 23747
2005-10-15 20:24:07 +00:00
Nate Begeman
9c6b86dcb4
fold sext_in_reg, sext_in_reg where both have the same VT. This was
...
popping up in Fourinarow.
llvm-svn: 23722
2005-10-14 01:29:07 +00:00
Nate Begeman
c206a2a32a
Relax the checking on zextload generation a bit, since as sabre pointed out
...
you could be AND'ing with the result of a shift that shifts out all the
bits you care about, in addition to a constant.
Also, move over an add/sub_parts fold from legalize to the dag combiner,
where it works for things other than constants. Woot!
llvm-svn: 23720
2005-10-14 01:12:21 +00:00
Chris Lattner
b2db3f50f2
Fix the trunc(load) case, finally allowing crafty and povray to pass
...
llvm-svn: 23718
2005-10-13 22:10:05 +00:00
Chris Lattner
2563394c27
Fix some bugs in (sext (load x))
...
llvm-svn: 23717
2005-10-13 21:52:31 +00:00
Chris Lattner
3fd6d9358e
When ExpandOp'ing a [SZ]EXTLOAD, make sure to remember that the chain
...
is also legal. Add support for ExpandOp'ing raw EXTLOADs too.
llvm-svn: 23716
2005-10-13 21:44:47 +00:00
Chris Lattner
dc6e47231b
Implement PromoteOp for *EXTLOAD, allowing MallocBench/gs to Legalize
...
llvm-svn: 23715
2005-10-13 20:07:41 +00:00
Nate Begeman
d155f7f1c2
Fix the remaining DAGCombiner issues pointed out by sabre. This should fix
...
the remainder of the failures introduced by my patch last night.
llvm-svn: 23714
2005-10-13 18:34:58 +00:00
Chris Lattner
75447d2f8e
Fix a minor bug in the dag combiner that broke pcompress2 and some other
...
tests.
llvm-svn: 23713
2005-10-13 18:16:34 +00:00
Nate Begeman
9a08d6fb43
Add support to Legalize for expanding i64 sextload/zextload into hi and lo
...
parts. This should fix the crafty and signed long long unit test failure
on x86 last night.
llvm-svn: 23711
2005-10-13 17:15:37 +00:00
Jim Laskey
2d23e75ac5
Inhibit instructions from being pushed before function calls. This will
...
minimize unnecessary spilling.
llvm-svn: 23710
2005-10-13 16:44:00 +00:00
Nate Begeman
c7e7c94db5
Move some Legalize functionality over to the DAGCombiner where it belongs.
...
Kill some dead code.
llvm-svn: 23706
2005-10-13 03:11:28 +00:00
Nate Begeman
b1d64c386b
Fix a potential bug with two combine-to's back to back that chris pointed
...
out, where after the first CombineTo() call, the node the second CombineTo
wishes to replace may no longer exist.
Fix a very real bug with the truncated load optimization on little endian
targets, which do not need a byte offset added to the load.
llvm-svn: 23704
2005-10-12 23:18:53 +00:00
Nate Begeman
d97bb9d084
More cool stuff for the dag combiner. We can now finally handle things
...
like turning:
_foo:
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
rlwinm r3, r2, 0, 16, 31
blr
into
_foo:
fctiwz f0,f1
stfd f0,-8(r1)
lhz r3,-2(r1)
blr
Also removed an unncessary constraint from sra -> srl conversion, which
should take care of hte only reason we would ever need to handle sra in
MaskedValueIsZero, AFAIK.
llvm-svn: 23703
2005-10-12 20:40:40 +00:00
Jim Laskey
2fe279f783
Finally committing to the new scheduler. Still -sched=none by default.
...
llvm-svn: 23702
2005-10-12 18:29:35 +00:00
Jim Laskey
84b96c93e4
Added graphviz/gv support for MF.
...
llvm-svn: 23700
2005-10-12 12:09:05 +00:00
Chris Lattner
21c3cf756f
Fix a powerpc crash on CodeGen/Generic/llvm-ct-intrinsics.ll
...
llvm-svn: 23694
2005-10-11 17:56:34 +00:00
Chris Lattner
e6fcb88ad1
Add a canonicalization that got lost, fixing PowerPC/fold-li.ll:SUB
...
llvm-svn: 23693
2005-10-11 06:07:15 +00:00
Chris Lattner
1441e42e56
clean up some corner cases
...
llvm-svn: 23692
2005-10-10 23:00:08 +00:00
Chris Lattner
5308a566ba
Implement trivial DSE. If two stores are neighbors and store to the same
...
location, replace them with a new store of the last value. This occurs
in the same neighborhood in 197.parser, speeding it up about 1.5%
llvm-svn: 23691
2005-10-10 22:31:19 +00:00
Chris Lattner
1c60abe065
Add support for CombineTo, allowing the dag combiner to replace nodes with
...
multiple results.
Use this support to implement trivial store->load forwarding, implementing
CodeGen/PowerPC/store-load-fwd.ll. Though this is the most simple case and
can be extended in the future, it is still useful. For example, it speeds
up 197.parser by 6.2% by avoiding an LSU reject in xalloc:
stw r6, lo16(l5_end_of_array)(r2)
addi r2, r5, -4
stwx r5, r4, r2
- lwzx r5, r4, r2
- rlwinm r5, r5, 0, 0, 30
stwx r5, r4, r2
lwz r2, -4(r4)
ori r2, r2, 1
llvm-svn: 23690
2005-10-10 22:04:48 +00:00
Nate Begeman
703c8f57d6
Teach the DAGCombiner several new tricks, teaching it how to turn
...
sext_inreg into zext_inreg based on the signbit (fires a lot), srem into
urem, etc.
llvm-svn: 23688
2005-10-10 21:26:48 +00:00
Chris Lattner
caed5bc79b
Fix comment
...
llvm-svn: 23686
2005-10-10 16:52:03 +00:00
Chris Lattner
58f0f21ed1
Add ISD::ADD to MaskedValueIsZero
...
llvm-svn: 23685
2005-10-10 16:51:40 +00:00
Chris Lattner
5b6e18d6fd
This function is now dead
...
llvm-svn: 23684
2005-10-10 16:49:22 +00:00
Chris Lattner
29613bce04
Enable Nate's excellent DAG combiner work by default. This allows the
...
removal of a bunch of ad-hoc and crufty code from SelectionDAG.cpp.
llvm-svn: 23682
2005-10-10 16:47:10 +00:00
Chris Lattner
097b306215
add a todo for something I noticed
...
llvm-svn: 23679
2005-10-09 22:59:08 +00:00
Chris Lattner
d0eecf4e64
(X & Y) & C == 0 if either X&C or Y&C are zero
...
llvm-svn: 23678
2005-10-09 22:12:36 +00:00
Chris Lattner
d5ac294abd
When emiting a CopyFromReg and the source is already a vreg, do not bother
...
creating a new vreg and inserting a copy: just use the input vreg directly.
This speeds up the compile (e.g. about 5% on mesa with a debug build of llc)
by not adding a bunch of copies and vregs to be coallesced away. On mesa,
for example, this reduces the number of intervals from 168601 to 129040
going into the coallescer.
llvm-svn: 23671
2005-10-09 05:58:56 +00:00
Nate Begeman
8feae2fcc9
Lo and behold, the last bits of SelectionDAG.cpp have been moved over.
...
llvm-svn: 23665
2005-10-08 00:29:44 +00:00
Chris Lattner
f8b0332dfc
remove debugging code
...
llvm-svn: 23663
2005-10-07 15:31:26 +00:00
Chris Lattner
dff6183cd7
implement CodeGen/PowerPC/div-2.ll:test2-4 by propagating zero bits through
...
C-X's
llvm-svn: 23662
2005-10-07 15:30:32 +00:00
Chris Lattner
5e0581c32b
fix indentation
...
llvm-svn: 23660
2005-10-07 06:37:02 +00:00
Chris Lattner
36b58a015b
Turn sdivs into udivs when we can prove the sign bits are clear. This
...
implements CodeGen/PowerPC/div-2.ll
llvm-svn: 23659
2005-10-07 06:10:46 +00:00
Chris Lattner
7709ee0085
silence a bogus GCC warning
...
llvm-svn: 23646
2005-10-06 17:39:10 +00:00
Chris Lattner
3b848038ab
Fix the LLC regressions on X86 last night. In particular, when undoing
...
previous copy elisions and we discover we need to reload a register, make
sure to use the regclass of the original register for the reload, not the
class of the current register. This avoid using 16-bit loads to reload 32-bit
values.
llvm-svn: 23645
2005-10-06 17:19:06 +00:00
Chris Lattner
0f04d333d5
Make the legalizer completely non-recursive
...
llvm-svn: 23642
2005-10-06 01:20:27 +00:00
Nate Begeman
85d4334da0
Let the combiner handle more cases
...
llvm-svn: 23641
2005-10-05 21:44:43 +00:00
Nate Begeman
cf23a9a328
Remove some bad code from Legalize
...
llvm-svn: 23640
2005-10-05 21:44:10 +00:00
Nate Begeman
a34475adfc
Check in some more DAGCombiner pieces
...
llvm-svn: 23639
2005-10-05 21:43:42 +00:00
Chris Lattner
5afc88fe07
Fix a bug in the local spiller, where we could take code like this:
...
store r12 -> [ss#2]
R3 = load [ss#1]
use R3
R3 = load [ss#2]
R4 = load [ss#1]
and turn it into this code:
store R12 -> [ss#2]
R3 = load [ss#1]
use R3
R3 = R12
R4 = R3 <- oops!
The problem was that promoting R3 = load[ss#2] to a copy missed the fact that
the instruction invalidated R3 at that point.
llvm-svn: 23638
2005-10-05 18:30:19 +00:00
Chris Lattner
7f1bde4996
implement visitBR_CC so that PowerPC/inverted-bool-compares.ll passes
...
with the dag combiner. This speeds up espresso by 8%, reaching performance
parity with the dag-combiner-disabled llc.
llvm-svn: 23636
2005-10-05 06:47:48 +00:00
Chris Lattner
27adcf1b0f
fix some pastos
...
llvm-svn: 23635
2005-10-05 06:37:22 +00:00
Chris Lattner
697fdaba58
Add a new HandleNode class, which is used to handle (haha) cases in the
...
dead node elim and dag combiner passes where the root is potentially updated.
This fixes a fixme in the dag combiner.
llvm-svn: 23634
2005-10-05 06:35:28 +00:00
Chris Lattner
75ce53eefd
Implement the code for PowerPC/inverted-bool-compares.ll, even though it
...
that testcase still does not pass with the dag combiner. This is because
not all forms of br* are folded yet.
Also, when we combine a node into another one, delete the node immediately
instead of waiting for the node to potentially come up in the future.
llvm-svn: 23632
2005-10-05 06:11:08 +00:00
Chris Lattner
cf12d7b556
make sure that -view-isel-dags is the input to the isel, not the input to
...
the second phase of dag combining
llvm-svn: 23631
2005-10-05 06:09:10 +00:00
Chris Lattner
86ccb0efb4
Fix a crash compiling Olden/tsp
...
llvm-svn: 23630
2005-10-05 04:45:43 +00:00
Jim Laskey
9a2a3d4aab
Reverting to version - until problem isolated.
...
llvm-svn: 23622
2005-10-04 16:41:51 +00:00
Nate Begeman
9740be11f7
Fix some faulty logic in the libcall inserter.
...
Since calls return more than one value, don't bail if one of their uses
happens to be a node that's not an MVT::Other when following the chain
from CALLSEQ_START to CALLSEQ_END.
Once we've found a CALLSEQ_START, we can just return; there's no need to
tail-recurse further up the graph.
Most importantly, just because something only has one use doesn't mean we
should use it's one use to follow from start to end. This faulty logic
caused us to follow a chain of one-use FP operations back to a much earlier
call, putting a cycle in the graph from a later start to an earlier end.
This is a better fix that reverting to the workaround committed earlier
today.
llvm-svn: 23620
2005-10-04 02:10:55 +00:00
Nate Begeman
2dcd06e46c
Add back a workaround that fixes some breakages from chris's last change.
...
Neither of us have yet figured out why this code is necessary, but stuff
breaks if its not there. Still tracking this down...
llvm-svn: 23617
2005-10-04 00:37:37 +00:00
Jim Laskey
22633f7a41
Refactor gathering node info and emission.
...
llvm-svn: 23610
2005-10-03 12:30:32 +00:00
Chris Lattner
7754dd8231
clean up this code a bit, no functionality change
...
llvm-svn: 23609
2005-10-03 07:22:07 +00:00
Chris Lattner
018dc6d807
Break the body of the loop out into a new method
...
llvm-svn: 23606
2005-10-03 04:47:08 +00:00
Chris Lattner
70b5f4e3fd
Fix a problem where the legalizer would run out of stack space on extremely
...
large basic blocks because it was purely recursive. This switches it to an
iterative/recursive hybrid.
llvm-svn: 23596
2005-10-02 17:49:46 +00:00
Chris Lattner
52952a665d
silence a bogus warning
...
llvm-svn: 23595
2005-10-02 16:30:51 +00:00
Chris Lattner
aa1a841fc7
Add assertions to the trivial scheduler to check that the value types match
...
up between defs and uses.
llvm-svn: 23590
2005-10-02 07:10:55 +00:00
Chris Lattner
2b189d4f9e
Codegen CopyFromReg using the regclass that matches the valuetype of the
...
destination vreg.
llvm-svn: 23586
2005-10-02 06:34:16 +00:00
Chris Lattner
37fdc6dbf9
Add some very paranoid checking for operand/result reg class matchup
...
For instructions that define multiple results, use the right regclass
to define the result, not always the rc of result #0
llvm-svn: 23580
2005-10-01 07:45:09 +00:00
Jeff Cohen
412582bcec
Fix VC++ warnings.
...
llvm-svn: 23579
2005-10-01 03:57:14 +00:00
Chris Lattner
2a439615b7
add a method
...
llvm-svn: 23575
2005-10-01 00:17:07 +00:00
Jim Laskey
532fc48d3d
typo
...
llvm-svn: 23574
2005-10-01 00:08:23 +00:00
Jim Laskey
809ab88d91
1. Simplify the gathering of node groups.
...
2. Printing node groups when displaying nodes.
llvm-svn: 23573
2005-10-01 00:03:07 +00:00
Jim Laskey
5e51979f90
1. Made things node-centric (from operand).
...
2. Added node groups to handle flagged nodes.
3. Started weaning simple scheduling off existing emitter.
llvm-svn: 23566
2005-09-30 19:15:27 +00:00
Chris Lattner
3fcb5aa250
now that we have a reg class to spill with, get this info from the regclass
...
llvm-svn: 23559
2005-09-30 17:19:22 +00:00
Chris Lattner
738631f389
Now that we have getCalleeSaveRegClasses() info, use it to pass the register
...
class into the spill/reload methods. Targets can now rely on that argument.
llvm-svn: 23556
2005-09-30 16:59:07 +00:00
Chris Lattner
a9cd99bbc1
Change this code ot pass register classes into the stack slot spiller/reloader
...
code. PrologEpilogInserter hasn't been updated yet though, so targets cannot
use this info.
llvm-svn: 23536
2005-09-30 01:29:00 +00:00
Chris Lattner
9fbe5b6a51
Fix two bugs in my patch earlier today that broke int->fp conversion on X86.
...
llvm-svn: 23522
2005-09-29 06:44:39 +00:00
Jeff Cohen
e070c04df0
Silence VC++ redeclaration warnings.
...
llvm-svn: 23516
2005-09-29 01:59:49 +00:00
Chris Lattner
61f3785147
Add FP versions of the binary operators, keeping the int and fp worlds seperate.
...
Though I have done extensive testing, it is possible that this will break
things in configs I can't test. Please let me know if this causes a problem
and I'll fix it ASAP.
llvm-svn: 23504
2005-09-28 22:28:18 +00:00
Chris Lattner
4655e9de38
If the target prefers it, use _setjmp/_longjmp should be used instead of setjmp/longjmp for llvm.setjmp/llvm.longjmp.
...
llvm-svn: 23481
2005-09-27 22:15:53 +00:00
Jim Laskey
5a82322c66
Remove some redundancies.
...
llvm-svn: 23469
2005-09-27 17:32:45 +00:00
Jim Laskey
22a1f0f44b
Addition of a simple two pass scheduler. This version is currently hacked up
...
for testing and will require target machine info to do a proper scheduling.
The simple scheduler can be turned on using -sched=simple (defaults
to -sched=none)
llvm-svn: 23455
2005-09-26 21:57:04 +00:00
Chris Lattner
be817baed9
Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0 (and move a function)
...
This happens all the time on PPC for bool values, e.g. eliminating a xori
in inverted-bool-compares.ll.
This should be added to the dag combiner as well.
llvm-svn: 23403
2005-09-23 00:55:52 +00:00
Chris Lattner
288e5b0a7d
Expose the LiveInterval interfaces as public headers.
...
llvm-svn: 23400
2005-09-21 04:19:09 +00:00
Nate Begeman
236df45f1b
Stub out the rest of the DAG Combiner. Just need to fill in the
...
select_cc bits and then wrap it in a convenience function for use with
regular select.
llvm-svn: 23389
2005-09-19 22:34:01 +00:00
Chris Lattner
59dd979162
Teach the local spiller to turn stack slot loads into register-register copies
...
when possible, avoiding the load (and avoiding the copy if the value is already
in the right register).
This patch came about when I noticed code like the following being generated:
store R17 -> [SS1]
...blah...
R4 = load [SS1]
This was causing an LSU reject on the G5. This problem was due to the register
allocator folding spill code into a reg-reg copy (producing the load), which
prevented the spiller from being able to rewrite the load into a copy, despite
the fact that the value was already available in a register. In the case
above, we now rip out the R4 load and replace it with a R4 = R17 copy.
This speeds up several programs on X86 (which spills a lot :) ), e.g.
smg2k from 22.39->20.60s, povray from 12.93->12.66s, 168.wupwise from
68.54->53.83s (!), 197.parser from 7.33->6.62s (!), etc. This may have a larger
impact in some cases on the G5 (by avoiding LSU rejects), though it probably
won't trigger as often (less spilling in general).
Targets that implement folding of loads/stores into copies should implement
the isLoadFromStackSlot hook to get this.
llvm-svn: 23388
2005-09-19 06:56:21 +00:00
Nate Begeman
d733cf7e8b
More DAG combining. Still need the branch instructions, and select_cc
...
llvm-svn: 23371
2005-09-16 00:54:12 +00:00
Chris Lattner
49669dd169
If a function has liveins, and if the target requested that they be plopped
...
into particular vregs, emit copies into the entry MBB.
llvm-svn: 23331
2005-09-13 19:30:54 +00:00
Chris Lattner
38fb15db44
Allow targets to say they don't support truncstore i1 (which includes a mask
...
when storing to an 8-bit memory location), as most don't.
llvm-svn: 23303
2005-09-10 00:20:18 +00:00
Chris Lattner
52a8cb35e6
Add a missing #include, patch courtesy of Baptiste Lepilleur.
...
llvm-svn: 23302
2005-09-09 23:53:39 +00:00
Chris Lattner
cae9229d6e
Fix a problem duraid encountered on itanium where this folding:
...
select (x < y), 1, 0 -> (x < y) incorrectly: the setcc returns i1 but the
select returned i32. Add the zero extend as needed.
llvm-svn: 23301
2005-09-09 23:00:07 +00:00
Chris Lattner
85884e9b8a
Fix a crash viewing dags that have target nodes in them
...
llvm-svn: 23300
2005-09-09 22:35:03 +00:00
Chris Lattner
e7610bc599
Use continue in the use-processing loop to make it clear what the early exits
...
are, simplify logic, and cause things to not be nested as deeply. This also
uses MRI->areAliases instead of an explicit loop.
No functionality change, just code cleanup.
llvm-svn: 23296
2005-09-09 20:29:51 +00:00
Nate Begeman
8422b3637e
Last round of 2-node folds from SD.cpp. Will move on to 3 node ops such
...
as setcc and select next.
llvm-svn: 23295
2005-09-09 19:49:52 +00:00
Chris Lattner
fc17fe0e6d
remove debugging code *slaps head*
...
llvm-svn: 23294
2005-09-09 19:19:20 +00:00
Chris Lattner
8d8506f8e2
When spilling a live range that is used multiple times by one instruction,
...
only add a reload live range once for the instruction. This is one step
towards fixing a regalloc pessimization that Nate notice, but is later undone
by the spiller (so no code is changed).
llvm-svn: 23293
2005-09-09 19:17:47 +00:00
Nate Begeman
1675c67c62
Move yet more folds over to the dag combiner from sd.cpp
...
llvm-svn: 23278
2005-09-08 20:18:10 +00:00
Nate Begeman
c0f764ada4
Another round of dag combiner changes. This fixes some missing XOR folds
...
as well as fixing how we replace old values with new values.
llvm-svn: 23260
2005-09-07 23:25:52 +00:00
Chris Lattner
b3516c123f
Fix a bug that Tzu-Chien Chiu noticed: live interval analysis does NOT
...
preserve livevar
llvm-svn: 23259
2005-09-07 17:34:39 +00:00
Nate Begeman
e8db0c961a
Implement a common missing fold, (add (add x, c1), c2) -> (add x, c1+c2).
...
This restores all of stanford to being identical with and without the dag
combiner with the add folding turned off in sd.cpp.
llvm-svn: 23258
2005-09-07 16:09:19 +00:00
Chris Lattner
482f71733a
Fix a bug nate ran into with replacealluseswith. In the recursive cse case,
...
we were losing a node, causing an assertion to fail. Now we eagerly delete
discovered CSE's, and provide an optional vector to keep track of these
discovered equivalences.
llvm-svn: 23255
2005-09-07 05:37:01 +00:00
Nate Begeman
143dc2039d
Add an option to the DAG Combiner to enable it for beta runs, and turn on
...
that option for PowerPC's beta.
llvm-svn: 23253
2005-09-07 00:15:36 +00:00
Nate Begeman
e1a34193fa
Next round of DAGCombiner changes. This version now passes all the tests
...
I have run so far when run before Legalize. It still needs to pick up the
SetCC folds, and nodes that use SetCC.
llvm-svn: 23243
2005-09-06 04:43:02 +00:00
Chris Lattner
29929a3745
Fix a checking failure in gs
...
llvm-svn: 23235
2005-09-03 01:04:40 +00:00
Nate Begeman
613f777bbc
Next round of DAG Combiner changes. Just need to support multiple return
...
values, and then we should be able to hook it up.
llvm-svn: 23231
2005-09-02 21:18:40 +00:00
Chris Lattner
da97aa059c
Clean up some code from the last checkin
...
llvm-svn: 23229
2005-09-02 20:32:45 +00:00
Chris Lattner
4c2b614aa6
Fix a bug in legalize where it would emit two calls to libcalls that return
...
i64 values on targets that need that expanded to 32-bit registers. This fixes
PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll and speeds up 189.lucas from
taking 122.72s to 81.96s on my desktop.
llvm-svn: 23228
2005-09-02 20:26:58 +00:00
Chris Lattner
17b67e5137
Make sure to auto-cse nullary ops
...
llvm-svn: 23224
2005-09-02 19:36:17 +00:00
Chris Lattner
7995b70148
Fix some buggy logic where we would try to remove nodes with two operands
...
from the binary ops map, even if they had multiple results. This latent bug
caused a few failures with the dag isel last night.
To prevent stuff like this from happening in the future, add some really
strict checking to make sure that the CSE maps always match up with reality!
llvm-svn: 23221
2005-09-02 19:15:44 +00:00
Chris Lattner
365774f457
Don't create zero sized stack objects even for array allocas with a zero
...
number of elements.
llvm-svn: 23219
2005-09-02 18:41:28 +00:00
Chris Lattner
7d89863a77
Fix the release build, noticed by Eric van Riet Paap
...
llvm-svn: 23215
2005-09-02 07:09:28 +00:00
Chris Lattner
86bed2f90b
Make sure to legalize assert[zs]ext's operand correctly
...
llvm-svn: 23208
2005-09-02 01:15:01 +00:00
Chris Lattner
4919477f39
Teach live intervals to not crash on dead livein regs
...
llvm-svn: 23206
2005-09-02 00:20:32 +00:00
Chris Lattner
8a6c15f4f4
For values that are live across basic blocks and need promotion, use ANY_EXTEND
...
instead of ZERO_EXTEND to eliminate extraneous extensions. This eliminates
dead zero extensions on formal arguments and other cases on PPC, implementing
the newly tightened up test/Regression/CodeGen/PowerPC/small-arguments.ll test.
llvm-svn: 23205
2005-09-02 00:19:37 +00:00
Chris Lattner
aae61e684c
legalize ANY_EXTEND appropriately
...
llvm-svn: 23204
2005-09-02 00:18:10 +00:00
Chris Lattner
3f7fbe14a8
Add support for ANY_EXTEND and add a few minor folds for it
...
llvm-svn: 23203
2005-09-02 00:17:32 +00:00
Nate Begeman
626c46f8d9
Fix some code in the current node combining code, spotted when it was moved
...
over to DAGCombiner.cpp
1. Don't assume that SetCC returns i1 when folding (xor (setcc) constant)
2. Don't duplicate code in folding AND with AssertZext that is handled by
MaskedValueIsZero
llvm-svn: 23196
2005-09-01 23:25:49 +00:00
Nate Begeman
18f456b8e3
Implement first round of feedback from chris (there's still a couple things
...
left to do).
llvm-svn: 23195
2005-09-01 23:24:04 +00:00
Chris Lattner
f2b775d686
It is NDEBUG not _NDEBUG
...
llvm-svn: 23186
2005-09-01 18:44:10 +00:00
Nate Begeman
517e40a5bb
Add the rest of the currently implemented visit routines to the switch
...
statement in visit().
llvm-svn: 23185
2005-09-01 00:33:32 +00:00
Nate Begeman
be2fa8f86f
First pass at the DAG Combiner. It isn't used anywhere yet, but it should
...
be mostly functional. It currently has all folds from SelectionDAG.cpp
that do not involve a condition code.
llvm-svn: 23184
2005-09-01 00:19:25 +00:00
Chris Lattner
b8dcea186c
If a function has live ins/outs, print them
...
llvm-svn: 23181
2005-08-31 22:34:59 +00:00
Chris Lattner
fc612f96ec
Allow targets to custom expand shifts that are too large for their registers
...
llvm-svn: 23173
2005-08-31 19:01:53 +00:00
Jeff Cohen
8c454a3024
Fix VC++ precedence warnings
...
llvm-svn: 23169
2005-08-31 02:47:06 +00:00
Nate Begeman
64ea782435
Sigh, not my day. Fix typo.
...
llvm-svn: 23166
2005-08-31 00:43:49 +00:00
Nate Begeman
d286f16856
Fix a mistake in my previous patch pointed out by sabre; the AssertZext
...
case in MaskedValueIsZero was wrong.
llvm-svn: 23165
2005-08-31 00:43:08 +00:00
Nate Begeman
d754412b26
Remove some unnecessary casts, and add the AssertZext case to
...
MaskedValueIsZero.
llvm-svn: 23164
2005-08-31 00:27:53 +00:00
Chris Lattner
87d45af685
Allow physregs to occur in the dag with multiple types. Though I don't likethis, it is a requirement on PPC, which can have an f32 value in r3 at onepoint in a function and a f64 value in r3 at another point. :(
...
This fixes compilation of mesa
llvm-svn: 23161
2005-08-30 22:38:38 +00:00
Chris Lattner
36461b2e37
When checking the fixed intervals, don't forget to check for register aliases.
...
This fixes PR621 and Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll
llvm-svn: 23158
2005-08-30 21:03:36 +00:00
Chris Lattner
6a990c392c
Fix FreeBench/fourinarow with the dag isel, by not adding a bogus result
...
to SHIFT_PARTS nodes
llvm-svn: 23151
2005-08-30 17:21:17 +00:00
Chris Lattner
772c8814b6
Fix a miscompile of PtrDist/bc. Sign extending bools is not the right thing,
...
at least tends to expose problems elsewhere.
llvm-svn: 23149
2005-08-30 16:56:19 +00:00
Nate Begeman
25755f7f00
Remove a bogus piece of my AssertSext/AssertZext patch. oops.
...
llvm-svn: 23148
2005-08-30 02:54:28 +00:00
Nate Begeman
dc36f47d99
Add support for AssertSext and AssertZext, folding other extensions with
...
them. This allows for elminination of redundant extends in the entry
blocks of functions on PowerPC.
Add support for i32 x i32 -> i64 multiplies, by recognizing when the inputs
to ISD::MUL in ExpandOp are actually just extended i32 values and not real
i64 values. this allows us to codegen
int mulhs(int a, int b) { return ((long long)a * b) >> 32; }
as:
_mulhs:
mulhw r3, r4, r3
blr
instead of:
_mulhs:
mulhwu r2, r4, r3
srawi r5, r3, 31
mullw r5, r4, r5
add r2, r2, r5
srawi r4, r4, 31
mullw r3, r4, r3
add r3, r2, r3
blr
with a similar improvement on x86.
llvm-svn: 23147
2005-08-30 02:44:00 +00:00
Chris Lattner
a611caeec8
Name this variable to be what it really is!
...
llvm-svn: 23145
2005-08-30 01:58:51 +00:00
Chris Lattner
56051a0f92
Handle CopyToReg nodes with flag operands correctly
...
llvm-svn: 23144
2005-08-30 01:57:23 +00:00
Chris Lattner
774b9718dc
Add a hack to avoid some horrible code in some cases by always emitting
...
token chains first. For this C function:
int test() {
int i;
for (i = 0; i < 100000; ++i)
foo();
}
Instead of emitting this (condition before call)
.LBB_test_1: ; no_exit
addi r30, r30, 1
lis r2, 1
ori r2, r2, 34464
cmpw cr2, r30, r2
bl L_foo$stub
bne cr2, .LBB_test_1 ; no_exit
Emit this:
.LBB_test_1: ; no_exit
bl L_foo$stub
addi r30, r30, 1
lis r2, 1
ori r2, r2, 34464
cmpw cr0, r30, r2
bne cr0, .LBB_test_1 ; no_exit
Which makes it so we don't have to save/restore cr2 in the prolog/epilog of
the function.
This also makes the code much more similar to what the pattern isel produces.
llvm-svn: 23135
2005-08-29 23:21:29 +00:00
Chris Lattner
32609690c3
Add a new API for Nate
...
llvm-svn: 23131
2005-08-29 21:59:31 +00:00
Andrew Lenharth
f580b078b6
Some of us cared about the the promote path
...
llvm-svn: 23130
2005-08-29 20:46:51 +00:00
Chris Lattner
b0e46fa671
Fix an infinite loop on x86
...
llvm-svn: 23129
2005-08-29 17:30:00 +00:00