Chris Lattner
6a865d5a22
Varargs is apparently currently broken on PPC. This hacks it so that it
...
is at least overloading the right virtual methods. The implementations
are currently wrong though. This fixes Ptrdist/bc, but not other programs
(e.g. siod).
llvm-svn: 22326
2005-07-01 23:11:56 +00:00
Chris Lattner
b299933fc7
Refactor X86AsmPrinter.cpp into multiple files. Patch contributed
...
by Aaron Gray, cleaned up by me.
llvm-svn: 22324
2005-07-01 22:44:09 +00:00
Andrew Lenharth
b1de98d654
simplify call code, remove pseudo ops for div and rem, track more loads and stores
...
llvm-svn: 22323
2005-07-01 19:14:02 +00:00
Andrew Lenharth
f2c8cd0c36
simplify call code, remove pseudo ops for div and rem, track more loads and stores
...
llvm-svn: 22322
2005-07-01 19:12:13 +00:00
Chris Lattner
c2438fe76f
remove some debugging code
...
llvm-svn: 22321
2005-07-01 06:40:58 +00:00
Nate Begeman
31e3028bac
Make the x86 asm printer darwin-aware. This mostly entails doing the same
...
thing as cygwin most of the time, and printing our alignments in log2
rather than number of bytes.
llvm-svn: 22316
2005-06-30 00:53:20 +00:00
Andrew Lenharth
898efb338a
restore old srcValueNode behavior and try to to work around it
...
llvm-svn: 22315
2005-06-29 18:54:02 +00:00
Andrew Lenharth
edccb834bb
tracking the instructions causing loads and stores provides more information than just the pointer being loaded or stored
...
llvm-svn: 22311
2005-06-29 15:57:19 +00:00
Andrew Lenharth
781dd8e05f
thinko
...
llvm-svn: 22309
2005-06-29 13:35:05 +00:00
Andrew Lenharth
6b4dbd7cd5
unify SelectExpr and SelectFP
...
llvm-svn: 22308
2005-06-29 12:49:51 +00:00
Andrew Lenharth
88491475e2
fix most regressions
...
llvm-svn: 22307
2005-06-29 12:23:34 +00:00
Andrew Lenharth
172871ba0f
support more relocations for stores also
...
llvm-svn: 22306
2005-06-29 00:39:17 +00:00
Andrew Lenharth
41d08a0bbe
Get rid of all symbolic loads. I now do gernate all relocations sequences
...
rather than relying on the assembler. Only a few more pseudo instructions
left. Also merge load code paths.
llvm-svn: 22305
2005-06-29 00:31:08 +00:00
Andrew Lenharth
d1dbc8ab27
some call work
...
llvm-svn: 22303
2005-06-27 23:59:51 +00:00
Andrew Lenharth
cc12cd8c5a
So, it turns out I forgot that one valid way of restoring GP after a call
...
is to use RA, which assumes the called function uses RA for the register
holding the return address when it issues a ret.
llvm-svn: 22301
2005-06-27 23:24:11 +00:00
Nate Begeman
032a94775d
Initial set of .td file changes necessary to get scalar fp in xmm registers
...
working. The instruction selector changes will hopefully be coming later
this week once they are debugged. This is necessary to support the darwin
x86 FP model, and is recommended by intel as the replacement for x87. As
a bonus, the register allocator knows how to deal with these registers
across basic blocks, unliky the FP stackifier. This leads to significantly
better codegen in several cases.
llvm-svn: 22300
2005-06-27 21:20:31 +00:00
Andrew Lenharth
34630b5ab0
get rid of another pseudo op
...
llvm-svn: 22299
2005-06-27 21:11:40 +00:00
Andrew Lenharth
b80c19b01a
generate address of constant pool entries
...
llvm-svn: 22298
2005-06-27 21:02:56 +00:00
Andrew Lenharth
6e30e970ed
Misha happification patch
...
llvm-svn: 22297
2005-06-27 17:39:17 +00:00
Andrew Lenharth
a3f70592a7
Reduce use of pseudo ops
...
Namely, output the rellocation flags explicitly when loading constants.
Added benifit: save a load when loading from the constant pool.
llvm-svn: 22296
2005-06-27 17:15:36 +00:00
Andrew Lenharth
573514894c
missed a load
...
llvm-svn: 22295
2005-06-27 16:40:26 +00:00
Andrew Lenharth
ac3ecf5338
make constant pool labels local
...
llvm-svn: 22294
2005-06-27 16:29:54 +00:00
Andrew Lenharth
f50cb3fad2
who said we had to use the return address in the return address register. Might save a move in many cases
...
llvm-svn: 22293
2005-06-27 15:36:48 +00:00
Chris Lattner
cd6b5c5011
Add support to the X86 backend for emitting ELF files. To use this, we
...
currently use: llc t.bc --filetype=obj
This will produce a t.o file which is dumpable with readelf. Currently
the file produced is empty, but the scaffolding to do more is now in place.
llvm-svn: 22292
2005-06-27 06:30:12 +00:00
Andrew Lenharth
9dc5d846ee
depend more on legalize putting constants on the RHS
...
llvm-svn: 22289
2005-06-26 23:01:11 +00:00
Andrew Lenharth
91bc570aac
With setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand), Legalize
...
should be able to handle this case. The code is there, so let's see
if it works.
llvm-svn: 22288
2005-06-26 22:23:06 +00:00
Chris Lattner
06282f51cf
Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile
...
interface.
llvm-svn: 22282
2005-06-25 02:48:37 +00:00
Andrew Lenharth
17f46306d6
remove a pseudo instruction, make ret always right, and fix vararg chains
...
llvm-svn: 22276
2005-06-23 23:42:05 +00:00
Andrew Lenharth
51d9d1b763
finally, Working varargs
...
llvm-svn: 22275
2005-06-23 16:48:51 +00:00
Andrew Lenharth
eda77c60a0
more complete Lowering for vacopy and vaarg
...
llvm-svn: 22274
2005-06-22 23:04:28 +00:00
Andrew Lenharth
4fd2bde906
If we support structs as va_list, we must pass pointers to them to va_copy
...
See last commit for LangRef, this implements it on all targets.
llvm-svn: 22273
2005-06-22 21:04:42 +00:00
Andrew Lenharth
e54b651806
Make it easier to find alpha stuff in doxygen, and fixup labeling
...
of memory instructions in the assembly, to allow later linking
of traces with LLVM Value*s.
llvm-svn: 22271
2005-06-22 17:19:45 +00:00
John Criswell
00c8485c77
Fixed indentation.
...
llvm-svn: 22270
2005-06-20 19:59:22 +00:00
Andrew Lenharth
4a1dc74471
so this doesn't crash when run. It is hard to tell if things are right enough to work correctly with all the TmpInstructions running around
...
llvm-svn: 22261
2005-06-19 05:45:00 +00:00
Andrew Lenharth
5750531305
OK, at least get rid of old stuff, and mark what needs to be fixed for V9
...
llvm-svn: 22255
2005-06-18 18:46:40 +00:00
Andrew Lenharth
a9214fec08
core changes for varargs
...
llvm-svn: 22254
2005-06-18 18:34:52 +00:00
Reid Spencer
678c9a3b00
Clean up some uninitialized variables and missing return statements that
...
GCC 4.0.0 compiler (sometimes incorrectly) warns about under release build.
llvm-svn: 22249
2005-06-18 17:37:34 +00:00
Andrew Lenharth
0bb2dab54a
A start at a Sparc V8 Pattern ISel. Anyone want to implement the calling
...
convention? ;)
llvm-svn: 22247
2005-06-17 16:52:12 +00:00
Chris Lattner
70914ca850
silence incredibly braindead GCC 4 warning
...
llvm-svn: 22246
2005-06-17 13:44:07 +00:00
Chris Lattner
dce633f2dd
silence a bogus warning
...
llvm-svn: 22245
2005-06-17 13:23:32 +00:00
Tanya Lattner
2114488760
Removed IIIi specific changes. This should be fixed to add floating point deps for the IIi.
...
llvm-svn: 22243
2005-06-17 04:21:09 +00:00
Tanya Lattner
c6760c1661
Special dep graph for SMS for superblocks.
...
llvm-svn: 22242
2005-06-17 04:16:14 +00:00
Tanya Lattner
7b1d09e9b2
Special versions of the dep graph and scheduled for SMS for superblocks.
...
llvm-svn: 22241
2005-06-17 04:15:43 +00:00
Tanya Lattner
6d38454b14
Added statistic to count number of spills.
...
llvm-svn: 22240
2005-06-17 04:01:34 +00:00
Tanya Lattner
3d6e51fdac
Numerous bug fixes and the completed modschedSB algorithm (minor bugs still exist for course).
...
llvm-svn: 22239
2005-06-17 04:00:57 +00:00
Tanya Lattner
df10cee694
Added SMS for superblocks as an option (experimental)
...
llvm-svn: 22238
2005-06-17 04:00:22 +00:00
Nate Begeman
12cd2d8d99
Commit fix for generating conditional branch pseudo instructions that
...
avoids dereferencing the end() iterator when selecting the fallthrough
block. This requires an ilist change.
llvm-svn: 22212
2005-06-15 18:22:43 +00:00
Nate Begeman
9bb1be2eec
Commit a small improvement that is already in the x86 and ia64 backends to
...
not generate unnecessary register copies. This improves compile time by
2-5% depending on the test.
llvm-svn: 22210
2005-06-14 03:55:23 +00:00
Nate Begeman
a2f68cf0f9
When compiled with GCC 4.0, a latent bug was exposed where both SparcV9
...
and the target independant register allocator were both using a class named
'LiveRange'. This lead to the target independant code calling code in the
SparcV9 backend, which crashed. Fixed by renaming SparcV9's LiveRange to
V9LiveRange.
llvm-svn: 22208
2005-06-12 23:52:58 +00:00
Nate Begeman
f516b866e5
Fix a memory smasher caught by Mac OS X's debug malloc library. We were
...
incorrectly using an iterator after it was invalid.
llvm-svn: 22207
2005-06-12 23:50:33 +00:00
Andrew Lenharth
ec1d1444bd
fix BranchCC with a setCC with an arg of 0
...
llvm-svn: 22203
2005-06-08 18:02:21 +00:00
Reid Spencer
a88b91d681
For PR572:
...
Undefine the PPC symbol which is defined by Linux/PPC (erroneously) so it
doesn't pollute the user namespace and clash with our namespace declarations.
llvm-svn: 22202
2005-06-08 17:44:48 +00:00
Nate Begeman
47cd13d42a
Handle some more real world cases of rlwimi. These don't come up that
...
regularly in "normal" code, but for things like software graphics, they
make a big difference.
For the following code:
unsigned short Trans16Bit(unsigned srcA,unsigned srcB,unsigned alpha)
{
unsigned tmpA,tmpB,mixed;
tmpA = ((srcA & 0x03E0) << 15) | (srcA & 0x7C1F);
tmpB = ((srcB & 0x03E0) << 15) | (srcB & 0x7C1F);
mixed = (tmpA * alpha) + (tmpB * (32 - alpha));
return ((mixed >> 5) & 0x7C1F) | ((mixed >> 20) & 0x03E0);
}
We now generate:
_Trans16Bit:
.LBB_Trans16Bit_0: ; entry
andi. r2, r4, 31775
rlwimi r2, r4, 15, 7, 11
subfic r4, r5, 32
mullw r2, r2, r4
andi. r4, r3, 31775
rlwimi r4, r3, 15, 7, 11
mullw r3, r4, r5
add r2, r2, r3
srwi r3, r2, 5
andi. r3, r3, 31775
rlwimi r3, r2, 12, 22, 26
blr
Instead of:
_Trans16Bit:
.LBB_Trans16Bit_0: ; entry
slwi r2, r4, 15
rlwinm r2, r2, 0, 7, 11
andi. r4, r4, 31775
or r2, r2, r4
subfic r4, r5, 32
mullw r2, r2, r4
slwi r4, r3, 15
rlwinm r4, r4, 0, 7, 11
andi. r3, r3, 31775
or r3, r4, r3
mullw r3, r3, r5
add r2, r2, r3
srwi r3, r2, 5
andi. r3, r3, 31775
srwi r2, r2, 20
rlwimi r3, r2, 0, 22, 26
blr
llvm-svn: 22201
2005-06-08 04:14:27 +00:00
Nate Begeman
023a21ea32
Fix lli linking on Mac OS X 10.4.1 for Intel.
...
llvm-svn: 22200
2005-06-08 01:02:38 +00:00
Misha Brukman
49f75fc763
Fix spelling of `correlate'
...
llvm-svn: 22196
2005-06-06 19:08:04 +00:00
Andrew Lenharth
03f6e6dbb6
allow marking of loads and stores in the instruction stream with enough information to reconstruct the Value* if it existed
...
llvm-svn: 22195
2005-06-06 19:03:55 +00:00
Andrew Lenharth
7ae4989a1f
hide basic block labels. The utility of these for debuging is long since passed
...
llvm-svn: 22194
2005-06-06 19:03:09 +00:00
Misha Brukman
c1841dd82f
* Replace block of commented-out lines with #if 0
...
* Remove warning "control reaches end of non-void function"
llvm-svn: 22193
2005-06-06 17:39:46 +00:00
Reid Spencer
966f750ad2
Make sure that Cygwin assembly includes _ as part of function names.
...
llvm-svn: 22190
2005-06-02 21:33:19 +00:00
Andrew Lenharth
d8c567af19
try custom expanders, doesn't seem to expand yet, so disabled
...
llvm-svn: 22188
2005-05-31 19:49:34 +00:00
Andrew Lenharth
ca6fa6fac6
switch to the new live in thing. Really, this time it works
...
llvm-svn: 22187
2005-05-31 18:42:18 +00:00
Andrew Lenharth
0cac09ef6c
switch to the new live in thing
...
llvm-svn: 22186
2005-05-31 18:37:16 +00:00
Andrew Lenharth
083ba1ead1
switch to the new live in thing
...
llvm-svn: 22185
2005-05-31 18:35:43 +00:00
Andrew Lenharth
8fec24bb7d
match gcc, makes diff easier
...
llvm-svn: 22179
2005-05-27 03:39:30 +00:00
Andrew Lenharth
4062a79a81
Fix 2005-05-12-Int64ToFP
...
The issue is there is no unsigned -> double conversion, only signed. So I
need to test the sign and do a different thing depending on it. Ideally
this should be in a different BB, but in the mean time, I use a branch
free method.
llvm-svn: 22177
2005-05-26 18:18:34 +00:00
Nate Begeman
f6e0f54d70
C'mon everybody, let's modify X86JITInfo.cpp. This time, we add <iostream>
...
so that the shiny new use of std::cerr is defined.
llvm-svn: 22156
2005-05-20 21:29:24 +00:00
Misha Brukman
48ca8224da
Since everyone else has "fixed" this file, might as well join in the fun.
...
* Change assert() to std::cerr printout, as it will not appear in opt builds
* Add comments to clarify what #ifdef/#else/#endif match what condition(s)
llvm-svn: 22154
2005-05-20 19:46:50 +00:00
Chris Lattner
f1479ae390
Fix this a 3rd time :)
...
llvm-svn: 22151
2005-05-20 17:00:21 +00:00
Andrew Lenharth
46b9d601f5
fix compilation error due to no abort being defined. There is probably a better way to do this
...
llvm-svn: 22150
2005-05-20 16:34:44 +00:00
Duraid Madina
44ac7502fd
re-enable direct calls, this should just be a performance boost
...
llvm-svn: 22148
2005-05-20 11:39:17 +00:00
Duraid Madina
c043395fe8
this seems dead (and broke the ia64 build, so..)
...
llvm-svn: 22147
2005-05-20 06:21:59 +00:00
Jeff Cohen
a0f463a25c
Fix tail call support in VC++ builds
...
llvm-svn: 22143
2005-05-20 01:35:39 +00:00
Chris Lattner
c1d9b43fc1
Fastcc passes arguments in EAX and EDX, make sure the JIT doesn't clobber them
...
llvm-svn: 22137
2005-05-19 06:49:17 +00:00
Chris Lattner
6dcae1c96e
Tailcalls require stubs to be emitted. Otherwise, the compilation callback
...
doesn't know who 'called' it.
llvm-svn: 22136
2005-05-19 05:54:33 +00:00
Misha Brukman
49fe7aa1d6
Wrap long lines
...
llvm-svn: 22125
2005-05-18 20:37:33 +00:00
Chris Lattner
0366a913ad
PPC "branch and link" instructions are branches in the PPC sense, but not
...
in the LLVM code generator sense (they are calls). Don't mark them as such,
which fixes the regressions on the ppc tester last night
llvm-svn: 22065
2005-05-15 20:11:44 +00:00
Chris Lattner
9fc81f1162
Fix andrews changes to fit in 80 columns
...
llvm-svn: 22064
2005-05-15 19:54:37 +00:00
Duraid Madina
03a7327d63
make angry compilers happy again
...
llvm-svn: 22054
2005-05-15 14:44:13 +00:00
Chris Lattner
95650a26b2
don't reserve space for tailcall arg areas. It explicitly managed.
...
llvm-svn: 22050
2005-05-15 06:07:10 +00:00
Chris Lattner
2fd2e53f6a
Teach reginfo how to deal with ADJSTACKPTRri, allowing us to generate:
...
add %ESP, 20
jmp %EDX # TAIL CALL
instead of:
add %ESP, -8
add %ESP, 28
jmp %EDX # TAIL CALL
llvm-svn: 22047
2005-05-15 05:49:58 +00:00
Chris Lattner
77f8c2cece
Implement proper tail calls in the X86 backend for all fastcc->fastcc
...
tail calls.
llvm-svn: 22046
2005-05-15 05:46:45 +00:00
Chris Lattner
7327c042b4
Add markers in the asm file for tail calls, add a new ADJSTACKPTRri
...
sorta-pseudo-instruction
llvm-svn: 22042
2005-05-15 03:10:37 +00:00
Chris Lattner
64232a8480
Yes, calltarget is the operand of the day.
...
llvm-svn: 22040
2005-05-15 01:10:30 +00:00
Chris Lattner
adb31a99fa
When emitting the function epilog, check to see if there already a stack
...
adjustment. If so, we merge the adjustment into the existing one. This
allows us to generate:
caller2:
sub %ESP, 12
mov DWORD PTR [%ESP], 0
mov %EAX, 1234567890
mov %EDX, 0
call func2
add %ESP, 8
ret 4
intead of:
caller2:
sub %ESP, 12
mov DWORD PTR [%ESP], 0
mov %EAX, 1234567890
mov %EDX, 0
call func2
sub %ESP, 4
add %ESP, 12
ret 4
for X86/fast-cc-merge-stack-adj.ll
llvm-svn: 22038
2005-05-14 23:53:43 +00:00
Chris Lattner
37e226fa9b
Add some new instructions
...
llvm-svn: 22036
2005-05-14 23:35:21 +00:00
Chris Lattner
9d106c705d
Pass i64 values correctly split in reg/mem to fastcc calls.
...
This fixes fourinarow with -enable-x86-fastcc.
llvm-svn: 22022
2005-05-14 12:03:10 +00:00
Chris Lattner
adde8b1a71
Use target-specific nodes for calls. This allows the fastcc code to not have
...
to do ugly hackery to avoid emitting code like this:
call foo
mov vreg, EAX
adjcallstackup ...
If foo is a fastcc call and if vreg gets spilled, we might end up with this:
call foo
mov [ESP+offset], EAX ;; Offset doesn't consider the 12!
sub ESP, 12
Which is bad. The previous hacky code to deal with this was A) gross B) not
good enough. In particular, it could miss cases and emit the bad code above.
Now we always emit this:
call foo
adjcallstackup ...
mov vreg, EAX
directly.
This makes fastcc with callees poping the stack work much better. Next
stop (finally!) really is tail calls.
llvm-svn: 22021
2005-05-14 08:48:15 +00:00
Chris Lattner
c0c6680744
use a target-specific node and custom expander to lower long->FP to FILD64m.
...
This should fix some missing symbols problems on BSD and improve performance
of programs that use that operation.
llvm-svn: 22012
2005-05-14 06:52:07 +00:00
Chris Lattner
2210f7d6e9
Make sure the start of the arg area and the end (after the RA is pushed)
...
is always 8-byte aligned for fastcc
llvm-svn: 21995
2005-05-13 23:49:10 +00:00
Chris Lattner
1634435c77
fix typo
...
llvm-svn: 21991
2005-05-13 22:46:57 +00:00
Chris Lattner
0d4b08e470
Fix the problems with callee popped argument lists
...
llvm-svn: 21988
2005-05-13 22:13:49 +00:00
Chris Lattner
e667c34ef1
Don't emit SAR X, 0 in the case of sdiv Y, 2
...
llvm-svn: 21986
2005-05-13 21:50:27 +00:00
Chris Lattner
fc630bb4f0
Fix UnitTests/2005-05-13-SDivTwo.c
...
llvm-svn: 21985
2005-05-13 21:48:20 +00:00
Chris Lattner
62593e4e66
switch to having the callee pop stack operands for fastcc. This is currently buggy
...
do not use
llvm-svn: 21984
2005-05-13 21:44:04 +00:00
Chris Lattner
e9944b033d
allow RETI
...
llvm-svn: 21980
2005-05-13 20:46:35 +00:00
Chris Lattner
93007dda7d
treat TAILCALL nodes identically to CALL nodes
...
llvm-svn: 21977
2005-05-13 20:29:26 +00:00
Chris Lattner
2c9d871f9b
Build TAILCALL nodes in LowerCallTo, treat them like normal calls everywhere.
...
llvm-svn: 21976
2005-05-13 20:29:13 +00:00
Chris Lattner
f637d56882
capitalize
...
llvm-svn: 21962
2005-05-13 19:48:34 +00:00
Chris Lattner
df23ee9e48
clarify that these are v9 options
...
llvm-svn: 21960
2005-05-13 19:45:45 +00:00
Chris Lattner
653c791170
hide this option
...
llvm-svn: 21959
2005-05-13 19:44:21 +00:00
Chris Lattner
9d788e93a6
Add an isTailCall flag to LowerCallTo
...
llvm-svn: 21958
2005-05-13 18:50:42 +00:00
Chris Lattner
83d7e55471
add 'ret imm' instruction
...
llvm-svn: 21945
2005-05-13 17:56:48 +00:00
Chris Lattner
f8795289ff
Realize that we don't support fmod directly, fixing CodeGen/Generic/print-arith-fp.ll
...
llvm-svn: 21939
2005-05-13 16:20:22 +00:00
Chris Lattner
7c3b219c28
Do not CopyFromReg physregs for live-in values. Instead, create a vreg for
...
each live in, and copy the regs from the vregs. As the very first thing we
do in the function, insert copies from the pregs to the vregs. This fixes
problems where the token chain of CopyFromReg was not enough to allow reordering
of the copyfromreg nodes and other unchained nodes (e.g. div, which clobbers
eax on intel).
llvm-svn: 21932
2005-05-13 07:38:09 +00:00
Chris Lattner
094bbfcebb
rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN.
...
llvm-svn: 21915
2005-05-12 23:24:06 +00:00
Chris Lattner
3106dfa185
Add a new -enable-x86-fastcc option that enables passing the first
...
two integer values in registers for the fastcc calling conv.
llvm-svn: 21912
2005-05-12 23:06:28 +00:00
Chris Lattner
7e08dd591c
Pass in Calling Convention to use into LowerCallTo
...
llvm-svn: 21899
2005-05-12 19:56:45 +00:00
Chris Lattner
d8766cdae2
Enable pattern isel by default
...
llvm-svn: 21898
2005-05-12 19:56:09 +00:00
Chris Lattner
6b0a45e42c
These targets don't like setcc
...
llvm-svn: 21884
2005-05-12 02:06:00 +00:00
Nate Begeman
e84f776b5d
Necessary changes to codegen cttz efficiently on PowerPC
...
1. Teach LegalizeDAG how to better legalize CTTZ if the target doesn't have
CTPOP, but does have CTLZ
2. Teach PPC32 how to do sub x, const -> add x, -const for valid consts
3. Teach PPC32 how to do and (xor a, -1) b -> andc b, a
4. Teach PPC32 that ISD::CTLZ -> PPC::CNTLZW
llvm-svn: 21880
2005-05-11 23:43:56 +00:00
Tanya Lattner
265167f8db
Fixed issue that broke ssa.
...
llvm-svn: 21878
2005-05-11 21:45:03 +00:00
Chris Lattner
da3dd2f9e2
fix some GCC 4 warnings
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llvm-svn: 21877
2005-05-11 21:40:40 +00:00
John Criswell
38c97a63d4
Added support for decomposing constant expressions containing shr and shl
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instructions.
Review of this commit would be greatly appreciated.
llvm-svn: 21876
2005-05-11 21:16:42 +00:00
Duraid Madina
b9062e56cf
add the popcount instruction and support this in the isel
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the primary user of this will probably end up being find-first-set-bit/find-
last-set-bit, which i'll get around to...
llvm-svn: 21860
2005-05-11 05:16:09 +00:00
Chris Lattner
d5d2886ee7
No really IA*64* :)
...
llvm-svn: 21858
2005-05-11 05:03:56 +00:00
Chris Lattner
e358ac532b
X86 has more than just 32-bit registers
...
llvm-svn: 21857
2005-05-11 05:00:34 +00:00
Chris Lattner
8230bddde2
Convert feature of the simple isel over for the pattern isel to use.
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llvm-svn: 21840
2005-05-10 03:53:18 +00:00
Jeff Cohen
afc58006b7
Silence some VC++ warnings
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llvm-svn: 21838
2005-05-10 02:22:38 +00:00
Chris Lattner
d96aea21d7
Implement READPORT/WRITEPORT, implementing the last X86 regression tests
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that were failing with the pattern selector. Note that the support that
existed in the simple selector was clearly broken in several ways though
(which has also been fixed).
llvm-svn: 21831
2005-05-09 21:17:38 +00:00
Chris Lattner
6a55b1d4dd
do not emit illegal instructions
...
llvm-svn: 21830
2005-05-09 21:06:04 +00:00
Chris Lattner
7ba0699b05
Fix the syntax of the i/o instructions, these are obviously unused.
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llvm-svn: 21829
2005-05-09 20:49:20 +00:00
Chris Lattner
46b51ab388
legalize readio/writeio into load/stores, fixing CodeGen/X86/io.llx with
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the pattern isel.
llvm-svn: 21828
2005-05-09 20:37:29 +00:00
Chris Lattner
b28f865865
restore some non-dead code I removed last night breaking double casts to
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uint
llvm-svn: 21821
2005-05-09 18:37:02 +00:00
Chris Lattner
333ae3d837
fold and (shl X, C1), C2 -> rlwinm when possible. Many other cases are possible,
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include and (srl) and the inverses (shl and) etc.
llvm-svn: 21820
2005-05-09 17:39:48 +00:00
Duraid Madina
64a52fc615
fix and cleanup constmul code a bit, this fixes mediabench/toast and
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probably a couple of other tests.
llvm-svn: 21814
2005-05-09 13:18:34 +00:00
Chris Lattner
3094cec3c9
Wrap long lines, remove dead code that is now handled by legalize
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llvm-svn: 21811
2005-05-09 05:40:26 +00:00
Chris Lattner
5d291fa443
Fix FP -> bool casts
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llvm-svn: 21810
2005-05-09 05:33:18 +00:00
Chris Lattner
65d61d9d44
Fix X86/2005-05-08-FPStackifierPHI.ll: ugly gross hack.
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llvm-svn: 21801
2005-05-09 03:36:39 +00:00
Chris Lattner
1bc2753d69
clean up the CBE output a bit
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llvm-svn: 21740
2005-05-06 06:58:42 +00:00
Chris Lattner
f70b2785b7
add tail marker as a comment
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llvm-svn: 21739
2005-05-06 06:53:07 +00:00
Andrew Lenharth
8e2beec4d1
fix typo
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llvm-svn: 21693
2005-05-04 19:25:37 +00:00
Andrew Lenharth
58ff51b153
Well, add support for ct* for 21264 only.
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21164 is broken until expand works.
llvm-svn: 21692
2005-05-04 19:12:09 +00:00
Andrew Lenharth
8b64bd0fd5
Implement count leading zeros (ctlz), count trailing zeros (cttz), and count
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population (ctpop). Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.
More coming soon.
llvm-svn: 21676
2005-05-03 17:19:30 +00:00
Duraid Madina
4d9c8f8dce
support multiplication by constant negative integers
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this constmul code is still buggy though, so beware. mul by 7427 is currently
broken, for example. will fix it when I get a moment :)
llvm-svn: 21652
2005-05-02 07:27:14 +00:00
Duraid Madina
7a185a79a5
add support for bools to SELECT, this fixes Prolangs-C/bison from the
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testsuite, however 09-vor is still dead (hopefully for other reasons!)
llvm-svn: 21651
2005-05-02 06:41:13 +00:00
Tanya Lattner
845b0cc908
SMS for superblocks.
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llvm-svn: 21643
2005-05-01 01:27:47 +00:00
Tanya Lattner
b9da851880
Added extra constructor for superblocks.
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llvm-svn: 21642
2005-05-01 01:25:53 +00:00
Tanya Lattner
425f215095
Fixed bug in searchPath function for finding nodes between two recurrences.
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Changed dependence analyzer to only use dep distances of 2 or less.
This is experimental.
Changed MSchedGraph to be able to represent more then one BB (first steps).
llvm-svn: 21641
2005-04-30 23:07:59 +00:00
Andrew Lenharth
936709ad19
I was sure I had thought about this and there was a reason it should work.
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But it is entirely possible I am just crazy.
llvm-svn: 21640
2005-04-30 14:19:13 +00:00
Chris Lattner
b0f53013d6
Eliminate some random whitespace
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llvm-svn: 21637
2005-04-30 04:44:07 +00:00
Chris Lattner
b0af0dd919
Doesn't support these nodes
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llvm-svn: 21634
2005-04-30 04:26:56 +00:00
Chris Lattner
ce0d8c2408
This target doesn't support the FSIN/FCOS/FSQRT nodes yet
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llvm-svn: 21633
2005-04-30 04:26:06 +00:00
Chris Lattner
15d29b0220
Add support for FSIN/FCOS when unsafe math ops are enabled. Patch contributed by
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Morten Ofstad!
llvm-svn: 21632
2005-04-30 04:25:35 +00:00
Chris Lattner
663664d10c
Add support for llvm.sqrt and sin/cos if unsafe math optimizations are enabled.
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llvm-svn: 21631
2005-04-30 04:12:40 +00:00
Chris Lattner
05d8a36ba7
Expose an option allowing unsafe math optimizations. Patch contributed by
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Morten Ofstad!
llvm-svn: 21630
2005-04-30 04:09:52 +00:00
Chris Lattner
27a534f181
Add support for FSQRT node, patch contributed by Morten Ofstad
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llvm-svn: 21610
2005-04-28 22:07:18 +00:00
Chris Lattner
236cef3563
Add some new X86 instrs, patch contributed by Morten Ofstad
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llvm-svn: 21608
2005-04-28 21:50:05 +00:00
Chris Lattner
2f7a83ffbf
Codegen fabs/fabsf as FABS. Patch contributed by Morten Ofstad
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llvm-svn: 21607
2005-04-28 21:48:42 +00:00
Andrew Lenharth
2a00530fa7
Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends.
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(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*. Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.
llvm-svn: 21599
2005-04-27 20:10:01 +00:00
Duraid Madina
2f8f3f018d
clean up some warnings
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llvm-svn: 21590
2005-04-27 11:57:39 +00:00
Duraid Madina
90bcae7fd2
constmul bugfix: multiply by 27611 was broken
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llvm-svn: 21564
2005-04-26 09:42:50 +00:00
Duraid Madina
675a0b9769
clean up the code! (oops) lots more cleaning left, however.
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llvm-svn: 21563
2005-04-26 08:43:47 +00:00
Duraid Madina
ee826ec8f6
* Add code to reduce multiplies by constant integers to shifts, adds and
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subtracts. This is a very rough and nasty implementation of Lefevre's
"pattern finding" algorithm. With a few small changes though, it should
end up beating most other methods in common use, regardless of the size
of the constant (currently, it's often one or two shifts worse)
TODO: rewrite it so it's not hideously ugly (this is a translation from
perl, which doesn't help ;)
bypass most of it for multiplies by 2^n+1
(eventually) teach it that some combinations of shift+add are
cheaper than others (e.g. shladd on ia64, scaled adds on alpha)
get it to try multiple booth encodings in search of the cheapest
routine
make it work for negative constants
This is hacked up as a DAG->DAG transform, so once I clean it up I hope
it'll be pulled out of here and put somewhere else. The only thing backends
should really have to worry about for now is where to draw the line
between using this code vs. going ahead and doing an integer multiply
anyway.
llvm-svn: 21560
2005-04-26 07:23:02 +00:00
Reid Spencer
e952b16f37
Shut GCC 4.0 up about classes that have virtual functions but a non-virtual
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destructor. Just add the do-nothing virtual destructor.
llvm-svn: 21524
2005-04-25 02:55:55 +00:00
Misha Brukman
b3e2f08638
Convert tabs to spaces
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llvm-svn: 21457
2005-04-22 18:06:01 +00:00
Misha Brukman
66d3c6e020
Convert tabs to spaces
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llvm-svn: 21452
2005-04-22 17:54:37 +00:00
Reid Spencer
868f3fb2e0
Implement the --enable-targets= feature of the configure script. The make
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variable TARGETS_TO_BUILD is used to determine which targets in lib/Target
are built and which libraries are linked into llc. This effectively
implements the feature. One item remains: disabling targets in the dejagnu
test suite.
llvm-svn: 21450
2005-04-22 17:20:11 +00:00
Andrew Lenharth
25a03c00c7
keep track of max depth stats
...
llvm-svn: 21446
2005-04-22 13:35:18 +00:00
Tanya Lattner
3f4d35ca74
Updated dependence analyzer. Fixed numerous bugs. Same stage scheduling, etc.
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llvm-svn: 21444
2005-04-22 06:32:48 +00:00
Misha Brukman
bf3f6181fd
* Remove trailing whitespace
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* Convert tabs to spaces
llvm-svn: 21426
2005-04-21 23:38:14 +00:00
Misha Brukman
1fef885677
Remove trailing whitespace
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llvm-svn: 21425
2005-04-21 23:30:14 +00:00
Misha Brukman
1fdf39f2ea
Remove trailing whitespace
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llvm-svn: 21424
2005-04-21 23:13:11 +00:00
Misha Brukman
933cdaf254
Remove trailing whitespace
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llvm-svn: 21422
2005-04-21 22:55:34 +00:00
Chris Lattner
208da25af0
Match another form of eqv
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llvm-svn: 21413
2005-04-21 21:09:11 +00:00
Chris Lattner
8d813a7d51
Handle stores of global address as stores of immediates. Instead of:
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test1:
movl $N, %eax
movl %eax, G
ret
emit:
test1:
movl $N, G
ret
llvm-svn: 21407
2005-04-21 19:11:03 +00:00
Chris Lattner
706775467b
Handle (store &GV -> mem) as a store immediate. This often occurs for
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printf format strings and other stuff. Instead of generating this:
movl $l1__2E_str_1, %eax
movl %eax, (%esp)
we now emit:
movl $l1__2E_str_1, (%esp)
llvm-svn: 21406
2005-04-21 19:03:24 +00:00
Misha Brukman
e096a50cb7
Remove trailing whitespace, patch by Markus Oberhumer.
...
llvm-svn: 21379
2005-04-20 16:05:03 +00:00
Chris Lattner
3d4612c54c
Add completely untested support for mtcrf/mfcrf encoding
...
llvm-svn: 21353
2005-04-19 05:41:52 +00:00
Chris Lattner
e6f861f92c
switch over the rest of the formats that use RC to use isDOT
...
llvm-svn: 21352
2005-04-19 05:21:30 +00:00
Chris Lattner
082ca8fcab
Convert the XForm instrs and XSForm instruction over to use isDOT
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llvm-svn: 21351
2005-04-19 05:15:18 +00:00
Chris Lattner
3fdfd4e009
Now that the ppc64 and vmx operands of I are always 0, forward substitute
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them away.
llvm-svn: 21350
2005-04-19 05:05:22 +00:00
Chris Lattner
e6f7713f03
convert over bform and iform instructions
...
llvm-svn: 21349
2005-04-19 05:00:59 +00:00
Chris Lattner
3ae0832381
Convert over DForm and DSForm instructions
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llvm-svn: 21348
2005-04-19 04:59:28 +00:00
Chris Lattner
4ecf523af4
Convert XLForm and XForm instructions over to use PPC64 when appropriate.
...
llvm-svn: 21347
2005-04-19 04:51:30 +00:00
Chris Lattner
6a2abe8591
Convert XO XS and XFX forms to use isPPC64
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llvm-svn: 21346
2005-04-19 04:40:07 +00:00
Chris Lattner
3cfa7a24cb
Turn PPC64 and VMX into classes that can be added to instructions instead of
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bits that must be passed up the inheritance hierarchy. Convert MForm and AForm
instructions over
llvm-svn: 21345
2005-04-19 04:32:54 +00:00
Nate Begeman
3b1c0df702
Next round of PPC CR optimizations. For the following code:
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int %bar(float %a, float %b, float %c, float %d) {
entry:
%tmp.1 = setlt float %a, %d
%tmp.2 = setlt float %b, %d
%or = or bool %tmp.1, %tmp.2
%tmp.3 = setgt float %c, %d
%tmp.4 = or bool %or, %tmp.3
%tmp.5 = and bool %tmp.4, true
%retval = cast bool %tmp.5 to int
ret int %retval
}
We now emit:
_bar:
.LBB_bar_0: ; entry
fcmpu cr0, f1, f4
fcmpu cr1, f2, f4
cror 0, 0, 4
fcmpu cr1, f3, f4
cror 28, 0, 5
mfcr r2
rlwinm r3, r2, 29, 31, 31
blr
Instead of:
_bar:
.LBB_bar_0: ; entry
fcmpu cr7, f1, f4
mfcr r2
rlwinm r2, r2, 29, 31, 31
fcmpu cr7, f2, f4
mfcr r3
rlwinm r3, r3, 29, 31, 31
or r2, r2, r3
fcmpu cr7, f3, f4
mfcr r3
rlwinm r3, r3, 30, 31, 31
or r3, r2, r3
blr
llvm-svn: 21321
2005-04-18 07:48:09 +00:00
Nate Begeman
85cd65b389
Change codegen for setcc to read the bit directly out of the condition
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register. Added support in the .td file for the g5-specific variant
of cr -> gpr moves that executes faster, but we currently don't
generate it.
llvm-svn: 21314
2005-04-18 02:43:24 +00:00
Chris Lattner
a1fd64a073
Handle ExternalSymbol operands in the PPC JIT
...
llvm-svn: 21312
2005-04-18 00:46:10 +00:00
Nate Begeman
ecb5b5c028
Make pattern isel default for ppc
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Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
0 == off
1 == on
2 == target default
llvm-svn: 21309
2005-04-15 22:12:16 +00:00
Andrew Lenharth
f091300df2
fix calls
...
llvm-svn: 21303
2005-04-14 17:34:20 +00:00
Andrew Lenharth
23a5d0bba4
a 21264 fix, and fix the operator precidence on an and -> zap check (should fix hundreds of test cases
...
llvm-svn: 21302
2005-04-14 16:24:00 +00:00
Duraid Madina
0c40c548c0
print negative 64 bit immediates as negative numbers, makes things a little
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easier on the eyes, not that numbers like 18446744073709541376 are bad or
anything
llvm-svn: 21300
2005-04-14 10:08:01 +00:00
Duraid Madina
b8dfae92e9
oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4
...
llvm-svn: 21299
2005-04-14 10:06:35 +00:00
Nate Begeman
604895b03c
Implement multi-way branches through logical ops on condition registers.
...
This can generate considerably shorter code, reducing the size of crafty
by almost 1%. Also fix the printing of mcrf. The code is currently
disabled until it gets a bit more testing, but should work as-is.
llvm-svn: 21298
2005-04-14 09:45:08 +00:00
Duraid Madina
eb4c15b42c
we have zextloads, not sextloads!
...
llvm-svn: 21296
2005-04-14 08:37:32 +00:00
Nate Begeman
b707ec16b4
Add the necessary support to codegen condition register logical ops with
...
register allocated condition registers. Make sure that the printed
output is gas compatible.
llvm-svn: 21295
2005-04-14 03:20:38 +00:00
Nate Begeman
99a9840b56
Start allocating condition registers. Almost all explicit uses of CR0 are
...
now gone. Next step is to get rid of the remaining ones and then start
allocating bools to CRs where appropriate.
llvm-svn: 21294
2005-04-13 23:15:44 +00:00
Nate Begeman
ae49d52006
Implement the fold shift X, zext(Y) -> shift X, Y at the target level,
...
where it is safe to do so.
llvm-svn: 21293
2005-04-13 22:14:14 +00:00
Nate Begeman
20b3399465
Disbale the broken fold of shift + sz[ext] for now
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Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
always produces zero or one.
llvm-svn: 21291
2005-04-13 21:23:31 +00:00
Andrew Lenharth
cbf7a52768
WOW, function calls still seem to work after this.
...
llvm-svn: 21286
2005-04-13 17:17:28 +00:00
Andrew Lenharth
d1fee6d24a
prepare for func call optimization
...
llvm-svn: 21285
2005-04-13 16:19:50 +00:00
Duraid Madina
b9d2d9ac63
* add the shladd instruction
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* fold left shifts of 1, 2, 3 or 4 bits into adds
This doesn't save much now, but should get a serious workout once
multiplies by constants get converted to shift/add/sub sequences.
Hold on! :)
llvm-svn: 21282
2005-04-13 06:12:04 +00:00
Andrew Lenharth
ec33ab6a2f
add matches for SxADDL and company, as well as simplify the SxADDQ code
...
llvm-svn: 21281
2005-04-13 05:19:55 +00:00
Duraid Madina
67e553e521
* if ANDing with a constant of the form:
...
0x00000..00FFF..FF
^ ^
^ ^
any number of
0's followed by
some number of
1's
then we use dep.z to just paste zeros over the input. For the special
cases where this is zxt1/zxt2/zxt4, we use those instructions instead,
because we're all about readability!!!
that's what it's about!! readability!
*twitch* ;D
llvm-svn: 21279
2005-04-13 04:50:54 +00:00
Andrew Lenharth
510db15268
added all flavors of zap for anding
...
llvm-svn: 21276
2005-04-13 03:47:03 +00:00
Chris Lattner
85c6a7bed0
Fix some mysteriously missing {}'s which cause the miscompilation of
...
Olden/mst, Ptrdist/bc, Obsequi, etc.
llvm-svn: 21274
2005-04-13 03:29:53 +00:00
Chris Lattner
8489ac991d
remove one more occurance of this that snuck in
...
llvm-svn: 21271
2005-04-13 02:46:17 +00:00
Chris Lattner
5fdb103328
Remove support for ZERO_EXTEND_INREG. This pessimizes code, genering stuff
...
like this:
ldah $1,1($31)
lda $1,-1($1)
and $0,$1,$24
instead of this:
zap $0,252,$24
To get this back, the selector should recognize the ISD::AND case where this
happens and emit the appropriate ZAP instruction.
llvm-svn: 21270
2005-04-13 02:43:40 +00:00
Chris Lattner
a2e92e69da
Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causing
...
things like this:
mov r9 = 65535;;
and r8 = r8, r9;;
To be emitted instead of:
zxt2 r8 = r8;;
To get this back, the selector for ISD::AND should recognize this case.
llvm-svn: 21269
2005-04-13 02:41:52 +00:00