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Commit Graph

2494 Commits

Author SHA1 Message Date
Stuart Hastings
fd42046d56 Revert 127359; it broke lencod.
llvm-svn: 127382
2011-03-10 00:25:53 +00:00
Benjamin Kramer
8313cf1cf4 Fix mistyped CHECK lines.
llvm-svn: 127366
2011-03-09 22:07:31 +00:00
Stuart Hastings
6c99b422b1 Tweak test to work on Linux.
llvm-svn: 127364
2011-03-09 21:35:10 +00:00
Stuart Hastings
5c555821bb Disable this test temporarily to reduce BuildBot complaints.
llvm-svn: 127363
2011-03-09 21:33:47 +00:00
Stuart Hastings
61f9a3dab2 X86 byval copies no longer always_inline. <rdar://problem/8706628>
llvm-svn: 127359
2011-03-09 21:10:30 +00:00
Jakob Stoklund Olesen
4d0c9d0af7 Make physreg coalescing independent on the number of uses of the virtual register.
The damage done by physreg coalescing only depends on the number of instructions
the extended physreg live range covers. This fixes PR9438.

The heuristic is still luck-based, and physreg coalescing really should be
disabled completely. We need a register allocator with better hinting support
before that is possible.

Convert a test to FileCheck and force spilling by inserting an extra call. The
previous spilling behavior was dependent on misguided physreg coalescing
decisions.

llvm-svn: 127351
2011-03-09 19:27:06 +00:00
Jakob Stoklund Olesen
10d5d5d25c Delete a test case that is very sensitive to coalescer behavior.
The test is derived from an old miscompilation of
MultiSource/Benchmarks/VersaBench/8b10b which is run regularly, so we are not
losing coverage.

llvm-svn: 127350
2011-03-09 19:27:02 +00:00
Andrew Trick
0b0002dfba This test case should work with list-ilp or list-burr.
llvm-svn: 127348
2011-03-09 19:17:10 +00:00
NAKAMURA Takumi
fe84f8672a Target/X86: Tweak va_arg for Win64 not to miss taking va_start when number of fixed args > 4.
llvm-svn: 127328
2011-03-09 11:33:15 +00:00
Eric Christopher
3ffd0d2f15 Fix testcase.
llvm-svn: 127298
2011-03-09 00:41:41 +00:00
Benjamin Kramer
c3944efb6f Strip cruft.
llvm-svn: 127269
2011-03-08 20:19:10 +00:00
Eric Christopher
1be4747d53 Add a testcase for r127263.
llvm-svn: 127266
2011-03-08 19:49:15 +00:00
Benjamin Kramer
d5782492c8 X86: Fix the (saddo/ssub x, 1) -> incl/decl selection to check the right operand for 1.
Found by inspection.

llvm-svn: 127247
2011-03-08 15:20:20 +00:00
Eric Christopher
72d7cc25f3 Turn on list-ilp scheduling by default on x86 and x86-64, fix up
testcases accordingly. Some are currently xfailed and will be filed
as bugs to be fixed or understood.

Performance results:

roughly neutral on SPEC
some micro benchmarks in the llvm suite are up between 100 and 150%, only
a pair of regressions that are due to be investigated

john-the-ripper saw:
10% improvement in traditional DES
8% improvement in BSDI DES
59% improvement in FreeBSD MD5
67% improvement in OpenBSD Blowfish
14% improvement in LM DES

Small compile time impact.

llvm-svn: 127208
2011-03-08 02:42:25 +00:00
NAKAMURA Takumi
ef9dd6b5db test/CodeGen/X86/vec_cast.ll: [PR8311] Add explicit -mtriple=x86_64-linux and -mtriple=x86_64-win32. Thanks to Nadav, it might be fixed in r126424.
llvm-svn: 127060
2011-03-05 02:38:02 +00:00
Dan Gohman
a8389213a0 When decling to reuse existing expressions that involve casts, ignore
bitcasts, which are really no-ops here. This fixes slowdowns on
MultiSource/Applications/aha and others.

llvm-svn: 127031
2011-03-04 20:46:46 +00:00
Joerg Sonnenberger
5f2f5fa638 Be nice to Xcore and the XMOS assembler and avoid quoting section names
that contain only letters, digits and the characters "_" and ".".

llvm-svn: 127028
2011-03-04 20:03:14 +00:00
Eli Friedman
26f5c96de3 Revert r123908; the code in question is completely untested and wrong.
llvm-svn: 126964
2011-03-03 22:33:23 +00:00
Joerg Sonnenberger
bb93506f95 Bug#9033: For the ELF assembler output, always quote the section name.
llvm-svn: 126963
2011-03-03 22:31:08 +00:00
Stuart Hastings
efcae37ebf Test case for r126864. Radar 9056407.
llvm-svn: 126900
2011-03-02 23:41:40 +00:00
David Greene
2fd6d03bc9 [AVX] Fix mask predicates for 256-bit UNPCKLPS/D and implement
missing patterns for them.

      Add a SIMD test subdirectory to hold tests for SIMD instruction
      selection correctness and quality.
'

llvm-svn: 126845
2011-03-02 17:23:43 +00:00
Cameron Zwarich
6a4612ba06 Eliminate the unused CodeGenPrepare option to split critical edges.
llvm-svn: 126825
2011-03-02 03:31:46 +00:00
Dan Gohman
0823ebc79b Don't re-use existing addrec expansions if they contain casts.
This fixes PR9259.

llvm-svn: 126812
2011-03-02 01:34:10 +00:00
Evan Cheng
5275ba7f98 Catch more cases where 2-address pass should 3-addressify instructions. rdar://9002648.
llvm-svn: 126811
2011-03-02 01:08:17 +00:00
Duncan Sands
0f78cf8a37 Windows codegen also dies on this, so restrict to the platform it was
actually tested on.

llvm-svn: 126652
2011-02-28 14:22:08 +00:00
Duncan Sands
195d2036d0 Make this test x86 specific because the ARM backend can't handle it.
llvm-svn: 126650
2011-02-28 12:30:47 +00:00
NAKAMURA Takumi
b35d45a714 Target/X86: Always emit "push/pop GPRs" in prologue/epilogue and emit "spill/reload frames" for XMMs.
It improves Win64's prologue/epilogue but it would not affect ia32 and amd64 (lack of nonvolatile XMMs).

llvm-svn: 126568
2011-02-27 08:47:19 +00:00
Cameron Zwarich
764320383d Fix PR9324 / <rdar://problem/9052489> by handling the case where a PHI has no uses.
llvm-svn: 126567
2011-02-27 08:06:01 +00:00
Cameron Zwarich
1409977fe2 Give a test file a more sensible name so that it can hold more test cases.
llvm-svn: 126566
2011-02-27 08:05:57 +00:00
Benjamin Kramer
412ffed4f0 Add some DAGCombines for (adde 0, 0, glue), which are useful to optimize legalized code for large integer arithmetic.
1. Inform users of ADDEs with two 0 operands that it never sets carry
2. Fold other ADDs or ADDCs into the ADDE if possible

It would be neat if we could do the same thing for SETCC+ADD eventually, but we can't do that in target independent code.

llvm-svn: 126557
2011-02-26 22:48:07 +00:00
Nadav Rotem
ab7cf630f4 Enable support for vector sext and trunc:
Limit the folding of any_ext and sext  into the load operation to scalars.
Limit the active-bits trunc optimization to scalars.
Document vector trunc and vector sext in LangRef.

Similar to commit 126080 (for enabling zext).

llvm-svn: 126424
2011-02-24 21:01:34 +00:00
Devang Patel
bac565c8a3 Move arch specific tests in arch specific directories.
llvm-svn: 126401
2011-02-24 19:06:27 +00:00
Cameron Zwarich
724eb8706a Merge information about the number of zero, one, and sign bits of live-out
registers at phis. This enables us to eliminate a lot of pointless zexts during
the DAGCombine phase. This fixes <rdar://problem/8760114>.

llvm-svn: 126380
2011-02-24 10:00:25 +00:00
Evan Cheng
9db7b1367d Fix bug in X86 folding / unfolding table. Int_CMPSDrm and Int_CMPSSrm memory
operands starts at index 2, not 1.
rdar://9045024
PR9305

llvm-svn: 126359
2011-02-24 02:36:52 +00:00
Devang Patel
e8ade74a52 Use DW_FORM_data2 for DW_AT_language and let users use DW_LANG_lo_user=0x8000 to DW_LANG_hi_user=0xffff range.
llvm-svn: 126339
2011-02-23 22:37:04 +00:00
Devang Patel
dc0160e163 Check only relevant strings in output to increase stability of the tests.
llvm-svn: 126338
2011-02-23 22:35:57 +00:00
NAKAMURA Takumi
c59b707d50 Revert r126195, "test/CodeGen/X86/vec_cast.ll: Mark as XFAIL: migw,win32 for workaround of PR8311."
It seems it affected configuration --target=i686-pc-mingw32, I don't know and will investigate why.

llvm-svn: 126217
2011-02-22 08:22:54 +00:00
NAKAMURA Takumi
5663670e56 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126216
2011-02-22 07:21:59 +00:00
NAKAMURA Takumi
d1a4c5b79b Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126215
2011-02-22 07:21:51 +00:00
NAKAMURA Takumi
606d6d5dc3 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126214
2011-02-22 07:21:42 +00:00
NAKAMURA Takumi
7a721b6fb6 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126213
2011-02-22 07:21:33 +00:00
NAKAMURA Takumi
7ea92257f9 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126212
2011-02-22 07:21:25 +00:00
NAKAMURA Takumi
e601f83a06 Relax expressions and add explicit triplets -linux and -win32.
On @foobar(double %d, double* %x),
AMD64: (%xmm0, %rdi)
Win64: (%xmm0, %rdx) (not %rcx!)

llvm-svn: 126211
2011-02-22 07:21:17 +00:00
NAKAMURA Takumi
78e74f5921 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126210
2011-02-22 07:21:08 +00:00
NAKAMURA Takumi
e118fc3ea8 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126209
2011-02-22 07:21:01 +00:00
NAKAMURA Takumi
d2d57dd02d Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126208
2011-02-22 07:20:52 +00:00
NAKAMURA Takumi
c5ed4733da Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126207
2011-02-22 07:20:44 +00:00
NAKAMURA Takumi
2829a5083a Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126206
2011-02-22 07:20:35 +00:00
NAKAMURA Takumi
558580b1a2 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126205
2011-02-22 07:20:26 +00:00
NAKAMURA Takumi
15eb3d67cb Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126204
2011-02-22 07:20:18 +00:00
NAKAMURA Takumi
a9cb6da831 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126203
2011-02-22 07:20:10 +00:00
NAKAMURA Takumi
8e8c80a516 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126202
2011-02-22 07:20:02 +00:00
NAKAMURA Takumi
3223149a53 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126201
2011-02-22 07:19:54 +00:00
NAKAMURA Takumi
920ac67036 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126200
2011-02-22 07:19:46 +00:00
NAKAMURA Takumi
61577f03c4 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126199
2011-02-22 07:19:37 +00:00
NAKAMURA Takumi
101efee740 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126198
2011-02-22 07:19:28 +00:00
NAKAMURA Takumi
7f269a5123 Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126197
2011-02-22 07:19:20 +00:00
NAKAMURA Takumi
68b4d6429e Relax expressions and add explicit triplets -linux and -win32.
llvm-svn: 126196
2011-02-22 07:19:12 +00:00
NAKAMURA Takumi
ec693007ce test/CodeGen/X86/vec_cast.ll: Mark as XFAIL: migw,win32 for workaround of PR8311.
llvm-svn: 126195
2011-02-22 07:19:03 +00:00
NAKAMURA Takumi
d44c74a8a6 test/CodeGen/X86/red-zone.ll: Add explicit -mtriple=x86_64-linux.
Redzone is not applicable on Win64.

llvm-svn: 126194
2011-02-22 07:18:55 +00:00
Andrew Trick
ec08eae0aa VirtRegRewriter assertion fix.
Apparently it's ok for multiple operands to "kill" the same register.
Fixes PR9237.

llvm-svn: 126190
2011-02-22 06:52:56 +00:00
Cameron Zwarich
c942ffcae4 Roll out r126169 and r126170 in an attempt to fix the selfhost bot.
llvm-svn: 126185
2011-02-22 03:24:52 +00:00
Cameron Zwarich
63ed1f4c67 Merge information about the number of zero, one, and sign bits of live-out registers
at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine
phase. This fixes <rdar://problem/8760114>.

llvm-svn: 126170
2011-02-22 00:46:27 +00:00
Eric Christopher
de9e3eaf5f Revert r125960, it's breaking darwin10 bootstrap.
llvm-svn: 126163
2011-02-21 23:52:19 +00:00
Devang Patel
d5c4589795 Revert r124611 - "Keep track of incoming argument's location while emitting LiveIns."
In other words, do not keep track of argument's location.  The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body.
This requires some coordination with debugger to get this working. 
 - The debugger needs to be aware of prolog_end attribute attached with line table entries.
 - The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+)

llvm-svn: 126155
2011-02-21 23:21:26 +00:00
NAKAMURA Takumi
a03e9f0267 Target/X86/X86FastISel: [PR6275] Fix Win32's dllimport function with fastisel.
"dllimport" function must not be GlobalVariable, but Function. It is enough to check with GlobalValue.
test/CodeGen/X86/dll-linkage.ll is updated to check llc -O0.

llvm-svn: 126110
2011-02-21 04:50:06 +00:00
Cameron Zwarich
b7e676db6c The signed version of our "magic number" computation for the integer approximation
of a constant had a minor typo introduced when copying it from the book, which
caused it to favor negative approximations over positive approximations in many
cases. Positive approximations require fewer operations beyond the multiplication.

In the case of division by 3, we still generate code that is a single instruction
larger than GCC's code.

llvm-svn: 126097
2011-02-21 00:22:02 +00:00
Nick Lewycky
ecae3aec02 Make RecursivelyDeleteDeadPHINode delete a phi node that has no users and add a
test for that. With this change, test/CodeGen/X86/codegen-dce.ll no longer finds
any instructions to DCE, so delete the test.

Also renamed J and JP to I and IP in RecursivelyDeleteDeadPHINode.

llvm-svn: 126088
2011-02-20 18:05:56 +00:00
Nadav Rotem
1660c0bc25 Fix 9267; Add vector zext support.
The DAGCombiner folds the zext into complex load instructions. This patch
prevents this optimization on vectors since none of the supported targets
knows how to perform load+vector_zext in one instruction.

llvm-svn: 126080
2011-02-20 12:37:50 +00:00
Devang Patel
03430d117f DIE numbers do not add any value in this test.
llvm-svn: 126008
2011-02-19 01:28:37 +00:00
Devang Patel
d63bce18da Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.
This time with a fix that avoids using invalidated DenseMap iterator.

llvm-svn: 125984
2011-02-18 22:43:42 +00:00
Bill Wendling
dd9b7a90a7 Reapply r114997 now that the buildbots have been updated.
llvm-svn: 125960
2011-02-18 21:12:58 +00:00
Cameron Zwarich
f6fa19a03f Roll out r125794 to help diagnose the llvm-gcc-i386-linux-selfhost failure.
llvm-svn: 125830
2011-02-18 04:58:10 +00:00
Devang Patel
b6f55191b3 Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.
llvm-svn: 125794
2011-02-17 23:33:27 +00:00
NAKAMURA Takumi
00228d0c2c Triple::MinGW64 is deprecated and removed. We can use Triple::MinGW32 generally.
No one uses *-mingw64. mingw-w64 is represented as {i686|x86_64}-w64-mingw32. In llvm side, i686 and x64 can be treated as similar way.

llvm-svn: 125747
2011-02-17 12:24:17 +00:00
Eric Christopher
8965ba39fb The change for PR9190 wasn't quite right. We need to avoid making the
transformation if we can't legally create a build vector of the correct
type. Check that we can make the transformation first, and add a TODO to
refactor this code with similar cases.

Fixes: PR9223 and rdar://9000350
llvm-svn: 125631
2011-02-16 01:10:03 +00:00
Eric Christopher
2d3de0727f Add testcase for PR9190.
llvm-svn: 125630
2011-02-16 01:08:31 +00:00
Devang Patel
d5b7c28519 Ignore DBG_VALUE machine instructions while constructing instruction ranges based on location info.
Machine instruction range consisting of only DBG_VALUE MIs only contributes consecutive labels in assembly output, which is harmless, and empty scope entry in DebugInfo, which confuses debugger tools.

llvm-svn: 125577
2011-02-15 17:56:09 +00:00
Rafael Espindola
3c32af5834 Switch llvm to using comdats. For now always use groups with a single
section.

llvm-svn: 125526
2011-02-14 22:23:49 +00:00
Chris Lattner
68d9fae34e fix PR9210 by implementing some type legalization logic for
vector fp conversions.

llvm-svn: 125482
2011-02-14 06:30:45 +00:00
Chris Lattner
bcf2d46d8a Enhance ComputeMaskedBits to know that aligned frameindexes
have their low bits set to zero.  This allows us to optimize
out explicit stack alignment code like in stack-align.ll:test4 when
it is redundant.

Doing this causes the code generator to start turning FI+cst into
FI|cst all over the place, which is general goodness (that is the
canonical form) except that various pieces of the code generator
don't handle OR aggressively.  Fix this by introducing a new
SelectionDAG::isBaseWithConstantOffset predicate, and using it
in places that are looking for ADD(X,CST).  The ARM backend in
particular was missing a lot of addressing mode folding opportunities
around OR.

llvm-svn: 125470
2011-02-13 22:25:43 +00:00
Chris Lattner
378faeecc8 when legalizing extremely wide shifts, make sure that
the shift amounts are in a suitably wide type so that
we don't generate out of range constant shift amounts.

This fixes PR9028.

llvm-svn: 125458
2011-02-13 09:10:56 +00:00
Evan Cheng
5a42a6a20f After 3-addressifying a two-address instruction, update the register maps; add a missing check when considering whether it's profitable to commute. rdar://8977508.
llvm-svn: 125259
2011-02-10 02:20:55 +00:00
Devang Patel
46db608b81 Reduce test case, smaller is better.
llvm-svn: 125019
2011-02-07 18:24:18 +00:00
NAKAMURA Takumi
07a84f5950 Target/X86: Tweak allocating shadow area (aka home) on Win64. It must be enough for caller to allocate one.
llvm-svn: 124949
2011-02-05 15:11:32 +00:00
Devang Patel
930b4b16a1 Merge .debug_loc entries whenever possible to reduce debug_loc size.
llvm-svn: 124904
2011-02-04 22:57:18 +00:00
Nick Lewycky
a4f2b5a934 Mark that the return is using EAX so that we don't use it for some other
purpose. Fixes PR9080!

llvm-svn: 124903
2011-02-04 22:44:08 +00:00
Devang Patel
a586bb8ecd DebugLoc associated with a machine instruction is used to emit location entries. DebugLoc associated with a DBG_VALUE is used to identify lexical scope of the variable. After register allocation, while inserting DBG_VALUE remember original debug location for the first instruction and reuse it, otherwise dwarf writer may be mislead in identifying the variable's scope.
llvm-svn: 124845
2011-02-04 01:43:25 +00:00
Rafael Espindola
b0a802c8bf Add -march to fix the bots.
llvm-svn: 124774
2011-02-03 04:21:01 +00:00
Rafael Espindola
5bfba89832 Fix PR9127 by reversing the operands even if they have more then one use.
Reversing the operands allows us to fold, but doesn't force us to. Also, at
this point the DAG is still being optimized, so the check for hasOneUse is not
very precise.

llvm-svn: 124773
2011-02-03 03:58:05 +00:00
Devang Patel
97c467ee47 Keep track of incoming argument's location while emitting LiveIns.
llvm-svn: 124611
2011-01-31 21:38:14 +00:00
Benjamin Kramer
6b3c3de09a Teach DAGCombine to fold fold (sra (trunc (sr x, c1)), c2) -> (trunc (sra x, c1+c2) when c1 equals the amount of bits that are truncated off.
This happens all the time when a smul is promoted to a larger type.

On x86-64 we now compile "int test(int x) { return x/10; }" into
  movslq  %edi, %rax
  imulq $1717986919, %rax, %rax
  movq  %rax, %rcx
  shrq  $63, %rcx
  sarq  $34, %rax <- used to be "shrq $32, %rax; sarl $2, %eax"
  addl  %ecx, %eax

This fires 96 times in gcc.c on x86-64.

llvm-svn: 124559
2011-01-30 16:38:43 +00:00
Evan Cheng
4af5487b74 Re-apply r124518 with fix. Watch out for invalidated iterator.
llvm-svn: 124526
2011-01-29 04:46:23 +00:00
Evan Cheng
1f943b9b13 Revert r124518. It broke Linux self-host.
llvm-svn: 124522
2011-01-29 02:43:04 +00:00
Evan Cheng
a1e4cb5f09 Re-commit r124462 with fixes. Tail recursion elim will now dup ret into unconditional predecessor to enable TCE on demand.
llvm-svn: 124518
2011-01-29 01:29:26 +00:00
Evan Cheng
5b6c72e549 Revert r124462. There are a few big regressions that I need to fix first.
llvm-svn: 124478
2011-01-28 07:12:38 +00:00
Rafael Espindola
d93551f227 Add a triple.
llvm-svn: 124471
2011-01-28 03:57:55 +00:00
Rafael Espindola
9bc19ee478 Print the visibility of declarations.
llvm-svn: 124468
2011-01-28 03:20:10 +00:00
Evan Cheng
7031f450b3 - Stop simplifycfg from duplicating "ret" instructions into unconditional
branches. PR8575, rdar://5134905, rdar://8911460.
- Allow codegen tail duplication to dup small return blocks after register
  allocation is done.

llvm-svn: 124462
2011-01-28 02:19:21 +00:00
NAKAMURA Takumi
8ace7260cc Target/X86: Tweak win64's tailcall.
llvm-svn: 124272
2011-01-26 02:04:09 +00:00
NAKAMURA Takumi
066378440a Fix whitespace.
llvm-svn: 124270
2011-01-26 02:03:37 +00:00
Devang Patel
fce915414e Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
llvm-svn: 124203
2011-01-25 18:09:58 +00:00
Devang Patel
431a9b9c2f Speculatively revert r124138.
llvm-svn: 124142
2011-01-24 20:04:37 +00:00
Devang Patel
5ccc4e884c Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
llvm-svn: 124138
2011-01-24 19:24:37 +00:00
Chris Lattner
9ba0a83f2b fix a missing shuffle pattern, PR9009. Patch by Artiom Myaskouvskey!
llvm-svn: 124102
2011-01-24 03:42:46 +00:00
Eric Christopher
f7579ff174 Expand invalid return values for umulo and smulo. Handle these similarly
to add/sub by doing the normal operation and then checking for overflow
afterwards. This generally relies on the DAG handling the later invalid
operations as well.

Fixes the 64-bit part of rdar://8622122 and rdar://8774702.

llvm-svn: 123908
2011-01-20 08:54:28 +00:00
Benjamin Kramer
869dc645f1 Fix an off-by-one error in ctpop combining.
llvm-svn: 123664
2011-01-17 18:00:28 +00:00
Benjamin Kramer
e9488ed8eb Add a DAGCombine to turn (ctpop x) u< 2 into (x & x-1) == 0.
This shaves off 4 popcounts from the hacked 186.crafty source.

This is enabled even when a native popcount instruction is available. The
combined code is one operation longer but it should be faster nevertheless.

llvm-svn: 123621
2011-01-17 12:04:57 +00:00
Rafael Espindola
9afb7af08a Update tests.
llvm-svn: 123591
2011-01-16 18:02:57 +00:00
Chris Lattner
dde85de90f fix PR8514, a bug where the "heroic" transformation of shift/and
into and/shift would cause nodes to move around and a dangling pointer
to happen.  The code tried to avoid this with a HandleSDNode, but 
got the details wrong.

llvm-svn: 123578
2011-01-16 08:48:11 +00:00
Chris Lattner
24ea7f696e fix PR8981, a crash trying to form a conditional inc with a floating point compare.
llvm-svn: 123560
2011-01-16 02:56:53 +00:00
Chris Lattner
c4d1d86d3e reapply my fix for PR8961 with a tweak to properly handle
multi-instruction sequences like calls.  Many thanks to Jakob for
finding a testcase.

llvm-svn: 123559
2011-01-16 02:27:38 +00:00
Chris Lattner
eba719204c revert my fastisel patch again which apparently still gives the
llvm-gcc-i386-linux-selfhost buildbot heartburn...

llvm-svn: 123431
2011-01-14 06:14:33 +00:00
Chris Lattner
ee950eeb24 reapply r123414 now that the botz are calmed down and the fix is already in.
llvm-svn: 123427
2011-01-14 04:24:28 +00:00
Chris Lattner
349735530b r123414 broke llvm-gcc bootstrap apparently, revert
llvm-svn: 123422
2011-01-14 02:07:32 +00:00
Chris Lattner
5baec05809 fix PR8961 - a fast isel miscompilation where we'd insert a new instruction
after sext's generated for addressing that got folded.  Previously we compiled
test5 into:

_test5:                                 ## @test5
## BB#0:
        movq    -8(%rsp), %rax          ## 8-byte Reload
        movq    (%rdi,%rax), %rdi
        addq    %rdx, %rdi
        movslq  %esi, %rax
        movq    %rax, -8(%rsp)          ## 8-byte Spill
        movq    %rdi, %rax
        ret

which is insane and wrong.  Now we produce:

_test5:                                 ## @test5
## BB#0:
	movslq	%esi, %rax
	movq	(%rdi,%rax), %rax
	addq	%rdx, %rax
	ret

llvm-svn: 123414
2011-01-14 00:01:01 +00:00
Eric Christopher
3821f63f4b Experiment with changing the default 32-bit linux stack alignment to
16 bytes for PR8969. Update all testcases accordingly.

llvm-svn: 123367
2011-01-13 06:47:10 +00:00
Jakob Stoklund Olesen
3987889b61 Try again enabling LiveDebugVariables.
llvm-svn: 123342
2011-01-12 23:36:21 +00:00
Jakob Stoklund Olesen
1f7052b53b The world is not ready for LiveDebugVariables yet.
llvm-svn: 123290
2011-01-11 23:20:33 +00:00
Jakob Stoklund Olesen
d7a523358c Enable LiveDebugVariables by default.
llvm-svn: 123282
2011-01-11 22:45:28 +00:00
Dale Johannesen
cd78621861 Fix PR 8916 (qv for analysis), at least the immediate problem.
There's an inherent tension in DAGCombine between assuming
that things will be put in canonical form, and the Depth
mechanism that disables transformations when recursion gets
too deep.  It would not surprise me if there's a lot of little
bugs like this one waiting to be discovered.  The mechanism
seems fragile and I'd suggest looking at it from a design viewpoint.

llvm-svn: 123191
2011-01-10 21:53:07 +00:00
Evan Cheng
1afd04fc59 Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call.
llvm-svn: 123048
2011-01-08 01:24:27 +00:00
Evan Cheng
aa16fd02ad Do not model all INLINEASM instructions as having unmodelled side effects.
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.

This allows memory instructions to be moved around INLINEASM instructions.

llvm-svn: 123044
2011-01-07 23:50:32 +00:00
Devang Patel
d3ba97949a Speculatively revert r123032.
llvm-svn: 123039
2011-01-07 22:33:41 +00:00
Devang Patel
a52d6c216d Appropriately truncate debug info range in dwarf output.
Enable live debug variables pass.

llvm-svn: 123032
2011-01-07 21:30:41 +00:00
Evan Cheng
ae26b91353 Revert r122955. It seems using movups to lower memcpy can cause massive regression (even on Nehalem) in edge cases. I also didn't see any real performance benefit.
llvm-svn: 123015
2011-01-07 19:35:30 +00:00
Benjamin Kramer
a842a10fc1 Try to unbreak the arm buildbot.
llvm-svn: 122999
2011-01-07 11:35:21 +00:00
Duncan Sands
06444485ee Fix the other problem reported in PR8582. Testcase and patch by
Nadav Rotem.

llvm-svn: 122983
2011-01-06 23:45:22 +00:00
Evan Cheng
1a1771584e Use movups to lower memcpy and memset even if it's not fast (like corei7).
The theory is it's still faster than a pair of movq / a quad of movl. This
will probably hurt older chips like P4 but should run faster on current
and future Intel processors. rdar://8817010

llvm-svn: 122955
2011-01-06 07:58:36 +00:00
Evan Cheng
cb39cc2164 Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpy
etc. takes an option OptSize. If OptSize is true, it would return
the inline limit for functions with attribute OptSize.

llvm-svn: 122952
2011-01-06 06:52:41 +00:00
Evan Cheng
70711ea54d Revert r122936. I'll re-implement the change.
llvm-svn: 122949
2011-01-06 06:17:53 +00:00
Bill Wendling
b3bf7cd562 Fix test to coincide with r122934 change from PR8919.
llvm-svn: 122937
2011-01-06 01:09:35 +00:00
Evan Cheng
d425aa5d2a r105228 reduced the memcpy / memset inline limit to 4 with -Os to avoid blowing
up freebsd bootloader. However, this doesn't make much sense for Darwin, whose
-Os is meant to optimize for size only if it doesn't hurt performance.
rdar://8821501

llvm-svn: 122936
2011-01-06 01:04:47 +00:00
Evan Cheng
2af40ae781 Avoid zero extend bit test operands to pointer type if all the masks fit in
the original type of the switch statement key.
rdar://8781238

llvm-svn: 122935
2011-01-06 01:02:44 +00:00
Evan Cheng
bf92316fab Optimize:
r1025 = s/zext r1024, 4
  r1026 = extract_subreg r1025, 4
to:
  r1026 = copy r1024

llvm-svn: 122925
2011-01-05 23:06:49 +00:00
Chris Lattner
3ef9db5cd4 fix PR8900, a shuffle miscompilation. Patch by Nadav Rotem!
llvm-svn: 122921
2011-01-05 22:28:46 +00:00
Evan Cheng
25f7df1bce Use pushq / popq instead of subq $8, %rsp / addq $8, %rsp to adjust stack in
prologue and epilogue if the adjustment is 8. Similarly, use pushl / popl if
the adjustment is 4 in 32-bit mode.

In the epilogue, takes care to pop to a caller-saved register that's not live
at the exit (either return or tailcall instruction).
rdar://8771137

llvm-svn: 122783
2011-01-03 22:53:22 +00:00
Benjamin Kramer
a58b69aa9d Try to reuse the value when lowering memset.
This allows us to compile:
  void test(char *s, int a) {
    __builtin_memset(s, a, 15);
  }
into 1 mul + 3 stores instead of 3 muls + 3 stores.

llvm-svn: 122710
2011-01-02 19:57:05 +00:00
Benjamin Kramer
38491f47ce Lower the i8 extension in memset to a multiply instead of a potentially long series of shifts and ors.
We could implement a DAGCombine to turn x * 0x0101 back into logic operations
on targets that doesn't support the multiply or it is slow (p4) if someone cares
enough.

Example code:
  void test(char *s, int a) {
      __builtin_memset(s, a, 4);
  }
before:
  _test:                                  ## @test
    movzbl  8(%esp), %eax
    movl  %eax, %ecx
    shll  $8, %ecx
    orl %eax, %ecx
    movl  %ecx, %eax
    shll  $16, %eax
    orl %ecx, %eax
    movl  4(%esp), %ecx
    movl  %eax, 4(%ecx)
    movl  %eax, (%ecx)
    ret
after:
  _test:                                  ## @test
    movzbl  8(%esp), %eax
    imull $16843009, %eax, %eax   ## imm = 0x1010101
    movl  4(%esp), %ecx
    movl  %eax, 4(%ecx)
    movl  %eax, (%ecx)
    ret

llvm-svn: 122707
2011-01-02 19:44:58 +00:00
Rafael Espindola
2600dec19b Fix darwin bots.
llvm-svn: 122672
2011-01-01 21:58:41 +00:00
Rafael Espindola
55f7a5057d Add support for the 'H' modifier.
llvm-svn: 122667
2011-01-01 20:58:46 +00:00
NAKAMURA Takumi
e16c40416e test/CodeGen/X86/negative-sin.ll: FileCheck-ize.
llvm-svn: 122619
2010-12-29 03:58:47 +00:00
NAKAMURA Takumi
d66bcf9ada test/CodeGen/X86/fp-in-intregs.ll: FileCheck-ize.
llvm-svn: 122618
2010-12-29 03:58:36 +00:00
Benjamin Kramer
49942a90b7 DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal. The latter usually compiles into smaller code.
example code:
unsigned foo(unsigned x, unsigned y) {
  if (x != 0) y--;
  return y;
}

before:
  _foo:                           ## @foo
    cmpl  $1, 4(%esp)             ## encoding: [0x83,0x7c,0x24,0x04,0x01]
    sbbl  %eax, %eax              ## encoding: [0x19,0xc0]
    notl  %eax                    ## encoding: [0xf7,0xd0]
    addl  8(%esp), %eax           ## encoding: [0x03,0x44,0x24,0x08]
    ret                           ## encoding: [0xc3]

after:
  _foo:                           ## @foo
    cmpl  $1, 4(%esp)             ## encoding: [0x83,0x7c,0x24,0x04,0x01]
    movl  8(%esp), %eax           ## encoding: [0x8b,0x44,0x24,0x08]
    adcl  $-1, %eax               ## encoding: [0x83,0xd0,0xff]
    ret                           ## encoding: [0xc3]

llvm-svn: 122455
2010-12-22 23:17:45 +00:00
Benjamin Kramer
d8387aa9bd X86: Lower a select directly to a setcc_carry if possible.
int test(unsigned long a, unsigned long b) { return -(a < b); }
compiles to
  _test:                              ## @test
    cmpq  %rsi, %rdi                  ## encoding: [0x48,0x39,0xf7]
    sbbl  %eax, %eax                  ## encoding: [0x19,0xc0]
    ret                               ## encoding: [0xc3]
instead of
  _test:                              ## @test
    xorl  %ecx, %ecx                  ## encoding: [0x31,0xc9]
    cmpq  %rsi, %rdi                  ## encoding: [0x48,0x39,0xf7]
    movl  $-1, %eax                   ## encoding: [0xb8,0xff,0xff,0xff,0xff]
    cmovael %ecx, %eax                ## encoding: [0x0f,0x43,0xc1]
    ret                               ## encoding: [0xc3]

llvm-svn: 122451
2010-12-22 23:09:28 +00:00
Chris Lattner
04ef853e23 Fix a bug in ReduceLoadWidth that wasn't handling extending
loads properly.  We miscompiled the testcase into:

_test:                                  ## @test
	movl	$128, (%rdi)
	movzbl	1(%rdi), %eax
	ret

Now we get a proper:

_test:                                  ## @test
	movl	$128, (%rdi)
	movsbl	(%rdi), %eax
	movzbl	%ah, %eax
	ret

This fixes PR8757.

llvm-svn: 122392
2010-12-22 08:02:57 +00:00
Dale Johannesen
e0fb87c3d7 Reapply 122353-122355 with fixes. 122354 was wrong;
the shift type was needed one place, the shift count
type another.  The transform in 123555 had the same
problem.

llvm-svn: 122366
2010-12-21 21:55:50 +00:00
Benjamin Kramer
369872edfc Add some x86 specific dagcombines for conditional increments.
(add Y, (sete  X, 0)) -> cmp X, 1; adc  0, Y
(add Y, (setne X, 0)) -> cmp X, 1; sbb -1, Y
(sub (sete  X, 0), Y) -> cmp X, 1; sbb  0, Y
(sub (setne X, 0), Y) -> cmp X, 1; adc -1, Y

for
  unsigned foo(unsigned a, unsigned b) {
    if (a == 0) b++;
    return b;
  }
we now get:
  foo:
    cmpl  $1, %edi
    movl  %esi, %eax
    adcl  $0, %eax
    ret
instead of:
  foo:
    testl %edi, %edi
    sete  %al
    movzbl  %al, %eax
    addl  %esi, %eax
    ret

llvm-svn: 122364
2010-12-21 21:41:44 +00:00
Dale Johannesen
972aba543a Revert 122353-122355 for the moment, they broke stuff.
llvm-svn: 122360
2010-12-21 21:22:27 +00:00
Dale Johannesen
39186cfb0b Add a new transform to DAGCombiner.
llvm-svn: 122355
2010-12-21 20:10:51 +00:00
Dale Johannesen
5f3e7b08f6 Get the type of a shift from the shift, not from its shift
count operand.  These should be the same but apparently are
not always, and this is cleaner anyway.  This improves the
code in an existing test.

llvm-svn: 122354
2010-12-21 20:06:19 +00:00
Dale Johannesen
036c3da142 Cosmetic changes.
llvm-svn: 122259
2010-12-20 20:10:50 +00:00
Chris Lattner
bee7320c3c now that addc/adde are gone, "ADDC" in the X86 backend uses EFLAGS results,
the same as setcc.  Optimize ADDC(0,0,FLAGS) -> SET_CARRY(FLAGS).  This is
a step towards finishing off PR5443.  In the testcase in that bug we now  get:

	movq	%rdi, %rax
	addq	%rsi, %rax
	sbbq	%rcx, %rcx
	testb	$1, %cl
	setne	%dl
	ret

instead of:

	movq	%rdi, %rax
	addq	%rsi, %rax
	movl	$0, %ecx
	adcq	$0, %rcx
	testq	%rcx, %rcx
	setne	%dl
	ret

llvm-svn: 122219
2010-12-20 01:37:09 +00:00
Chris Lattner
2d4e17d195 We lower setb to sbb with the hope that the and will go away, when it
doesn't, match it back to setb.

On a 64-bit version of the testcase before we'd get:

	movq	%rdi, %rax
	addq	%rsi, %rax
	sbbb	%dl, %dl
	andb	$1, %dl
	ret

now we get:

	movq	%rdi, %rax
	addq	%rsi, %rax
	setb	%dl
	ret

llvm-svn: 122217
2010-12-20 01:16:03 +00:00
Mon P Wang
666259546c Add comment for testcase for 122206
llvm-svn: 122210
2010-12-20 00:54:26 +00:00
Mon P Wang
d3adab7a64 Prevents PerformShuffleCombine from creating a node with an illegal type after legalize types
has run, e.g., prevent creating an i64 node from a v2i64 when i64 is not a legal type.

llvm-svn: 122206
2010-12-19 23:55:53 +00:00
Chris Lattner
297259f6f1 improve the setcc -> setcc_carry optimization to happen more
consistently by moving it out of lowering into dag combine.

Add some missing patterns for matching away extended versions of setcc_c.

llvm-svn: 122201
2010-12-19 22:08:31 +00:00
Chris Lattner
ad85635a93 now that generic vector types aren't selected onto MMX registers, these
tests don't need -disable-mmx.

llvm-svn: 122188
2010-12-19 20:12:58 +00:00
Chris Lattner
ac82ea26da fix PR8642: if a critical edge has a PHI value that can trap,
isel is *required* to split the edge.  PHI values get evaluated
on the edge, not in their predecessor block.

llvm-svn: 122170
2010-12-19 04:58:57 +00:00
Benjamin Kramer
84d3e6cfd0 Just rename the functions, relying on matching a instruction that has the same name as a symbol is way too fragile.
llvm-svn: 122154
2010-12-18 14:23:57 +00:00
Benjamin Kramer
4d591385d1 Test more than just label names and make test work on non-x86 hosts.
llvm-svn: 122153
2010-12-18 14:07:28 +00:00
Nate Begeman
ef5f3c0fa7 Add support for matching psign & plendvb to the x86 target
Remove unnecessary pandn patterns, 'vnot' patfrag looks through bitcasts

llvm-svn: 122098
2010-12-17 22:55:37 +00:00
Dale Johannesen
c2c6ebd82a Add a transform to DAG Combiner. This improves the
code for the case where 32-bit divide by constant is
turned into 64-bit multiply by constant.  8771012.

llvm-svn: 122090
2010-12-17 21:45:49 +00:00
Evan Cheng
68e1ed8752 Teach machine cse to commute instructions.
llvm-svn: 121903
2010-12-15 22:16:21 +00:00
Chris Lattner
81815cd4db take care of some todos, transforming [us]mul_lohi into
a wider mul if the wider mul is legal.

llvm-svn: 121848
2010-12-15 06:04:19 +00:00
Chris Lattner
3bec2e7d0d merge two tests
llvm-svn: 121847
2010-12-15 05:58:59 +00:00
Evan Cheng
7e96e67d98 Fix a minor bug in two-address pass. It was missing a commute opportunity.
regB = move RCX
regA = op regB, regC
RAX  = move regA
where both regB and regC are killed. If regB is constrainted to non-compatible
physical registers but regC is not constrainted at all, then it's better to
commute the instruction.
       movl    %edi, %eax
       shlq    $32, %rcx
       leaq    (%rcx,%rax), %rax
=>
       movl    %edi, %eax
       shlq    $32, %rcx
       orq     %rcx, %rax
rdar://8762995

llvm-svn: 121793
2010-12-14 21:34:53 +00:00
Chris Lattner
d17cbf803b rename test
llvm-svn: 121697
2010-12-13 08:39:40 +00:00
Chris Lattner
14810c808b Add a couple dag combines to transform mulhi/mullo into a wider multiply
when the wider type is legal.  This allows us to compile:

define zeroext i16 @test1(i16 zeroext %x) nounwind {
entry:
	%div = udiv i16 %x, 33
	ret i16 %div
}

into:

test1:                                  # @test1
	movzwl	4(%esp), %eax
	imull	$63551, %eax, %eax      # imm = 0xF83F
	shrl	$21, %eax
	ret

instead of:

test1:                                  # @test1
        movw    $-1985, %ax             # imm = 0xFFFFFFFFFFFFF83F
        mulw    4(%esp)
        andl    $65504, %edx            # imm = 0xFFE0
        movl    %edx, %eax
        shrl    $5, %eax
        ret

Implementing rdar://8760399 and example #4 from:
http://blog.regehr.org/archives/320

We should implement the same thing for [su]mul_hilo, but I don't
have immediate plans to do this.

llvm-svn: 121696
2010-12-13 08:39:01 +00:00
Nate Begeman
cb6d1c8193 Formalize the notion that AVX and SSE are non-overlapping extensions from the compiler's point of view. Per email discussion, we either want to always use VEX-prefixed instructions or never use them, and are taking "HasAVX" to mean "Always use VEX". Passing -mattr=-avx,+sse42 should serve to restore legacy SSE support when desirable.
llvm-svn: 121439
2010-12-10 00:26:57 +00:00
Eric Christopher
0e40452eb0 Rewrite the darwin tlv support to use a chain and return to copying
the output to the correct register. Fixes a hidden problem uncovered
by the last patch where we'd try to DAG combine our MVT::Other node
oddly.

llvm-svn: 121358
2010-12-09 06:25:53 +00:00
Eric Christopher
0100a8fda4 Remove extraneous copy from DAG conversion for darwin tls. This was
popping up at O0 when it wasn't folded and the fast allocator would
complain.

llvm-svn: 121330
2010-12-09 00:27:58 +00:00
Eric Christopher
d601b8288f Move this test to tlv* to make it easier to notice versus linux tls
support.

llvm-svn: 121316
2010-12-08 23:33:23 +00:00
Devang Patel
6fe7fe8dd4 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.
llvm-svn: 121059
2010-12-06 22:39:26 +00:00
Rafael Espindola
4ec917db9b Revert previous two patches while I try to find out how to make both
linux and darwin assemblers happy :-(

llvm-svn: 121004
2010-12-06 15:35:15 +00:00
Rafael Espindola
ad6219b193 Update test for the extra =.
llvm-svn: 121001
2010-12-06 15:05:36 +00:00
Chris Lattner
e30adfb732 Teach X86ISelLowering that the second result of X86ISD::UMUL is a flags
result.  This allows us to compile:

void *test12(long count) {
      return new int[count];
}

into:

test12:
	movl	$4, %ecx
	movq	%rdi, %rax
	mulq	%rcx
	movq	$-1, %rdi
	cmovnoq	%rax, %rdi
	jmp	__Znam                  ## TAILCALL

instead of:

test12:
	movl	$4, %ecx
	movq	%rdi, %rax
	mulq	%rcx
	seto	%cl
	testb	%cl, %cl
	movq	$-1, %rdi
	cmoveq	%rax, %rdi
	jmp	__Znam

Of course it would be even better if the regalloc inverted the cmov to 'cmovoq',
which would eliminate the need for the 'movq %rdi, %rax'.

llvm-svn: 120936
2010-12-05 07:49:54 +00:00
Chris Lattner
76601e7a99 it turns out that when ".with.overflow" intrinsics were added to the X86
backend that they were all implemented except umul.  This one fell back
to the default implementation that did a hi/lo multiply and compared the
top.  Fix this to check the overflow flag that the 'mul' instruction
sets, so we can avoid an explicit test.  Now we compile:

void *func(long count) {
      return new int[count];
}

into:

__Z4funcl:                              ## @_Z4funcl
	movl	$4, %ecx                ## encoding: [0xb9,0x04,0x00,0x00,0x00]
	movq	%rdi, %rax              ## encoding: [0x48,0x89,0xf8]
	mulq	%rcx                    ## encoding: [0x48,0xf7,0xe1]
	seto	%cl                     ## encoding: [0x0f,0x90,0xc1]
	testb	%cl, %cl                ## encoding: [0x84,0xc9]
	movq	$-1, %rdi               ## encoding: [0x48,0xc7,0xc7,0xff,0xff,0xff,0xff]
	cmoveq	%rax, %rdi              ## encoding: [0x48,0x0f,0x44,0xf8]
	jmp	__Znam                  ## TAILCALL

instead of:

__Z4funcl:                              ## @_Z4funcl
	movl	$4, %ecx                ## encoding: [0xb9,0x04,0x00,0x00,0x00]
	movq	%rdi, %rax              ## encoding: [0x48,0x89,0xf8]
	mulq	%rcx                    ## encoding: [0x48,0xf7,0xe1]
	testq	%rdx, %rdx              ## encoding: [0x48,0x85,0xd2]
	movq	$-1, %rdi               ## encoding: [0x48,0xc7,0xc7,0xff,0xff,0xff,0xff]
	cmoveq	%rax, %rdi              ## encoding: [0x48,0x0f,0x44,0xf8]
	jmp	__Znam                  ## TAILCALL

Other than the silly seto+test, this is using the o bit directly, so it's going in the right
direction.

llvm-svn: 120935
2010-12-05 07:30:36 +00:00
Chris Lattner
9b4b9e751a fix the rest of the linux miscompares :)
llvm-svn: 120933
2010-12-05 02:08:07 +00:00
Chris Lattner
16bafb2414 generalize the previous check to handle -1 on either side of the
select, inserting a not to compensate.  Add a missing isZero check
that I lost somehow.

This improves codegen of:

void *func(long count) {
      return new int[count];
}

from:

__Z4funcl:                              ## @_Z4funcl
	movl	$4, %ecx                ## encoding: [0xb9,0x04,0x00,0x00,0x00]
	movq	%rdi, %rax              ## encoding: [0x48,0x89,0xf8]
	mulq	%rcx                    ## encoding: [0x48,0xf7,0xe1]
	testq	%rdx, %rdx              ## encoding: [0x48,0x85,0xd2]
	movq	$-1, %rdi               ## encoding: [0x48,0xc7,0xc7,0xff,0xff,0xff,0xff]
	cmoveq	%rax, %rdi              ## encoding: [0x48,0x0f,0x44,0xf8]
	jmp	__Znam                  ## TAILCALL
                                        ## encoding: [0xeb,A]

to:

__Z4funcl:                              ## @_Z4funcl
	movl	$4, %ecx                ## encoding: [0xb9,0x04,0x00,0x00,0x00]
	movq	%rdi, %rax              ## encoding: [0x48,0x89,0xf8]
	mulq	%rcx                    ## encoding: [0x48,0xf7,0xe1]
	cmpq	$1, %rdx                ## encoding: [0x48,0x83,0xfa,0x01]
	sbbq	%rdi, %rdi              ## encoding: [0x48,0x19,0xff]
	notq	%rdi                    ## encoding: [0x48,0xf7,0xd7]
	orq	%rax, %rdi              ## encoding: [0x48,0x09,0xc7]
	jmp	__Znam                  ## TAILCALL
                                        ## encoding: [0xeb,A]

llvm-svn: 120932
2010-12-05 02:00:51 +00:00
Chris Lattner
e1c32a116b relax this to handle linux defaulting to -static.
llvm-svn: 120930
2010-12-05 01:31:13 +00:00
Chris Lattner
474ed0aa9b Improve an integer select optimization in two ways:
1. generalize 
    (select (x == 0), -1, 0) -> (sign_bit (x - 1))
to:
    (select (x == 0), -1, y) -> (sign_bit (x - 1)) | y

2. Handle the identical pattern that happens with !=:
   (select (x != 0), y, -1) -> (sign_bit (x - 1)) | y

cmov is often high latency and can't fold immediates or
memory operands.  For example for (x == 0) ? -1 : 1, before 
we got:

< 	testb	%sil, %sil
< 	movl	$-1, %ecx
< 	movl	$1, %eax
< 	cmovel	%ecx, %eax

now we get:

> 	cmpb	$1, %sil
> 	sbbl	%eax, %eax
> 	orl	$1, %eax

llvm-svn: 120929
2010-12-05 01:23:24 +00:00
Chris Lattner
c383be807e merge some tests into select.ll and make them more specific.
llvm-svn: 120928
2010-12-05 01:13:58 +00:00
Chris Lattner
7e0a594633 rename test
llvm-svn: 120927
2010-12-05 01:02:23 +00:00
Chris Lattner
1a760f6247 remove two tests that aren't really testing anything.
llvm-svn: 120926
2010-12-05 01:02:13 +00:00
Benjamin Kramer
851691ddb2 Add patterns for the x86 popcnt instruction.
- Also adds a new POPCNT subtarget feature that is currently enabled if the target
  supports SSE4.2 (nehalem) or SSE4A (barcelona).

llvm-svn: 120917
2010-12-04 20:32:23 +00:00
Devang Patel
dad3193123 Hide tests, that check .loc, .file in output assembly, from darwin9 buildbot.
llvm-svn: 120750
2010-12-02 23:29:58 +00:00
Devang Patel
822facd787 Use set directive for StartMinusEndExpr.
This is a fix for llvm-gcc-i386-darwin9 buildbot failure.

llvm-svn: 120742
2010-12-02 21:32:30 +00:00
Evan Cheng
402157b66e Fix test.
llvm-svn: 120730
2010-12-02 20:17:34 +00:00
Evan Cheng
4118b24aca Fix and re-enable tail call optimization of expanded libcalls.
llvm-svn: 120622
2010-12-01 22:59:46 +00:00
Evan Cheng
84162760b7 Speculatively disable x86 portion of r120501 to appease the x86_64 buildbot.
llvm-svn: 120549
2010-12-01 03:27:20 +00:00
Evan Cheng
f7e586d749 Enable sibling call optimization of libcalls which are expanded during
legalization time. Since at legalization time there is no mapping from
SDNode back to the corresponding LLVM instruction and the return
SDNode is target specific, this requires a target hook to check for
eligibility. Only x86 and ARM support this form of sibcall optimization
right now.
rdar://8707777

llvm-svn: 120501
2010-11-30 23:55:39 +00:00
Eric Christopher
990bcd83b8 Not all platforms use _<func>. Duh.
llvm-svn: 120418
2010-11-30 09:23:54 +00:00
Eric Christopher
f27f0b5234 Rewrite mwait and monitor support and custom lower arguments.
Fixes PR8573.

llvm-svn: 120404
2010-11-30 07:20:12 +00:00
Benjamin Kramer
84bf47f2d8 Fix some broken CHECK lines.
llvm-svn: 120332
2010-11-29 22:34:55 +00:00
Rafael Espindola
45cd9713f2 Lower TLS_addr32 and TLS_addr64.
llvm-svn: 120225
2010-11-27 20:43:02 +00:00
Benjamin Kramer
632a91cba5 Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization.
This currently only catches the most basic case, a two-case switch, but can be
extended later.

llvm-svn: 119964
2010-11-22 09:45:38 +00:00
Dale Johannesen
6399550f2f Prefetch has a MemOperand now. FileCheckize a test.
This finishes up 8460971.

llvm-svn: 119848
2010-11-19 21:49:38 +00:00
Mon P Wang
4965983b22 Make isScalarToVector to return false if the node is a scalar. This will prevent
DAGCombine from making an illegal transformation of bitcast of a scalar to a
vector into a scalar_to_vector.

llvm-svn: 119819
2010-11-19 19:08:12 +00:00
Duncan Sands
a61bc1a41a The DAGCombiner was threading select over pairs of extending loads even
if the extension types were not the same.  The result was that if you
fed a select with sext and zext loads, as in the testcase, then it
would get turned into a zext (or sext) of the select, which is wrong
in the cases when it should have been an sext (resp. zext).  Reported
and diagnosed by Sebastien Deldon.

llvm-svn: 119728
2010-11-18 20:05:18 +00:00