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204878 Commits

Author SHA1 Message Date
Arthur Eubanks
fb1aea563c [BPF] Make BPFAbstractMemberAccessPass required
Or else on optnone functions we get the following during instruction selection:
  fatal error: error in backend: Cannot select: intrinsic %llvm.preserve.struct.access.index

Currently the -O0 pipeline doesn't properly run passes registered via
TargetMachine::registerPassBuilderCallbacks(), so don't add that RUN
line yet. That will be fixed after this.

Reviewed By: yonghong-song

Differential Revision: https://reviews.llvm.org/D89083
2020-10-09 11:26:37 -07:00
Simon Pilgrim
cf6dd3759a [ARM][MIPS] Add funnel shift test coverage
Based on offline discussions regarding D89139 and D88783 - we want to make sure targets aren't doing anything particularly dumb

Tests copied from aarch64 which has a mixture of general, legalization and special case tests
2020-10-09 19:19:47 +01:00
Giorgis Georgakoudis
5c60ef51ef [OpenMPOpt] Merge parallel regions
There are cases that generated OpenMP code consists of multiple,
consecutive OpenMP parallel regions, either due to high-level
programming models, such as RAJA, Kokkos, lowering to OpenMP code, or
simply because the programmer parallelized code this way.  This
optimization merges consecutive parallel OpenMP regions to: (1) reduce
the runtime overhead of re-activating a team of threads; (2) enlarge the
scope for other OpenMP optimizations, e.g., runtime call deduplication
and synchronization elimination.

This implementation defensively merges parallel regions, only when they
are within the same BB and any in-between instructions are safe to
execute in parallel.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D83635
2020-10-09 09:59:04 -07:00
Arthur Eubanks
a70ba1098b [FixIrreducible][NewPM] Port -fix-irreducible to NPM
In the NPM, a pass cannot depend on another non-analysis pass. So pin
the test that tests that -lowerswitch is run automatically to legacy PM.

Reviewed By: sameerds

Differential Revision: https://reviews.llvm.org/D89051
2020-10-09 09:22:09 -07:00
Arthur Eubanks
a2aedea790 [LoopInterchange][NewPM] Port -loop-interchange to NPM
Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D89058
2020-10-09 09:21:31 -07:00
Jay Foad
0cf623e390 [AMDGPU] Only enable mad/mac legacy f32 patterns if denormals may be flushed
Following on from D88890, this makes the newly added patterns
conditional on NoFP32Denormals. mad/mac f32 instructions always flush
denormals regardless of the MODE register setting, and I believe the
legacy variants do the same.

Differential Revision: https://reviews.llvm.org/D89123
2020-10-09 17:08:38 +01:00
Simon Pilgrim
99440aa5b8 [InstCombine] Support lshr(trunc(lshr(x,c1)), c2) -> trunc(lshr(lshr(x,c1),c2)) uniform vector tests
FoldShiftByConstant is hardcoded for scalar/uniform outer shift amounts atm so that needs to be fixed first to support non-uniform cases
2020-10-09 16:54:46 +01:00
Simon Pilgrim
9735e12152 [InstCombine] Add lshr(trunc(lshr(x,c1)), c2) -> trunc(lshr(lshr(x,c1),c2)) vector tests 2020-10-09 16:54:46 +01:00
David Green
863d69bc9d [ARM] Add MVE vecreduce costmodel tests. NFC
There were some existing tests that were not super useful. New ones are
added for testing MVE specific patterns.
2020-10-09 16:25:25 +01:00
Scott Linder
644ae87b23 [NFC] Reformat MILexer.cpp:getIdentifierKind
Reformat to avoid unrelated changes in diff of future patch.
Committed as obvious.
2020-10-09 15:21:24 +00:00
Simon Pilgrim
23e4436662 [InstCombine] commonShiftTransforms - add support for pow2 nonuniform constant vectors in srem fold
Note: we already fold srem to undef if any denominator vector element is undef.
2020-10-09 15:59:33 +01:00
Krzysztof Parzyszek
9ee6426bce [Hexagon] Return 1 instead of 0 from getMaxInterleaveFactor 2020-10-09 09:46:18 -05:00
Sanjay Patel
45b43d4e29 [InstCombine] allow vector splats for add+and with high-mask
There might be a better way to specify the pre-conditions,
but this is hopefully clearer than the way it was written:
https://rise4fun.com/Alive/Jhk3

  Pre: C2 < 0 && isShiftedMask(C2) && (C1 == C1 & C2)
  %a = and %x, C2
  %r = add %a, C1
  =>
  %a2 = add %x, C1
  %r = and %a2, C2
2020-10-09 10:39:11 -04:00
Simon Pilgrim
f2ba86985b [InstCombine] Add tests for X shift (A srem B) -> X shift (A and B-1) pow2 nonuniform constant vectors 2020-10-09 15:33:06 +01:00
LLVM GN Syncbot
eaed84a6bd [gn build] Port 0741a2c9cac 2020-10-09 13:54:24 +00:00
Florian Hahn
9cb6002d04 [SCEV] Do not apply info from loop guards in AddRecs.
We cannot guarantee that the replacement expression is loop-invariant in
all AddRecs in the source expression. Use a rewriter that skips
AddRecExpr for now.

Fixes PR47776.
2020-10-09 14:47:26 +01:00
Simon Pilgrim
af14bbf8c2 [InstCombine] foldShiftOfShiftedLogic - add support for nonuniform constant vectors 2020-10-09 14:25:12 +01:00
Simon Pilgrim
5215c542c4 [InstCombine] foldShiftOfShiftedLogic - replace cast<BinaryOperator> with m_BinOp matcher. NFCI.
Allows us to drop the !isa<ConstantExpr> check.
2020-10-09 14:10:12 +01:00
Simon Pilgrim
6d17aca7ab [InstCombine] Add nonuniform/undef vector tests for shift(binop(shift(x,c1),y),c2) patterns 2020-10-09 13:42:11 +01:00
Roman Lebedev
7fd4fe466c Reland "[NFC][SCEV] Improve tests for ptrtoint modelling (D88806)"
I messed up runlines in the original commit.
2020-10-09 14:50:05 +03:00
Max Kazantsev
2cb9b29674 [NFC] Add option to disable IV widening if needed
IV widening is sometimes a strictly harmful transform (some examples
of this are shown in tests 11, 12 in widen-loop-comp.ll). One of the
reasons of this is that sometimes SCEV fails to prove some facts after
part of guards has been widened.

Though each single such case looks like a bug that can be addressed,
it seems that disabling of IV widening may be profitable in some cases.
We want to have an option to do so. By default, existing behavior is
preserved and IV widening is on.
2020-10-09 18:32:03 +07:00
Roman Lebedev
60367f78e7 Revert "[NFC][SCEV] Improve tests for ptrtoint modelling (D88806)"
Buildbots aren't happy, need to investigate.
This reverts commit 32cc8f7998abe1824e0832a49b66559471c9b879.
2020-10-09 14:10:43 +03:00
Jonas Paulsson
9a455a4c8e [SystemZ] Use LA instead of AGR in eliminateFrameIndex().
Since AGR clobbers CC it should not be used here.

Fixes https://bugs.llvm.org/show_bug.cgi?id=47736.

Review: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D89034
2020-10-09 13:06:33 +02:00
Roman Lebedev
87cbbfcf0e [NFC][SCEV] Improve tests for ptrtoint modelling (D88806) 2020-10-09 13:50:30 +03:00
Esme-Yi
725cbaf080 [DAGCombiner] Add decomposition patterns for Mul-by-Imm.
Summary: This patch is derived from D87384.
In this patch we expand the existing decomposition of mul-by-constant to be more general by implementing 2 patterns:
```
  mul x, (2^N + 2^M) --> (add (shl x, N), (shl x, M))
  mul x, (2^N - 2^M) --> (sub (shl x, N), (shl x, M))
```
The conversion will be trigged if the multiplier is a big constant that the target can't use a single multiplication instruction to handle. This is controlled by the hook `decomposeMulByConstant`.
More over, the conversion benefits from an ILP improvement since the instructions are independent. A case with the sequence like following also gets benefit since a shift instruction is saved.

```
*res1 = a * 0x8800;
*res2 = a * 0x8080;
```

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D88201
2020-10-09 08:51:40 +00:00
Georgii Rymar
47f4e42b78 [llvm-readelf/obj][test] - Stop using precompiled binary in mips-plt.test
This removes the precompiled binary and rewrites test to use YAML.

After this change we'll have no more precompiled inputs in `llvm-readobj/ELF/Inputs`.

Differential revision: https://reviews.llvm.org/D89097
2020-10-09 11:48:49 +03:00
Bevin Hansson
ad6d96ea4f [Fixed Point] Add floating point methods to APFixedPoint.
This adds methods to APFixedPoint for converting to and from
floating point values.

Differential Revision: https://reviews.llvm.org/D85961
2020-10-09 10:27:42 +02:00
Bevin Hansson
5f5f4fe543 [IR] Add Type::getFloatingPointTy.
It is possible to get a fltSemantics of a particular Type,
but there is no way to produce a Type based on a
fltSemantics.

This adds the function Type::getFloatingPointTy, which
will return the appropriate floating point Type for a given
fltSemantics.

ConstantFP is modified to use this function instead of
implementing it itself. Also some minor refactors to use
Type::getFltSemantics instead of a hand-rolled version.

Differential Revision: https://reviews.llvm.org/D87512
2020-10-09 10:27:41 +02:00
Fangrui Song
5611055efa [MCRegister] Simplify isStackSlot & isPhysicalRegister and delete isPhysical. NFC 2020-10-08 22:08:33 -07:00
Fangrui Song
ff30c5884e Fix incorect Register -> MCRegister conversion
getReg returns a Register which may represent a virtual register.
2020-10-08 21:40:48 -07:00
Xing GUO
dd75275a41 [llvm-dwarfdump][test] Rewrite verify_die_ranges.s in YAML. NFC.
This patch rewrites test case verify_die_ranges.s in YAML which helps
simplify the test.

Reviewed By: jhenderson, JDevlieghere, dblaikie

Differential Revision: https://reviews.llvm.org/D88200
2020-10-09 11:13:10 +08:00
Xing GUO
960c301574 [DWARFYAML] Make the opcode_base and the standard_opcode_lengths fields optional.
This patch makes the opcode_base and the standard_opcode_lengths fields
of the line table optional. When both of them are not specified,
yaml2obj emits them according to the line table's version.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D88355
2020-10-09 11:10:03 +08:00
Kazushi (Jam) Marukawa
9d098730c5 [VE] Add new MVT types for NEC SX Aurora VE vector
This patch adds entries for:
    v64i64
    v128i64
    v256i64
    v64f64
    v128f64
    v256f64

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D88776
2020-10-09 12:07:41 +09:00
Kai Luo
dac99baf5d [TwoAddressInstruction][PowerPC] Call regOverlapsSet to find out real clobbers and uses
In `rescheduleKillAboveMI`, current implementation uses `SmallSet` to track reg's defs and uses. When comparing, use `SmallSet.count` to find out if it's clobbered or used. It's not correct if involving subregisters. This patch uses `regOverlapsSet` already used by `rescheduleMIBelowKill` to fix the issue.

Fixed https://bugs.llvm.org/show_bug.cgi?id=47707.

Reviewed By: #powerpc, nemanjai

Differential Revision: https://reviews.llvm.org/D88716
2020-10-09 02:34:54 +00:00
Esme-Yi
fb349c0fba [NFC][PowerPC] Supplement test cases for D88274. 2020-10-09 02:32:05 +00:00
QingShan Zhang
0ba32a4447 [NFC][Test] Update the test with update_llc_test_checks.py 2020-10-09 02:26:03 +00:00
Kai Luo
6b4d4c8ee7 [PowerPC] Add RUN line for powerpc 32-bit. NFC. 2020-10-09 00:29:01 +00:00
Austin Kerbow
ae3d83e89b [AMDGPU] Fix mai hazard VALU to LD/ST
Fixes: SWDEV-251863

Differential Revision: https://reviews.llvm.org/D89079
2020-10-08 17:13:02 -07:00
Yuanfang Chen
6d12c0842b [NFC] Fix a comment in MachinePassManager.h
Fix "warning: '\returns' command used in a comment that is not attached
to a function or method declaration [-Wdocumentation]
1 warning generated."
2020-10-08 15:38:57 -07:00
Fangrui Song
c199a61ffa [X86] Fix some clang-tidy bugprone-argument-comment issues 2020-10-08 15:26:50 -07:00
Mircea Trofin
074f58db6d [NFC][MC] MCRegister API typing.
Mostly LiveIntervals, with their effects (users).

Differential Revision: https://reviews.llvm.org/D89018
2020-10-08 15:08:34 -07:00
Simon Pilgrim
8f93933775 [InstCombine] visitTrunc - trunc(shl(X, C)) --> shl(trunc(X),trunc(C)) vector support
Annoyingly vectors aren't supported by shouldChangeType(), but we have precedents for always performing this on vector types (e.g. narrowBinOp).

Differential Revision: https://reviews.llvm.org/D89067
2020-10-08 22:07:51 +01:00
Quentin Colombet
32690c693f [GlobalISel] Add missing pass dependencies for IRTranslator
The IRTranslator depends on the branch probability info pass when the
optimization level is different than None and it depends all the time on
the StackProtector pass.

We have to explicitly call out pass dependencies otherwise the pass manager
may not be able to schedule the IRTranslator.

Before this patch, we were lucky because previous passes depend on the branch
probability info pass (like the Global Variable Optimization) and the stack
protector pass is initialized in initializeCodeGen.
However, if the target has a custom pipeline without any passes like Global
Variable Optimization, the pipeline creation will fail, at least because of
the branch probability info pass dependency (it is unlikely that
initializeCodeGen is not called).

This patch adds the missing dependencies to the IRTranslator.

Differential Revision: https://reviews.llvm.org/D89063
2020-10-08 13:57:21 -07:00
Simon Pilgrim
a0c0bac22a [InstCombine] Add additional trunc(shl(x,c)) -> shl(trunc(x),trunc(c)) vector tests 2020-10-08 21:11:48 +01:00
Sanjay Patel
43799dbe92 [InstCombine] allow vector splats for add+xor with low-mask
This can be allowed with undef elements too, but that can be another step:
https://alive2.llvm.org/ce/z/hnC4Z-
2020-10-08 15:53:38 -04:00
Simon Pilgrim
405a6508c3 [Transforms] visitCmpBlock - don't dereference a dyn_cast<>. NFCI.
Use cast<> as we immediately dereference the pointer afterwards - cast<> will assert if we fail.

Prevents clang static analyzer warning that we could deference a null pointer.
2020-10-08 20:18:32 +01:00
Sanjay Patel
75c88e4411 [InstCombine] remove unnecessary one-use check from add-xor transform
Pre-conditions seem to be optimal, but we don't need a use check
because we are only replacing an add with a sub.

https://rise4fun.com/Alive/hzN

  Pre: (~C1 | C2 == -1) && isPowerOf2(C2+1)
  %m = and i8 %x, C1
  %f = xor i8 %m, C2
  %r = add i8 %f, C3
  =>
  %r = sub i8 C2 + C3, %m
2020-10-08 15:08:51 -04:00
Sanjay Patel
5f6285202c [InstCombine] add tests for add-xor; NFC 2020-10-08 15:08:51 -04:00
Simon Pilgrim
2c22c76b35 [SLP] optimizeGatherSequence - assert every Instruction in the worklist is non-null.
Fixes clang static analyzer warning.
2020-10-08 20:02:18 +01:00
Heejin Ahn
5493d37e90 [WebAssembly] Handle indirect uses of longjmp
In LowerEmscriptenEHSjLj, `longjmp` used to be replaced with
`emscripten_longjmp_jmpbuf(jmp_buf*, i32)`, which will eventually be
lowered to `emscripten_longjmp(i32, i32)`. The reason we used two
different names was because they had different signatures in the IR
pass.

D88697 fixed this by only using `emscripten_longjmp(i32, i32)` and
adding a `ptrtoint` cast to its first argument, so
```
longjmp(buf, 0)
```
becomes
```
emscripten_longjmp((i32)buf, 0)
```

But this assumed all uses of `longjmp` was a direct call to it, which
was not the case. This patch handles indirect uses of `longjmp` by
replacing
```
longjmp
```
with
```
(i32(*)(jmp_buf*, i32))emscripten_longjmp
```

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D89032
2020-10-08 11:37:19 -07:00