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llvm-mirror/lib/Target/AMDGPU
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Carl Ritson 5997b61680 [AMDGPU] Add SelectionDAG support for insert_subvector on v4f64 
Enable custom insert_subvector for larger vector types.
This is necessary now that SelectionDAG can attempt v3f64 insert
to v4f64, etc.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D105385
2021-07-27 10:11:34 +09:00
..
AsmParser [AMDGPU] Add VReg_192/VReg_224 support for MIMG instructions 2021-07-22 10:42:15 +09:00
Disassembler [AMDGPU] Add VReg_192/VReg_224 support for MIMG instructions 2021-07-22 10:42:15 +09:00
MCTargetDesc [AMDGPU] Handle s_branch to another section. 2021-07-13 12:17:47 +01:00
TargetInfo llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
Utils [AMDGPU] Allow frontends to disable null export for pixel shaders 2021-07-22 10:20:46 +09:00
AMDGPU.h [AMDGPU] Deduce attributes with the Attributor 2021-07-24 06:07:15 +03:00
AMDGPU.td [AMDGPU] Add maximum NSA size limit ISA feature 2021-07-23 16:16:06 +09:00
AMDGPUAliasAnalysis.cpp [NFC][AA] Prepare to convert AliasResult to class with PartialAlias offset. 2021-04-09 12:54:22 +03:00
AMDGPUAliasAnalysis.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUAlwaysInlinePass.cpp [AMDGPU] Disable forceful inline of non-kernel functions which use LDS. 2021-04-15 09:12:56 +05:30
AMDGPUAnnotateKernelFeatures.cpp [AMDGPU] Do not annotate features for graphics 2021-05-03 10:33:11 +02:00
AMDGPUAnnotateUniformValues.cpp [OpaquePtr] Clean up some uses of Type::getPointerElementType() 2021-05-31 09:54:57 -07:00
AMDGPUArgumentUsageInfo.cpp [GlobalISel] NFC: Change LLT::vector to take ElementCount. 2021-06-24 11:26:12 +01:00
AMDGPUArgumentUsageInfo.h [AMDGPU] gfx90a support 2021-02-17 16:01:32 -08:00
AMDGPUAsmPrinter.cpp [AMDGPU] Improve register computation for indirect calls 2021-07-20 13:48:50 +02:00
AMDGPUAsmPrinter.h [AMDGPU] Improve register computation for indirect calls 2021-07-20 13:48:50 +02:00
AMDGPUAtomicOptimizer.cpp [AMDGPU] Use reductions instead of scans in the atomic optimizer 2021-03-26 15:38:14 +00:00
AMDGPUAttributor.cpp [llvm] Inline getAssociatedFunction() in LLVM_DEBUG. 2021-07-24 11:49:21 +02:00
AMDGPUCallingConv.td AMDGPU: Promote signext/zeroext i16 shader returns 2021-07-13 11:04:51 -04:00
AMDGPUCallLowering.cpp AMDGPU/GlobalISel: Preserve more memory types 2021-07-16 08:57:26 -04:00
AMDGPUCallLowering.h AMDGPU/GlobalISel: Redo kernel argument load handling 2021-07-16 08:56:54 -04:00
AMDGPUCodeGenPrepare.cpp [AMDGPU] [CodeGen] Fold negate llvm.amdgcn.class into test mask 2021-06-18 13:04:12 -06:00
AMDGPUCombine.td AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE 2021-04-27 12:26:37 +02:00
AMDGPUExportClustering.cpp [AMDGPU][MC] Refactored exp tgt handling 2021-01-26 14:54:15 +03:00
AMDGPUExportClustering.h [llvm] Add missing header guards (NFC) 2021-01-30 09:53:42 -08:00
AMDGPUFeatures.td
AMDGPUFixFunctionBitcasts.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUGenRegisterBankInfo.def
AMDGPUGISel.td AMDGPU/GlobalISel: Add integer med3 combines 2021-04-27 11:52:23 +02:00
AMDGPUGlobalISelUtils.cpp [AMDGPU][GlobalISel] Handle G_PTR_ADD when looking for constant offset 2021-01-28 11:20:09 +01:00
AMDGPUGlobalISelUtils.h [ADT] Move DenseMapInfo for ArrayRef/StringRef into respective headers (NFC) 2021-06-03 18:34:36 +02:00
AMDGPUHSAMetadataStreamer.cpp AMDGPU: Add target id and code object v4 support 2021-03-24 11:54:05 -04:00
AMDGPUHSAMetadataStreamer.h AMDGPU: Add target id and code object v4 support 2021-03-24 11:54:05 -04:00
AMDGPUInstCombineIntrinsic.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUInstrInfo.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUInstrInfo.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUInstrInfo.td AMDGPU: Move zeroed FP high bits optimization to patterns 2021-06-22 12:47:56 -04:00
AMDGPUInstructions.td [AMDGPU] Simplify tablegen files. NFC. 2021-07-07 09:19:23 +01:00
AMDGPUInstructionSelector.cpp [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX 2021-06-28 09:06:44 -04:00
AMDGPUInstructionSelector.h [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX 2021-06-28 09:06:44 -04:00
AMDGPUISelDAGToDAG.cpp AMDGPU: Fix high 16-bit optimization on gfx9 2021-06-22 13:16:45 -04:00
AMDGPUISelLowering.cpp [AMDGPU] Stop mulhi from doing 24 bit mul for uniform values 2021-07-05 10:33:23 +01:00
AMDGPUISelLowering.h [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX 2021-06-28 09:06:44 -04:00
AMDGPULateCodeGenPrepare.cpp [OpaquePtr] Remove uses of CreateConstGEP1_64() without element type 2021-07-17 16:43:20 +02:00
AMDGPULegalizerInfo.cpp [AMDGPU][GISel] Fix MMO for raw/struct buffer access with non-constant offset 2021-07-26 14:27:30 +01:00
AMDGPULegalizerInfo.h [AMDGPU][GISel] Fix MMO for raw/struct buffer access with non-constant offset 2021-07-26 14:27:30 +01:00
AMDGPULibCalls.cpp [llvm] Rename StringRef _lower() method calls to _insensitive() 2021-06-25 00:22:01 +03:00
AMDGPULibFunc.cpp [amdgpu] Add -enable-ocl-mangling-mismatch-workaround. 2021-06-08 15:42:27 -04:00
AMDGPULibFunc.h
AMDGPULowerIntrinsics.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPULowerKernelArguments.cpp [CodeGen] Add missing includes (NFC) 2021-06-06 15:48:27 +02:00
AMDGPULowerKernelAttributes.cpp [AMDGPU] Fix pass name of AMDGPULowerKernelAttributes. NFC. 2021-07-06 15:03:31 -07:00
AMDGPULowerModuleLDSPass.cpp [AMDGPU] Disable LDS lowering for GFX shaders 2021-07-20 02:55:25 -07:00
AMDGPUMachineCFGStructurizer.cpp [AMDGPU] Fix build breakage 2021-02-14 09:02:55 -08:00
AMDGPUMachineFunction.cpp [AMDGPU] Fix module LDS selection 2021-05-20 15:59:01 -07:00
AMDGPUMachineFunction.h [amdgpu] Implement lower function LDS pass 2021-03-15 15:24:01 +00:00
AMDGPUMachineModuleInfo.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUMachineModuleInfo.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUMacroFusion.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
AMDGPUMacroFusion.h [llvm] Add missing header guards (NFC) 2021-01-30 09:53:42 -08:00
AMDGPUMCInstLower.cpp [amdgpu] Add 64-bit PC support when expanding unconditional branches. 2021-07-26 14:50:30 -04:00
AMDGPUMIRFormatter.cpp [AMDGPU] Implement mir parseCustomPseudoSourceValue 2021-01-22 11:24:08 +01:00
AMDGPUMIRFormatter.h [AMDGPU] Implement mir parseCustomPseudoSourceValue 2021-01-22 11:24:08 +01:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUPerfHintAnalysis.cpp [AMDGPU] Tune perfhint analysis to account access width 2021-07-21 12:46:10 -07:00
AMDGPUPerfHintAnalysis.h [AMDGPU] Tune perfhint analysis to account access width 2021-07-21 12:46:10 -07:00
AMDGPUPostLegalizerCombiner.cpp AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE 2021-04-27 12:26:37 +02:00
AMDGPUPreLegalizerCombiner.cpp [GISel] Support llvm.memcpy.inline 2021-06-30 12:39:05 -07:00
AMDGPUPrintfRuntimeBinding.cpp [AMDGPU] Simplify GEP construction (NFC) 2021-07-08 21:21:43 +02:00
AMDGPUPromoteAlloca.cpp [OpaquePtr] Create API to make a copy of a PointerType with some address space 2021-06-01 16:52:32 -07:00
AMDGPUPropagateAttributes.cpp Revert "[AMDGPU] [IndirectCalls] Don't propagate attributes to address taken functions and their callees" 2021-06-24 02:33:50 +01:00
AMDGPUPTNote.h AMDGPU: Add target id and code object v4 support 2021-03-24 11:54:05 -04:00
AMDGPURegBankCombiner.cpp AMDGPU/GlobalISel: Add integer med3 combines 2021-04-27 11:52:23 +02:00
AMDGPURegisterBankInfo.cpp [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX 2021-06-28 09:06:44 -04:00
AMDGPURegisterBankInfo.h [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX 2021-06-28 09:06:44 -04:00
AMDGPURegisterBanks.td [AMDGPU] Add 224-bit vector types and link 192-bit types to MVTs 2021-06-24 12:41:22 +09:00
AMDGPUReplaceLDSUseWithPointer.cpp [OpaquePtr] Remove uses of CreateGEP() without element type 2021-07-17 22:56:27 +02:00
AMDGPUResourceUsageAnalysis.cpp [AMDGPU] Improve register computation for indirect calls 2021-07-20 13:48:50 +02:00
AMDGPUResourceUsageAnalysis.h [AMDGPU] Fix running ResourceUsageAnalysis 2021-07-23 09:25:15 +02:00
AMDGPURewriteOutArguments.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUSearchableTables.td [AMDGPU] gfx90a support 2021-02-17 16:01:32 -08:00
AMDGPUSubtarget.cpp [AMDGPU] Add maximum NSA size limit ISA feature 2021-07-23 16:16:06 +09:00
AMDGPUSubtarget.h [AMDGPU] Stop mulhi from doing 24 bit mul for uniform values 2021-07-05 10:33:23 +01:00
AMDGPUTargetMachine.cpp [AMDGPU] Deduce attributes with the Attributor 2021-07-24 06:07:15 +03:00
AMDGPUTargetMachine.h [NewPM] Hide pass manager debug logging behind -debug-pass-manager-verbose 2021-05-07 21:51:47 -07:00
AMDGPUTargetObjectFile.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDGPUTargetObjectFile.h AMDGPUTargetObjectFile.h - remove unnecessary includes. NFC. 2020-05-24 13:57:02 +01:00
AMDGPUTargetTransformInfo.cpp [Analysis] Add simple cost model for strict (in-order) reductions 2021-07-26 10:26:06 +01:00
AMDGPUTargetTransformInfo.h [Analysis] Add simple cost model for strict (in-order) reductions 2021-07-26 10:26:06 +01:00
AMDGPUUnifyDivergentExitNodes.cpp [AMDGPU] Don't handle export done when unify exit nodes 2021-07-14 14:54:37 +08:00
AMDGPUUnifyMetadata.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
AMDILCFGStructurizer.cpp [NewPM] Cleanup IR printing instrumentation 2021-04-15 09:50:55 -07:00
AMDKernelCodeT.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
BUFInstructions.td [AMDGPU] Simplify tablegen files. NFC. 2021-07-07 09:19:23 +01:00
CaymanInstructions.td
CMakeLists.txt [AMDGPU] Deduce attributes with the Attributor 2021-07-24 06:07:15 +03:00
DSInstructions.td [AMDGPU] Set IsAtomicRet and IsAtomicNoRet on Real instructions 2021-06-16 12:23:29 +01:00
EvergreenInstructions.td [AMDGPU] Inline FSHRPattern into its only use. NFC. 2021-03-26 09:32:02 +00:00
EXPInstructions.td [AMDGPU] Separate out real exp instructions by subtarget. NFC. 2020-11-11 17:13:40 +00:00
FLATInstructions.td [AMDGPU] Set IsAtomicRet and IsAtomicNoRet on Real instructions 2021-06-16 12:23:29 +01:00
GCNDPPCombine.cpp [AMDGPU] GCNDPPCombine: don't shrink V_ADD_CO_U32 if carry out is used 2021-04-20 09:17:52 +01:00
GCNHazardRecognizer.cpp [AMDGPU] Limit runs of fixLdsBranchVmemWARHazard 2021-06-14 22:30:23 +02:00
GCNHazardRecognizer.h [AMDGPU] Limit runs of fixLdsBranchVmemWARHazard 2021-06-14 22:30:23 +02:00
GCNILPSched.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
GCNIterativeScheduler.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
GCNIterativeScheduler.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
GCNMinRegStrategy.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
GCNNSAReassign.cpp [AMDGPU] Do not reassign spilled registers 2021-01-27 16:29:05 -08:00
GCNPreRAOptimizations.cpp [AMDGPU] Add S_MOV_B64_IMM_PSEUDO for wide constants 2021-06-30 11:45:38 -07:00
GCNProcessors.td [AMDGPU] Add gfx1035 target 2021-06-24 14:32:41 -04:00
GCNRegPressure.cpp [AMDGPU] gfx90a support 2021-02-17 16:01:32 -08:00
GCNRegPressure.h [AMDGPU] gfx90a support 2021-02-17 16:01:32 -08:00
GCNSchedStrategy.cpp [AMDGPU] Avoid second rescheduling for some regions 2021-02-26 12:29:37 -08:00
GCNSchedStrategy.h [AMDGPU] Avoid second rescheduling for some regions 2021-02-26 12:29:37 -08:00
GCNSubtarget.h [AMDGPU] Add maximum NSA size limit ISA feature 2021-07-23 16:16:06 +09:00
InstCombineTables.td
MIMGInstructions.td [AMDGPU] Add VReg_192/VReg_224 support for MIMG instructions 2021-07-22 10:42:15 +09:00
R600.td
R600AsmPrinter.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600AsmPrinter.h
R600ClauseMergePass.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600ControlFlowFinalizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600Defines.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
R600EmitClauseMarkers.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600ExpandSpecialInstrs.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600FrameLowering.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600FrameLowering.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
R600InstrFormats.td Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
R600InstrInfo.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600InstrInfo.h Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate 2020-10-21 11:52:47 +01:00
R600Instructions.td
R600ISelLowering.cpp [DAG] Add a generic expansion for SHIFT_PARTS opcodes using funnel shifts 2021-05-07 13:12:30 +01:00
R600ISelLowering.h [llvm][sve] Lowering for VLS truncating stores 2021-07-23 14:04:55 +01:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600MachineScheduler.h
R600OpenCLImageTypeLoweringPass.cpp TransformUtils: Fix metadata handling in CloneModule (and improve CloneFunctionInto) 2021-02-15 11:56:00 -08:00
R600OptimizeVectorRegisters.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600Packetizer.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600Processors.td
R600RegisterInfo.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600Subtarget.h [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
R700Instructions.td
SIAnnotateControlFlow.cpp [AMDGPU] Set LoopInfo as preserved by SIAnnotateControlFlow 2021-07-08 09:34:43 -07:00
SIDefines.h [AMDGPU] IsFlatScratch/Global -> FlatScratch/Global 2021-04-09 11:20:31 +02:00
SIFixSGPRCopies.cpp [AMDGPU] Introduce Strict WQM mode 2021-03-03 14:19:16 +01:00
SIFixVGPRCopies.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIFoldOperands.cpp AMDGPU: Try to eliminate clearing of high bits of 16-bit instructions 2021-06-22 13:42:49 -04:00
SIFormMemoryClauses.cpp [AMDGPU][NFC] Fix typos in SIFormMemoryClauses description 2021-05-06 07:47:39 -07:00
SIFrameLowering.cpp [AMDGPU] Init scratch only if necessary 2021-07-14 10:45:22 +02:00
SIFrameLowering.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
SIInsertHardClauses.cpp [AMDGPU] Do not clause NSA instructions 2021-05-14 12:54:56 +09:00
SIInsertWaitcnts.cpp [AMDGPU] Remove assert 2021-05-12 14:52:37 +02:00
SIInstrFormats.td [AMDGPU] IsFlatScratch/Global -> FlatScratch/Global 2021-04-09 11:20:31 +02:00
SIInstrInfo.cpp [amdgpu] Add 64-bit PC support when expanding unconditional branches. 2021-07-26 14:50:30 -04:00
SIInstrInfo.h [amdgpu] Add 64-bit PC support when expanding unconditional branches. 2021-07-26 14:50:30 -04:00
SIInstrInfo.td AMDGPU: Move zeroed FP high bits optimization to patterns 2021-06-22 12:47:56 -04:00
SIInstructions.td [AMDGPU] Mark waterfall loops as SI_WATERFALL_LOOP 2021-07-13 12:15:08 +02:00
SIISelLowering.cpp [AMDGPU] Add SelectionDAG support for insert_subvector on v4f64 2021-07-27 10:11:34 +09:00
SIISelLowering.h [AMDGPU] NFC refactoring in isel for buffer access intrinsics 2021-07-21 11:12:49 +01:00
SILateBranchLowering.cpp [AMDGPU] Allow frontends to disable null export for pixel shaders 2021-07-22 10:20:46 +09:00
SILoadStoreOptimizer.cpp AMDGPU: Fix SILoadStoreOptimizer for gfx90a 2021-05-11 21:26:43 -04:00
SILowerControlFlow.cpp [AMDGPU] Mark waterfall loops as SI_WATERFALL_LOOP 2021-07-13 12:15:08 +02:00
SILowerI1Copies.cpp [Target] Use llvm::append_range (NFC) 2021-01-24 12:18:56 -08:00
SILowerSGPRSpills.cpp RegAlloc: Allow targets to split register allocation 2021-07-13 18:49:29 -04:00
SIMachineFunctionInfo.cpp [AMDGPU] Init scratch only if necessary 2021-07-14 10:45:22 +02:00
SIMachineFunctionInfo.h [AMDGPU] Serialize MFInfo::ScavengeFI 2021-05-07 11:15:25 +02:00
SIMachineScheduler.cpp [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
SIMachineScheduler.h [NFC][AMDGPU] Reduce include files dependency. 2021-01-07 22:22:05 +03:00
SIMemoryLegalizer.cpp [AMDGPU] Update gfx90a memory model support 2021-06-30 04:05:22 +00:00
SIModeRegister.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIOptimizeExecMasking.cpp [AMDGPU] Move kill lowering to WQM pass and add live mask tracking 2021-02-11 20:31:29 +09:00
SIOptimizeExecMaskingPreRA.cpp [AMDGPU] SIOptimizeExecMaskingPreRA should check constant bus constraint when folds EXEC copy 2021-03-24 14:14:13 +03:00
SIOptimizeVGPRLiveRange.cpp [AMDGPU] Improve killed check for vgpr optimization 2021-07-21 15:24:59 +02:00
SIPeepholeSDWA.cpp [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets 2021-01-20 22:22:45 +03:00
SIPostRABundler.cpp AMDGPU: Use kill instruction to hint soft clause live ranges 2021-02-26 18:26:40 -05:00
SIPreAllocateWWMRegs.cpp [AMDGPU] Save WWM registers in functions 2021-04-23 18:09:24 +02:00
SIPreEmitPeephole.cpp [AMDGPU] Remove set_gpr_idx instructions in conditional blocks 2021-04-30 22:15:45 +01:00
SIProgramInfo.cpp [AMDGPU] Set rsrc1 flags for graphics shaders 2020-11-04 12:25:41 +01:00
SIProgramInfo.h [AMDGPU] gfx90a support 2021-02-17 16:01:32 -08:00
SIRegisterInfo.cpp [AMDGPU] Add VReg_192/VReg_224 support for MIMG instructions 2021-07-22 10:42:15 +09:00
SIRegisterInfo.h RegAlloc: Allow targets to split register allocation 2021-07-13 18:49:29 -04:00
SIRegisterInfo.td [AMDGPU] Tidy SReg/SGPR definitions using template class 2021-07-17 11:26:46 +09:00
SISchedule.td Revert "[MCA] [AMDGPU] Adding an implementation to AMDGPUCustomBehaviour for handling s_waitcnt instructions." 2021-07-07 20:48:42 -07:00
SIShrinkInstructions.cpp [AMDGPU] Add VReg_192/VReg_224 support for MIMG instructions 2021-07-22 10:42:15 +09:00
SIWholeQuadMode.cpp [AMDGPU] Fix WQM failure with single block inactive demote 2021-05-06 21:02:26 +09:00
SMInstructions.td [AMDGPU] Set IsAtomicRet and IsAtomicNoRet on Real instructions 2021-06-16 12:23:29 +01:00
SOPInstructions.td [AMDGPU][MC] Added missing isCall/isBranch flags 2021-07-16 14:59:10 +03:00
VIInstrFormats.td
VOP1Instructions.td [AMDGPU] Mark all relevant VOP1 instructions rematerializable 2021-07-21 14:05:32 -07:00
VOP2Instructions.td [AMDGPU] Mark relevant rematerializable VOP2 instructions 2021-07-21 14:24:59 -07:00
VOP3Instructions.td [AMDGPU] Mark relevant rematerializable VOP3 instructions 2021-07-21 14:44:13 -07:00
VOP3PInstructions.td [AMDGPU] Set VOP3P flag on Real instructions 2021-06-16 15:00:45 +01:00
VOPCInstructions.td [AMDGPU] Set SALU, VALU and other instruction type flags on Real instructions 2021-06-16 13:36:02 +01:00
VOPInstructions.td [AMDGPU] Set SALU, VALU and other instruction type flags on Real instructions 2021-06-16 13:36:02 +01:00