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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/lib/Target/Hexagon
2020-12-30 22:22:13 +08:00
..
AsmParser [Target] Use llvm::erase_if (NFC) 2020-12-20 17:43:22 -08:00
Disassembler llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
MCTargetDesc [AsmWriter] Factor out mnemonic generation to accessible getMnemonic. 2020-11-17 09:47:38 +00:00
TargetInfo llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
BitTracker.cpp [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
BitTracker.h [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
CMakeLists.txt [Hexagon] Realign HVX vectors wherever possible 2020-12-09 17:11:25 -06:00
Hexagon.h Hexagon.h - remove unnecessary includes. NFCI. 2020-09-10 16:59:43 +01:00
Hexagon.td [TableGen] Support combining AssemblerPredicates with ORs 2020-03-13 17:13:51 +00:00
HexagonArch.h [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
HexagonAsmPrinter.cpp [MCStreamer] De-capitalize EmitValue EmitIntValue{,InHex} 2020-02-14 23:08:40 -08:00
HexagonAsmPrinter.h [AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI* 2020-02-13 22:08:55 -08:00
HexagonBitSimplify.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonBitTracker.cpp [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
HexagonBitTracker.h [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
HexagonBlockRanges.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonBlockRanges.h [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonBranchRelaxation.cpp [Alignment][NFC] Deprecate Align::None() 2020-01-24 12:53:58 +01:00
HexagonCallingConv.td [Hexagon] Reducing minimum alignment requirement 2020-06-24 10:28:37 -05:00
HexagonCFGOptimizer.cpp Hexagon.h - remove unnecessary includes. NFCI. 2020-09-10 16:59:43 +01:00
HexagonCommonGEP.cpp Replace T(x) with reinterpret_cast<T>(x) everywhere it means reinterpret_cast. NFC. 2020-12-22 19:54:29 -05:00
HexagonConstExtenders.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonConstPropagation.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonCopyToCombine.cpp Hexagon.h - remove unnecessary includes. NFCI. 2020-09-10 16:59:43 +01:00
HexagonDepArch.h [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
HexagonDepArch.td [TableGen] Support combining AssemblerPredicates with ORs 2020-03-13 17:13:51 +00:00
HexagonDepDecoders.inc [Hexagon] Remove unused operand definitions: s10_0Imm and s10_6Imm 2020-01-23 09:38:54 -06:00
HexagonDepIICHVX.td [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
HexagonDepIICScalar.td [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
HexagonDepInstrFormats.td [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
HexagonDepInstrInfo.td [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
HexagonDepITypes.h [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
HexagonDepITypes.td [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
HexagonDepMapAsm2Intrin.td [TableGen] Drop deprecated leading # operation (NOP) and replace ## with # 2020-04-25 16:26:45 -07:00
HexagonDepMappings.td [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
HexagonDepMask.h [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
HexagonDepOperands.td [Hexagon] Remove unused operand definitions: s10_0Imm and s10_6Imm 2020-01-23 09:38:54 -06:00
HexagonDepTimingClasses.h [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
HexagonEarlyIfConv.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonExpandCondsets.cpp [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
HexagonFixupHwLoops.cpp [Pass] Ensure we don't include PassSupport.h or PassAnalysisSupport.h directly 2020-04-26 12:58:20 +01:00
HexagonFrameLowering.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonFrameLowering.h [SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference. 2020-11-05 11:02:18 +00:00
HexagonGenExtract.cpp Fix HexagonGenExtract return status 2020-07-13 20:41:59 +02:00
HexagonGenInsert.cpp [Target] Use llvm::erase_if (NFC) 2020-12-20 17:43:22 -08:00
HexagonGenMux.cpp [Hexagon] Validate the iterators before converting them to mux. 2019-11-14 13:01:16 -06:00
HexagonGenPredicate.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonHardwareLoops.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonHazardRecognizer.cpp
HexagonHazardRecognizer.h
HexagonIICHVX.td
HexagonIICScalar.td [llvm] NFC: Fix trivial typo in rst and td files 2020-04-23 14:26:32 +09:00
HexagonInstrFormats.td [llvm] NFC: Fix trivial typo in rst and td files 2020-04-23 14:26:32 +09:00
HexagonInstrFormatsV60.td
HexagonInstrFormatsV65.td [llvm] NFC: Fix trivial typo in rst and td files 2020-04-23 14:26:32 +09:00
HexagonInstrInfo.cpp Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate 2020-10-21 11:52:47 +01:00
HexagonInstrInfo.h Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate 2020-10-21 11:52:47 +01:00
HexagonIntrinsics.td [TableGen] Drop deprecated leading # operation (NOP) and replace ## with # 2020-04-25 16:26:45 -07:00
HexagonIntrinsicsV5.td
HexagonIntrinsicsV60.td [Hexagon] Fix license headers in some .td files, NFC 2020-10-16 10:03:05 -05:00
HexagonISelDAGToDAG.cpp [SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore. 2020-09-14 13:54:50 -07:00
HexagonISelDAGToDAG.h [Alignment][NFC] Use proper getter to retrieve alignment from ConstantInt and ConstantSDNode 2020-07-03 08:06:43 +00:00
HexagonISelDAGToDAGHVX.cpp [Hexagon] Handle additional shuffles that can be made perfect 2020-10-29 19:09:00 -05:00
HexagonISelLowering.cpp [Hexagon] Fix bitcasting v1i8 -> i8 2020-12-15 16:01:24 -06:00
HexagonISelLowering.h [Hexagon] Handle selection between HVX vector predicates 2020-10-23 18:22:03 -05:00
HexagonISelLoweringHVX.cpp [Target] Use llvm::is_contained (NFC) 2020-12-13 19:35:10 -08:00
HexagonLoopIdiomRecognition.cpp [AA] Split up LocationSize::unknown() 2020-11-26 18:39:55 +01:00
HexagonLoopIdiomRecognition.h [Hexagon][NewPM] Port -hexagon-loop-idiom and add to pipeline 2020-11-20 09:34:37 -08:00
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h Add support for Linux/Musl ABI 2020-01-20 09:59:56 -06:00
HexagonMachineScheduler.cpp
HexagonMachineScheduler.h
HexagonMapAsm2IntrinV62.gen.td
HexagonMapAsm2IntrinV65.gen.td
HexagonMCInstLower.cpp [MC] Fix memory leak when allocating MCInst with bump allocator 2020-08-03 16:08:26 -07:00
HexagonNewValueJump.cpp [Hexagon][NFC] Remove redundant condition 2020-07-01 09:04:26 +02:00
HexagonOperands.td
HexagonOptAddrMode.cpp [RDF] Remove uses of RDFRegisters::normalize (deprecate) 2020-08-04 17:02:12 -05:00
HexagonOptimizeSZextends.cpp Hexagon.h - remove unnecessary includes. NFCI. 2020-09-10 16:59:43 +01:00
HexagonPatterns.td [Hexagon] Add support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns 2020-11-25 19:02:17 +00:00
HexagonPatternsHVX.td [Hexagon] Add HVX support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns 2020-11-27 15:46:11 +00:00
HexagonPatternsV65.td
HexagonPeephole.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonPseudo.td [TableGen] Drop deprecated leading # operation (NOP) and replace ## with # 2020-04-25 16:26:45 -07:00
HexagonRDFOpt.cpp Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
HexagonRegisterInfo.cpp [SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference. 2020-11-05 11:02:18 +00:00
HexagonRegisterInfo.h [TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true 2020-01-19 14:20:37 -08:00
HexagonRegisterInfo.td [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
HexagonSchedule.td [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
HexagonScheduleV5.td
HexagonScheduleV55.td
HexagonScheduleV60.td
HexagonScheduleV62.td
HexagonScheduleV65.td
HexagonScheduleV66.td
HexagonScheduleV67.td [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
HexagonScheduleV67T.td [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
HexagonSelectionDAGInfo.cpp [Alignment][NFC] Migrate SelectionDAGTargetInfo::EmitTargetCodeForMemcpy to Align 2020-06-30 13:12:31 +00:00
HexagonSelectionDAGInfo.h [Alignment][NFC] Migrate SelectionDAGTargetInfo::EmitTargetCodeForMemcpy to Align 2020-06-30 13:12:31 +00:00
HexagonSplitConst32AndConst64.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
HexagonSplitDouble.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonStoreWidening.cpp [Alignment][NFC] Use Align version of getMachineMemOperand 2020-03-30 15:46:27 +00:00
HexagonSubtarget.cpp [Target] Use llvm::is_contained (NFC) 2020-12-13 19:35:10 -08:00
HexagonSubtarget.h [Hexagon] Move isTypeForHVX from Hexagon TTI to HexagonSubtarget, NFC 2020-11-02 14:00:45 -06:00
HexagonTargetMachine.cpp [Hexagon] Realign HVX vectors wherever possible 2020-12-09 17:11:25 -06:00
HexagonTargetMachine.h [NPM] Add target specific hook to add passes for New Pass Manager 2020-09-30 13:29:43 -07:00
HexagonTargetObjectFile.cpp [X86][AMX] Fix compilation warning introduced by 981a0bd8. 2020-12-30 22:22:13 +08:00
HexagonTargetObjectFile.h TargetLoweringObjectFile.h - remove unnecessary includes. NFCI. 2020-05-19 09:28:13 +01:00
HexagonTargetStreamer.h [MC] De-capitalize another set of MCStreamer::Emit* functions 2020-02-14 19:26:52 -08:00
HexagonTargetTransformInfo.cpp [Hexagon] Realign HVX vectors wherever possible 2020-12-09 17:11:25 -06:00
HexagonTargetTransformInfo.h [Hexagon] Move isTypeForHVX from Hexagon TTI to HexagonSubtarget, NFC 2020-11-02 14:00:45 -06:00
HexagonVectorCombine.cpp Use unary CreateShuffleVector if possible 2020-12-30 22:36:08 +09:00
HexagonVectorLoopCarriedReuse.cpp [Hexagon] Make HexagonVLCR compatibile with New PM 2020-09-21 13:45:12 -07:00
HexagonVectorLoopCarriedReuse.h [Hexagon] Make HexagonVLCR compatibile with New PM 2020-09-21 13:45:12 -07:00
HexagonVectorPrint.cpp [Hexagon] v67+ HVX register pairs should support either direction 2020-02-14 12:43:43 -06:00
HexagonVExtract.cpp [Alignment][NFC] Migrate AArch64, ARM, Hexagon, MSP and NVPTX backends to Align 2020-06-30 07:56:17 +00:00
HexagonVLIWPacketizer.cpp [Target] Fix typos. NFC 2020-05-22 14:40:43 +02:00
HexagonVLIWPacketizer.h [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
RDFCopy.cpp Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
RDFCopy.h Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
RDFDeadCode.cpp Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
RDFDeadCode.h Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00