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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00
llvm-mirror/test/CodeGen/ARM
Bjorn Pettersson 29ffba4b56 Update @llvm.powi to handle different int sizes for the exponent
This can be seen as a follow up to commit 0ee439b705e82a4fe20e2,
that changed the second argument of __powidf2, __powisf2 and
__powitf2 in compiler-rt from si_int to int. That was to align with
how those runtimes are defined in libgcc.
One thing that seem to have been missing in that patch was to make
sure that the rest of LLVM also handle that the argument now depends
on the size of int (not using the si_int machine mode for 32-bit).
When using __builtin_powi for a target with 16-bit int clang crashed.
And when emitting libcalls to those rtlib functions, typically when
lowering @llvm.powi), the backend would always prepare the exponent
argument as an i32 which caused miscompiles when the rtlib was
compiled with 16-bit int.

The solution used here is to use an overloaded type for the second
argument in @llvm.powi. This way clang can use the "correct" type
when lowering __builtin_powi, and then later when emitting the libcall
it is assumed that the type used in @llvm.powi matches the rtlib
function.

One thing that needed some extra attention was that when vectorizing
calls several passes did not support that several arguments could
be overloaded in the intrinsics. This patch allows overload of a
scalar operand by adding hasVectorInstrinsicOverloadedScalarOpd, with
an entry for powi.

Differential Revision: https://reviews.llvm.org/D99439
2021-06-17 09:38:28 +02:00
..
GlobalISel GlobalISel: Use DAG call lowering infrastructure in a more compatible way 2021-05-05 17:35:02 -04:00
ParallelDSP
Windows Update @llvm.powi to handle different int sizes for the exponent 2021-06-17 09:38:28 +02:00
2006-11-10-CycleInDAG.ll
2007-01-19-InfiniteLoop.ll
2007-03-07-CombinerCrash.ll
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2007-08-15-ReuseBug.ll
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2008-11-18-ScavengerAssert.ll
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2009-02-22-SoftenFloatVaArg.ll
2009-02-27-SpillerBug.ll
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2009-04-06-AsmModifier.ll
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2011-11-29-128bitArithmetics.ll Update @llvm.powi to handle different int sizes for the exponent 2021-06-17 09:38:28 +02:00
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2014-05-14-DwarfEHCrash.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
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arm-vld1.ll [ARM][NEON] Combine base address updates for vld1x intrinsics 2021-05-25 11:06:39 +02:00
arm-vlddup-update.ll [ARM][NEON] Combine base address updates for vld1Ndup intrinsics 2021-06-13 11:18:32 +02:00
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fnmscs.ll
fnmul.ll
fnmuls.ll
fold-const.ll
fold-sext-sextload.ll
fold-stack-adjust.ll
fold-zext-zextload.ll
formal.ll
fp16-args.ll
fp16-bitcast.ll
fp16-frame-lowering.ll
fp16-fullfp16.ll Update @llvm.powi to handle different int sizes for the exponent 2021-06-17 09:38:28 +02:00
fp16-fusedMAC.ll
fp16-insert-extract.ll
fp16-instructions.ll
fp16-intrinsic-vector-1op.ll
fp16-intrinsic-vector-2op.ll
fp16-litpool2-arm.mir
fp16-litpool3-arm.mir
fp16-litpool-arm.mir
fp16-litpool-thumb.mir
fp16-load-store.ll
fp16-no-condition.ll
fp16-promote.ll Update @llvm.powi to handle different int sizes for the exponent 2021-06-17 09:38:28 +02:00
fp16-v3.ll
fp16-vector-argument.ll
fp16-vld.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
fp16-vldlane-vstlane.ll
fp16-vminmaxnm-safe.ll
fp16-vminmaxnm-vector.ll
fp16-vminmaxnm.ll
fp16.ll
fp_convert.ll
fp-arg-shuffle.ll
fp-fast.ll
fp-intrinsics.ll
fp-only-sp.ll
fp.ll
fparith.ll
fpcmp_ueq.ll
fpcmp-f64-neon-opt.ll
fpcmp-opt.ll
fpcmp.ll
fpconsts.ll
fpconv.ll
fpenv.ll
fpmem.ll
fpoffset_overflow.mir
fpow.ll
fpowi.ll Update @llvm.powi to handle different int sizes for the exponent 2021-06-17 09:38:28 +02:00
fpscr-intrinsics.ll
fptoint.ll
fptosi-sat-scalar.ll
fpvcvtr.ll
fragmented-args-multiple-regs.ll
frame-register.ll
freeze-soften.ll
fsubs.ll
ftrunc.ll
func-argpassing-endian.ll
funnel-shift-rot.ll
funnel-shift.ll
fusedMAC.ll
gep-optimization.ll
ghc-tcreturn-lowered.ll
global-merge-1.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
global-merge-addrspace.ll
global-merge-alignment.ll
global-merge-dllexport.ll
global-merge-external-2.ll
global-merge-external.ll
global-merge.ll
globals.ll
gnu_mcount_nc.ll
gpr-paired-spill-thumbinst.ll
gpr-paired-spill.ll
gv-stubs-crash.ll
ha-alignstack-call.ll [clang][AArch32] Correctly align HA arguments when passed on the stack 2021-05-10 16:28:46 +01:00
ha-alignstack.ll [clang][AArch32] Correctly align HA arguments when passed on the stack 2021-05-10 16:28:46 +01:00
half.ll
hardfloat_neon.ll
hello.ll
hfa-in-contiguous-registers.ll
hidden-vis-2.ll
hidden-vis-3.ll
hidden-vis.ll
hints.ll
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
hoist-and-by-const-from-shl-in-eqcmp-zero.ll
i1.ll
i64_volatile_load_store.ll
iabs.ll
ifconv-kills.ll
ifconv-regmask.ll
ifcvt1.ll
ifcvt2.ll
ifcvt3.ll
ifcvt4.ll
ifcvt5.ll
ifcvt6.ll
ifcvt7.ll
ifcvt8.ll
ifcvt9.ll
ifcvt10.ll
ifcvt11.ll
ifcvt12.ll
ifcvt_canFallThroughTo.mir
ifcvt_diamond_unanalyzable.mir
ifcvt_diamondSameTrueFalse.mir
ifcvt_forked_diamond_unanalyzable.mir
ifcvt_simple_bad_zero_prob_succ.mir
ifcvt_simple_unanalyzable.mir
ifcvt_triangleSameCvtNext.mir
ifcvt_triangleWoCvtToNextEdge.mir
ifcvt-branch-weight-bug.ll
ifcvt-branch-weight.ll
ifcvt-callback.ll
ifcvt-dead-def.ll
ifcvt-diamond-unanalyzable-common.mir
ifcvt-iter-indbr.ll
ifcvt-regmask-noreturn.ll
ifcvt-size.mir
illegal-bitfield-loadstore.ll
illegal-vector-bitcast.ll
imm-peephole-arm.mir
imm-peephole-thumb.mir
imm.ll
immcost.ll
inc-of-add.ll
indexed-mem.ll
indirect-hidden.ll
indirect-reg-input.ll
indirectbr-2.ll
indirectbr-3.ll
indirectbr.ll
inline-asm-clobber.ll
inline-asm-i-constraint-i1.ll
inline-asm-multilevel-gep.ll
inline-asm-reserved-registers.ll
inline-diagnostics.ll
inlineasm2.ll
inlineasm3.ll
inlineasm4.ll
inlineasm-64bit.ll
inlineasm-error-t-toofewregs.ll
inlineasm-global.ll
inlineasm-imm-arm.ll
inlineasm-imm-thumb2.ll
inlineasm-imm-thumb.ll
inlineasm-ldr-pseudo.ll
inlineasm-operand-implicit-cast.ll
inlineasm-output-template.ll
inlineasm-switch-mode-oneway-from-arm.ll
inlineasm-switch-mode-oneway-from-thumb.ll
inlineasm-switch-mode.ll
inlineasm-X-allocation.ll
inlineasm-X-constraint.ll
inlineasm.ll
insn-sched1.ll
int-to-fp.ll
integer_insertelement.ll
interrupt-attr.ll
interval-update-remat.ll
interwork.ll
intrinsics-cmse.ll
intrinsics-coprocessor.ll
intrinsics-crypto.ll
intrinsics-memory-barrier.ll
intrinsics-overflow.ll
intrinsics-v8.ll
invalid-target.ll
invalidated-save-point.ll
invoke-donothing-assert.ll
ipra-exact-definition.ll
ipra-no-csr.ll
ipra-r0-returned.ll [TargetLowering] Only inspect attributes in the arguments for ArgListEntry 2021-05-18 14:30:22 -07:00
ipra-reg-usage.ll
ipra.ll
isel-v8i32-crash.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
ispositive.ll
jump-table-islands-split.ll
jump-table-islands.ll
jump-table-tbh.ll
jumptable-label.ll
krait-cpu-div-attribute.ll
large-stack.ll
large-vector.ll
ldaex-stlex.ll
ldc2l.ll
ldm-base-writeback.ll
ldm-stm-base-materialization.ll
ldm-stm-i256.ll
ldm.ll
ldr_ext.ll
ldr_frame.ll
ldr_post.ll
ldr_pre.ll
ldr.ll
ldrcppic.ll
ldrd-memoper.ll
ldrd.ll
ldrex-frame-size.ll
ldst-f32-2-i32.ll
ldstrex-m.ll
ldstrex.ll
legalize-bitcast.ll
legalize-fneg.ll
legalize-unaligned-load.ll
lit.local.cfg
litpool-licm.ll
llrint-conv.ll
llround-conv.ll
load_i1_select.ll
load_store_multiple.ll
load_store_opt_clobber_cpsr.mir
load_store_opt_kill.mir
load_store_opt_reg_limit.mir
load-address-masked.ll
load-arm.ll
load-combine-big-endian.ll
load-combine.ll
load-global2.ll
load-global.ll
load-store-flags.ll
load.ll
local-call.ll
log2_not_readnone.ll
long_shift.ll
long-setcc.ll
long.ll
longMAC.ll
loop-align-cortex-m.ll
loop-indexing.ll
loopvectorize_pr33804.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
lower-vmax.ll
lowerMUL-newload.ll
lrint-conv.ll
lround-conv.ll
lsr-code-insertion.ll
lsr-icmp-imm.ll
lsr-scale-addr-mode.ll
lsr-setupcost.ll
lsr-undef-in-binop.ll
lsr-unfolded-offset.ll
machine-copyprop.mir
machine-cse-cmp.ll
machine-licm.ll
machine-outliner-calls.mir
machine-outliner-cfi-1.ll
machine-outliner-cfi-2.ll
machine-outliner-cfi-3.ll
machine-outliner-default.mir
machine-outliner-lr-regsave.mir
machine-outliner-no-lr-save.mir
machine-outliner-remove-debug-instr.mir
machine-outliner-return-1.ll
machine-outliner-return-2.ll
machine-outliner-stack-fixup-arm.mir
machine-outliner-stack-fixup-thumb.mir [ARM] Fix Machine Outliner LDRD/STRD handling in Thumb mode. 2021-06-09 15:37:21 +02:00
machine-outliner-stack-use.mir
machine-outliner-tail.ll
machine-outliner-thunk.ll
machine-outliner-unoutlinable.mir
machine-outliner-unsafe-registers.mir
machine-sink-multidef.ll
machine-sink-multidef.mir
machine-verifier.mir
macho-embedded-float.ll
macho-extern-hidden.ll
macho-frame-offset.ll
MachO-subtypes.ll
macho-trap.ll
mature-mc-support.ll
mcp-dest-regs-no-dup.mir
mem.ll
memcpy-const-vol-struct.ll
memcpy-inline.ll
memcpy-ldm-stm.ll
memcpy-no-inline.ll
memfunc.ll
memset-align.ll
memset-inline.ll
MergeConsecutiveStores.ll
metadata-default.ll
metadata-short-enums.ll
metadata-short-wchar.ll
minmax.ll
minsize-call-cse.ll
minsize-imms.ll
minsize-litpools.ll
misched-copy-arm.ll
misched-fp-basic.ll
misched-fusion-aes.ll
misched-fusion-lit.ll
misched-int-basic-thumb2.mir
misched-int-basic.mir
mls.ll
movcc-double.ll
movt-movw-global.ll
movt.ll
msr-it-block.ll
mul_const.ll
mul.ll
mulhi.ll
mult-alt-generic-arm.ll
mvn.ll
naked-no-prolog.ll
named-reg-alloc.ll
named-reg-notareg.ll
negate-i1.ll
negative-offset.ll
neon_arith1.ll
neon_cmp.ll
neon_div.ll
neon_fpconv.ll
neon_ld1.ll
neon_ld2.ll
neon_minmax.ll
neon_shift.ll
neon_spill.ll
neon_vabs.ll
neon_vshl_minint.ll
neon-dot-product.ll
neon-fma.ll
neon-spfp.ll
neon-v8.1a.ll
neon-vcadd.ll
neon-vmovn.ll
neon-vqaddsub-upgrade.ll
nest-register.ll
nnan-fsub.ll
no_redundant_trunc_for_cmp.ll
no-arm-mode.ll
no-cfi.ll
no-cmov2bfi.ll
no-fpscr-liveness.ll
no-fpu.ll
no-register-coalescing-in-returnsTwice.mir
no-tail-call.ll
nomerge.ll
none-macho-v4t.ll
none-macho.ll
nonreserved-callframe-with-basereg.mir
noopt-dmb-v7.ll
nop_concat_vectors.ll
noreturn-csr-skip.mir
noreturn.ll
null-streamer.ll
O3-pipeline.ll Remove "Rewrite Symbols" from codegen pipeline 2021-05-31 08:32:36 -07:00
opt-shuff-tstore.ll
optimize-dmbs-v7.ll
optselect-regclass.ll
out-of-registers.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
overflow-intrinsic-optimizations.ll
pack.ll
parity.ll
peephole-bitcast.ll
peephole-callee-save-regalloc.mir ARM: support mandatory tail calls for tailcc & swifttailcc 2021-05-28 11:10:51 +01:00
peephole-phi.mir
pei-swiftself.mir
phi.ll
pic.ll
pie.ll
plt-relative-reloc.ll
popcnt.ll
postrasched.ll
pow.75.ll
pow.ll
pr3502.ll
pr13249.ll
pr18364-movw.ll
pr25317.ll
pr25838.ll
pr26669.ll
pr32545.ll
pr32578.ll
pr34045-2.ll
pr34045.ll
pr35103.ll
pr36577.ll
pr39060.ll
pr39571.ll
pr42062.ll
pr42638-VMOVRRDCombine.ll
pr47454.ll
PR15053.ll
PR32721_ifcvt_triangle_unanalyzable.mir
PR35379.ll
preferred-align.ll
prefetch.ll
prera-ldst-aliasing.mir
prera-ldst-insertpt.mir
print-memb-operand.ll
print-registers.ll
private.ll
proc-resource-sched.ll
qdadd.ll
rbit.ll
readcyclecounter.ll
readonly-aliases.ll
readtp.ll
reg_sequence.ll
regcoal-invalid-subrange-update.mir
register-scavenger-exceptions.mir
regpair_hint_phys.ll
relax-per-target-feature.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
rem_crash.ll
ret0.ll
ret_arg1.ll
ret_arg2.ll
ret_arg3.ll
ret_arg4.ll
ret_arg5.ll
ret_f32_arg2.ll
ret_f32_arg5.ll
ret_f64_arg2.ll
ret_f64_arg_reg_split.ll
ret_f64_arg_split.ll
ret_f64_arg_stack.ll
ret_i64_arg2.ll
ret_i64_arg3.ll
ret_i64_arg_split.ll
ret_i128_arg2.ll
ret_sret_vector.ll
ret_void.ll
returned-ext.ll [TargetLowering] Only inspect attributes in the arguments for ArgListEntry 2021-05-18 14:30:22 -07:00
returned-trunc-tail-calls.ll
rev.ll
ror.ll
rotate.ll
sadd_sat_plus.ll
sadd_sat.ll
sat-to-bitop.ll
saxpy10-a9.ll
sbfx.ll
sdiv-pow2-arm-size.ll
sdiv-pow2-thumb-size.ll
section-name.ll
section.ll
segmented-stacks-dynamic.ll
segmented-stacks.ll
select_const.ll
select_xform.ll
select-imm.ll
select-undef.ll
select.ll
setcc-logic.ll
setcc-type-mismatch.ll
setjmp_longjmp.ll
shift_minsize.ll
shift-combine.ll
shift-i64.ll
shifter_operand.ll
shuffle.ll
signext-inreg.ll
sincos.ll
single-issue-r52.mir
sjlj-prepare-critical-edge.ll
sjljeh-swifterror.ll
sjljehprepare-lower-empty-struct.ll
smml.ll
smul.ll
SoftFloatVectorExtract.ll
softfp-constant-comparison.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
softfp-fabs-fneg.ll
space-directive.ll
special-reg-acore.ll
special-reg-mcore.ll
special-reg-v8m-base.ll
special-reg-v8m-main.ll
special-reg.ll
speculation-hardening-sls.ll [ARM][AArch64] SLSHardening: make non-comdat thunks possible 2021-05-20 17:07:05 +02:00
spill-q.ll
splitkit.ll
srem-seteq-illegal-types.ll
ssat-lower.ll
ssat-unroll-loops.ll
ssat-upper.ll
ssat-v4t.ll
ssat-with-shift.ll
ssat.ll
ssp-data-layout.ll
ssub_sat_plus.ll
ssub_sat.ll
stack_guard_remat.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
stack-alignment.ll
stack-frame.ll
stack-guard-reassign.ll
stack-protector-bmovpcb_call.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
stack-size-section.ll
stackpointer.ll
static-addr-hoisting.ll
stc2.ll
stm.ll
store_half.ll
store-postinc.ll
store-preinc.ll
store-prepostinc.mir
str_post.ll
str_pre-2.ll
str_pre.ll
str_trunc.ll
struct_byval_arm_t1_t2.ll
struct_byval.ll
struct-byval-frame-index.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
sub-cmp-peephole.ll
sub-from-const-hoisting.ll
sub-of-not.ll
sub.ll
subreg-remat.ll
subtarget-features-long-calls.ll
subtarget-no-movt.ll
swift-atomics.ll
swift-ios.ll
swift-return.ll
swift-vldm.ll
swifterror.ll
swiftself.ll
swifttailcc-call.ll ARM: support mandatory tail calls for tailcc & swifttailcc 2021-05-28 11:10:51 +01:00
swifttailcc-fastisel.ll ARM: support mandatory tail calls for tailcc & swifttailcc 2021-05-28 11:10:51 +01:00
switch-minsize.ll
sxt_rot.ll
t2-imm.ll
t2-shrink-ldrpost.ll
t2abs-killflags.ll
tail-call-builtin.ll
tail-call-float.ll
tail-call-results.ll
tail-call-scheduling.ll
tail-call-weak.ll
tail-call.ll
tail-dup-bundle.mir
tail-dup-kill-flags.ll
tail-dup.ll
tail-merge-branch-weight.ll
tail-opts.ll
tailcall-mem-intrinsics.ll
tailcc-call.ll ARM: support mandatory tail calls for tailcc & swifttailcc 2021-05-28 11:10:51 +01:00
tailcc-notail.ll SwiftTailCC: teach verifier musttail rules applicable to this CC. 2021-05-28 11:12:00 +01:00
taildup-branch-weight.ll
test-sharedidx.ll
this-return.ll [TargetLowering] Only inspect attributes in the arguments for ArgListEntry 2021-05-18 14:30:22 -07:00
thread_pointer.ll
thumb1_return_sequence.ll
thumb1-div.ll
thumb1-ldst-opt.ll
thumb1-varalloc.ll
thumb2-it-block.ll
thumb2-size-opt.ll
thumb2-size-reduction-internal-flags.ll
thumb_indirect_calls.ll
thumb-alignment.ll
thumb-big-stack.ll
thumb-litpool.ll
thumb-stub.ll
tls1.ll
tls2.ll
tls3.ll
tls-models.ll
trap-unreachable.ll
trap.ll
trunc_ldr.ll
truncstore-dag-combine.ll
tst_teq.ll
tst-peephole.mir
two-part-imm.ll
twoaddrinstr.ll
uadd_sat_plus.ll
uadd_sat.ll
uint64tof64.ll
umulo-32.ll
umulo-64-legalisation-lowering.ll
umulo-128-legalisation-lowering.ll Do not generate calls to the 128-bit function __multi3() on 32-bit ARM 2021-06-11 11:45:21 +01:00
unaligned_load_store_vector.ll
unaligned_load_store_vfp.ll
unaligned_load_store.ll
undef-sext.ll
undefined.ll
unfold-shifts.ll
unord.ll
unschedule-first-call.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
unwind-fp.ll
unwind-init.ll
urem-opt-size.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
urem-seteq-illegal-types.ll
usat-lower.ll
usat-upper.ll
usat-v4t.ll
usat-with-shift.ll
usat.ll
useaa.ll
usub_sat_plus.ll
usub_sat.ll
uxt_rot.ll
uxtb.ll
v1-constant-fold.ll
v6-jumptable-clobber.mir
v6m-smul-with-overflow.ll
v6m-umul-with-overflow.ll
v7k-abi-align.ll
v7k-libcalls.ll
v7k-sincos.ll
v8m-tail-call.ll ARM: support mandatory tail calls for tailcc & swifttailcc 2021-05-28 11:10:51 +01:00
v8m.base-jumptable_alignment.ll
va_arg.ll
vaba.ll
vabd.ll
vabs.ll
vadd.ll
vararg_no_start.ll
varargs-spill-stack-align-nacl.ll
vargs_align.ll
vargs.ll
vbits.ll
vbsl-constant.ll
vbsl.ll
vceq.ll
vcge.ll
vcgt.ll
vcnt.ll
vcombine.ll
vcvt_combine.ll
vcvt-cost.ll
vcvt-v8.ll
vcvt.ll
vdiv_combine.ll
vdup.ll
vecreduce-fadd-legalization-soft-float.ll
vecreduce-fadd-legalization-strict.ll
vecreduce-fmax-legalization-soft-float.ll
vecreduce-fmin-legalization-soft-float.ll
vecreduce-fmul-legalization-soft-float.ll
vecreduce-fmul-legalization-strict.ll
vector-DAGCombine.ll
vector-extend-narrow.ll
vector-load.ll
vector-promotion.ll
vector-spilling.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
vector-store.ll
vext.ll
vfcmp.ll
vfloatintrinsics.ll Update @llvm.powi to handle different int sizes for the exponent 2021-06-17 09:38:28 +02:00
vfp-libcalls.ll
vfp-reg-stride.ll
vfp-regs-dwarf.ll
vfp.ll
vget_lane.ll
vhadd.ll
vhsub.ll
vicmp-64.ll
vicmp.ll
virtregrewriter-subregliveness.mir
vld1.ll
vld2.ll
vld3.ll
vld4.ll
vld-vst-upgrade.ll
vlddup.ll
vldlane.ll
vldm-liveness.ll
vldm-liveness.mir
vldm-sched-a9.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
vldmia-sched.mir
vlldm-vlstm-uops.mir
vminmax.ll
vminmaxnm-safe.ll
vminmaxnm.ll
vmla.ll
vmls.ll
vmov.ll
vmul.ll
vneg.ll
vpadal.ll
vpadd.ll
vpminmax.ll
vqadd.ll
vqdmul.ll
vqshl.ll
vqshrn.ll
vqsub.ll
vrec.ll
vrev.ll
vrint.ll
vsel-fp16.ll
vsel.ll
vselect_imax.ll
vshift.ll
vshiftins.ll
vshl.ll
vshll.ll
vshrn.ll
vsra.ll
vst1.ll
vst2.ll
vst3.ll
vst4.ll
vstlane.ll
vsub.ll
vtbl.ll
vtrn.ll
vuzp.ll
vzip.ll
warn-stack.ll [IR] make -warn-frame-size into a module attr 2021-06-10 16:15:27 -07:00
weak2.ll
weak.ll
wide-compares.ll
widen-vmovs.ll
win32-ssp.ll
wrong-t2stmia-size-opt.ll
xray-armv6-attribute-instrumentation.ll
xray-armv7-attribute-instrumentation.ll
xray-tail-call-sled.ll
zero-cycle-zero.ll
zext-logic-shift-load.ll
zextload_demandedbits.ll