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GlobalISel
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[AArch64][GlobalISel] Choose CCAssignFns per-argument for tail call lowering
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2019-09-25 16:45:35 +00:00 |
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128bit_load_store.ll
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a57-csel.ll
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aarch64_f16_be.ll
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aarch64_tree_tests.ll
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aarch64_win64cc_vararg.ll
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aarch64-2014-08-11-MachineCombinerCrash.ll
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aarch64-2014-12-02-combine-soften.ll
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aarch64-a57-fp-load-balancing.ll
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aarch64-address-type-promotion-assertion.ll
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aarch64-address-type-promotion.ll
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aarch64-addv.ll
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Improve reduction intrinsics by overloading result value.
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2019-06-13 09:37:38 +00:00 |
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aarch64-be-bv.ll
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aarch64-codegen-prepare-atp.ll
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aarch64-combine-fmul-fsub.mir
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aarch64-DAGCombine-findBetterNeighborChains-crash.ll
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aarch64-dynamic-stack-layout.ll
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Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
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2019-08-16 15:42:28 +00:00 |
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aarch64-fix-cortex-a53-835769.ll
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aarch64-fold-lslfast.ll
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aarch64-gep-opt.ll
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aarch64-insert-subvector-undef.ll
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aarch64-interleaved-ld-combine.ll
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aarch64-loop-gep-opt.ll
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aarch64-minmaxv.ll
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Improve reduction intrinsics by overloading result value.
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2019-06-13 09:37:38 +00:00 |
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aarch64-mov-debug-locs.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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aarch64-named-reg-w18.ll
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aarch64-named-reg-x18.ll
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aarch64-neon-v1i1-setcc.ll
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aarch64-smax-constantfold.ll
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aarch64-smull.ll
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aarch64-stp-cluster.ll
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aarch64-sve-asm-negative.ll
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[SVE][Inline-Asm] Support for SVE asm operands
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2019-09-02 16:12:31 +00:00 |
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aarch64-sve-asm.ll
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[SVE][Inline-Asm] Add constraints for SVE predicate registers
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2019-09-16 09:45:27 +00:00 |
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aarch64-tbz.ll
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aarch64-tryBitfieldInsertOpFromOr-crash.ll
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aarch64-vcvtfp2fxs-combine.ll
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aarch64-vector-pcs.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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aarch64-vuzp.ll
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aarch64-wide-shuffle.ll
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aarch-multipart.ll
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adc.ll
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addcarry-crash.ll
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addr-of-ret-addr.ll
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addsub_ext.ll
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[AArch64][GlobalISel] Select arithmetic extended register patterns
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2019-08-29 21:53:58 +00:00 |
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addsub-constant-folding.ll
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Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
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2019-08-16 15:42:28 +00:00 |
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addsub-shifted.ll
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[AArch64][GlobalISel] Select patterns which use shifted register operands
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2019-08-20 22:18:06 +00:00 |
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addsub.ll
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alloca.ll
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Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
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2019-08-16 15:42:28 +00:00 |
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analyze-branch.ll
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analyzecmp.ll
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and-mask-removal.ll
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and-sink.ll
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andandshift.ll
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apple-latest-cpu.ll
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Rename ExpandISelPseudo->FinalizeISel, delay register reservation
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2019-06-19 00:25:39 +00:00 |
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argument-blocks.ll
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arm64_32-addrs.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64_32-atomics.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64_32-fastisel.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64_32-frame-pointers.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64_32-gep-sink.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64_32-memcpy.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64_32-neon.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64_32-null.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64_32-pointer-extend.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64_32-stack-pointers.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64_32-tls.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64_32-va.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64_32.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64-2011-03-09-CPSRSpill.ll
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arm64-2011-03-17-AsmPrinterCrash.ll
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arm64-2011-03-21-Unaligned-Frame-Index.ll
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arm64-2011-04-21-CPSRBug.ll
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arm64-2011-10-18-LdStOptBug.ll
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arm64-2012-01-11-ComparisonDAGCrash.ll
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arm64-2012-05-07-DAGCombineVectorExtract.ll
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arm64-2012-05-07-MemcpyAlignBug.ll
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arm64-2012-05-09-LOADgot-bug.ll
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arm64-2012-05-22-LdStOptBug.ll
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arm64-2012-06-06-FPToUI.ll
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arm64-2012-07-11-InstrEmitterBug.ll
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arm64-2013-01-13-ffast-fcmp.ll
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arm64-2013-01-23-frem-crash.ll
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arm64-2013-01-23-sext-crash.ll
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arm64-2013-02-12-shufv8i8.ll
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arm64-aapcs-be.ll
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arm64-aapcs.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64-abi_align.ll
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arm64-abi-varargs.ll
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arm64-abi.ll
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arm64-addp.ll
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arm64-addr-mode-folding.ll
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arm64-addr-type-promotion.ll
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arm64-addrmode.ll
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arm64-AdvSIMD-Scalar.ll
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arm64-alloc-no-stack-realign.ll
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arm64-alloca-frame-pointer-offset.ll
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Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
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2019-08-16 15:42:28 +00:00 |
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arm64-andCmpBrToTBZ.ll
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arm64-ands-bad-peephole.ll
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arm64-AnInfiniteLoopInDAGCombine.ll
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arm64-anyregcc-crash.ll
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arm64-anyregcc.ll
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arm64-arith-saturating.ll
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arm64-arith.ll
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arm64-arm64-dead-def-elimination-flag.ll
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arm64-atomic-128.ll
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arm64-atomic.ll
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arm64-basic-pic.ll
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arm64-bcc.ll
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arm64-big-endian-bitconverts.ll
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arm64-big-endian-eh.ll
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arm64-big-endian-varargs.ll
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arm64-big-endian-vector-callee.ll
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arm64-big-endian-vector-caller.ll
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arm64-big-imm-offsets.ll
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arm64-big-stack.ll
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arm64-bitfield-extract.ll
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arm64-blockaddress.ll
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arm64-build-vector.ll
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arm64-builtins-linux.ll
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arm64-call-tailcalls.ll
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[AArch64][GlobalISel] Support sibling calls with outgoing arguments
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2019-09-12 22:10:36 +00:00 |
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arm64-cast-opt.ll
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arm64-ccmp-heuristics.ll
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arm64-ccmp.ll
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arm64-clrsb.ll
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arm64-coalesce-ext.ll
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arm64-coalescing-MOVi32imm.ll
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arm64-code-model-large-abs.ll
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arm64-code-model-large-darwin.ll
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[AArch64] Don't implicitly enable global isel on Darwin if code-model==large.
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2019-09-18 19:56:55 +00:00 |
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arm64-codegen-prepare-extload.ll
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arm64-collect-loh-garbage-crash.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64-collect-loh-str.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64-collect-loh.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64-complex-copy-noneon.ll
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arm64-complex-ret.ll
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arm64-const-addr.ll
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arm64-convert-v4f64.ll
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arm64-copy-tuple.ll
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arm64-crc32.ll
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arm64-crypto.ll
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arm64-cse.ll
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arm64-csel.ll
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arm64-csldst-mmo.ll
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arm64-custom-call-saved-reg.ll
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arm64-cvt.ll
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arm64-dagcombiner-convergence.ll
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arm64-dagcombiner-dead-indexed-load.ll
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arm64-dagcombiner-load-slicing.ll
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arm64-dead-def-frame-index.ll
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arm64-dead-register-def-bug.ll
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arm64-detect-vec-redux.ll
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arm64-dup.ll
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arm64-early-ifcvt.ll
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arm64-elf-calls.ll
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arm64-elf-constpool.ll
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arm64-elf-globals.ll
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arm64-EXT-undef-mask.ll
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arm64-ext.ll
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arm64-extend-int-to-fp.ll
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arm64-extend.ll
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arm64-extern-weak.ll
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arm64-extload-knownzero.ll
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arm64-extract_subvector.ll
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arm64-extract.ll
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arm64-fast-isel-addr-offset.ll
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[GlobalISel] Import patterns containing SUBREG_TO_REG
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2019-08-28 20:12:31 +00:00 |
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arm64-fast-isel-alloca.ll
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arm64-fast-isel-br.ll
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arm64-fast-isel-call.ll
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arm64-fast-isel-conversion-fallback.ll
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arm64-fast-isel-conversion.ll
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arm64-fast-isel-fcmp.ll
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arm64-fast-isel-gv.ll
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arm64-fast-isel-icmp.ll
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arm64-fast-isel-indirectbr.ll
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[AArch64] FastISel: fix test to specify -fast-isel when -fast-isel-abort=1 is used.
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2019-06-04 23:11:42 +00:00 |
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arm64-fast-isel-intrinsic.ll
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arm64-fast-isel-materialize.ll
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arm64-fast-isel-noconvert.ll
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arm64-fast-isel-rem.ll
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Rename ExpandISelPseudo->FinalizeISel, delay register reservation
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2019-06-19 00:25:39 +00:00 |
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arm64-fast-isel-ret.ll
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arm64-fast-isel-store.ll
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arm64-fast-isel.ll
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arm64-fastcc-tailcall.ll
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arm64-fastisel-gep-promote-before-add.ll
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[AArch64][GlobalISel] Import XRO load/store patterns instead of custom selection
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2019-08-23 20:31:34 +00:00 |
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arm64-fcmp-opt.ll
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arm64-fcopysign.ll
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arm64-fixed-point-scalar-cvt-dagcombine.ll
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arm64-fma-combine-with-fpfusion.ll
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arm64-fma-combines.ll
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arm64-fmadd.ll
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arm64-fmax-safe.ll
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arm64-fmax.ll
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Revert "adding more fmf propagation for selects plus tests"
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2019-06-15 03:51:08 +00:00 |
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arm64-fminv.ll
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arm64-fml-combines.ll
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arm64-fmuladd.ll
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arm64-fold-address.ll
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arm64-fold-lsl.ll
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arm64-fp128-folding.ll
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arm64-fp128.ll
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arm64-fp-contract-zero.ll
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arm64-fp-imm-size.ll
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arm64-fp-imm.ll
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arm64-fp.ll
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arm64-fpcr.ll
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arm64-frame-index.ll
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arm64-global-address.ll
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arm64-hello.ll
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arm64-i16-subreg-extract.ll
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arm64-icmp-opt.ll
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arm64-illegal-float-ops.ll
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arm64-indexed-memory.ll
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AArch64: support arm64_32, an ILP32 slice for watchOS.
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2019-09-12 10:22:23 +00:00 |
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arm64-indexed-vector-ldst-2.ll
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arm64-indexed-vector-ldst.ll
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AArch64: avoid creating cycle in DAG for post-increment NEON ops.
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2019-08-27 10:21:11 +00:00 |
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arm64-inline-asm-error-I.ll
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Emit diagnostic if an inline asm constraint requires an immediate
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2019-08-03 05:52:47 +00:00 |
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arm64-inline-asm-error-J.ll
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Emit diagnostic if an inline asm constraint requires an immediate
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2019-08-03 05:52:47 +00:00 |
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arm64-inline-asm-error-K.ll
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Emit diagnostic if an inline asm constraint requires an immediate
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2019-08-03 05:52:47 +00:00 |
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arm64-inline-asm-error-L.ll
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Emit diagnostic if an inline asm constraint requires an immediate
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2019-08-03 05:52:47 +00:00 |
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arm64-inline-asm-error-M.ll
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Emit diagnostic if an inline asm constraint requires an immediate
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2019-08-03 05:52:47 +00:00 |
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arm64-inline-asm-error-N.ll
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Emit diagnostic if an inline asm constraint requires an immediate
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2019-08-03 05:52:47 +00:00 |
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arm64-inline-asm-zero-reg-error.ll
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arm64-inline-asm.ll
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[SVE][Inline-Asm] Support for SVE asm operands
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2019-09-02 16:12:31 +00:00 |
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arm64-join-reserved.ll
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arm64-jumptable.ll
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arm64-large-frame.ll
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arm64-ld1.ll
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arm64-ld-from-st.ll
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arm64-ldp-aa.ll
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arm64-ldp-cluster.ll
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arm64-ldp.ll
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arm64-ldst-unscaled-pre-post.mir
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arm64-ldur.ll
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arm64-ldxr-stxr.ll
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[GlobalISel][AArch64] Select llvm.aarch64.stxr* intrinsics.
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2019-08-29 16:55:55 +00:00 |
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arm64-leaf.ll
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arm64-long-shift.ll
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arm64-memcpy-inline.ll
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arm64-memset-inline.ll
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arm64-memset-to-bzero.ll
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arm64-misaligned-memcpy-inline.ll
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arm64-misched-basic-A53.ll
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arm64-misched-basic-A57.ll
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arm64-misched-forwarding-A53.ll
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arm64-misched-memdep-bug.ll
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arm64-misched-multimmo.ll
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arm64-movi.ll
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arm64-mte.ll
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arm64-mul.ll
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arm64-named-reg-alloc.ll
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arm64-named-reg-notareg.ll
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arm64-narrow-st-merge.ll
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arm64-neg.ll
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arm64-neon-2velem-high.ll
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arm64-neon-2velem.ll
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[AArch64] Regenerate 2velem tests. NFCI.
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2019-06-24 16:58:19 +00:00 |
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arm64-neon-3vdiff.ll
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arm64-neon-aba-abd.ll
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arm64-neon-across.ll
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arm64-neon-add-pairwise.ll
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arm64-neon-add-sub.ll
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arm64-neon-compare-instructions.ll
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arm64-neon-copy.ll
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arm64-neon-copyPhysReg-tuple.ll
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arm64-neon-mul-div-cte.ll
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arm64-neon-mul-div.ll
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arm64-neon-scalar-by-elem-mul.ll
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arm64-neon-select_cc.ll
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arm64-neon-simd-ldst-one.ll
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arm64-neon-simd-shift.ll
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arm64-neon-simd-vget.ll
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arm64-neon-v1i1-setcc.ll
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arm64-neon-v8.1a.ll
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|
arm64-neon-vector-list-spill.ll
|
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|
arm64-neon-vector-shuffle-extract.ll
|
[AArch64] Skip isZIPMask check for masks with an odd number of elements.
|
2019-08-05 11:12:23 +00:00 |
|
arm64-nvcast.ll
|
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arm64-opt-remarks-lazy-bfi.ll
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arm64-patchpoint-scratch-regs.ll
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arm64-patchpoint-webkit_jscc.ll
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arm64-patchpoint.ll
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|
arm64-pic-local-symbol.ll
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arm64-platform-reg.ll
|
|
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|
arm64-popcnt.ll
|
[AArch64][x86] add tests for ctpop != 1; NFC
|
2019-06-25 13:37:16 +00:00 |
|
arm64-prefetch.ll
|
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arm64-promote-const.ll
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arm64-redzone.ll
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arm64-reg-copy-noneon.ll
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arm64-register-offset-addressing.ll
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arm64-register-pairing.ll
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arm64-regress-f128csel-flags.ll
|
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arm64-regress-interphase-shift.ll
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arm64-regress-opt-cmp.mir
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arm64-reserve-call-saved-reg.ll
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arm64-reserved-arg-reg-call-error.ll
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arm64-return-vector.ll
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arm64-returnaddr.ll
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arm64-rev.ll
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arm64-rounding.ll
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arm64-scaled_iv.ll
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arm64-scvt.ll
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arm64-setcc-int-to-fp-combine.ll
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arm64-shifted-sext.ll
|
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arm64-shrink-v1i64.ll
|
|
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|
arm64-shrink-wrapping.ll
|
[SDAG] commute setcc operands to match a subtract
|
2019-07-10 23:23:54 +00:00 |
|
arm64-simd-scalar-to-vector.ll
|
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arm64-simplest-elf.ll
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arm64-sincos.ll
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arm64-sitofp-combine-chains.ll
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arm64-sli-sri-opt.ll
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arm64-smaxv.ll
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arm64-sminv.ll
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arm64-spill-lr.ll
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arm64-spill-remarks-treshold-hotness.ll
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arm64-spill-remarks.ll
|
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arm64-spill.ll
|
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arm64-sqshl-uqshl-i64Contant.ll
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arm64-st1.ll
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arm64-stack-no-frame.ll
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arm64-stackmap-nops.ll
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arm64-stackmap.ll
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arm64-stackpointer.ll
|
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|
arm64-stacksave.ll
|
AArch64: support arm64_32, an ILP32 slice for watchOS.
|
2019-09-12 10:22:23 +00:00 |
|
arm64-storebytesmerge.ll
|
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|
arm64-stp-aa.ll
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arm64-stp.ll
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arm64-strict-align.ll
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arm64-stur.ll
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arm64-subsections.ll
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arm64-subvector-extend.ll
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arm64-summary-remarks.ll
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arm64-swizzle-tbl-i16-layout.ll
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arm64-tbl.ll
|
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|
arm64-this-return.ll
|
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|
arm64-tls-darwin.ll
|
AArch64: support TLS on Darwin platforms in GlobalISel.
|
2019-08-09 09:32:38 +00:00 |
|
arm64-tls-dynamic-together.ll
|
|
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|
arm64-tls-dynamics.ll
|
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arm64-tls-execs.ll
|
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arm64-trap.ll
|
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arm64-triv-disjoint-mem-access.ll
|
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arm64-trn.ll
|
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arm64-trunc-store.ll
|
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arm64-umaxv.ll
|
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arm64-uminv.ll
|
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arm64-umov.ll
|
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arm64-unaligned_ldst.ll
|
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|
arm64-uzp.ll
|
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|
arm64-vaargs.ll
|
|
|
|
arm64-vabs.ll
|
Improve reduction intrinsics by overloading result value.
|
2019-06-13 09:37:38 +00:00 |
|
arm64-vadd.ll
|
|
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|
arm64-vaddlv.ll
|
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|
arm64-vaddv.ll
|
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arm64-variadic-aapcs.ll
|
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arm64-vbitwise.ll
|
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arm64-vclz.ll
|
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arm64-vcmp.ll
|
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|
arm64-vcnt.ll
|
|
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|
arm64-vcombine.ll
|
|
|
|
arm64-vcvt_f32_su32.ll
|
|
|
|
arm64-vcvt_f.ll
|
[AArch64] Regenerate vcvt tests. NFCI.
|
2019-06-24 17:18:20 +00:00 |
|
arm64-vcvt_n.ll
|
|
|
|
arm64-vcvt_su32_f32.ll
|
|
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|
arm64-vcvt.ll
|
|
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|
arm64-vcvtxd_f32_f64.ll
|
|
|
|
arm64-vecCmpBr.ll
|
|
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|
arm64-vecFold.ll
|
|
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|
arm64-vector-ext.ll
|
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|
arm64-vector-imm.ll
|
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|
arm64-vector-insertion.ll
|
|
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|
arm64-vector-ldst.ll
|
|
|
|
arm64-vext_reverse.ll
|
|
|
|
arm64-vext.ll
|
|
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|
arm64-vfloatintrinsics.ll
|
|
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|
arm64-vhadd.ll
|
|
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|
arm64-vhsub.ll
|
|
|
|
arm64-virtual_base.ll
|
|
|
|
arm64-vmax.ll
|
|
|
|
arm64-vminmaxnm.ll
|
|
|
|
arm64-vmovn.ll
|
|
|
|
arm64-vmul.ll
|
[AArch64] autogenerate some tests. NFC
|
2019-08-22 18:53:41 +00:00 |
|
arm64-volatile.ll
|
|
|
|
arm64-vpopcnt.ll
|
|
|
|
arm64-vqadd.ll
|
|
|
|
arm64-vqsub.ll
|
|
|
|
arm64-vselect.ll
|
|
|
|
arm64-vsetcc_fp.ll
|
|
|
|
arm64-vshift.ll
|
[AArch64] Convert neon_ushl and neon_sshl with positive constants to VSHL.
|
2019-09-25 08:22:05 +00:00 |
|
arm64-vshr.ll
|
|
|
|
arm64-vshuffle.ll
|
|
|
|
arm64-vsqrt.ll
|
|
|
|
arm64-vsra.ll
|
|
|
|
arm64-vsub.ll
|
|
|
|
arm64-weak-reference.ll
|
|
|
|
arm64-windows-calls.ll
|
|
|
|
arm64-windows-tailcall.ll
|
|
|
|
arm64-xaluo.ll
|
|
|
|
arm64-zero-cycle-regmov.ll
|
|
|
|
arm64-zero-cycle-zeroing.ll
|
|
|
|
arm64-zeroreg.ll
|
|
|
|
arm64-zext.ll
|
|
|
|
arm64-zextload-unscaled.ll
|
|
|
|
arm64-zip.ll
|
|
|
|
asm-large-immediate.ll
|
|
|
|
asm-print-comments.ll
|
|
|
|
assertion-rc-mismatch.ll
|
|
|
|
atomic-ops-lse.ll
|
|
|
|
atomic-ops-not-barriers.ll
|
|
|
|
atomic-ops.ll
|
|
|
|
autoupgrade-aarch64-neon-addp-float.ll
|
|
|
|
basic-pic.ll
|
|
|
|
bcmp-inline-small.ll
|
Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline.""
|
2019-09-10 10:39:09 +00:00 |
|
bics.ll
|
|
|
|
big-callframe.ll
|
|
|
|
bisect-post-ra-machine-sink.mir
|
|
|
|
bitcast-promote-widen.ll
|
|
|
|
bitcast-v2i8.ll
|
|
|
|
bitcast.ll
|
|
|
|
bitfield-extract.ll
|
|
|
|
bitfield-insert-0.ll
|
|
|
|
bitfield-insert.ll
|
[DAGCombiner] improve throughput of shift+logic+shift
|
2019-09-01 18:38:15 +00:00 |
|
bitfield.ll
|
|
|
|
bitreverse.ll
|
|
|
|
blockaddress.ll
|
|
|
|
bool-ext-inc.ll
|
|
|
|
bool-loads.ll
|
|
|
|
br-cond-not-merge.ll
|
|
|
|
br-to-eh-lpad.ll
|
|
|
|
br-undef-cond.ll
|
|
|
|
branch-folder-merge-mmos.ll
|
|
|
|
branch-folder-oneinst.mir
|
|
|
|
branch-relax-alignment.ll
|
|
|
|
branch-relax-asm.ll
|
|
|
|
branch-relax-bcc.ll
|
|
|
|
branch-relax-block-size.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
branch-relax-cbz.ll
|
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
|
2019-06-13 13:56:19 +00:00 |
|
branch-target-enforcement-indirect-calls.ll
|
Recommit "[AArch64][GlobalISel] Teach AArch64CallLowering to handle basic sibling calls"
|
2019-09-05 20:18:34 +00:00 |
|
branch-target-enforcment.mir
|
Describe stack-id as an enum
|
2019-06-17 09:13:29 +00:00 |
|
breg.ll
|
|
|
|
bswap-known-bits.ll
|
|
|
|
build-one-lane.ll
|
|
|
|
build-pair-isel.ll
|
|
|
|
build-vector-extract.ll
|
|
|
|
byval-type.ll
|
Reapply: IR: add optional type to 'byval' function parameters
|
2019-05-30 18:48:23 +00:00 |
|
callbr-asm-label.ll
|
[MC] Don't recreate a label if it's already used
|
2019-08-09 20:16:31 +00:00 |
|
callbr-asm-obj-file.ll
|
[Verifier] add invariant check for callbr
|
2019-09-25 22:28:27 +00:00 |
|
callee-save.ll
|
|
|
|
ccmp-successor-probs.mir
|
|
|
|
cfi_restore.mir
|
Describe stack-id as an enum
|
2019-06-17 09:13:29 +00:00 |
|
cgp-trivial-phi-node.ll
|
|
|
|
cgp-usubo.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
chkstk.ll
|
|
|
|
cluster-frame-index.mir
|
|
|
|
cmp-const-max.ll
|
|
|
|
cmp-frameindex.ll
|
|
|
|
cmp-to-cmn.ll
|
|
|
|
cmpwithshort.ll
|
|
|
|
cmpxchg-idioms.ll
|
Revert [MBP] Disable aggressive loop rotate in plain mode
|
2019-08-29 19:03:58 +00:00 |
|
cmpxchg-lse-even-regs.ll
|
|
|
|
cmpxchg-O0.ll
|
|
|
|
code-model-large-abs.ll
|
|
|
|
code-model-tiny-abs.ll
|
|
|
|
combine-and-like.ll
|
|
|
|
combine-comparisons-by-cse.ll
|
|
|
|
compare-branch.ll
|
|
|
|
compiler-ident.ll
|
|
|
|
complex-copy-noneon.ll
|
|
|
|
complex-fp-to-int.ll
|
|
|
|
complex-int-to-fp.ll
|
|
|
|
concat_vector-scalar-combine.ll
|
|
|
|
concat_vector-truncate-combine.ll
|
|
|
|
concat_vector-truncated-scalar-combine.ll
|
|
|
|
cond-br-tuning.ll
|
|
|
|
cond-sel-value-prop.ll
|
|
|
|
cond-sel.ll
|
|
|
|
const-shift-of-constmasked.ll
|
|
|
|
consthoist-gep.ll
|
|
|
|
copyprop.mir
|
|
|
|
cpus.ll
|
[ARM][AArch64] Support for Cortex-A65 & A65AE, Neoverse E1 & N1
|
2019-07-25 10:59:45 +00:00 |
|
csel-zero-float.ll
|
|
|
|
csr-split.ll
|
[NFC][Regalloc] Add testcases for D66576
|
2019-08-26 05:06:30 +00:00 |
|
cxx-tlscc.ll
|
|
|
|
dag-combine-invaraints.ll
|
|
|
|
dag-combine-mul-shl.ll
|
|
|
|
dag-combine-select.ll
|
|
|
|
dag-numsignbits.ll
|
|
|
|
dbg-declare-tag-offset.ll
|
hwasan: Add a tag_offset DWARF attribute to instrumented stack variables.
|
2019-06-17 23:39:41 +00:00 |
|
directcond.ll
|
|
|
|
div_minsize.ll
|
|
|
|
div-rem-pair-recomposition-signed.ll
|
[NFC][CodeGen][X86][AArch64] div-rem pair reconstruction tests (PR42673)
|
2019-07-25 16:39:57 +00:00 |
|
div-rem-pair-recomposition-unsigned.ll
|
[NFC][CodeGen][X86][AArch64] div-rem pair reconstruction tests (PR42673)
|
2019-07-25 16:39:57 +00:00 |
|
divrem.ll
|
|
|
|
dllexport.ll
|
|
|
|
dllimport.ll
|
[GlobalISel][AArch64] Handle tail calls with non-void return types
|
2019-09-09 17:15:56 +00:00 |
|
dont-shrink-wrap-stack-mayloadorstore.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
dont-take-over-the-world.ll
|
|
|
|
dp1.ll
|
|
|
|
dp2.ll
|
|
|
|
dp-3source.ll
|
|
|
|
dwarf-cfi.ll
|
|
|
|
eh_recoverfp.ll
|
|
|
|
eliminate-trunc.ll
|
|
|
|
emutls_generic.ll
|
|
|
|
emutls.ll
|
|
|
|
eon.ll
|
[AArch64][GlobalISel] Select patterns which use shifted register operands
|
2019-08-20 22:18:06 +00:00 |
|
expand-select.ll
|
|
|
|
ext-narrow-index.ll
|
|
|
|
extern-weak.ll
|
|
|
|
extra-callee-save.mir
|
[AArch64] Do not allocate unnecessary emergency slot.
|
2019-08-01 10:53:45 +00:00 |
|
extract-bits.ll
|
|
|
|
extract-insert.ll
|
|
|
|
extract-lowbits.ll
|
|
|
|
extract.ll
|
|
|
|
f16-convert.ll
|
|
|
|
f16-imm.ll
|
|
|
|
f16-instructions.ll
|
|
|
|
fabs.ll
|
|
|
|
fadd-combines.ll
|
[DAGCombiner] exclude x*2.0 from normal negation profitability rules
|
2019-08-09 21:37:32 +00:00 |
|
falkor-hwpf-fix.ll
|
|
|
|
falkor-hwpf-fix.mir
|
|
|
|
falkor-hwpf.ll
|
|
|
|
fast-isel-address-extends.ll
|
|
|
|
fast-isel-addressing-modes.ll
|
|
|
|
fast-isel-assume.ll
|
|
|
|
fast-isel-atomic.ll
|
|
|
|
fast-isel-branch_weights.ll
|
|
|
|
fast-isel-branch-cond-mask.ll
|
|
|
|
fast-isel-branch-cond-split.ll
|
|
|
|
fast-isel-branch-uncond-debug.ll
|
[FastISel] Fix insertion of unconditional branches during FastISel
|
2019-09-20 13:22:59 +00:00 |
|
fast-isel-call-return.ll
|
|
|
|
fast-isel-cbz.ll
|
|
|
|
fast-isel-cmp-branch.ll
|
|
|
|
fast-isel-cmp-vec.ll
|
|
|
|
fast-isel-cmpxchg.ll
|
|
|
|
fast-isel-dbg.ll
|
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
|
2019-06-19 00:25:39 +00:00 |
|
fast-isel-erase.ll
|
|
|
|
fast-isel-folded-shift.ll
|
|
|
|
fast-isel-folding.ll
|
|
|
|
fast-isel-gep.ll
|
|
|
|
fast-isel-int-ext2.ll
|
|
|
|
fast-isel-int-ext3.ll
|
|
|
|
fast-isel-int-ext4.ll
|
|
|
|
fast-isel-int-ext5.ll
|
|
|
|
fast-isel-int-ext.ll
|
|
|
|
fast-isel-intrinsic.ll
|
|
|
|
fast-isel-logic-op.ll
|
|
|
|
fast-isel-memcpy.ll
|
|
|
|
fast-isel-mul.ll
|
|
|
|
fast-isel-runtime-libcall.ll
|
|
|
|
fast-isel-sdiv.ll
|
|
|
|
fast-isel-select.ll
|
|
|
|
fast-isel-shift.ll
|
|
|
|
fast-isel-sp-adjust.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
fast-isel-sqrt.ll
|
|
|
|
fast-isel-switch-phi.ll
|
|
|
|
fast-isel-tail-call.ll
|
|
|
|
fast-isel-tbz.ll
|
|
|
|
fast-isel-trunc.ll
|
|
|
|
fast-isel-vector-arithmetic.ll
|
|
|
|
fast-isel-vret.ll
|
|
|
|
fast-regalloc-empty-bb-with-liveins.mir
|
|
|
|
fastcc-reserved.ll
|
[AArch64][GlobalISel] Support -tailcallopt
|
2019-09-17 20:24:23 +00:00 |
|
fastcc.ll
|
AArch64: support arm64_32, an ILP32 slice for watchOS.
|
2019-09-12 10:22:23 +00:00 |
|
fcmp.ll
|
|
|
|
fcopysign.ll
|
|
|
|
fcsel-zero.ll
|
|
|
|
fcvt_combine.ll
|
|
|
|
fcvt-fixed.ll
|
|
|
|
fcvt-int.ll
|
|
|
|
fdiv_combine.ll
|
|
|
|
fdiv-combine.ll
|
|
|
|
fence-singlethread.ll
|
|
|
|
fjcvtzs.ll
|
[AArch64] Implement __jcvt intrinsic from Armv8.3-A
|
2019-07-16 09:27:39 +00:00 |
|
flags-multiuse.ll
|
|
|
|
floatdp_1source.ll
|
|
|
|
floatdp_2source.ll
|
|
|
|
fold-constants.ll
|
|
|
|
fold-global-offsets.ll
|
|
|
|
fp16_intrinsic_lane.ll
|
[AArch64] Some more FP16 FMA pattern matching
|
2019-09-16 07:32:13 +00:00 |
|
fp16_intrinsic_scalar_1op.ll
|
|
|
|
fp16_intrinsic_scalar_2op.ll
|
|
|
|
fp16_intrinsic_scalar_3op.ll
|
[AArch64] Some more FP16 FMA pattern matching
|
2019-09-16 07:32:13 +00:00 |
|
fp16_intrinsic_vector_1op.ll
|
|
|
|
fp16_intrinsic_vector_2op.ll
|
|
|
|
fp16_intrinsic_vector_3op.ll
|
|
|
|
fp16-fmla.ll
|
[aarch64] Add combine patterns for fp16 fmla
|
2019-09-07 20:24:51 +00:00 |
|
fp16-v4-instructions.ll
|
|
|
|
fp16-v8-instructions.ll
|
|
|
|
fp16-v16-instructions.ll
|
|
|
|
fp16-vector-bitcast.ll
|
|
|
|
fp16-vector-load-store.ll
|
|
|
|
fp16-vector-nvcast.ll
|
|
|
|
fp16-vector-shuffle.ll
|
|
|
|
fp128-folding.ll
|
|
|
|
fp-cond-sel.ll
|
|
|
|
fp-const-fold.ll
|
|
|
|
fp-dp3.ll
|
|
|
|
fpconv-vector-op-scalarize.ll
|
|
|
|
fpimm.ll
|
|
|
|
fptouint-i8-zext.ll
|
|
|
|
frameaddr.ll
|
|
|
|
free-zext.ll
|
|
|
|
ftrunc.ll
|
|
|
|
func-argpassing.ll
|
|
|
|
func-calls.ll
|
|
|
|
funclet-local-stack-size.ll
|
|
|
|
funcptr_cast.ll
|
|
|
|
function-subtarget-features.ll
|
|
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|
funnel-shift-rot.ll
|
|
|
|
funnel-shift.ll
|
|
|
|
gep-nullptr.ll
|
|
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|
ghc-cc.ll
|
|
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|
global-alignment.ll
|
|
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|
global-merge-1.ll
|
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|
global-merge-2.ll
|
|
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|
global-merge-3.ll
|
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|
global-merge-4.ll
|
|
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|
global-merge-group-by-use.ll
|
|
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|
global-merge-ignore-single-use-minsize.ll
|
|
|
|
global-merge-ignore-single-use.ll
|
|
|
|
global-merge-minsize.ll
|
[AArch64] Merge globals when optimising for size
|
2019-06-12 08:28:35 +00:00 |
|
global-merge.ll
|
|
|
|
got-abuse.ll
|
|
|
|
half.ll
|
|
|
|
hints.ll
|
|
|
|
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
|
[Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold
|
2019-07-24 22:57:22 +00:00 |
|
hoist-and-by-const-from-shl-in-eqcmp-zero.ll
|
[Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold
|
2019-07-24 22:57:22 +00:00 |
|
hwasan-check-memaccess.ll
|
hwasan: Compatibility fixes for short granules.
|
2019-09-27 01:02:10 +00:00 |
|
hwasan-prefer-fp.ll
|
AArch64: Prefer FP-relative debug locations in HWASANified functions.
|
2019-06-22 00:06:51 +00:00 |
|
i1-contents.ll
|
|
|
|
i128-align.ll
|
|
|
|
i128-fast-isel-fallback.ll
|
|
|
|
iabs.ll
|
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|
ifcvt-select.ll
|
|
|
|
illegal-float-ops.ll
|
|
|
|
immcost.ll
|
|
|
|
implicit-sret.ll
|
|
|
|
inc-of-add.ll
|
[Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)
|
2019-07-03 09:41:35 +00:00 |
|
init-array.ll
|
|
|
|
inline-asm-blockaddress.ll
|
[TargetLowering] support BlockAddress as "i" inline asm constraint
|
2019-07-10 17:08:25 +00:00 |
|
inline-asm-clobber.ll
|
|
|
|
inline-asm-constraints-badI.ll
|
|
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|
inline-asm-constraints-badK2.ll
|
|
|
|
inline-asm-constraints-badK.ll
|
|
|
|
inline-asm-constraints-badL.ll
|
|
|
|
inline-asm-globaladdress.ll
|
|
|
|
inline-asm-i-constraint-i1.ll
|
|
|
|
inline-asm-multilevel-gep.ll
|
|
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|
inlineasm-illegal-type.ll
|
|
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|
inlineasm-ldr-pseudo.ll
|
|
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|
inlineasm-output-template.ll
|
|
|
|
inlineasm-S-constraint.ll
|
|
|
|
inlineasm-X-allocation.ll
|
|
|
|
inlineasm-X-constraint.ll
|
|
|
|
intrinsics-memory-barrier.ll
|
|
|
|
irg_sp_tagp.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
irg-nomem.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
irg.ll
|
Basic codegen for MTE stack tagging.
|
2019-07-17 19:24:02 +00:00 |
|
isinf.ll
|
|
|
|
jump-table-32.ll
|
AArch64: support arm64_32, an ILP32 slice for watchOS.
|
2019-09-12 10:22:23 +00:00 |
|
jump-table-compress.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
jump-table-exynos.ll
|
|
|
|
jump-table.ll
|
|
|
|
known-never-nan.ll
|
|
|
|
lack-of-signed-truncation-check.ll
|
|
|
|
landingpad-ifcvt.ll
|
|
|
|
large_shift.ll
|
|
|
|
large-consts.ll
|
|
|
|
ldp-stp-scaled-unscaled-pairs.ll
|
|
|
|
ldradr.ll
|
|
|
|
ldst-miflags.mir
|
|
|
|
ldst-opt-aa.mir
|
|
|
|
ldst-opt-after-block-placement.ll
|
|
|
|
ldst-opt-mte.mir
|
[MTE] Handle MTE instructions in AArch64LoadStoreOptimizer.
|
2019-09-20 17:36:27 +00:00 |
|
ldst-opt-zr-clobber.mir
|
|
|
|
ldst-opt.ll
|
|
|
|
ldst-opt.mir
|
|
|
|
ldst-paired-aliasing.ll
|
|
|
|
ldst-regoffset.ll
|
|
|
|
ldst-unscaledimm.ll
|
|
|
|
ldst-unsignedimm.ll
|
|
|
|
ldst-zero.ll
|
|
|
|
legalize-bug-bogus-cpu.ll
|
|
|
|
lit.local.cfg
|
|
|
|
literal_pools_float.ll
|
|
|
|
live-interval-analysis.mir
|
|
|
|
llrint-conv-fp16.ll
|
AArch64] Handle ISD::LRINT and ISD::LLRINT for float16
|
2019-06-06 12:38:11 +00:00 |
|
llrint-conv.ll
|
|
|
|
llround-conv-fp16.ll
|
[AArch64] Handle ISD::LROUND and ISD::LLROUND for float16
|
2019-06-06 11:53:26 +00:00 |
|
llround-conv.ll
|
|
|
|
load-combine-big-endian.ll
|
|
|
|
load-combine.ll
|
|
|
|
load-store-forwarding.ll
|
|
|
|
local_vars.ll
|
|
|
|
logical_shifted_reg.ll
|
|
|
|
logical-imm.ll
|
|
|
|
loh.mir
|
|
|
|
loop-micro-op-buffer-size-t99.ll
|
[Utils] Clean another duplicated util method.
|
2019-06-04 18:45:15 +00:00 |
|
loopvectorize_pr33804_double.ll
|
|
|
|
lower-ptrmask.ll
|
Add ptrmask intrinsic
|
2019-08-15 10:12:26 +00:00 |
|
lower-range-metadata-func-call.ll
|
|
|
|
lrint-conv-fp16-win.ll
|
AArch64] Handle ISD::LRINT and ISD::LLRINT for float16
|
2019-06-06 12:38:11 +00:00 |
|
lrint-conv-fp16.ll
|
AArch64] Handle ISD::LRINT and ISD::LLRINT for float16
|
2019-06-06 12:38:11 +00:00 |
|
lrint-conv-win.ll
|
|
|
|
lrint-conv.ll
|
|
|
|
lround-conv-fp16-win.ll
|
[AArch64] Handle ISD::LROUND and ISD::LLROUND for float16
|
2019-06-06 11:53:26 +00:00 |
|
lround-conv-fp16.ll
|
[AArch64] Handle ISD::LROUND and ISD::LLROUND for float16
|
2019-06-06 11:53:26 +00:00 |
|
lround-conv-win.ll
|
|
|
|
lround-conv.ll
|
|
|
|
machine_cse_illegal_hoist.ll
|
[MIR] Skip hoisting to basic block which may throw exception or return
|
2019-06-12 13:51:44 +00:00 |
|
machine_cse_impdef_killflags.ll
|
|
|
|
machine_cse.ll
|
|
|
|
machine-combiner-madd.ll
|
|
|
|
machine-combiner.ll
|
|
|
|
machine-combiner.mir
|
|
|
|
machine-copy-prop.ll
|
|
|
|
machine-copy-remove.ll
|
|
|
|
machine-copy-remove.mir
|
|
|
|
machine-cp-clobbers.mir
|
|
|
|
machine-dead-copy.mir
|
|
|
|
machine-outliner-all-stack.mir
|
|
|
|
machine-outliner-bad-adrp.mir
|
|
|
|
machine-outliner-bad-register.mir
|
|
|
|
machine-outliner-bti.mir
|
|
|
|
machine-outliner-calls.mir
|
|
|
|
machine-outliner-compatible-candidates.mir
|
|
|
|
machine-outliner-default.mir
|
|
|
|
machine-outliner-drop-stack.mir
|
|
|
|
machine-outliner-flags.ll
|
|
|
|
machine-outliner-inline-asm-adrp.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
machine-outliner-noredzone.ll
|
|
|
|
machine-outliner-ordering.mir
|
|
|
|
machine-outliner-outline-bti.ll
|
|
|
|
machine-outliner-regsave.mir
|
|
|
|
machine-outliner-remarks.ll
|
|
|
|
machine-outliner-size-info.mir
|
|
|
|
machine-outliner-tail.ll
|
|
|
|
machine-outliner-thunk.ll
|
|
|
|
machine-outliner-unsafe-stack-call.mir
|
|
|
|
machine-outliner.ll
|
|
|
|
machine-outliner.mir
|
|
|
|
machine-scheduler.mir
|
|
|
|
machine-sink-kill-flags.ll
|
|
|
|
machine-sink-zr.mir
|
|
|
|
machine-zero-copy-remove.mir
|
|
|
|
macho-global-symbols.ll
|
|
|
|
macho-trap.ll
|
|
|
|
macro-fusion-last.mir
|
|
|
|
madd-combiner.ll
|
|
|
|
madd-lohi.ll
|
|
|
|
mature-mc-support.ll
|
|
|
|
max-jump-table.ll
|
Revert r372893 "[CodeGen] Replace -max-jump-table-size with -max-jump-table-targets"
|
2019-09-27 09:54:26 +00:00 |
|
memcpy-f128.ll
|
|
|
|
merge-store-dependency.ll
|
|
|
|
merge-store.ll
|
[AArch64] Regenerate merge-store tests. NFCI.
|
2019-06-24 16:57:12 +00:00 |
|
mergestores_noimplicitfloat.ll
|
|
|
|
midpoint-int.ll
|
|
|
|
min-jump-table.ll
|
[CodeGen] Fix formatting and comments (NFC)
|
2019-06-20 16:34:00 +00:00 |
|
mingw-refptr.ll
|
|
|
|
minmax-of-minmax.ll
|
|
|
|
minmax.ll
|
|
|
|
misched-fusion-addr.ll
|
|
|
|
misched-fusion-aes.ll
|
|
|
|
misched-fusion-arith-logic.mir
|
|
|
|
misched-fusion-crypto-eor.mir
|
|
|
|
misched-fusion-csel.ll
|
|
|
|
misched-fusion-lit.ll
|
|
|
|
misched-fusion.ll
|
|
|
|
misched-stp.ll
|
|
|
|
mlicm-stack-write-check.mir
|
|
|
|
movimm-wzr.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
movw-consts.ll
|
|
|
|
movw-shift-encoding.ll
|
|
|
|
mul_by_elt.ll
|
|
|
|
mul_pow2.ll
|
|
|
|
mul-lohi.ll
|
|
|
|
multi-vector-store-size.ll
|
|
|
|
neg-imm.ll
|
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
|
2019-06-14 23:08:59 +00:00 |
|
neon-bitcast.ll
|
|
|
|
neon-bitwise-instructions.ll
|
|
|
|
neon-compare-instructions.ll
|
|
|
|
neon-diagnostics.ll
|
|
|
|
neon-dot-product.ll
|
[aarch64] add def-pats for dot product
|
2019-09-20 16:33:33 +00:00 |
|
neon-extract.ll
|
|
|
|
neon-fma-FMF.ll
|
|
|
|
neon-fma.ll
|
|
|
|
neon-fp16fml.ll
|
|
|
|
neon-fpround_f128.ll
|
|
|
|
neon-idiv.ll
|
|
|
|
neon-inline-asm-16-bit-fp.ll
|
|
|
|
neon-mla-mls.ll
|
|
|
|
neon-mov.ll
|
|
|
|
neon-or-combine.ll
|
|
|
|
neon-perm.ll
|
|
|
|
neon-scalar-by-elem-fma.ll
|
|
|
|
neon-scalar-copy.ll
|
|
|
|
neon-shift-left-long.ll
|
|
|
|
neon-truncStore-extLoad.ll
|
|
|
|
nest-register.ll
|
|
|
|
no-fp-asm-clobbers-crash.ll
|
|
|
|
no-quad-ldp-stp.ll
|
|
|
|
no-stack-arg-probe.ll
|
|
|
|
nonlazybind.ll
|
|
|
|
nontemporal.ll
|
|
|
|
nzcv-save.ll
|
|
|
|
O0-pipeline.ll
|
GlobalISel: Add known bits to InstructionSelector
|
2019-08-29 17:24:32 +00:00 |
|
O3-pipeline.ll
|
Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline.""
|
2019-09-10 10:39:09 +00:00 |
|
optimize-cond-branch.ll
|
|
|
|
optimize-imm.ll
|
|
|
|
or-combine.ll
|
|
|
|
overlapping-copy-bundle-cycle.mir
|
|
|
|
overlapping-copy-bundle.mir
|
|
|
|
paired-load.ll
|
|
|
|
PBQP-chain.ll
|
|
|
|
PBQP-coalesce-benefit.ll
|
|
|
|
PBQP-csr.ll
|
|
|
|
PBQP.ll
|
|
|
|
phi-dbg.ll
|
|
|
|
pic-eh-stubs.ll
|
|
|
|
pie.ll
|
|
|
|
post-ra-machine-sink.mir
|
|
|
|
postra-mi-sched.ll
|
|
|
|
pow.75.ll
|
|
|
|
pow.ll
|
|
|
|
pr27816.ll
|
|
|
|
pr33172.ll
|
|
|
|
pr40091.ll
|
|
|
|
preferred-alignment.ll
|
|
|
|
preferred-function-alignment.ll
|
[AArch64] Set pref. func. align to 8 bytes on Neoverse E1 & Cortex-A65
|
2019-08-09 11:05:15 +00:00 |
|
prefixdata.ll
|
|
|
|
preserve_mostcc.ll
|
|
|
|
print-mrs-system-register.ll
|
|
|
|
prologue-epilogue-remarks.mir
|
|
|
|
pull-binop-through-shift.ll
|
|
|
|
pull-conditional-binop-through-shift.ll
|
|
|
|
ragreedy-csr.ll
|
|
|
|
rbit.ll
|
|
|
|
read-pc.ll
|
AArch64: Add support for reading pc using llvm.read_register.
|
2019-06-22 03:03:25 +00:00 |
|
readcyclecounter.ll
|
|
|
|
recp-fastmath.ll
|
|
|
|
redundant-copy-elim-empty-mbb.ll
|
|
|
|
Redundantstore.ll
|
|
|
|
reg-scavenge-frame.mir
|
|
|
|
regcoal-physreg.mir
|
|
|
|
regress-bitcast-formals.ll
|
|
|
|
regress-f128csel-flags.ll
|
|
|
|
regress-fp128-livein.ll
|
|
|
|
regress-tail-livereg.ll
|
|
|
|
regress-tblgen-chains.ll
|
|
|
|
regress-w29-reserved-with-fp.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
reloc-specifiers.mir
|
|
|
|
rem_crash.ll
|
|
|
|
remat-float0.ll
|
|
|
|
remat.ll
|
[ARM][AArch64] Support for Cortex-A65 & A65AE, Neoverse E1 & N1
|
2019-07-25 10:59:45 +00:00 |
|
returnaddr.ll
|
|
|
|
reverse-csr-restore-seq.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
rm_redundant_cmp.ll
|
|
|
|
rotate-extract.ll
|
|
|
|
rotate.ll
|
|
|
|
round-conv.ll
|
|
|
|
sadd_sat_vec.ll
|
|
|
|
sadd_sat.ll
|
|
|
|
sat-add.ll
|
[DAG] isBitwiseNot / isConstOrConstSplat - add support for build vector undefs + truncation (PR41020)
|
2019-06-02 11:56:39 +00:00 |
|
sched-past-vector-ldst.ll
|
|
|
|
scheduledag-constreg.mir
|
|
|
|
sdag-store-merging-bug.ll
|
|
|
|
sdivpow2.ll
|
[AArch64] Add testcase for codegen for sdiv by 2.
|
2019-09-05 23:40:03 +00:00 |
|
seh_funclet_x1.ll
|
|
|
|
seh-finally.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
select_cc.ll
|
|
|
|
select_fmf.ll
|
adding more fmf propagation for selects plus updated tests
|
2019-06-15 04:53:51 +00:00 |
|
selectcc-to-shiftand.ll
|
|
|
|
selectiondag-order.ll
|
|
|
|
seqpaircopy.mir
|
|
|
|
seqpairspill.mir
|
|
|
|
setcc-takes-i32.ll
|
|
|
|
setcc-type-mismatch.ll
|
|
|
|
settag.ll
|
Basic codegen for MTE stack tagging.
|
2019-07-17 19:24:02 +00:00 |
|
shadow-call-stack.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
shift_minsize.ll
|
[SelectionDAG] Don't generate libcalls for wide shifts on Windows (PR42711)
|
2019-08-28 13:55:10 +00:00 |
|
shift-amount-mod.ll
|
[DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952)
|
2019-06-04 11:06:21 +00:00 |
|
shift-by-signext.ll
|
[DAGCombine][X86][AArch64][NFC] Add tests for shift-by-signext
|
2019-09-26 20:49:49 +00:00 |
|
shift-logic.ll
|
[DAGCombiner] improve throughput of shift+logic+shift
|
2019-09-01 18:38:15 +00:00 |
|
shift-mod.ll
|
[DAGCombiner] try to convert opposing shifts to casts
|
2019-08-02 19:33:46 +00:00 |
|
shrink-constant-multiple-users.ll
|
|
|
|
shrink-wrap.ll
|
|
|
|
shrink-wrapping-vla.ll
|
|
|
|
shuffle-mask-legal.ll
|
|
|
|
sibling-call.ll
|
AArch64: support arm64_32, an ILP32 slice for watchOS.
|
2019-09-12 10:22:23 +00:00 |
|
sign-return-address.ll
|
|
|
|
signbit-shift.ll
|
|
|
|
signed-truncation-check.ll
|
|
|
|
simple-macho.ll
|
|
|
|
sincos-expansion.ll
|
|
|
|
sincospow-vector-expansion.ll
|
|
|
|
sink-addsub-of-const.ll
|
[DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952)
|
2019-06-04 11:06:21 +00:00 |
|
sink-copy-for-shrink-wrap.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
sitofp-fixed-legal.ll
|
|
|
|
special-reg.ll
|
|
|
|
speculation-hardening-dagisel.ll
|
|
|
|
speculation-hardening-loads.ll
|
|
|
|
speculation-hardening.ll
|
[AArch64][GlobalISel] Support sibling calls with outgoing arguments
|
2019-09-12 22:10:36 +00:00 |
|
speculation-hardening.mir
|
|
|
|
spill-fold.ll
|
|
|
|
spill-fold.mir
|
|
|
|
spill-stack-realignment.mir
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
spill-undef.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
sponentry.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
sqrt-fastmath.ll
|
|
|
|
srem-seteq-optsize.ll
|
[CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)
|
2019-08-13 14:57:37 +00:00 |
|
srem-seteq-vec-nonsplat.ll
|
[CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)
|
2019-08-13 14:57:37 +00:00 |
|
srem-seteq-vec-splat.ll
|
[CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)
|
2019-08-13 14:57:37 +00:00 |
|
srem-seteq.ll
|
[CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)
|
2019-08-13 14:57:37 +00:00 |
|
ssub_sat_vec.ll
|
|
|
|
ssub_sat.ll
|
|
|
|
stack_guard_remat.ll
|
|
|
|
stack-guard-reassign.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
stack-guard-reassign.mir
|
[PEI] Don't re-allocate a pre-allocated stack protector slot
|
2019-07-17 20:46:19 +00:00 |
|
stack-guard-remat-bitcast.ll
|
|
|
|
stack-guard-vaarg.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
stack-id-pei-alloc.mir
|
Describe stack-id as an enum
|
2019-06-17 09:13:29 +00:00 |
|
stack-id-stackslot-scavenging.mir
|
Describe stack-id as an enum
|
2019-06-17 09:13:29 +00:00 |
|
stack-protector-target.ll
|
|
|
|
stack-tagging-dbg.ll
|
Basic MTE stack tagging instrumentation.
|
2019-07-17 19:24:12 +00:00 |
|
stack-tagging-initializer-merge.ll
|
MemTag: stack initializer merging.
|
2019-08-19 20:47:09 +00:00 |
|
stack-tagging-unchecked-ld-st.ll
|
MemTag: unchecked load/store optimization.
|
2019-08-30 17:23:02 +00:00 |
|
stack-tagging.ll
|
Basic MTE stack tagging instrumentation.
|
2019-07-17 19:24:12 +00:00 |
|
stackguard-internal.ll
|
|
|
|
stackmap-frame-setup.ll
|
|
|
|
stackmap-liveness.ll
|
|
|
|
stgp.ll
|
[MTE] Handle MTE instructions in AArch64LoadStoreOptimizer.
|
2019-09-20 17:36:27 +00:00 |
|
store_merge_pair_offset.ll
|
|
|
|
strqro.ll
|
|
|
|
strqu.ll
|
|
|
|
sub1.ll
|
|
|
|
sub-of-not.ll
|
[Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)
|
2019-07-03 09:41:35 +00:00 |
|
subs-to-sub-opt.ll
|
|
|
|
sve-calling-convention.ll
|
[AArch64] Implement initial SVE calling convention support
|
2019-08-05 13:44:10 +00:00 |
|
sve-intrinsics-int-arith.ll
|
[AArch64][SVE] Implement abs and neg intrinsics
|
2019-09-09 11:21:14 +00:00 |
|
swap-compare-operands.ll
|
|
|
|
swift-error.ll
|
|
|
|
swift-return.ll
|
AArch64: support arm64_32, an ILP32 slice for watchOS.
|
2019-09-12 10:22:23 +00:00 |
|
swiftcc.ll
|
AArch64: support arm64_32, an ILP32 slice for watchOS.
|
2019-09-12 10:22:23 +00:00 |
|
swifterror.ll
|
AArch64: support arm64_32, an ILP32 slice for watchOS.
|
2019-09-12 10:22:23 +00:00 |
|
swiftself-scavenger.ll
|
|
|
|
swiftself.ll
|
AArch64: support arm64_32, an ILP32 slice for watchOS.
|
2019-09-12 10:22:23 +00:00 |
|
switch-unreachable-default.ll
|
|
|
|
tagged-globals.ll
|
AArch64: Add a tagged-globals backend feature.
|
2019-07-31 20:14:19 +00:00 |
|
tagp.ll
|
Basic codegen for MTE stack tagging.
|
2019-07-17 19:24:02 +00:00 |
|
tail-call-unused-zext.ll
|
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
|
2019-06-19 00:25:39 +00:00 |
|
tail-call.ll
|
[AArch64][GlobalISel] Support -tailcallopt
|
2019-09-17 20:24:23 +00:00 |
|
tailcall_misched_graph.ll
|
[AArch64][GlobalISel] Support sibling calls with outgoing arguments
|
2019-09-12 22:10:36 +00:00 |
|
tailcall-ccmismatch.ll
|
[AArch64][GlobalISel] Support sibling calls with mismatched calling conventions
|
2019-09-10 23:25:12 +00:00 |
|
tailcall-explicit-sret.ll
|
|
|
|
tailcall-fastisel.ll
|
|
|
|
tailcall-implicit-sret.ll
|
|
|
|
tailcall-mem-intrinsics.ll
|
[AArch64][GlobalISel] Tail call memory intrinsics
|
2019-09-13 20:25:58 +00:00 |
|
tailcall-string-rvo.ll
|
[AArch64][GlobalISel] Support sibling calls with outgoing arguments
|
2019-09-12 22:10:36 +00:00 |
|
taildup-cfi.ll
|
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
|
2019-06-13 13:56:19 +00:00 |
|
taildup-inst-dup-loc.mir
|
[TailDuplicator] Fix copy instruction emitting into the wrong block.
|
2019-07-02 06:04:46 +00:00 |
|
tailmerging_in_mbp.ll
|
XFAIL a codegen test AArch64/tailmerging_in_mbp.ll
|
2019-09-27 17:41:17 +00:00 |
|
tbi.ll
|
|
|
|
tbz-tbnz.ll
|
|
|
|
tiny_model.ll
|
|
|
|
tiny_supported.ll
|
|
|
|
tme.ll
|
[AArch64] Add support for Transactional Memory Extension (TME)
|
2019-07-31 12:52:17 +00:00 |
|
trunc-v1i64.ll
|
|
|
|
tst-br.ll
|
|
|
|
uadd_sat_vec.ll
|
|
|
|
uadd_sat.ll
|
|
|
|
uaddo.ll
|
|
|
|
umulo-128-legalisation-lowering.ll
|
AArch64: support arm64_32, an ILP32 slice for watchOS.
|
2019-09-12 10:22:23 +00:00 |
|
unfold-masked-merge-scalar-constmask-innerouter.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
unfold-masked-merge-scalar-constmask-interleavedbits.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
unfold-masked-merge-scalar-constmask-lowhigh.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
unfold-masked-merge-scalar-variablemask.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
unfold-masked-merge-vector-variablemask-const.ll
|
|
|
|
unfold-masked-merge-vector-variablemask.ll
|
|
|
|
unreachable-emergency-spill-slot.mir
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
urem-seteq-optsize.ll
|
[NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors
|
2019-07-30 08:00:49 +00:00 |
|
urem-seteq-vec-nonsplat.ll
|
[NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors
|
2019-07-30 08:00:49 +00:00 |
|
urem-seteq-vec-splat.ll
|
[NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors
|
2019-07-30 08:00:49 +00:00 |
|
urem-seteq.ll
|
[NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors
|
2019-07-30 08:00:49 +00:00 |
|
usub_sat_vec.ll
|
|
|
|
usub_sat.ll
|
|
|
|
v3f-to-int.ll
|
[AArch64] Check for simple type in FPToUInt
|
2019-06-03 08:49:17 +00:00 |
|
vararg-tallcall.ll
|
[AArch64][GlobalISel] Support lowering musttail calls
|
2019-09-18 22:42:25 +00:00 |
|
vcvt-oversize.ll
|
|
|
|
vec_cttz.ll
|
|
|
|
vec_uaddo.ll
|
|
|
|
vec_umulo.ll
|
|
|
|
vec-libcalls.ll
|
|
|
|
vecreduce-add-legalization.ll
|
Improve reduction intrinsics by overloading result value.
|
2019-06-13 09:37:38 +00:00 |
|
vecreduce-and-legalization.ll
|
Revert r368276 "[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT"
|
2019-08-13 09:33:25 +00:00 |
|
vecreduce-bool.ll
|
Improve reduction intrinsics by overloading result value.
|
2019-06-13 09:37:38 +00:00 |
|
vecreduce-fadd-legalization.ll
|
Change semantics of fadd/fmul vector reductions.
|
2019-06-11 08:22:10 +00:00 |
|
vecreduce-fadd.ll
|
Change semantics of fadd/fmul vector reductions.
|
2019-06-11 08:22:10 +00:00 |
|
vecreduce-fmax-legalization.ll
|
Improve reduction intrinsics by overloading result value.
|
2019-06-13 09:37:38 +00:00 |
|
vecreduce-propagate-sd-flags.ll
|
Improve reduction intrinsics by overloading result value.
|
2019-06-13 09:37:38 +00:00 |
|
vecreduce-umax-legalization.ll
|
Improve reduction intrinsics by overloading result value.
|
2019-06-13 09:37:38 +00:00 |
|
vector_merge_dep_check.ll
|
|
|
|
vector_splat-const-shift-of-constmasked.ll
|
|
|
|
vector-fcopysign.ll
|
|
|
|
win64_vararg.ll
|
AArch64: support arm64_32, an ILP32 slice for watchOS.
|
2019-09-12 10:22:23 +00:00 |
|
win64-jumptable.ll
|
Re-commit r357452 (take 3): "SimplifyCFG SinkCommonCodeFromPredecessors: Also sink function calls without used results (PR41259)"
|
2019-06-17 07:47:28 +00:00 |
|
win64-nocfi.ll
|
|
|
|
win_cst_pool.ll
|
|
|
|
win-alloca-no-stack-probe.ll
|
|
|
|
win-alloca.ll
|
|
|
|
win-tls.ll
|
|
|
|
windows-SEH-support.ll
|
|
|
|
windows-trap1.ll
|
[COFF, ARM64] Fix encoding of debugtrap for Windows
|
2019-06-21 23:38:05 +00:00 |
|
windows-trap.ll
|
|
|
|
wineh1.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh2.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh3.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh4.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh5.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh6.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh7.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh8.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh_shrinkwrap.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh-frame0.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh-frame1.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh-frame2.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh-frame3.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh-frame4.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh-frame5.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh-frame6.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh-frame7.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh-frame8.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
wineh-mingw.ll
|
|
|
|
wineh-try-catch-cbz.ll
|
|
|
|
wineh-try-catch-nobase.ll
|
|
|
|
wineh-try-catch-realign.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
wineh-try-catch-vla.ll
|
|
|
|
wineh-try-catch.ll
|
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
|
2019-08-16 15:42:28 +00:00 |
|
wrong_debug_loc_after_regalloc.ll
|
[DebugInfo] Incorrect debug info record generated for loop counter.
|
2019-06-06 21:19:39 +00:00 |
|
xbfiz.ll
|
|
|
|
xor.ll
|
[DAGCombine][X86][AArch64][AMDGPU] (x - y) + -1 -> add (xor y, -1), x fold. Try 3
|
2019-05-30 20:37:29 +00:00 |
|
xray-attribute-instrumentation.ll
|
|
|
|
xray-tail-call-sled.ll
|
|
|
|
zero-reg.ll
|
|
|
|
zext-logic-shift-load.ll
|
|
|
