Nekotekina
ba1ec1d5d6
SPU analyser: remove use_ra from HBR
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Since this is a hint instruction, we don't really use reg value here.
2019-05-04 18:33:58 +03:00
Nekotekina
45ce8db6cb
SPU Analyser: fix reg origin regression
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Propagate phi instead of claiming new values
2019-05-04 18:29:47 +03:00
Nekotekina
4bd022f778
SPU analyser: minor logic fix and cleanup
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Don't fill any chunk info for now (design mistake).
2019-05-03 14:18:22 +03:00
Nekotekina
6c34d7104e
SPU analyser: fix excessive workload list size
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Typo grade; regression
2019-05-02 23:29:02 +03:00
Nekotekina
54dc617f39
SPU analyser: internal spu_itype optimization
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Use only 1 byte for instruction type.
Flags are transformed into range comparisons.
2019-05-02 19:32:09 +03:00
Nekotekina
15bd3b8724
SPU: fix minor UB in STQD/LQD instructions
2019-05-02 18:00:49 +03:00
Nekotekina
2b4da18709
SPU LLVM: fix xfloat regression
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It was an old bug with possible hidden use of deleted instructions.
2019-05-02 13:39:43 +03:00
Nekotekina
d48dc29e55
SPU LLVM: fix perf regression
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Bug in the analyser was created recently in #5882 .
2019-05-02 13:39:43 +03:00
Nekotekina
69d2ea35b9
SPU: minor analyser cleanup
2019-05-02 13:39:43 +03:00
Nekotekina
a4c4ee9cb2
SPU: fix excessive cache size regression
2019-05-02 13:39:43 +03:00
msuih
bc42719c48
Put DS3/DS4 instructions to Wiki instead
2019-05-02 13:39:16 +03:00
kd-11
6b7cd458e3
rsx: Silence some diagnostics unless compiled with debugging options
2019-05-01 15:36:21 +03:00
kd-11
1d5c52f476
rsx: Ignore stencil clear flag if the stencil write mask is disabled
2019-05-01 15:36:21 +03:00
kd-11
48cb265c2c
rsx: Bounds check on local resource for atlas merge.
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- Local resources can also have padded pitch dimensions and false-positives on range overlap tests
2019-05-01 15:36:21 +03:00
kd-11
63f9b8e0c6
gl/vk: Minor cleanup
2019-05-01 15:36:21 +03:00
kd-11
ec9aa74008
rsx: Fix section base offset calculation for blit_dst targets which affects confirmed memory range
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- Fixes flushes only writing partially to target memory
2019-05-01 15:36:21 +03:00
kd-11
4e3ec162e2
rsx: Fix broken texture cache search when flipping
2019-05-01 15:36:21 +03:00
kd-11
6feffe6ff6
rsx: Ignore transfer offsets when wrapping behaviour is expected
2019-05-01 15:36:21 +03:00
kd-11
f56a6548b0
gl: Remove workaround for AMD driver bug fixed in driver 19.4.3
2019-05-01 15:36:21 +03:00
Nekotekina
1bc5e27507
SPU LLVM: move reg origin search to analyser
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Refactor SPU analyser (block_info struct).
Fill register use info (currently unused).
2019-05-01 00:37:15 +03:00
Nekotekina
1294e0d189
SPU LLVM: improve codegen in loops
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Use a trick in check_state to improve LICM pass.
2019-05-01 00:37:15 +03:00
Nekotekina
e09c6ea4b4
SPU analyser: add spu_iflag
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Register information about register accesses.
2019-04-30 14:33:27 +03:00
Nekotekina
716737ecf2
LLVM DSL: expression matching (alpha)
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Implement remaining instructions.
Implement match_expr method.
Implement helper methods.
2019-04-30 14:33:27 +03:00
Deep Sleep
c24b74398f
Update to README.md due to dependency
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Add qtbase5-private-dev for Debian as dependency to the README.md since it is needed, probably due to qt5.11.3+.
2019-04-30 14:33:01 +03:00
RipleyTom
301dd82819
DS3 Linux fix
2019-04-30 00:31:34 +03:00
eladash
3bd29b8bac
Fix Unregistered HLE function access
2019-04-29 23:04:16 +03:00
eladash
ea1c9a2e17
Fix PPU Breakpoints and ppu_check_toc
2019-04-29 23:04:16 +03:00
drysalter
468e1e90c8
Touch-ups to Skyline and Envy ( #5884 )
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* Touch-ups to Skyline and Envy
* Match disabled colors on sliders, checkboxes and comboboxes
* Align header titles with section contents
* Make slider grooves clickable, add opacity to tooltips
* Adjust opacity, clean some code
* Correct slider margins, add hover effect to game table on Nightfall
2019-04-29 20:02:50 +01:00
msuih
be6d9af1ab
Print OS info to log
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Credit to @maximilian578 for help
2019-04-25 20:20:37 +03:00
kd-11
243df38360
rsx: Fix VP writes to CC with a MOV instruction
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- When moving to CC, the operation has VEC flag disabled and also temp
regs disabled. Looks to be the catch-all ELSE in the selection logic.
2019-04-25 16:23:05 +03:00
kd-11
3cbccdd760
rsx: Fragment shader decompiler cleanup
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TODO: Investigate the _s input modifier behaviour further, in case it can avoid generating zeroes from a MAD instruction.
x = MAD(+ve, -ve, -ve) with _s input modifier in BFBC expects result to be Non-zero
2019-04-25 16:23:05 +03:00
kd-11
4cd1c25729
"rsx: Ignore argument sign for SQRT operations"
2019-04-25 16:23:05 +03:00
kd-11
32396ba366
rsx: Simplify use of some mixed input functions using OPFLAGS to avoid implicit conversions
2019-04-25 16:23:05 +03:00
kd-11
f12bd8068c
rsx: Fragment decompiler fixups
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- Properly test for NaN and Inf when clamping down to fp16
- Optimize divsq a bit; mix(vec, vec, bvec) emits OpSelect which is what
we want here, instead of component-wise selection which is much slower.
2019-04-25 16:23:05 +03:00
kd-11
abe7188acf
rsx: Proper workaround for broken DIVSQ instruction on realhw
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- While mul(0, nan) = nan and 0 / 0 = nan, 0 / sqrt(0) = 0 because of hw
gremlins. normalize(0) is also nan so this behaviour does not work
around that particular case either which makes it even more baffling.
2019-04-25 16:23:05 +03:00
kd-11
60f3059d22
rsx: Compensate for nvidia's low precision attribute interpolation
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- The hw generates inaccurate values when doing perspective-correct
interpolation of vertex output attributes and makes the comparison (a ==
b) fail even when they are a fixed constant value.
- Increase equality tolerance when doing comparisons in fragment
shaders for NV cards only to work around this issue.
- Teepo fix
2019-04-25 16:23:05 +03:00
kd-11
463b1b220d
rsx: Improve accuracy of shadow compare Ops when non-integer depth formats are used
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- The fixed-point D24S8 format does special Z clamping during compare which matches PS3 behaviour
- D32S8 is a floating point format and comparison with Dref > 1 always fails causing black edges/borders
2019-04-25 16:23:05 +03:00
kd-11
7ad1646c2c
vk: Skip feature check if extension is not supported
2019-04-25 16:23:05 +03:00
kd-11
06a85f00d1
rsx: Shader decompiler cleanup and improvements
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- Improve support for float16_t by minimizing mixed inputs to functions
(ambiguous overloads)
- Minimize amount of downcasts in code by using opcode flags
- Re-enable float16_t support for vulkan
2019-04-25 16:23:05 +03:00
kd-11
a668560c68
rsx: Use native half float types if available
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- Emulating f16 with f32 is not ideal and requires a lot of value clamping
- Using native data type can significantly improve performance and accuracy
- With openGL, check for the compatible extensions NV_gpu_shader5 and
AMD_gpu_shader_half_float
- With Vulkan, enable this functionality in the deviceFeatures if
applicable. (VK_KHR_shader_float16_int8 extension)
- Temporarily disable hw fp16 for vulkan
2019-04-25 16:23:05 +03:00
kd-11
ee319f7c13
rsx: Implement strict clamp16 operation needed for NVIDIA cards
2019-04-25 16:23:05 +03:00
Nekotekina
2ade3c594c
LLVM DSL: expression matching (preview 2)
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Implement more instructions.
2019-04-25 03:33:18 +03:00
Nekotekina
aca61fdcf9
LLVM DSL: implement expression matching (preview)
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Only literal match for binary ops implemented.
2019-04-24 23:55:41 +03:00
Nekotekina
8754bbd444
SPU LLVM: add match_vr<> template
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Returns reg value only if type is compatible, avoiding bitcast.
2019-04-24 23:55:41 +03:00
Nekotekina
dd9bd1338b
SPU LLVM: add get_vrs<> template
2019-04-24 23:55:41 +03:00
Nekotekina
3e0b45719d
LLVM DSL: rewrite zshuffle, shuffle2, build
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Add llvm_const_vector template.
2019-04-24 23:55:41 +03:00
Nekotekina
b02503963e
LLVM DSL: rewrite splat, fsplat, vsplat
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Add llvm_const_float and llvm_splat templates.
2019-04-24 23:55:41 +03:00
Nekotekina
c83e65f29e
LLVM DSL: rewrite extract and insert
2019-04-24 23:55:41 +03:00
Nekotekina
b7b93eae13
SPU LLVM: minor bitcast cleanup
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Remove redundant explicit constand propagation in some instructions.
2019-04-24 23:55:41 +03:00
Nekotekina
2eac59f59a
LLVM DSL: rewrite add_sat and sub_sat
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Simplify constant folding logic
2019-04-24 23:55:41 +03:00