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Author SHA1 Message Date
Gabor Greif
5ec5f19852 remove tabs, fix > 80 cols 
llvm-svn: 55511
 2008-08-28 23:19:51 +00:00
Gabor Greif
86c795a8ca erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics 
llvm-svn: 55504
 2008-08-28 21:40:38 +00:00
Rafael Espindola
1cd4fc3111 Use resize instead of reserve. Reserve doesn't change size(). 
llvm-svn: 55486
 2008-08-28 18:32:53 +00:00
Evan Cheng
419506a149 FsFLD0S{S|D} and V_SETALLONES are as cheap as moves. 
llvm-svn: 55466
 2008-08-28 07:52:25 +00:00
Dale Johannesen
490c016734 Split the ATOMIC NodeType's to include the size, e.g. 
ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.

This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad.  This is the alternative.

llvm-svn: 55457
 2008-08-28 02:44:49 +00:00
Bill Wendling
0b5b31a0be Make "movdq2q" and "movq2dq" dependent upon having SSE2 because they use the 
SSE2 registers as well as the MMX registers.

llvm-svn: 55436
 2008-08-27 21:32:04 +00:00
Dan Gohman
3976cccecd Reinstate the x86-64 portion of r55190. When doing extloads into 
64-bit registers from 16-bit and smaller memory locations, prefer
instructions that define the entire 64-bit register, to avoid
partial-register updates.

llvm-svn: 55422
 2008-08-27 17:33:15 +00:00
Gabor Greif
4b86114f92 disallow direct access to SDValue::ResNo, provide a getter instead 
llvm-svn: 55394
 2008-08-26 22:36:50 +00:00
Owen Anderson
fc7b8f3073 These assertions should be return false's instead, allowing the client to detect the failure. 
llvm-svn: 55377
 2008-08-26 18:50:40 +00:00
Owen Anderson
5fef19facf Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested 
was inserted or not.  This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.

llvm-svn: 55375
 2008-08-26 18:03:31 +00:00
Chris Lattner
c5c00890e5 If an xmm register is referenced explicitly in an inline asm, make sure to 
assign it to a version of the xmm register with the regclass that matches its
type.  This fixes PR2715, a bug handling some crazy xpcom case in mozilla.

llvm-svn: 55358
 2008-08-26 06:19:02 +00:00
Evan Cheng
65d29b2553 This is done. 
llvm-svn: 55348
 2008-08-26 01:13:44 +00:00
Evan Cheng
19738e3956 80 col. violations. 
llvm-svn: 55341
 2008-08-25 21:58:43 +00:00
Evan Cheng
569b489cf5 Try approach to moving call address load inside of callseq_start. Now it's done during the preprocess of x86 isel. callseq_start's chain is changed to load's chain node; while load's chain is the last of callseq_start or the loads or copytoreg nodes inserted to move arguments to the right spot. 
llvm-svn: 55338
 2008-08-25 21:27:18 +00:00
Bill Wendling
7f52506926 Nevermind. This broke the bootstrap (?!). 
llvm-svn: 55318
 2008-08-25 18:32:39 +00:00
Bill Wendling
f86b246fdb MOVQ2DQ and MOVQ2DQ use SSE2. We should conditionalize the use of these 
instructions on having SSE2.

llvm-svn: 55317
 2008-08-25 18:20:52 +00:00
Evan Cheng
2b9f879a99 Fix asm printing of MOVSDto64mr and MOV64toSDrm. 
llvm-svn: 55300
 2008-08-25 04:11:42 +00:00
Bill Wendling
5728cf59fd Temporarily reverting r55292. It's causing a bootstraping failure: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc ... src/libiberty/make-temp-file.c -o make-temp-file.o
Assertion failed: (Node2Index[SU->NodeNum] > Node2Index[I->Dep->NodeNum] && "Wrong topological sorting"), function InitDAGTopologicalSorting, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 508.
../../../../llvm-gcc.src/libiberty/hashtab.c:955: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
make[4]: *** [hashtab.o] Error 1
make[4]: *** Waiting for unfinished jobs....
make[3]: *** [multi-do] Error 1
make[2]: *** [all] Error 2
make[1]: *** [all-target-libiberty] Error 2
make: *** [all] Error 2

llvm-svn: 55295
 2008-08-24 21:45:30 +00:00
Evan Cheng
a600778748 Move callseq_start above the call address load to allow load to be folded into the call node. 
llvm-svn: 55292
 2008-08-24 19:19:55 +00:00
Cedric Venet
6c99b53fda Use additionnal include directory instead of ../ in #include. 
Suggested by aKor.

llvm-svn: 55282
 2008-08-24 12:30:46 +00:00
Anton Korobeynikov
be3a5a5ce9 Provide a 64 bit variant of mmx.maskmovq intrinsic lowering. 
Is there way to avoid explicit target check?

llvm-svn: 55238
 2008-08-23 15:53:19 +00:00
Dan Gohman
a9d5f9b006 Move the point at which FastISel taps into the SelectionDAGISel 
process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.

Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.

To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.

llvm-svn: 55219
 2008-08-23 02:25:05 +00:00
Bill Wendling
60e176391d Reverting r55190, r55191, and r55192. They broke the build with this error message: 
{standard input}:17:bad register name `%sil'
make[4]: *** [libgcc/./_addvsi3.o] Error 1
make[4]: *** Waiting for unfinished jobs....
{standard input}:23:bad register name `%dil'
{standard input}:28:bad register name `%dil'
make[4]: *** [libgcc/./_addvdi3.o] Error 1
{standard input}:18:bad register name `%sil'
make[4]: *** [libgcc/./_subvsi3.o] Error 1

llvm-svn: 55200
 2008-08-22 20:51:05 +00:00
Dan Gohman
897aa30d7c Anyext tweaks for x86. When extloading a value to i32 or i64, choose 
instructions that define the full 32 or 64-bit value. When anyexting
from i8 to i16 or i32, it's not necessary to zero out the high
portion of the register.

llvm-svn: 55190
 2008-08-22 19:19:31 +00:00
Dan Gohman
a398d11527 Factor out the predicate check code from DAGISelEmitter.cpp 
and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.

llvm-svn: 55156
 2008-08-22 00:20:26 +00:00
Bill Wendling
f105f92904 If part of the mask is "undef", then ignore it as we don't care what goes into it. 
llvm-svn: 55147
 2008-08-21 22:36:36 +00:00
Bill Wendling
170bd0a562 Fix whitespace. No functionality change. 
llvm-svn: 55146
 2008-08-21 22:35:37 +00:00
Evan Cheng
ef2509b3ba Fix a number of byval / memcpy / memset related codegen issues. 
1. x86-64 byval alignment should be max of 8 and alignment of type. Previously the code was not doing what the commit message was saying.
2. Do not use byte repeat move and store operations. These are slow.

llvm-svn: 55139
 2008-08-21 21:00:15 +00:00
Mon P Wang
bf7b94fd29 Treat floating point ST1 the same as ST0 when lowering for a call result 
llvm-svn: 55135
 2008-08-21 19:54:16 +00:00
Anton Korobeynikov
5bbfc7e05f Allow inline asm nodes with empty bodies inside JIT. 
This unbreaks explicit reg vars inside JIT, which are
implemented in such hacky way :)

llvm-svn: 55128
 2008-08-21 17:33:01 +00:00
Dan Gohman
4b801d38a1 Simplify SelectRoot's interface, and factor out some common code 
from all targets.

llvm-svn: 55124
 2008-08-21 16:36:34 +00:00
Bill Wendling
2ba1a2b516 Clean up whitespace. 
llvm-svn: 55117
 2008-08-21 08:38:54 +00:00
Owen Anderson
2c1d54952b Use raw_ostream throughout the AsmPrinter. 
llvm-svn: 55092
 2008-08-21 00:14:44 +00:00
Dan Gohman
411cc551cb Move the handling of ANY_EXTEND, SIGN_EXTEND_INREG, and TRUNCATE 
out of X86ISelDAGToDAG.cpp C++ code and into tablegen code.
Among other things, using tablegen for these things makes them
friendlier to FastISel.

Tablegen can handle the case of i8 subregs on x86-32, but currently
the C++ code for that case uses MVT::Flag in a tricky way, and it
happens to schedule better in some cases. So for now, leave the
C++ code in place to handle the i8 case on x86-32.

llvm-svn: 55078
 2008-08-20 21:27:32 +00:00
Dan Gohman
ddebe95287 Simplify FastISel's constructor argument list, make the FastISel 
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.

llvm-svn: 55076
 2008-08-20 21:05:57 +00:00
Dan Gohman
ebba07cccf Tablegen generated code already tests the opcode value, so it's not 
necessary to use dyn_cast in these predicates.

llvm-svn: 55055
 2008-08-20 15:24:22 +00:00
Dan Gohman
e409b06d46 Fix comment spacing. 
llvm-svn: 55047
 2008-08-20 13:46:21 +00:00
Dale Johannesen
69c9d47dce Add remaining 64-bit atomic patterns for x86-64. 
llvm-svn: 55029
 2008-08-20 00:48:50 +00:00
Bill Wendling
ab390189dc Revert r55018 and apply the correct "fix" for the 64-bit sub_and_fetch atomic. 
Just expand it like the other X-bit sub_and_fetches.

llvm-svn: 55023
 2008-08-20 00:28:16 +00:00
Bill Wendling
ab7c8c091e Add support for the __sync_sub_and_fetch atomics and friends for X86. The code 
was already present, but not hooked up to anything.

llvm-svn: 55018
 2008-08-19 23:09:18 +00:00
Dan Gohman
b1ba73eeed Instantiate FastISel for X86. 
llvm-svn: 55011
 2008-08-19 21:45:35 +00:00
Dan Gohman
36e732b8fc The X86 target will soon have an implementation of createFastISel. 
llvm-svn: 55010
 2008-08-19 21:32:53 +00:00
Dale Johannesen
15b76de064 Add support for 8 and 16 bit forms of __sync 
builtins on X86.

Change "lock" instructions to be on a separate line.
This is needed to work around a bug in the Darwin
assembler.

llvm-svn: 54999
 2008-08-19 18:47:28 +00:00
Chris Lattner
61e771be29 add a note 
llvm-svn: 54964
 2008-08-19 00:41:02 +00:00
Chris Lattner
843bb4018c remove empty file 
llvm-svn: 54950
 2008-08-18 21:27:19 +00:00
Evan Cheng
6534c78383 Fix a (u)comiss intrinsic lowering bug. It was using anyext which can return junk in higher bits. Patch by Nate Begeman. 
llvm-svn: 54903
 2008-08-17 19:22:34 +00:00
Cedric Venet
e1e9213f95 Make it compile on VC2005: 
- update VC projects.
- Add an overload to llvm::Stream for <<, since std::hex and std::dec have type std::ios_base& (*)(std::ios_base&) in VC++. (templating the function don't work, due to ambiguities)
- add ../ on several include in X86/AsmPrinter/

llvm-svn: 54898
 2008-08-17 18:24:26 +00:00
Anton Korobeynikov
c2606f65c7 Move X86 assembler printers into separate directory. This allows JIT-only users not to link it in (use 'x86codegen' llvm-config arg for this) 
llvm-svn: 54886
 2008-08-17 13:53:59 +00:00
Anton Korobeynikov
d475141eea Use correct name for TLS address resolution routine on x86-64 
llvm-svn: 54845
 2008-08-16 12:58:29 +00:00
Anton Korobeynikov
767865a3d1 Reduce heap trashing due to std::string construction / concatenation via caching of section flags string representations 
llvm-svn: 54842
 2008-08-16 12:57:07 +00:00
Dan Gohman
1a413c0387 Build the X86GenFastISel.inc file. 
llvm-svn: 54806
 2008-08-14 23:18:11 +00:00
Dan Gohman
7534da85c9 Also avoid pinsrw and pinsrb with a variable insertelement index. 
llvm-svn: 54803
 2008-08-14 22:53:18 +00:00
Owen Anderson
600a8ca0d5 Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API. 
llvm-svn: 54802
 2008-08-14 22:49:33 +00:00
Dan Gohman
c530d2983d Don't try to use the insertps instruction for vector 
element inserts with non-constant indices. This fixes
CodeGen/X86/vector-variable-idx.ll on machines that
have SSE4.1.

llvm-svn: 54801
 2008-08-14 22:43:26 +00:00
Owen Anderson
af9e467544 Remove more uses of std::set. 
llvm-svn: 54787
 2008-08-14 21:01:00 +00:00
Dan Gohman
502d2aebff Oops, check in these files too, for the FastISel -> Fast rename. 
llvm-svn: 54750
 2008-08-13 19:55:00 +00:00
Dale Johannesen
686068490f When resolving a stub in x86-64 JIT, use a PC-relative branch 
rather than the absolute address if the target is within range.

llvm-svn: 54708
 2008-08-12 23:20:24 +00:00
Dale Johannesen
4dc25a234c Make x86-64 JIT changes Darwin-specific. 
llvm-svn: 54700
 2008-08-12 21:02:08 +00:00
Dale Johannesen
74bf5907fa In the absence of a linker to build the GOT, use the 32-bit 
non_lazy_ptr mechanism on x86-64 Darwin JIT.  Fixes a bunch
of last night's failures.

llvm-svn: 54692
 2008-08-12 18:23:48 +00:00
Dale Johannesen
718fcee02d Some fixes for x86-64 JIT. Make it use small code 
model, except for external calls; this makes
addressing modes PC-relative.  Incomplete.

The assertion at the top of Emitter::runOnMachineFunction
was obviously bogus (always true) so I removed it.
If someone knows what the correct test should be to cover
all the various targets, please fix.

llvm-svn: 54656
 2008-08-11 23:46:25 +00:00
Dan Gohman
ac992cdc1c Add an EXTRACTPSmr pattern to match the pattern that 
X86ISelLowering creates.

llvm-svn: 54544
 2008-08-08 18:30:21 +00:00
Anton Korobeynikov
14142919d0 Generalize 
llvm-svn: 54542
 2008-08-08 18:25:52 +00:00
Anton Korobeynikov
8d77445753 Handle visibility printing with all generality. Remove bunch of duplicate code. 
llvm-svn: 54540
 2008-08-08 18:25:07 +00:00
Evan Cheng
290a9fa171 Fix indentation. 
llvm-svn: 54518
 2008-08-08 06:43:59 +00:00
Anton Korobeynikov
212df90ce5 Remove dead forward decl 
llvm-svn: 54461
 2008-08-07 09:55:25 +00:00
Anton Korobeynikov
0c8d06f030 Switch ARM to new section handling stuff 
llvm-svn: 54458
 2008-08-07 09:54:23 +00:00
Dan Gohman
74fa421281 Re-enable elimination of unnecessary SUBREG_TO_REG instructions in 
LowerSubregs, and fix an x86-64 isel bug that this exposed.

SUBREG_TO_REG for x86-64 implicit zero extension is only safe for
isel to generate when the source is known to always have zeros in
the high 32 bits. The EXTRACT_SUBREG instruction does not clear
the high 32 bits.

llvm-svn: 54444
 2008-08-07 02:54:50 +00:00
Dan Gohman
cc784f1662 Re-introduce the 8-bit subreg zext-inreg patterns for x86-32, 
this time using MOV32to32_ and MOV16to16_. Thanks to Evan for
suggesting this.

llvm-svn: 54418
 2008-08-06 18:27:21 +00:00
Dan Gohman
99d70043f9 xchg does not modify FLAGS. 
llvm-svn: 54411
 2008-08-06 15:52:50 +00:00
Evan Cheng
f4d1119fbd Fix PR2620: Fix X86cmppd selection code so it expects operands to be v2f64. 
llvm-svn: 54376
 2008-08-05 22:19:15 +00:00
Dan Gohman
5d0df78ae0 Add an assert to catch invalid VECTOR_SHUFFLE mask indices. 
llvm-svn: 54329
 2008-08-04 23:09:15 +00:00
Andrew Lenharth
377c046675 Add atomic sub for other sizes 
llvm-svn: 54314
 2008-08-03 20:17:34 +00:00
Dan Gohman
efb5d2ce6e Reapply r54147 with a constraint to only use the 8-bit 
subreg form on x86-64, to avoid the problem with x86-32
having GPRs that don't have 8-bit subregs.

Also, change several 16-bit instructions to use 
equivalent 32-bit instructions. These have a smaller
encoding and avoid partial-register updates.

llvm-svn: 54223
 2008-07-30 18:09:17 +00:00
Dan Gohman
ebe629a4b2 Revert 54147. 
llvm-svn: 54148
 2008-07-29 01:02:18 +00:00
Dan Gohman
1816900fd1 Add x86 isel patterns to match what would be a ZERO_EXTEND_INREG operation, 
which is represented in codegen as an 'and' operation. This matches them
with movz instructions, instead of leaving them to be matched by and
instructions with an immediate field.

llvm-svn: 54147
 2008-07-28 22:18:25 +00:00
Dan Gohman
9742f7772d Rename SDOperand to SDValue. 
llvm-svn: 54128
 2008-07-27 21:46:04 +00:00
Dan Gohman
47c5cdbc34 Tidy SDNode::use_iterator, and complete the transition to have it 
parallel its analogue, Value::value_use_iterator. The operator* method
now returns the user, rather than the use.

llvm-svn: 54127
 2008-07-27 20:43:25 +00:00
Nate Begeman
5523d40e4b Disable mov{L, LP, HP, HLP, *DUP} shuffles for mmx 
mmx needs its own fancy shuffle logic based on unpack; for now we get correct but awful code.

Also commit Mon Ping's VSETCC patch

llvm-svn: 54039
 2008-07-25 19:05:58 +00:00
Nate Begeman
730880eec2 Fit in 80 cols 
llvm-svn: 54029
 2008-07-25 17:34:41 +00:00
Nate Begeman
73efed7a4c Remove dead PatLeaf; there are a number of issues around MMX movl that need to be fixed. 
llvm-svn: 54026
 2008-07-25 17:25:04 +00:00
Evan Cheng
20c9cdbe69 Fix PR2485: do all 4-element SSE shuffles in max. of 2 shuffle instructions. 
Based on patch by Nicolas Capens.

llvm-svn: 53939
 2008-07-23 00:22:17 +00:00
Evan Cheng
ff0bd19937 Factor out SSE 4 wide shuffle lowering code into its own function. No functionality changes. 
llvm-svn: 53933
 2008-07-22 21:13:36 +00:00
Evan Cheng
901d469e05 Fix PR2574: implement v2f32 scalar_to_vector. 
llvm-svn: 53927
 2008-07-22 18:39:19 +00:00
Anton Korobeynikov
f13fbd6879 Fix encoding of atomic compare and swap for i64 
llvm-svn: 53911
 2008-07-22 16:22:48 +00:00
Evan Cheng
a2bb31372d Eliminate a compilation warning. 
llvm-svn: 53873
 2008-07-21 20:02:45 +00:00
Dan Gohman
b91bef08a7 Add titles to the various SelectionDAG viewGraph calls 
that include useful information like the name of the
block being viewed and the current phase of compilation.

llvm-svn: 53872
 2008-07-21 20:00:07 +00:00
Duncan Sands
6e31474e71 Add VerifyNode, a place to put sanity checks on 
generic SDNode's (nodes with their own constructors
should do sanity checking in the constructor).  Add
sanity checks for BUILD_VECTOR and fix all the places
that were producing bogus BUILD_VECTORs, as found by
"make check".  My favorite is the BUILD_VECTOR with
only two operands that was being used to build a
vector with four elements!

llvm-svn: 53850
 2008-07-21 10:20:31 +00:00
Evan Cheng
ffd51ccf6b Use movaps instead of movups to spill 16-byte vector values when default alignment is >= 16. This fixes some massive performance regressions. 
llvm-svn: 53844
 2008-07-21 06:34:17 +00:00
Bill Wendling
98b6e63176 Fix for first part of PR2562. Generate the "pinsrw" instruction for inserts 
into v4i16 vectors.

llvm-svn: 53807
 2008-07-20 02:32:23 +00:00
Anton Korobeynikov
449fb584e4 Fix a FIXME :) 
llvm-svn: 53789
 2008-07-19 13:15:46 +00:00
Anton Korobeynikov
5c0eb7e991 Use generic ELFTargetAsmInfo and DarwinTargetAsmInfo for X86 code 
llvm-svn: 53788
 2008-07-19 13:15:21 +00:00
Anton Korobeynikov
6e00357dd6 Use aligned stack spills, where possible. This fixes PR2549. 
llvm-svn: 53784
 2008-07-19 06:30:51 +00:00
Dan Gohman
8981962672 Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk 
replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.

Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.

This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.

These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.

llvm-svn: 53728
 2008-07-17 19:10:17 +00:00
Nate Begeman
64f8f7f6bb Remove unnecessary readme entry 
llvm-svn: 53722
 2008-07-17 17:21:14 +00:00
Nate Begeman
61f6c21028 Fix a typo in last commit 
llvm-svn: 53720
 2008-07-17 17:04:58 +00:00
Nate Begeman
af01bfff99 SSE codegen for vsetcc nodes 
llvm-svn: 53719
 2008-07-17 16:51:19 +00:00
Mon P Wang
57cd9d6e5a When lowering certain atomics, we need to copy the memoperand from the old 
atomic operation to the new one.

llvm-svn: 53714
 2008-07-17 04:54:06 +00:00
Devang Patel
a6c5ff690a Mark function used by asm block as used, otherwise optimizer may not see the use and may delete the function. 
llvm-svn: 53692
 2008-07-16 17:54:34 +00:00
Dan Gohman
4c8c8e3aad Fix the result type of X86's truncate to i8. 
llvm-svn: 53688
 2008-07-16 16:20:48 +00:00
Evan Cheng
face16f9d8 x86-64 PIC JIT fixes: do not generate the extra load for external GV's. 
llvm-svn: 53661
 2008-07-16 01:34:02 +00:00
Evan Cheng
cabfd3f78c X86-64 PIC jump table values are different from x86-32 cases, they are dest - table base. 
llvm-svn: 53660
 2008-07-16 01:33:08 +00:00
Dan Gohman
bf47a27643 Add a utility function to MachineInstr for testing whether an instruction 
has exactly one MachineMemOperand, and change some X86 lowering code to
make use of it.

llvm-svn: 53498
 2008-07-12 00:10:52 +00:00
Dan Gohman
4c18394001 Include a frame index in the "fixed stack" pseudo source value 
instead of using the frame index for the SVOffset, which was
inconsistent.

llvm-svn: 53486
 2008-07-11 22:44:52 +00:00
Bill Wendling
9f17caa9a9 The frame address on an x86-64 box needs to be offset by -8, not -4. 
llvm-svn: 53450
 2008-07-11 07:18:52 +00:00
Evan Cheng
02a618dc56 Fix for PR2472. Use movss to set lower 32-bits of a zero XMM vector. 
llvm-svn: 53386
 2008-07-10 01:08:23 +00:00
Anton Korobeynikov
9eae9520a9 Remove a FIXME: we really need to use const_data section on darwin for 
constant pool, if relocation model is not static. This directly maps to
the way how GCC works.

llvm-svn: 53370
 2008-07-09 21:54:26 +00:00
Anton Korobeynikov
a5955dc461 Add FIXME for future checking. 
llvm-svn: 53368
 2008-07-09 21:38:28 +00:00
Dale Johannesen
36a38a5ba1 Emit debug info for data-only files. This version 
is X86 ATT only.

llvm-svn: 53355
 2008-07-09 20:55:35 +00:00
Anton Korobeynikov
61f4175d64 Add missed section 
llvm-svn: 53354
 2008-07-09 20:47:55 +00:00
Anton Korobeynikov
57e9182691 Distinguish .const and .const_data on Darwin, when needed. This is somehow crazy :) 
llvm-svn: 53350
 2008-07-09 20:01:42 +00:00
Anton Korobeynikov
67931c35bd Weak stuff always goes to coalesced sections on Darwin 
llvm-svn: 53340
 2008-07-09 19:06:02 +00:00
Dan Gohman
8a421248b9 Remove #include <iostream>. 
llvm-svn: 53333
 2008-07-09 18:08:48 +00:00
Anton Korobeynikov
2b2543166d Add FIXME needed to be resolved later 
llvm-svn: 53324
 2008-07-09 13:30:02 +00:00
Anton Korobeynikov
32e4256260 Typo 
llvm-svn: 53322
 2008-07-09 13:29:27 +00:00
Anton Korobeynikov
d31e7ad0cf Revert accidentially added stuff 
llvm-svn: 53321
 2008-07-09 13:29:08 +00:00
Anton Korobeynikov
03614f247c First sketch of special section objects 
llvm-svn: 53320
 2008-07-09 13:28:49 +00:00
Anton Korobeynikov
395dac000b Honour text sections 
llvm-svn: 53319
 2008-07-09 13:28:19 +00:00
Anton Korobeynikov
5ad0c235f1 Use isWeakForLinker() hook 
llvm-svn: 53318
 2008-07-09 13:27:59 +00:00
Anton Korobeynikov
f16db15839 Switch to new section name handling facility 
llvm-svn: 53316
 2008-07-09 13:27:16 +00:00
Anton Korobeynikov
1f697cd97b Another bunch of hacks for named sections support 
llvm-svn: 53315
 2008-07-09 13:26:52 +00:00
Anton Korobeynikov
d0f5cb4490 Typo 
llvm-svn: 53314
 2008-07-09 13:26:24 +00:00
Anton Korobeynikov
93fe3c3fad Drop mergeable flag, if size is no suitable 
llvm-svn: 53313
 2008-07-09 13:26:05 +00:00
Anton Korobeynikov
df663a8ddf Fix several bugs in named sections handling 
llvm-svn: 53312
 2008-07-09 13:25:46 +00:00
Anton Korobeynikov
933bf0ecc4 Add hacky way to distinguish named and named sections. This will be generalized in the future. 
llvm-svn: 53311
 2008-07-09 13:25:26 +00:00
Anton Korobeynikov
3bde8f2e24 Fix thinko 
llvm-svn: 53309
 2008-07-09 13:24:38 +00:00
Anton Korobeynikov
d30979695f Drop dead member reference 
llvm-svn: 53308
 2008-07-09 13:24:18 +00:00
Anton Korobeynikov
9f05fccb88 Add funny darwin section selection logic 
llvm-svn: 53307
 2008-07-09 13:23:57 +00:00
Anton Korobeynikov
751cfda7dd Handle ELF mergeable sections 
llvm-svn: 53306
 2008-07-09 13:23:37 +00:00
Anton Korobeynikov
dd347538c8 Provide section selection for X86 ELF targets 
llvm-svn: 53305
 2008-07-09 13:23:08 +00:00
Anton Korobeynikov
f42d75201a Provide general hook for section name calculation 
llvm-svn: 53304
 2008-07-09 13:22:46 +00:00
Anton Korobeynikov
c421fcddb4 Print entity size for mergeable sections 
llvm-svn: 53303
 2008-07-09 13:22:17 +00:00
Anton Korobeynikov
849c8617be Split PrintSectionFlags 
llvm-svn: 53302
 2008-07-09 13:21:49 +00:00
Anton Korobeynikov
7f21791b33 Split UniqueSectionForGlobal() 
llvm-svn: 53301
 2008-07-09 13:21:29 +00:00
Anton Korobeynikov
61aca29278 Split PreferredEHDataFormat hook 
llvm-svn: 53300
 2008-07-09 13:21:08 +00:00
Anton Korobeynikov
32d3d15c2e Split X86TargetAsmInfo into 4 subtarget-specific classes 
llvm-svn: 53299
 2008-07-09 13:20:48 +00:00
Anton Korobeynikov
80f2417e3b Whitespace cleanup 
llvm-svn: 53298
 2008-07-09 13:20:27 +00:00
Anton Korobeynikov
059999d321 Move flag decoding stuff into special hook 
llvm-svn: 53297
 2008-07-09 13:20:07 +00:00
Anton Korobeynikov
ca271dd426 Properly handle linkonce stuff 
llvm-svn: 53296
 2008-07-09 13:19:38 +00:00
Anton Korobeynikov
782a69505d Provide skeletone code for calculation of section, where global should be emitted into 
llvm-svn: 53295
 2008-07-09 13:19:08 +00:00
Evan Cheng
f51c436a1b Back out 53254. It broke ppc debug info codegen. 
llvm-svn: 53280
 2008-07-09 06:36:53 +00:00
Dale Johannesen
d609d7166c Make debug info come out in data-only files. 
This is a question of the debugging setup code not
being called at the right time, and it's called from
target-dependent code for some reason.  I have only
attempted to fix Darwin, but I'm pretty sure it's
broken elsewhere; I'll leave that to people who can
test it.

llvm-svn: 53254
 2008-07-08 21:56:22 +00:00
Evan Cheng
6af015292e Unbreak C++ tests on x86 Darwin. 
llvm-svn: 53237
 2008-07-08 16:40:43 +00:00
Evan Cheng
5be1103646 Avoid unnecessary string construction during asm printing. 
llvm-svn: 53215
 2008-07-08 00:55:58 +00:00
Dan Gohman
cd25487258 Pool-allocation for MachineInstrs, MachineBasicBlocks, and 
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212
 2008-07-07 23:14:23 +00:00
Evan Cheng
688a8070f4 ATT asm printer just print register AsmName's instead of calling tolower on each charater of Name. This speeds it up by 10%. 
llvm-svn: 53208
 2008-07-07 22:21:06 +00:00
Dan Gohman
c97817aac3 Make DenseMap's insert return a pair, to more closely resemble std::map. 
llvm-svn: 53177
 2008-07-07 17:46:23 +00:00
Duncan Sands
3ea6f15708 Rather than having a different custom legalization 
hook for each way in which a result type can be
legalized (promotion, expansion, softening etc),
just use one: ReplaceNodeResults, which returns
a node with exactly the same result types as the
node passed to it, but presumably with a bunch of
custom code behind the scenes.  No change if the
new LegalizeTypes infrastructure is not turned on.

llvm-svn: 53137
 2008-07-04 11:47:58 +00:00
Duncan Sands
aac5c915ed Linux also does not require exception handling 
moves in order to get correct debug info.  Since
I can't imagine how any target could possibly
be any different, I've just stripped out the
option: now all the world's like Darwin!

llvm-svn: 53134
 2008-07-04 09:55:48 +00:00
Evan Cheng
3e6a03a4b6 Back out 53091 for now. 
llvm-svn: 53109
 2008-07-03 18:11:29 +00:00
Evan Cheng
1f6148a84c - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. 
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.

llvm-svn: 53097
 2008-07-03 09:09:37 +00:00