Evan Cheng
5891f49c47
x86 CPU detection and proper subtarget support
...
llvm-svn: 25679
2006-01-27 08:10:46 +00:00
Chris Lattner
20d4194a0d
PHI and INLINEASM are now built-in instructions provided by Target.td
...
llvm-svn: 25674
2006-01-27 01:46:15 +00:00
Jeff Cohen
f329a41a66
Improve compatibility with VC2005, patch by Morten Ofstad!
...
llvm-svn: 25661
2006-01-26 20:41:32 +00:00
Chris Lattner
bfd5404cbf
Improve compatibility with VC2005, patch by Morten Ofstad!
...
llvm-svn: 25653
2006-01-26 19:55:20 +00:00
Evan Cheng
670dc80530
Added preliminary x86 subtarget support.
...
llvm-svn: 25645
2006-01-26 09:53:06 +00:00
Evan Cheng
7a77e3f80c
Work around some x86 Darwin assembler bugs
...
llvm-svn: 25638
2006-01-26 02:27:43 +00:00
Evan Cheng
bf29b90240
When trying to fold X86::SETCC into a Select, make a copy if it has more than
...
one use. This allows more CMOV instructions.
llvm-svn: 25634
2006-01-26 02:13:10 +00:00
Evan Cheng
224e14daa1
Remove the uses of STATUS flag register. Rely on node property SDNPInFlag,
...
SDNPOutFlag, and SDNPOptInFlag instead.
llvm-svn: 25629
2006-01-26 00:29:36 +00:00
Nate Begeman
c29fac7fce
First part of bug 680:
...
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
llvm-svn: 25606
2006-01-25 18:21:52 +00:00
Evan Cheng
46f85ddd84
X86 prefer scheduling for reduced register pressure.
...
llvm-svn: 25602
2006-01-25 09:15:17 +00:00
Evan Cheng
b463e81b83
Fix a selectcc lowering bug. Make a copy of X86ISD::CMP when folding it.
...
llvm-svn: 25596
2006-01-25 09:05:09 +00:00
Chris Lattner
8ddb0c3df8
Loosen up these checks to allow direct uses of ESP
...
llvm-svn: 25595
2006-01-25 08:00:36 +00:00
Chris Lattner
f2a2d62f48
use ESP directly, not a copy of ESP into some other register for fastcc calls
...
llvm-svn: 25584
2006-01-24 06:14:44 +00:00
Chris Lattner
c078165ea6
Emit the copies out of call return registers *after* the ISD::CALLSEQ_END
...
node, fixing fastcc and the case where a function has a frame pointer due
to dynamic allocas.
llvm-svn: 25580
2006-01-24 05:17:12 +00:00
Chris Lattner
2873307819
Allow jit-beta to work
...
llvm-svn: 25578
2006-01-24 04:50:48 +00:00
Chris Lattner
aafc339b4e
Add explicit #includes of <iostream>
...
llvm-svn: 25515
2006-01-22 23:41:00 +00:00
Evan Cheng
2e4479d4a8
Rename fcmovae to fcmovnb and fcmova to fcmovnbe (following Intel manual).
...
Some assemblers can't recognize the aliases.
llvm-svn: 25494
2006-01-21 02:55:41 +00:00
Chris Lattner
eacfe56de8
LowerReturn now doesn't have to handle f32 returns.
...
llvm-svn: 25484
2006-01-20 18:41:25 +00:00
Evan Cheng
ffbc93d829
Stop doing that accidental commit.
...
llvm-svn: 25474
2006-01-20 01:14:05 +00:00
Evan Cheng
2b24240110
A few more SH{L|R}D peepholes.
...
llvm-svn: 25473
2006-01-20 01:13:30 +00:00
Evan Cheng
d2c0ccedd3
Didn't mean to commit the last one.
...
llvm-svn: 25469
2006-01-19 23:27:08 +00:00
Evan Cheng
e0f6454c5e
Added i16 SH{L|R}D patterns.
...
llvm-svn: 25468
2006-01-19 23:26:24 +00:00
Evan Cheng
680a8e070b
Avoid generating a redundant setcc.
...
llvm-svn: 25457
2006-01-19 08:52:46 +00:00
Evan Cheng
cfe9d47379
adc and sbb need an incoming flag to ensure it reads the carry flag
...
from add / sub.
llvm-svn: 25444
2006-01-19 06:53:20 +00:00
Evan Cheng
be2cf5f948
Two peepholes:
...
(or (x >> c) | (y << (32 - c))) ==> (shrd x, y, c)
(or (x << c) | (y >> (32 - c))) ==> (shld x, y, c)
llvm-svn: 25438
2006-01-19 01:56:29 +00:00
Evan Cheng
ddb170b73e
Didn't mean to check that in.
...
llvm-svn: 25436
2006-01-19 01:52:56 +00:00
Evan Cheng
aebece2f7b
A obvious typo
...
llvm-svn: 25435
2006-01-19 01:46:14 +00:00
Evan Cheng
92c122b26f
SRA shift amount must be in i8
...
llvm-svn: 25416
2006-01-18 09:26:46 +00:00
Evan Cheng
4d841aaa98
If a call return type is i1, insert a truncate from X86::AL to i1.
...
llvm-svn: 25415
2006-01-18 08:08:38 +00:00
Evan Cheng
208f5076a0
Fix lowering of calls which return f32 values.
...
llvm-svn: 25413
2006-01-17 21:58:21 +00:00
Evan Cheng
1e112de44a
Zero extending load from i1 to i8.
...
llvm-svn: 25391
2006-01-17 07:02:46 +00:00
Evan Cheng
759a96e1a3
SSE does not support i64 SINT_TO_FP (FP stack doesn't either, but we custom
...
expand it), so ask legalizer to expand i32 UINT_TO_FP.
llvm-svn: 25386
2006-01-17 02:32:49 +00:00
Evan Cheng
53520a8cee
Added a FIXME comment about why FST is currently flagged to fpGETRESULT.
...
llvm-svn: 25381
2006-01-17 00:37:42 +00:00
Evan Cheng
3ce28c990a
Bug fixes: fpGETRESULT should produces a flag result and X86ISD::FST should
...
read a flag.
llvm-svn: 25378
2006-01-17 00:19:47 +00:00
Evan Cheng
e678b39014
More typo's
...
llvm-svn: 25375
2006-01-16 23:26:53 +00:00
Evan Cheng
f7c719fe10
Some typo's
...
llvm-svn: 25374
2006-01-16 22:48:46 +00:00
Evan Cheng
de33ca2831
Fix FP_TO_INT**_IN_MEM lowering.
...
llvm-svn: 25368
2006-01-16 21:21:29 +00:00
Chris Lattner
62ab456f6b
transfer some notes from my email to somewhere useful.
...
llvm-svn: 25361
2006-01-16 17:53:00 +00:00
Evan Cheng
fe83dd85c8
Added patterns for 8-bit multiply
...
llvm-svn: 25338
2006-01-15 10:05:20 +00:00
Chris Lattner
20f25dc8c2
Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.
...
llvm-svn: 25333
2006-01-15 09:00:21 +00:00
Chris Lattner
95882698e5
silence a warning
...
llvm-svn: 25322
2006-01-14 20:11:13 +00:00
Nate Begeman
85b2dc0c4e
bswap implementation
...
llvm-svn: 25312
2006-01-14 03:14:10 +00:00
Evan Cheng
d92410b194
A typo.
...
llvm-svn: 25307
2006-01-14 01:18:49 +00:00
Evan Cheng
4d9bab5789
Add truncstore i1 patterns.
...
llvm-svn: 25296
2006-01-13 21:45:19 +00:00
Chris Lattner
b839f31954
Fix a bug in my last X86 checkin, pointed out by cozmic
...
llvm-svn: 25293
2006-01-13 20:19:44 +00:00
Evan Cheng
a26ed7b9b2
LHS = X86ISD::CMOVcc LHS, RHS means LHS = RHS if cc. So the operands must be
...
flipped around.
llvm-svn: 25290
2006-01-13 19:51:46 +00:00
Chris Lattner
344642961e
Enable X86 support for savestack/restorestack
...
llvm-svn: 25278
2006-01-13 18:00:54 +00:00
Chris Lattner
80fed2d66e
expand unsupported stacksave/stackrestore nodes
...
llvm-svn: 25272
2006-01-13 02:42:53 +00:00
Evan Cheng
e43fbe0d93
Minor update.
...
llvm-svn: 25263
2006-01-13 01:20:42 +00:00
Evan Cheng
bed984a1c8
More typo's. I need new eye glasses...
...
llvm-svn: 25261
2006-01-13 01:17:24 +00:00
Evan Cheng
ae2915ac91
Oops. Typo.
...
llvm-svn: 25260
2006-01-13 01:06:49 +00:00
Evan Cheng
3f2ae15472
Fix a SETCC / BRCOND folding bug.
...
llvm-svn: 25259
2006-01-13 01:03:02 +00:00
Evan Cheng
794a7cf6fe
Fix sint_to_fp (fild*) support.
...
llvm-svn: 25257
2006-01-12 22:54:21 +00:00
Evan Cheng
169206c67f
Specify transformation from GlobalAddress to TargetGlobalAddress and
...
ExternalSymbol to TargetExternalSymbol.
llvm-svn: 25253
2006-01-12 19:36:31 +00:00
Evan Cheng
978f5581c4
X86ISD::SETCC (e.g. SETEr) produces a flag (so multiple SETCC can be
...
linked together).
llvm-svn: 25247
2006-01-12 08:27:59 +00:00
Evan Cheng
dd45d29b56
* Materialize GlobalAddress and ExternalSym with MOV32ri rather than
...
LEA32r.
* Do not lower GlobalAddress to TargetGlobalAddress. Let isel does it.
llvm-svn: 25246
2006-01-12 07:56:47 +00:00
Evan Cheng
5841005bdf
Added ROTL and ROTR.
...
llvm-svn: 25232
2006-01-11 23:20:05 +00:00
Evan Cheng
66540aa32c
Support for MEMCPY and MEMSET.
...
llvm-svn: 25226
2006-01-11 22:15:48 +00:00
Evan Cheng
3c3391632d
Select DYNAMIC_STACKALLOC
...
llvm-svn: 25225
2006-01-11 22:15:18 +00:00
Nate Begeman
cff96008ac
Add bswap, rotl, and rotr nodes
...
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
llvm-svn: 25222
2006-01-11 21:21:00 +00:00
Evan Cheng
e42281bcba
* Add special entry code main() (to set x87 to 64-bit precision).
...
* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
call parmater passing.
llvm-svn: 25207
2006-01-11 06:09:51 +00:00
Chris Lattner
1d0926075f
implement FP_REG_KILL insertion for the dag-dag instruction selector
...
llvm-svn: 25192
2006-01-11 01:15:34 +00:00
Chris Lattner
b4e9082f18
Fit into 80 cols
...
llvm-svn: 25191
2006-01-11 00:46:55 +00:00
Evan Cheng
9adc8e5a3d
SSE cmov support.
...
llvm-svn: 25190
2006-01-11 00:33:36 +00:00
Evan Cheng
0cb5e32cda
* fp to sint patterns.
...
* fiadd, fisub, etc.
llvm-svn: 25189
2006-01-10 22:22:02 +00:00
Evan Cheng
8504673bb2
FP_TO_INT*_IN_MEM and x87 FP Select support.
...
llvm-svn: 25188
2006-01-10 20:26:56 +00:00
Evan Cheng
154cef5ccb
* Added undef patterns.
...
* Some reorg.
llvm-svn: 25163
2006-01-09 23:10:28 +00:00
Evan Cheng
c0b3a2166b
More typos
...
llvm-svn: 25162
2006-01-09 22:29:54 +00:00
Evan Cheng
5baec4d0e2
typo
...
llvm-svn: 25160
2006-01-09 20:49:21 +00:00
Evan Cheng
d3babfe458
Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.
...
llvm-svn: 25158
2006-01-09 18:33:28 +00:00
Evan Cheng
6a9c735e21
* Added integer div / rem.
...
* Fixed a load folding bug.
llvm-svn: 25136
2006-01-06 23:19:29 +00:00
Evan Cheng
060b19c708
ISEL code for MULHU, MULHS, and UNDEF.
...
llvm-svn: 25132
2006-01-06 20:36:21 +00:00
Chris Lattner
88239024ca
silence a bogus gcc warning
...
llvm-svn: 25129
2006-01-06 17:56:38 +00:00
Evan Cheng
66355df170
Addd (shl x, 1) ==> (shl x, x) peepholes.
...
llvm-svn: 25123
2006-01-06 02:31:59 +00:00
Evan Cheng
efe621adce
fold (shl x, 1) -> (add x, x)
...
llvm-svn: 25120
2006-01-06 01:06:31 +00:00
Evan Cheng
1e0d7b98f3
* Fast call support.
...
* FP cmp, setcc, etc.
llvm-svn: 25117
2006-01-06 00:43:03 +00:00
Evan Cheng
6c86cf3a5f
Added ConstantFP patterns.
...
llvm-svn: 25108
2006-01-05 02:08:37 +00:00
Jim Laskey
41b3ee3c4f
Had expand logic backward.
...
llvm-svn: 25105
2006-01-05 01:47:43 +00:00
Jim Laskey
5eddaee9f3
Added initial support for DEBUG_LABEL allowing debug specific labels to be
...
inserted in the code.
llvm-svn: 25104
2006-01-05 01:25:28 +00:00
Evan Cheng
2329411038
DAG based isel call support.
...
llvm-svn: 25103
2006-01-05 00:27:02 +00:00
Chris Lattner
cee6093ca8
Fix a problem duraid pointed out to me compiling kc++ with -enable-x86-fastcc
...
llvm-svn: 25024
2005-12-27 03:02:18 +00:00
Evan Cheng
231b11ba87
Added field noResults to Instruction.
...
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
llvm-svn: 25017
2005-12-26 09:11:45 +00:00
Evan Cheng
cd69c81c5e
Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass.
...
llvm-svn: 25004
2005-12-24 09:48:35 +00:00
Evan Cheng
d87688fe72
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
...
* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
llvm-svn: 24997
2005-12-23 22:14:32 +00:00
Evan Cheng
995503fc91
More X86 floating point patterns.
...
llvm-svn: 24990
2005-12-23 07:31:11 +00:00
Chris Lattner
8e80a247ff
make sure bit_convert's are expanded
...
llvm-svn: 24979
2005-12-23 05:15:23 +00:00
Evan Cheng
e458553c73
Bye bye HACKTROCITY.
...
llvm-svn: 24935
2005-12-22 02:26:21 +00:00
Evan Cheng
fb6413e05a
* Fix a GlobalAddress lowering bug.
...
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
llvm-svn: 24921
2005-12-21 23:05:39 +00:00
Evan Cheng
add305de26
Oops. Accidentally deleted RET pattern. It's still needed for return void;
...
llvm-svn: 24920
2005-12-21 22:22:16 +00:00
Jim Laskey
d82881490c
Disengage DEBUG_LOC from non-PPC targets.
...
llvm-svn: 24919
2005-12-21 20:51:37 +00:00
Evan Cheng
6f15189a77
* Added support for X86 RET with an additional operand to specify number of
...
bytes to pop off stack.
* Added support for X86 SETCC.
llvm-svn: 24917
2005-12-21 20:21:51 +00:00
Chris Lattner
347c6eedae
This was meant to go in
...
llvm-svn: 24900
2005-12-21 07:50:26 +00:00
Chris Lattner
884def40f4
Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns
...
that were overloaded to work before and after the stackifier runs. With the
new clean world, it is possible to write patterns for these instructions: woo!
This also adds a few simple patterns here and there, though there are a lot
still missing. These should be easy to add though. :)
See the comments under "Floating Point Stack Support" for more details on
the new world order.
This patch as absolutely no effect on the generated code, woo!
llvm-svn: 24899
2005-12-21 07:47:04 +00:00
Chris Lattner
ee15b5393f
Wrap some long lines: no functionality change
...
llvm-svn: 24898
2005-12-21 05:34:58 +00:00
Evan Cheng
cab6710034
Remove ISD::RET select code. Now tblgen'd.
...
llvm-svn: 24889
2005-12-21 02:41:57 +00:00
Evan Cheng
0226113ed5
* Added lowering hook for external weak global address. It inserts a load
...
for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
value (or store / fld / copy to ST(0) for floating point value). This
eliminate the need to write C++ code to handle RET with variable number
of operands.
llvm-svn: 24888
2005-12-21 02:39:21 +00:00
Evan Cheng
ace8f1fafa
SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns.
...
llvm-svn: 24886
2005-12-20 22:59:51 +00:00
Evan Cheng
1c3ea75ffc
Added X86 readport patterns.
...
llvm-svn: 24879
2005-12-20 07:38:38 +00:00
Evan Cheng
44e4e6a57f
Added a hook to print out names of target specific DAG nodes.
...
llvm-svn: 24877
2005-12-20 06:22:03 +00:00
Evan Cheng
bb34a50cb0
X86 conditional branch support.
...
llvm-svn: 24870
2005-12-19 23:12:38 +00:00
Evan Cheng
c87099506c
It's essential we clear CodeGenMap after isel every basic block!
...
llvm-svn: 24867
2005-12-19 22:36:02 +00:00
Chris Lattner
399dfec939
eliminate some redundancy
...
llvm-svn: 24781
2005-12-17 19:47:05 +00:00
Evan Cheng
56649f9616
Darwin API issue: indirect load of external and weak symbols.
...
llvm-svn: 24775
2005-12-17 09:13:43 +00:00
Evan Cheng
a3ff796fda
Remove a few lines of dead code.
...
llvm-svn: 24768
2005-12-17 07:18:44 +00:00
Evan Cheng
de142995a1
Added an idea about any_extend for performance tuning.
...
llvm-svn: 24763
2005-12-17 06:54:43 +00:00
Evan Cheng
c308dfb801
Added truncate.
...
llvm-svn: 24760
2005-12-17 02:02:50 +00:00
Evan Cheng
6a94c77c55
Added anyext, modelled as zext on X86.
...
llvm-svn: 24759
2005-12-17 01:47:57 +00:00
Evan Cheng
19550821d1
Added some isel ideas.
...
llvm-svn: 24757
2005-12-17 01:25:19 +00:00
Evan Cheng
5d90b26707
Added support for cmp, test, and conditional move instructions.
...
llvm-svn: 24756
2005-12-17 01:24:02 +00:00
Evan Cheng
566600c17d
Only lower SELECT when using DAG based isel.
...
llvm-svn: 24755
2005-12-17 01:22:13 +00:00
Evan Cheng
d51da93a03
X86 lowers SELECT to a cmp / test followed by a conditional move.
...
llvm-svn: 24754
2005-12-17 01:21:05 +00:00
Chris Lattner
71443a0e36
Don't globalize internal functions
...
llvm-svn: 24727
2005-12-16 00:07:30 +00:00
Evan Cheng
43152cb8b6
* Promote all 1 bit entities to 8 bit.
...
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.
llvm-svn: 24726
2005-12-15 19:49:23 +00:00
Evan Cheng
f72e7055c0
Added frameindex, constpool, globaladdr, and externalsym as root nodes of
...
leaaddr.
llvm-svn: 24724
2005-12-15 08:31:04 +00:00
Evan Cheng
cc6efa8b6f
Handling zero extension of 1 bit value.
...
llvm-svn: 24722
2005-12-15 01:02:48 +00:00
Evan Cheng
576b826f71
Use MOV8rm to load 1 bit value.
...
llvm-svn: 24721
2005-12-15 00:59:17 +00:00
Evan Cheng
40e397521c
Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/14/2005 hbd failure.
...
llvm-svn: 24717
2005-12-14 22:28:18 +00:00
Evan Cheng
3b094e89fb
Added sext and zext patterns.
...
llvm-svn: 24705
2005-12-14 02:22:27 +00:00
Evan Cheng
ad1e2fd14a
Add load + store folding srl and sra patterns.
...
llvm-svn: 24696
2005-12-13 07:24:22 +00:00
Chris Lattner
95555853ad
Use the shared asmprinter code for printing special llvm globals
...
llvm-svn: 24695
2005-12-13 06:32:50 +00:00
Chris Lattner
0975e89328
Add ELF and darwin support for static ctors and dtors
...
llvm-svn: 24693
2005-12-13 04:53:51 +00:00
Evan Cheng
63f60d3edb
Beautify a few patterns.
...
llvm-svn: 24690
2005-12-13 02:40:18 +00:00
Evan Cheng
95d46be9e6
Some shl patterns which do load + store folding.
...
llvm-svn: 24689
2005-12-13 02:34:51 +00:00
Evan Cheng
6beadf1c29
A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:$src). Only to improve readibility.
...
llvm-svn: 24688
2005-12-13 01:57:51 +00:00
Evan Cheng
d233c28d29
Add and, or, and xor patterns which fold load + stores.
...
llvm-svn: 24687
2005-12-13 01:41:36 +00:00
Evan Cheng
62999d6c5d
Add inc + dec patterns which fold load + stores.
...
llvm-svn: 24686
2005-12-13 01:02:47 +00:00
Evan Cheng
7f9fb7b095
Add neg and not patterns which fold load + stores.
...
llvm-svn: 24685
2005-12-13 00:54:44 +00:00
Evan Cheng
240071c011
Missed a couple redundant explicit type casts.
...
llvm-svn: 24684
2005-12-13 00:25:07 +00:00
Evan Cheng
e80ec06aaf
Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc.
...
llvm-svn: 24683
2005-12-13 00:14:11 +00:00
Evan Cheng
ea7f208813
* Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands.
...
This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.
llvm-svn: 24682
2005-12-13 00:01:09 +00:00
Evan Cheng
0ee9dc460a
Add some integer mul patterns.
...
llvm-svn: 24681
2005-12-12 23:47:46 +00:00
Evan Cheng
6c9f9ea7ec
Add some sub patterns.
...
llvm-svn: 24675
2005-12-12 21:54:05 +00:00
Evan Cheng
76923d3512
When SelectLEAAddr() fails, it shouldn't cause the side effect of having the
...
base or index operands being selected.
llvm-svn: 24674
2005-12-12 21:49:40 +00:00
Evan Cheng
cf34770b28
For ISD::RET, if # of operands >= 2, try selection the real data dep. operand
...
first before the chain.
e.g.
int X;
int foo(int x)
{
x += X + 37;
return x;
}
If chain operand is selected first, we would generate:
movl X, %eax
movl 4(%esp), %ecx
leal 37(%ecx,%eax), %eax
rather than
movl $37, %eax
addl 4(%esp), %eax
addl X, %eax
which does not require %ecx. (Due to ADD32rm not matching.)
llvm-svn: 24673
2005-12-12 20:32:18 +00:00
Chris Lattner
08c38b28db
remove some never-completed and now-obsolete code.
...
llvm-svn: 24671
2005-12-12 20:12:20 +00:00
Evan Cheng
145318aefb
Add a few more add / store patterns. e.g. ADD32mi8.
...
llvm-svn: 24670
2005-12-12 19:45:23 +00:00
Evan Cheng
56f62789d7
* Added X86 store patterns.
...
* Added X86 dec patterns.
llvm-svn: 24654
2005-12-10 00:48:20 +00:00
Evan Cheng
6610545b7e
Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al
...
llvm-svn: 24648
2005-12-09 22:48:48 +00:00
Evan Cheng
6eb25df63a
Added explicit type field to ComplexPattern.
...
llvm-svn: 24637
2005-12-08 02:15:07 +00:00
Evan Cheng
1712ee5ab9
* Added intelligence to X86 LEA addressing mode matching routine so it returns
...
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.
llvm-svn: 24635
2005-12-08 02:01:35 +00:00
Chris Lattner
5df0bce13a
X86 doesn't support sextinreg for 8-bit things either.
...
llvm-svn: 24631
2005-12-07 17:59:14 +00:00
Evan Cheng
60cc8da341
Remove unnecessary let hasCtrlDep=1 now it can be inferred.
...
llvm-svn: 24611
2005-12-05 23:09:43 +00:00
Chris Lattner
3583f5337b
Several things:
...
1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly. The port number really
*is* a 16-bit value, but the patterns should only match if the number
is 0-255. Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
i8, not an i16 as they were believed to be before. This previous fib
stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.
llvm-svn: 24599
2005-12-05 02:40:25 +00:00
Evan Cheng
1ce02890ce
Added isel patterns for RET, JMP, and WRITEPORT.
...
llvm-svn: 24588
2005-12-04 08:19:43 +00:00
Chris Lattner
4d34819930
Fix PR672 another way which should be more robust
...
llvm-svn: 24585
2005-12-04 06:03:50 +00:00
Chris Lattner
1b8459d092
Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.
...
This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on. Given a clean nightly tester run, we should be able to turn it
on by default!
llvm-svn: 24578
2005-12-03 07:15:55 +00:00
Chris Lattner
a2a404ff3a
add a note
...
llvm-svn: 24572
2005-12-02 00:11:20 +00:00
Nate Begeman
811a41a87c
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
...
work. This change has no effect on generated code.
llvm-svn: 24563
2005-12-01 04:51:06 +00:00
Evan Cheng
f1352fa7d6
Proper support for shifts with register shift value.
...
llvm-svn: 24559
2005-12-01 00:43:55 +00:00
Chris Lattner
b88f251144
SelectNodeTo now returns its result, we must pay attention to it.
...
llvm-svn: 24550
2005-11-30 22:59:19 +00:00
Nate Begeman
47bb0eba00
Fix a typo in my latest change
...
llvm-svn: 24542
2005-11-30 18:57:39 +00:00
Nate Begeman
84be54b731
No longer track value types for asm printer operands, and remove them as
...
an argument to every operand printing function. Requires some slight
tweaks to x86, the only user.
llvm-svn: 24541
2005-11-30 18:54:35 +00:00
Chris Lattner
fdc786b18f
Fix a bug in a recent patch that broke shifts
...
llvm-svn: 24526
2005-11-30 05:11:18 +00:00
Evan Cheng
bc51bc83b6
Added support to STORE and shifts to DAG to DAG isel.
...
llvm-svn: 24525
2005-11-30 02:51:20 +00:00
Evan Cheng
16b8b9d532
Fixed a minor bug: - -offset != offset iff offset == MININT
...
llvm-svn: 24522
2005-11-30 01:59:00 +00:00
Evan Cheng
f412b7ba0c
Add more X86 ISel patterns.
...
llvm-svn: 24520
2005-11-29 19:38:52 +00:00
Chris Lattner
47feb1ecbb
No targets support line number info yet.
...
llvm-svn: 24513
2005-11-29 06:16:21 +00:00
Chris Lattner
0edc0fd222
Add a missed optimization
...
llvm-svn: 24495
2005-11-28 04:52:39 +00:00
Chris Lattner
3efe6171f1
Use HasDotTypeDotSizeDirective instead of forELF
...
llvm-svn: 24481
2005-11-21 23:06:54 +00:00
Chris Lattner
fb4a026c32
Remove a level of indentation by using a continue.
...
llvm-svn: 24479
2005-11-21 22:48:18 +00:00
Chris Lattner
d17b6f1f1f
Simplify the subtarget info, allow the asmwriter to do some target sensing
...
based on TargetType.
llvm-svn: 24478
2005-11-21 22:43:58 +00:00
Chris Lattner
77bd127e14
Use subtarget information computed by X86Subtarget instead of rolling our own.
...
llvm-svn: 24477
2005-11-21 22:39:40 +00:00
Chris Lattner
4e1e8b180b
Make the X86 subtarget compute the basic target type: ELF, Cygwin, Darwin,
...
or native Win32
llvm-svn: 24476
2005-11-21 22:31:58 +00:00
Chris Lattner
0a2fc68b8a
Add a forELF flag, allowing the removal of forCygwin and simplification of
...
conditionals.
llvm-svn: 24475
2005-11-21 22:19:48 +00:00
Chris Lattner
fe8b9b90d4
simplify and genericize this code
...
llvm-svn: 24473
2005-11-21 19:50:31 +00:00
Chris Lattner
9a74c980e8
prune #include
...
llvm-svn: 24468
2005-11-21 08:33:17 +00:00
Chris Lattner
03d9332c4f
Switch to using the shared constant pool printer, along with using shorter
...
CPI ids
llvm-svn: 24467
2005-11-21 08:32:23 +00:00
Chris Lattner
3e2c6c1d15
Adjust to capitalized AsmPrinter method names
...
llvm-svn: 24456
2005-11-21 07:51:23 +00:00
Chris Lattner
0716cec311
Use PrivateGlobalPrefix for basic block labels. This allows the x86 darwin
...
port to properly use L for the bb prefix instead of .
llvm-svn: 24454
2005-11-21 07:43:59 +00:00
Chris Lattner
83215f8935
convert the rest of this over to use SwitchSection
...
llvm-svn: 24448
2005-11-21 07:16:34 +00:00
Chris Lattner
a19d2349b1
Start using the AsmPrinter shared SwitchSection code. This allows the X86
...
backend to implement global variables in sections.
llvm-svn: 24447
2005-11-21 07:11:11 +00:00
Chris Lattner
e5d0064a9d
Rename SwitchSection -> switchSection to avoid conflicting with a future
...
change.
llvm-svn: 24443
2005-11-21 06:55:27 +00:00
Chris Lattner
00a2d1554b
Naturally align doubles in the constant pool, set PrivateGlobalPrefix on
...
darwin, use it when printing the constant pool indices so the labels are
appropriately private, emit cp entries to .const instead of .data on darwin
and only emit a single .section for the constant pool, not one for each
entry.
llvm-svn: 24440
2005-11-21 06:46:22 +00:00
Chris Lattner
d122fc01dd
Lower READCYCLECOUNTER correctly, preserving the chain result
...
llvm-svn: 24438
2005-11-20 22:57:19 +00:00
Chris Lattner
5d9ecff961
encode rdtsc correctly
...
llvm-svn: 24435
2005-11-20 22:13:18 +00:00
Chris Lattner
f4f66fafd9
use chain operands to ensure the copies don't wander from the rdtsc instruction.
...
llvm-svn: 24434
2005-11-20 22:01:40 +00:00
Andrew Lenharth
a369904fc5
The second patch of X86 support for read cycle counter.
...
llvm-svn: 24430
2005-11-20 21:41:10 +00:00
Chris Lattner
af79013023
Teach the x86 backend about the register constraints of its addressing mode.
...
Patch by Evan Cheng
llvm-svn: 24423
2005-11-19 07:01:30 +00:00
Chris Lattner
6e0171ba8b
Add load and other support to the dag-dag isel. Patch contributed by Evan
...
Cheng!
llvm-svn: 24419
2005-11-19 02:11:08 +00:00
Chris Lattner
72fa26a85b
add more patterns, patch by Evan Cheng.
...
llvm-svn: 24406
2005-11-18 01:04:42 +00:00
Chris Lattner
f829636c6b
Add patterns for some 16-bit immediate instructions, patch contributed by
...
Evan Cheng.
llvm-svn: 24384
2005-11-17 02:01:55 +00:00
Chris Lattner
fec54e57a0
Add patterns for several simple instructions that take i32 immediates.
...
Patch contributed by Evan Cheng!
llvm-svn: 24382
2005-11-16 22:59:19 +00:00
Chris Lattner
9caa214f72
initial step at adding a dag-to-dag isel for X86 backend. Patch contributed
...
by Evan Cheng!
llvm-svn: 24371
2005-11-16 01:54:32 +00:00
Chris Lattner
792ac11aee
Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
...
contributed by Evan Cheng.
llvm-svn: 24358
2005-11-15 00:40:23 +00:00
Chris Lattner
3fdc97d460
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
...
llvm-svn: 24233
2005-11-08 02:11:51 +00:00
Chris Lattner
bdcb2a99b6
add a note that Nate mentioned last week
...
llvm-svn: 23898
2005-10-23 21:44:59 +00:00
Chris Lattner
11c044d7cf
Put some of my random notes somewhere public
...
llvm-svn: 23897
2005-10-23 19:52:42 +00:00
Nate Begeman
6c42f509bc
Invert the TargetLowering flag that controls divide by consant expansion.
...
Add a new flag to TargetLowering indicating if the target has really cheap
signed division by powers of two, make ppc use it. This will probably go
away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.
llvm-svn: 23853
2005-10-21 00:02:42 +00:00
Nate Begeman
0eeb198d81
Remove some dead code now that the dag combiner exists.
...
llvm-svn: 23754
2005-10-15 22:08:02 +00:00
Nate Begeman
3b6c2df603
Properly split f32 and f64 into separate register classes for scalar sse fp
...
fixing a bunch of nasty hackery
llvm-svn: 23735
2005-10-14 22:06:00 +00:00
Chris Lattner
462fe8b2cc
silence some warnings
...
llvm-svn: 23594
2005-10-02 16:29:36 +00:00
Chris Lattner
f70bf81bb6
simplify this code using the new regclass info passed in
...
llvm-svn: 23557
2005-09-30 17:12:38 +00:00
Chris Lattner
a1266f8ed5
Pass extra regclasses into spilling code
...
llvm-svn: 23537
2005-09-30 01:29:42 +00:00
Chris Lattner
d3b3d07c41
Add FP versions of the binary operators, keeping the int and fp worlds seperate.
...
Though I have done extensive testing, it is possible that this will break
things in configs I can't test. Please let me know if this causes a problem
and I'll fix it ASAP.
llvm-svn: 23505
2005-09-28 22:29:17 +00:00
Chris Lattner
4a8f6d97ff
Implement the isLoadFromStackSlot interface
...
llvm-svn: 23387
2005-09-19 05:23:44 +00:00
Chris Lattner
54139f0b83
give all operands names
...
llvm-svn: 23356
2005-09-14 21:10:24 +00:00
Chris Lattner
fa644b391f
fix a major regression from my patch this afternoon
...
llvm-svn: 23347
2005-09-14 06:06:45 +00:00
Chris Lattner
00bfb7812d
This code is no longer needed, it is moved to the target-indep code
...
llvm-svn: 23332
2005-09-13 19:31:44 +00:00
Chris Lattner
70e3e44ec4
Handle any_extend like zext
...
llvm-svn: 23202
2005-09-02 00:16:09 +00:00
Jim Laskey
f32ef9a37f
1. Use SubtargetFeatures in llc/lli.
...
2. Propagate feature "string" to all targets.
3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.
llvm-svn: 23192
2005-09-01 21:38:21 +00:00
Reid Spencer
a4acd20ae2
Adjust to member variable name change.
...
llvm-svn: 23119
2005-08-27 19:09:48 +00:00
Chris Lattner
439ef36320
Fix a bug in my previous checkin
...
llvm-svn: 23082
2005-08-26 17:18:44 +00:00
Chris Lattner
a31708e6b3
Change ConstantPoolSDNode to actually hold the Constant itself instead of
...
putting it into the constant pool. This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.
llvm-svn: 23081
2005-08-26 17:15:30 +00:00
Chris Lattner
fc59d17656
Fix a warning
...
llvm-svn: 23031
2005-08-25 00:05:15 +00:00
Chris Lattner
0444d66753
Adjust to new livevars interface
...
llvm-svn: 22991
2005-08-23 23:41:14 +00:00
Chris Lattner
51bad854a7
Simplify this code by using LiveVariables::KillsRegister
...
llvm-svn: 22988
2005-08-23 22:49:55 +00:00
Chris Lattner
2ac3fd08d2
Split RegisterClass 'Methods' into MethodProtos and MethodBodies
...
llvm-svn: 22929
2005-08-19 19:13:20 +00:00
Chris Lattner
f86654ffde
Put register classes into namespaces
...
llvm-svn: 22925
2005-08-19 18:51:57 +00:00
Chris Lattner
e894de1791
The simple isel being gone makes this dead!
...
llvm-svn: 22914
2005-08-19 18:32:03 +00:00
Chris Lattner
d7bd59d77e
add a few missing cases
...
llvm-svn: 22891
2005-08-19 00:41:29 +00:00
Chris Lattner
f62a66a21c
Give ADJCALLSTACKDOWN/UP the correct operands.
...
Give a whole bunch of other stuff variable operands, particularly FP. The
FP stackifier is playing fast and loose with operands here, so we have to
mark them all as variable. This will have to be fixed before we can dag->dag
the X86 backend. The solution is for the pre-stackifier and post-stackifier
instructions to all be disjoint.
llvm-svn: 22890
2005-08-19 00:38:22 +00:00
Chris Lattner
abad70eaf8
The variable SAR's only take one operand too
...
llvm-svn: 22888
2005-08-19 00:31:37 +00:00
Chris Lattner
8ce7dd449a
Stop adding bogus operands to variable shifts on X86. These instructions
...
only take one operand. The other comes implicitly in through CL.
llvm-svn: 22887
2005-08-19 00:16:17 +00:00
Nate Begeman
a978ae8b7d
Remove the X86 and PowerPC Simple instruction selectors; their time has
...
passed.
llvm-svn: 22886
2005-08-18 23:53:15 +00:00
Chris Lattner
583658a766
update the backends to work with the new CopyFromReg/CopyToReg/ImplicitDef nodes
...
llvm-svn: 22807
2005-08-16 21:56:37 +00:00
Nate Begeman
f6b6378f23
Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty
...
fixme from the PowerPC backend. Emit slightly better code for legalizing
select_cc.
llvm-svn: 22805
2005-08-16 19:49:35 +00:00
Nate Begeman
6e0168fe5f
Fix last night's X86 regressions by putting code for SSE in the if(SSE)
...
block. nur.
llvm-svn: 22788
2005-08-14 18:37:02 +00:00
Nate Begeman
89f12b7721
Fix FP_TO_UINT with Scalar SSE2 now that the legalizer can handle it. We
...
now generate the relatively good code sequences:
unsigned short foo(float a) { return a; }
_foo:
movss 4(%esp), %xmm0
cvttss2si %xmm0, %eax
movzwl %ax, %eax
ret
and
unsigned bar(float a) { return a; }
_bar:
movss .CPI_bar_0, %xmm0
movss 4(%esp), %xmm1
movapd %xmm1, %xmm2
subss %xmm0, %xmm2
cvttss2si %xmm2, %eax
xorl $-2147483648, %eax
cvttss2si %xmm1, %ecx
ucomiss %xmm0, %xmm1
cmovb %ecx, %eax
ret
llvm-svn: 22786
2005-08-14 04:36:51 +00:00
Chris Lattner
1277703a48
Update the targets to the new SETCC/CondCodeSDNode interfaces.
...
llvm-svn: 22729
2005-08-09 20:21:10 +00:00
Chris Lattner
07af090121
adjust to change in getSubtarget() api
...
llvm-svn: 22687
2005-08-05 21:54:27 +00:00
Nate Begeman
09997f1012
Add Subtarget support to PowerPC. Next up, using it.
...
llvm-svn: 22644
2005-08-04 07:12:09 +00:00
Nate Begeman
6cd034da8e
Scalar SSE: load +0.0 -> xorps/xorpd
...
Scalar SSE: a < b ? c : 0.0 -> cmpss, andps
Scalar SSE: float -> i16 needs to be promoted
llvm-svn: 22637
2005-08-03 23:26:28 +00:00
Chris Lattner
cc8ae687e1
Update to use the new MathExtras.h support for log2 computation.
...
Patch contributed by Jim Laskey!
llvm-svn: 22594
2005-08-02 19:26:06 +00:00
Jeff Cohen
019104459d
Keep tabs and trailing spaces out.
...
llvm-svn: 22565
2005-07-30 18:33:25 +00:00
Chris Lattner
11be5c11d5
fix a typeo
...
llvm-svn: 22561
2005-07-30 00:43:00 +00:00
Chris Lattner
a681fc64d6
Change the fp to integer code to not perform 2-byte stores followed by
...
1 byte loads and other operations. This is bad for store-forwarding on
common CPUs. We now do this:
fnstcw WORD PTR [%ESP]
mov %AX, WORD PTR [%ESP]
instead of:
fnstcw WORD PTR [%ESP]
mov %AL, BYTE PTR [%ESP + 1]
llvm-svn: 22559
2005-07-30 00:17:52 +00:00
Chris Lattner
cf208334d9
Use a custom expander for all FP to int conversions, as the X86 only has
...
FP-to-int-in-memory: this exposes the load from the stored slot to the
selection dag, allowing it to be folded into other operaions.
llvm-svn: 22556
2005-07-30 00:05:54 +00:00
Andrew Lenharth
3a7dc9f0bd
turn off GOT on archs that didn't use it (not that it appeard to harm them much with it on)
...
llvm-svn: 22553
2005-07-29 23:32:02 +00:00
Chris Lattner
2aa847898d
Implement a FIXME: move a bunch of cruft for handling FP_TO_*INT operations
...
that the X86 does not support to the legalizer. This allows it to be better
optimized, etc, and will help with SSE support.
llvm-svn: 22551
2005-07-29 01:00:29 +00:00
Chris Lattner
9db78c43c5
Don't forget to diddle with the control word when performing an FISTP64.
...
llvm-svn: 22550
2005-07-29 00:54:34 +00:00
Chris Lattner
a30d4be57d
Use a custom expander to compile this:
...
long %test4(double %X) {
%tmp.1 = cast double %X to long ; <long> [#uses=1]
ret long %tmp.1
}
to this:
_test4:
sub %ESP, 12
fld QWORD PTR [%ESP + 16]
fistp QWORD PTR [%ESP]
mov %EDX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%ESP]
add %ESP, 12
ret
instead of this:
_test4:
sub %ESP, 28
fld QWORD PTR [%ESP + 32]
fstp QWORD PTR [%ESP]
call ___fixdfdi
add %ESP, 28
ret
llvm-svn: 22549
2005-07-29 00:40:01 +00:00
Jeff Cohen
bd51ec7461
Eliminate all remaining tabs and trailing spaces.
...
llvm-svn: 22523
2005-07-27 06:12:32 +00:00
Jeff Cohen
81980781a1
Eliminate tabs and trailing spaces.
...
llvm-svn: 22520
2005-07-27 05:53:44 +00:00
Andrew Lenharth
0e1c0e7c79
update interface
...
llvm-svn: 22498
2005-07-22 20:49:37 +00:00
Reid Spencer
40c5ebe4eb
For: memory operations -> stores
...
This is the first incremental patch to implement this feature. It adds no
functionality to LLVM but setup up the information needed from targets in
order to implement the optimization correctly. Each target needs to specify
the maximum number of store operations for conversion of the llvm.memset,
llvm.memcpy, and llvm.memmove intrinsics into a sequence of store operations.
The limit needs to be chosen at the threshold of performance for such an
optimization (generally smallish). The target also needs to specify whether
the target can support unaligned stores for multi-byte store operations.
This helps ensure the optimization doesn't generate code that will trap on
an alignment errors.
More patches to follow.
llvm-svn: 22468
2005-07-19 04:52:44 +00:00
Nate Begeman
160c12d896
Teach the legalizer how to promote SINT_TO_FP to a wider SINT_TO_FP that
...
the target natively supports. This eliminates some special-case code from
the x86 backend and generates better code as well.
For an i8 to f64 conversion, before & after:
_x87 before:
subl $2, %esp
movb 6(%esp), %al
movsbw %al, %ax
movw %ax, (%esp)
filds (%esp)
addl $2, %esp
ret
_x87 after:
subl $2, %esp
movsbw 6(%esp), %ax
movw %ax, (%esp)
filds (%esp)
addl $2, %esp
ret
_sse before:
subl $12, %esp
movb 16(%esp), %al
movsbl %al, %eax
cvtsi2sd %eax, %xmm0
addl $12, %esp
ret
_sse after:
subl $12, %esp
movsbl 16(%esp), %eax
cvtsi2sd %eax, %xmm0
addl $12, %esp
ret
llvm-svn: 22452
2005-07-16 02:02:34 +00:00
Nate Begeman
7a1bc7318d
Teach the register allocator that movaps is also a move instruction
...
llvm-svn: 22451
2005-07-16 02:00:20 +00:00
Nate Begeman
c93c1c5148
A couple more darwinisms
...
llvm-svn: 22450
2005-07-16 01:59:47 +00:00
Chris Lattner
79573b1a93
Remove all knowledge of UINT_TO_FP from the X86 backend, relying on the
...
legalizer to eliminate them. With this comes the expected code quality
improvements, such as, for this:
double foo(unsigned short X) { return X; }
we now generate this:
_foo:
subl $4, %esp
movzwl 8(%esp), %eax
movl %eax, (%esp)
fildl (%esp)
addl $4, %esp
ret
instead of this:
_foo:
subl $4, %esp
movw 8(%esp), %ax
movzwl %ax, %eax ;; Load not folded into this.
movl %eax, (%esp)
fildl (%esp)
addl $4, %esp
ret
-Chris
llvm-svn: 22449
2005-07-16 00:28:20 +00:00
Nate Begeman
957e0e7c9e
Get closer to fully working scalar FP in SSE regs. This gets singlesource
...
working, and Olden/power.
llvm-svn: 22441
2005-07-15 00:38:55 +00:00
Nate Begeman
8c2dadc92e
Add support for printing the sse scalar comparison instruction mnemonics.
...
llvm-svn: 22440
2005-07-14 22:52:25 +00:00
Nate Begeman
7330d9cd80
Check in the last of the darwin-specific code necessary to get shootout
...
working before modifying the asm printer to use the subtarget info.
llvm-svn: 22408
2005-07-12 18:34:58 +00:00
Nate Begeman
4d96f2769c
Clean up the TargetSubtarget class a bit, removing an unnecessary argument
...
to the constructor.
llvm-svn: 22392
2005-07-12 02:41:19 +00:00
Chris Lattner
b383dec36f
Minor changes to improve comments and fix the build on _WIN32 systems.
...
llvm-svn: 22391
2005-07-12 02:36:10 +00:00
Chris Lattner
855fe2ea0c
Add a note
...
llvm-svn: 22390
2005-07-12 02:35:36 +00:00
Nate Begeman
626fb671c8
Implement Subtarget support
...
Implement the X86 Subtarget.
This consolidates the checks for target triple, and setting options based
on target triple into one place. This allows us to convert the asm printer
and isel over from being littered with "forDarwin", "forCygwin", etc. into
just having the appropriate flags for each subtarget feature controlling
the code for that feature.
This patch also implements indirect external and weak references in the
X86 pattern isel, for darwin. Next up is to convert over the asm printers
to use this new interface.
llvm-svn: 22389
2005-07-12 01:41:54 +00:00
Nate Begeman
faf9b5b763
Commit some pending darwin changes before subtarget support.
...
llvm-svn: 22388
2005-07-12 01:37:28 +00:00
Chris Lattner
cace336deb
Output .size directives to tell the assembler the size of each function.
...
llvm-svn: 22381
2005-07-11 06:29:14 +00:00
Chris Lattner
af83621722
Fix crazy indentation
...
llvm-svn: 22380
2005-07-11 06:25:47 +00:00
Chris Lattner
a556fc183f
Refactor things a bit to allow the ELF code emitter to run the X86 machine code emitter
...
after itself.
llvm-svn: 22376
2005-07-11 05:17:48 +00:00
Chris Lattner
41dbb3993d
Remove prototype for non-existant function
...
llvm-svn: 22372
2005-07-11 04:20:55 +00:00
Chris Lattner
ffaf40a143
Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode.
...
This is the last MVTSDNode.
This allows us to eliminate a bunch of special case code for handling
MVTSDNodes.
Also, remove some uses of dyn_cast that should really be cast (which is
cheaper in a release build).
llvm-svn: 22368
2005-07-10 01:56:13 +00:00
Chris Lattner
273b81e0c0
Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNode
...
llvm-svn: 22366
2005-07-10 00:29:18 +00:00
Nate Begeman
70532b9f00
Add support for assembling .s files on mac os x for intel
...
Add support for running bugpoint on mac os x for intel
llvm-svn: 22351
2005-07-08 00:23:26 +00:00
Chris Lattner
e45dd7850d
Restore some code that was accidentally removed by Nate's patch yesterday.
...
This fixes the regressions from last night.
llvm-svn: 22344
2005-07-07 17:12:53 +00:00
Nate Begeman
667588d524
Fix a typo in my checkin today that caused regressions. Oops!
...
llvm-svn: 22341
2005-07-07 06:32:01 +00:00
Nate Begeman
e5314eb2c2
First round of support for doing scalar FP using the SSE2 ISA extension and
...
XMM registers. There are many known deficiencies and fixmes, which will be
addressed ASAP. The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.
The x86 backend will still default to x87 style FP. To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.
An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
Sum += P[i]; return Sum; }
The inner loop looks like the following:
x87:
.LBB_foo_1: # no_exit
fldl (%esp)
faddl (%eax,%ecx,8)
fstpl (%esp)
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
SSE2:
addsd (%eax,%ecx,8), %xmm0
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
llvm-svn: 22340
2005-07-06 18:59:04 +00:00
Chris Lattner
199560c668
Make several cleanups to Andrews varargs change:
...
1. Pass Value*'s into lowering methods so that the proper pointers can be
added to load/stores from the valist
2. Intrinsics that return void should only return a token chain, not a token
chain/retval pair.
3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone.
4. Now that we have Value*'s available in the lowering methods, pass them
into any load/stores from the valist that are emitted
llvm-svn: 22339
2005-07-05 19:58:54 +00:00
Chris Lattner
f8faaa8a39
Fit to 80 columns
...
llvm-svn: 22336
2005-07-05 17:50:16 +00:00
Chris Lattner
93a2576078
Percolate the call up to the right superclass
...
llvm-svn: 22330
2005-07-03 17:34:39 +00:00
Nate Begeman
12d2961fd2
The statistic needs to be in the correct namespace.
...
llvm-svn: 22327
2005-07-01 23:56:38 +00:00
Chris Lattner
b299933fc7
Refactor X86AsmPrinter.cpp into multiple files. Patch contributed
...
by Aaron Gray, cleaned up by me.
llvm-svn: 22324
2005-07-01 22:44:09 +00:00
Nate Begeman
31e3028bac
Make the x86 asm printer darwin-aware. This mostly entails doing the same
...
thing as cygwin most of the time, and printing our alignments in log2
rather than number of bytes.
llvm-svn: 22316
2005-06-30 00:53:20 +00:00
Nate Begeman
032a94775d
Initial set of .td file changes necessary to get scalar fp in xmm registers
...
working. The instruction selector changes will hopefully be coming later
this week once they are debugged. This is necessary to support the darwin
x86 FP model, and is recommended by intel as the replacement for x87. As
a bonus, the register allocator knows how to deal with these registers
across basic blocks, unliky the FP stackifier. This leads to significantly
better codegen in several cases.
llvm-svn: 22300
2005-06-27 21:20:31 +00:00
Chris Lattner
cd6b5c5011
Add support to the X86 backend for emitting ELF files. To use this, we
...
currently use: llc t.bc --filetype=obj
This will produce a t.o file which is dumpable with readelf. Currently
the file produced is empty, but the scaffolding to do more is now in place.
llvm-svn: 22292
2005-06-27 06:30:12 +00:00
Chris Lattner
06282f51cf
Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile
...
interface.
llvm-svn: 22282
2005-06-25 02:48:37 +00:00
Andrew Lenharth
4fd2bde906
If we support structs as va_list, we must pass pointers to them to va_copy
...
See last commit for LangRef, this implements it on all targets.
llvm-svn: 22273
2005-06-22 21:04:42 +00:00
John Criswell
00c8485c77
Fixed indentation.
...
llvm-svn: 22270
2005-06-20 19:59:22 +00:00
Andrew Lenharth
a9214fec08
core changes for varargs
...
llvm-svn: 22254
2005-06-18 18:34:52 +00:00
Chris Lattner
dce633f2dd
silence a bogus warning
...
llvm-svn: 22245
2005-06-17 13:23:32 +00:00
Nate Begeman
023a21ea32
Fix lli linking on Mac OS X 10.4.1 for Intel.
...
llvm-svn: 22200
2005-06-08 01:02:38 +00:00
Reid Spencer
966f750ad2
Make sure that Cygwin assembly includes _ as part of function names.
...
llvm-svn: 22190
2005-06-02 21:33:19 +00:00
Nate Begeman
f6e0f54d70
C'mon everybody, let's modify X86JITInfo.cpp. This time, we add <iostream>
...
so that the shiny new use of std::cerr is defined.
llvm-svn: 22156
2005-05-20 21:29:24 +00:00
Misha Brukman
48ca8224da
Since everyone else has "fixed" this file, might as well join in the fun.
...
* Change assert() to std::cerr printout, as it will not appear in opt builds
* Add comments to clarify what #ifdef/#else/#endif match what condition(s)
llvm-svn: 22154
2005-05-20 19:46:50 +00:00
Chris Lattner
f1479ae390
Fix this a 3rd time :)
...
llvm-svn: 22151
2005-05-20 17:00:21 +00:00
Andrew Lenharth
46b9d601f5
fix compilation error due to no abort being defined. There is probably a better way to do this
...
llvm-svn: 22150
2005-05-20 16:34:44 +00:00
Duraid Madina
c043395fe8
this seems dead (and broke the ia64 build, so..)
...
llvm-svn: 22147
2005-05-20 06:21:59 +00:00
Jeff Cohen
a0f463a25c
Fix tail call support in VC++ builds
...
llvm-svn: 22143
2005-05-20 01:35:39 +00:00
Chris Lattner
c1d9b43fc1
Fastcc passes arguments in EAX and EDX, make sure the JIT doesn't clobber them
...
llvm-svn: 22137
2005-05-19 06:49:17 +00:00
Chris Lattner
6dcae1c96e
Tailcalls require stubs to be emitted. Otherwise, the compilation callback
...
doesn't know who 'called' it.
llvm-svn: 22136
2005-05-19 05:54:33 +00:00
Chris Lattner
95650a26b2
don't reserve space for tailcall arg areas. It explicitly managed.
...
llvm-svn: 22050
2005-05-15 06:07:10 +00:00
Chris Lattner
2fd2e53f6a
Teach reginfo how to deal with ADJSTACKPTRri, allowing us to generate:
...
add %ESP, 20
jmp %EDX # TAIL CALL
instead of:
add %ESP, -8
add %ESP, 28
jmp %EDX # TAIL CALL
llvm-svn: 22047
2005-05-15 05:49:58 +00:00
Chris Lattner
77f8c2cece
Implement proper tail calls in the X86 backend for all fastcc->fastcc
...
tail calls.
llvm-svn: 22046
2005-05-15 05:46:45 +00:00
Chris Lattner
7327c042b4
Add markers in the asm file for tail calls, add a new ADJSTACKPTRri
...
sorta-pseudo-instruction
llvm-svn: 22042
2005-05-15 03:10:37 +00:00
Chris Lattner
64232a8480
Yes, calltarget is the operand of the day.
...
llvm-svn: 22040
2005-05-15 01:10:30 +00:00
Chris Lattner
adb31a99fa
When emitting the function epilog, check to see if there already a stack
...
adjustment. If so, we merge the adjustment into the existing one. This
allows us to generate:
caller2:
sub %ESP, 12
mov DWORD PTR [%ESP], 0
mov %EAX, 1234567890
mov %EDX, 0
call func2
add %ESP, 8
ret 4
intead of:
caller2:
sub %ESP, 12
mov DWORD PTR [%ESP], 0
mov %EAX, 1234567890
mov %EDX, 0
call func2
sub %ESP, 4
add %ESP, 12
ret 4
for X86/fast-cc-merge-stack-adj.ll
llvm-svn: 22038
2005-05-14 23:53:43 +00:00
Chris Lattner
37e226fa9b
Add some new instructions
...
llvm-svn: 22036
2005-05-14 23:35:21 +00:00
Chris Lattner
9d106c705d
Pass i64 values correctly split in reg/mem to fastcc calls.
...
This fixes fourinarow with -enable-x86-fastcc.
llvm-svn: 22022
2005-05-14 12:03:10 +00:00
Chris Lattner
adde8b1a71
Use target-specific nodes for calls. This allows the fastcc code to not have
...
to do ugly hackery to avoid emitting code like this:
call foo
mov vreg, EAX
adjcallstackup ...
If foo is a fastcc call and if vreg gets spilled, we might end up with this:
call foo
mov [ESP+offset], EAX ;; Offset doesn't consider the 12!
sub ESP, 12
Which is bad. The previous hacky code to deal with this was A) gross B) not
good enough. In particular, it could miss cases and emit the bad code above.
Now we always emit this:
call foo
adjcallstackup ...
mov vreg, EAX
directly.
This makes fastcc with callees poping the stack work much better. Next
stop (finally!) really is tail calls.
llvm-svn: 22021
2005-05-14 08:48:15 +00:00
Chris Lattner
c0c6680744
use a target-specific node and custom expander to lower long->FP to FILD64m.
...
This should fix some missing symbols problems on BSD and improve performance
of programs that use that operation.
llvm-svn: 22012
2005-05-14 06:52:07 +00:00
Chris Lattner
2210f7d6e9
Make sure the start of the arg area and the end (after the RA is pushed)
...
is always 8-byte aligned for fastcc
llvm-svn: 21995
2005-05-13 23:49:10 +00:00
Chris Lattner
1634435c77
fix typo
...
llvm-svn: 21991
2005-05-13 22:46:57 +00:00
Chris Lattner
0d4b08e470
Fix the problems with callee popped argument lists
...
llvm-svn: 21988
2005-05-13 22:13:49 +00:00
Chris Lattner
e667c34ef1
Don't emit SAR X, 0 in the case of sdiv Y, 2
...
llvm-svn: 21986
2005-05-13 21:50:27 +00:00
Chris Lattner
fc630bb4f0
Fix UnitTests/2005-05-13-SDivTwo.c
...
llvm-svn: 21985
2005-05-13 21:48:20 +00:00
Chris Lattner
62593e4e66
switch to having the callee pop stack operands for fastcc. This is currently buggy
...
do not use
llvm-svn: 21984
2005-05-13 21:44:04 +00:00
Chris Lattner
e9944b033d
allow RETI
...
llvm-svn: 21980
2005-05-13 20:46:35 +00:00
Chris Lattner
2c9d871f9b
Build TAILCALL nodes in LowerCallTo, treat them like normal calls everywhere.
...
llvm-svn: 21976
2005-05-13 20:29:13 +00:00
Chris Lattner
9d788e93a6
Add an isTailCall flag to LowerCallTo
...
llvm-svn: 21958
2005-05-13 18:50:42 +00:00
Chris Lattner
83d7e55471
add 'ret imm' instruction
...
llvm-svn: 21945
2005-05-13 17:56:48 +00:00
Chris Lattner
7c3b219c28
Do not CopyFromReg physregs for live-in values. Instead, create a vreg for
...
each live in, and copy the regs from the vregs. As the very first thing we
do in the function, insert copies from the pregs to the vregs. This fixes
problems where the token chain of CopyFromReg was not enough to allow reordering
of the copyfromreg nodes and other unchained nodes (e.g. div, which clobbers
eax on intel).
llvm-svn: 21932
2005-05-13 07:38:09 +00:00
Chris Lattner
094bbfcebb
rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN.
...
llvm-svn: 21915
2005-05-12 23:24:06 +00:00
Chris Lattner
3106dfa185
Add a new -enable-x86-fastcc option that enables passing the first
...
two integer values in registers for the fastcc calling conv.
llvm-svn: 21912
2005-05-12 23:06:28 +00:00
Chris Lattner
7e08dd591c
Pass in Calling Convention to use into LowerCallTo
...
llvm-svn: 21899
2005-05-12 19:56:45 +00:00
Chris Lattner
d8766cdae2
Enable pattern isel by default
...
llvm-svn: 21898
2005-05-12 19:56:09 +00:00
Chris Lattner
e358ac532b
X86 has more than just 32-bit registers
...
llvm-svn: 21857
2005-05-11 05:00:34 +00:00
Chris Lattner
8230bddde2
Convert feature of the simple isel over for the pattern isel to use.
...
llvm-svn: 21840
2005-05-10 03:53:18 +00:00
Jeff Cohen
afc58006b7
Silence some VC++ warnings
...
llvm-svn: 21838
2005-05-10 02:22:38 +00:00
Chris Lattner
d96aea21d7
Implement READPORT/WRITEPORT, implementing the last X86 regression tests
...
that were failing with the pattern selector. Note that the support that
existed in the simple selector was clearly broken in several ways though
(which has also been fixed).
llvm-svn: 21831
2005-05-09 21:17:38 +00:00
Chris Lattner
6a55b1d4dd
do not emit illegal instructions
...
llvm-svn: 21830
2005-05-09 21:06:04 +00:00
Chris Lattner
7ba0699b05
Fix the syntax of the i/o instructions, these are obviously unused.
...
llvm-svn: 21829
2005-05-09 20:49:20 +00:00
Chris Lattner
46b51ab388
legalize readio/writeio into load/stores, fixing CodeGen/X86/io.llx with
...
the pattern isel.
llvm-svn: 21828
2005-05-09 20:37:29 +00:00
Chris Lattner
b28f865865
restore some non-dead code I removed last night breaking double casts to
...
uint
llvm-svn: 21821
2005-05-09 18:37:02 +00:00
Chris Lattner
3094cec3c9
Wrap long lines, remove dead code that is now handled by legalize
...
llvm-svn: 21811
2005-05-09 05:40:26 +00:00
Chris Lattner
5d291fa443
Fix FP -> bool casts
...
llvm-svn: 21810
2005-05-09 05:33:18 +00:00
Chris Lattner
65d61d9d44
Fix X86/2005-05-08-FPStackifierPHI.ll: ugly gross hack.
...
llvm-svn: 21801
2005-05-09 03:36:39 +00:00
Andrew Lenharth
8e2beec4d1
fix typo
...
llvm-svn: 21693
2005-05-04 19:25:37 +00:00
Andrew Lenharth
8b64bd0fd5
Implement count leading zeros (ctlz), count trailing zeros (cttz), and count
...
population (ctpop). Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.
More coming soon.
llvm-svn: 21676
2005-05-03 17:19:30 +00:00
Chris Lattner
15d29b0220
Add support for FSIN/FCOS when unsafe math ops are enabled. Patch contributed by
...
Morten Ofstad!
llvm-svn: 21632
2005-04-30 04:25:35 +00:00
Chris Lattner
663664d10c
Add support for llvm.sqrt and sin/cos if unsafe math optimizations are enabled.
...
llvm-svn: 21631
2005-04-30 04:12:40 +00:00
Chris Lattner
27a534f181
Add support for FSQRT node, patch contributed by Morten Ofstad
...
llvm-svn: 21610
2005-04-28 22:07:18 +00:00
Chris Lattner
236cef3563
Add some new X86 instrs, patch contributed by Morten Ofstad
...
llvm-svn: 21608
2005-04-28 21:50:05 +00:00
Chris Lattner
2f7a83ffbf
Codegen fabs/fabsf as FABS. Patch contributed by Morten Ofstad
...
llvm-svn: 21607
2005-04-28 21:48:42 +00:00
Andrew Lenharth
2a00530fa7
Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends.
...
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*. Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.
llvm-svn: 21599
2005-04-27 20:10:01 +00:00
Misha Brukman
bf3f6181fd
* Remove trailing whitespace
...
* Convert tabs to spaces
llvm-svn: 21426
2005-04-21 23:38:14 +00:00
Chris Lattner
8d813a7d51
Handle stores of global address as stores of immediates. Instead of:
...
test1:
movl $N, %eax
movl %eax, G
ret
emit:
test1:
movl $N, G
ret
llvm-svn: 21407
2005-04-21 19:11:03 +00:00
Chris Lattner
706775467b
Handle (store &GV -> mem) as a store immediate. This often occurs for
...
printf format strings and other stuff. Instead of generating this:
movl $l1__2E_str_1, %eax
movl %eax, (%esp)
we now emit:
movl $l1__2E_str_1, (%esp)
llvm-svn: 21406
2005-04-21 19:03:24 +00:00
Nate Begeman
ecb5b5c028
Make pattern isel default for ppc
...
Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
0 == off
1 == on
2 == target default
llvm-svn: 21309
2005-04-15 22:12:16 +00:00
Chris Lattner
85c6a7bed0
Fix some mysteriously missing {}'s which cause the miscompilation of
...
Olden/mst, Ptrdist/bc, Obsequi, etc.
llvm-svn: 21274
2005-04-13 03:29:53 +00:00
Chris Lattner
f25fefd9cf
Z_E_I is gone
...
llvm-svn: 21267
2005-04-13 02:39:05 +00:00
Chris Lattner
fd4d6e0847
Use live out sets for return values instead of imp_defs, which is cleaner and faster.
...
llvm-svn: 21181
2005-04-09 15:23:56 +00:00
Chris Lattner
39f963f968
This target does not support/want ISD::BRCONDTWOWAY
...
llvm-svn: 21164
2005-04-09 03:22:37 +00:00
Chris Lattner
583dcc66f2
X86 zero extends setcc results
...
llvm-svn: 21146
2005-04-07 19:41:46 +00:00
Chris Lattner
40ee8a062b
Fix SingleSource/Regression/C/2005-05-06-LongLongSignedShift.c, we were not
...
properly sign extending the top of the result of a 64-bit shift right by
a constant > 32.
llvm-svn: 21120
2005-04-06 20:59:35 +00:00
Chris Lattner
c87ff88efb
Add (untested) support for MULHS and MULHU.
...
llvm-svn: 21107
2005-04-06 04:21:07 +00:00
Chris Lattner
ba7cdbebb1
add signed versions of the extra precision multiplies
...
llvm-svn: 21106
2005-04-06 04:19:22 +00:00
Chris Lattner
8f30d63c1a
add support for FABS and FNEG
...
llvm-svn: 21015
2005-04-02 05:30:17 +00:00
Chris Lattner
a5d4718875
This target doesn't support fabs/fneg yet.
...
llvm-svn: 21010
2005-04-02 05:03:24 +00:00
Chris Lattner
71434aa2dd
add an fabs instr
...
llvm-svn: 21006
2005-04-02 04:31:56 +00:00
Chris Lattner
8ee783d9f0
Add support for 64-bit shifts.
...
llvm-svn: 21005
2005-04-02 04:01:14 +00:00
Chris Lattner
67da3fdb70
Add support for ISD::UNDEF to the X86 be
...
llvm-svn: 20990
2005-04-01 22:46:45 +00:00
Chris Lattner
46c4246df1
don't depend on the cfg being set up yet
...
llvm-svn: 20936
2005-03-30 01:10:00 +00:00
Nate Begeman
f821401825
Change interface to LowerCallTo to take a boolean isVarArg argument.
...
llvm-svn: 20842
2005-03-26 01:29:23 +00:00
Chris Lattner
ad07b1bc54
eliminate dead variables, patch contributed by Gabor Greif!
...
llvm-svn: 20812
2005-03-24 17:32:20 +00:00
Nate Begeman
175a9f1cc6
Remove comments that are now meaningless from the pattern ISels, at Chris's
...
request.
llvm-svn: 20804
2005-03-24 04:39:54 +00:00
Chris Lattner
79ba9d58fd
Don't emit two comparisons when comparing a FP value against zero!
...
llvm-svn: 20651
2005-03-17 16:29:26 +00:00
Chris Lattner
c9a3ea81bf
Fix the missing symbols problem Bill was hitting. Patch contributed by
...
Bill Wendling!!
llvm-svn: 20649
2005-03-17 15:38:16 +00:00
Chris Lattner
4b688a1c70
This mega patch converts us from using Function::a{iterator|begin|end} to
...
using Function::arg_{iterator|begin|end}. Likewise Module::g* -> Module::global_*.
This patch is contributed by Gabor Greif, thanks!
llvm-svn: 20597
2005-03-15 04:54:21 +00:00
Reid Spencer
b0ca4aa8cd
Patch to make assembly output compatible with mingw compilation (identical
...
to cygwin)
llvm-svn: 20520
2005-03-08 17:02:05 +00:00
Chris Lattner
a024984017
Fix spelling, patch contributed by Gabor Greif!
...
llvm-svn: 20343
2005-02-27 06:18:25 +00:00