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9208 Commits

Author SHA1 Message Date
Bill Wendling
618d422cdd Just don't transform this memset into "bzero" if no-builtin is specified. 
llvm-svn: 56888
 2008-09-30 22:05:33 +00:00
Bill Wendling
9ad453e943 Add the new `-no-builtin' flag. This flag is meant to mimic the GCC 
`-fno-builtin' flag. Currently, it's used to replace "memset" with "_bzero"
instead of "__bzero" on Darwin10+. This arguably violates the meaning of this
flag, but is currently sufficient. The meaning of this flag should become more
specific over time.

llvm-svn: 56885
 2008-09-30 21:22:07 +00:00
Dan Gohman
5a2169ee6e Optimize SelectionDAG's AssignTopologicalOrder even further. 
Completely eliminate the TopOrder std::vector. Instead, sort
the AllNodes list in place. This also eliminates the need to
call AllNodes.size(), a linear-time operation, before
performing the sort.

Also, eliminate the Sources temporary std::vector, since it
essentially duplicates the sorted result as it is being
built.

This also changes the direction of the topological sort
from bottom-up to top-down. The AllNodes list starts out in
roughly top-down order, so this reduces the amount of
reordering needed. Top-down is also more convenient for
Legalize, and ISel needed only minor adjustments.

llvm-svn: 56867
 2008-09-30 18:30:35 +00:00
Dan Gohman
b5824675e4 Fix X86FastISel's output for x86-32 PIC constant pool addresses. 
llvm-svn: 56829
 2008-09-30 01:21:32 +00:00
Dan Gohman
c28f40a821 Move the GlobalBaseReg field out of X86ISelDAGToDAG.cpp 
and X86FastISel.cpp into X86MachineFunction.h, so that it
can be shared, instead of having each selector keep track
of its own.

llvm-svn: 56825
 2008-09-30 00:58:23 +00:00
Dan Gohman
e76be890c9 Disable all x87 usage, including f32 and f64 when the subtarget 
doesn't have SSE(2), with X86FastISel.

llvm-svn: 56823
 2008-09-30 00:48:39 +00:00
Dale Johannesen
52987eab6e Remove misuse of ReplaceNodeResults for atomics with 
valid types.  No functional change.

llvm-svn: 56808
 2008-09-29 22:25:26 +00:00
Dan Gohman
c6184c4473 Fix an over-pessimization about GlobalVariable addresses in X86FastISel. 
llvm-svn: 56802
 2008-09-29 21:13:15 +00:00
Evan Cheng
b749199c34 Fix PR2835. Do not change the width of a volatile load. 
llvm-svn: 56792
 2008-09-29 17:26:18 +00:00
Duncan Sands
651eeb4be2 Rename isWeakForLinker to mayBeOverridden. Use it 
instead of hasWeakLinkage in a bunch of optimization
passes.

llvm-svn: 56782
 2008-09-29 11:25:42 +00:00
Evan Cheng
28d9b3a8ad Re-apply 56683 with fixes. 
llvm-svn: 56748
 2008-09-27 01:56:22 +00:00
Daniel Dunbar
dc1d75b1b5 Unbreak build. 
llvm-svn: 56727
 2008-09-27 00:22:09 +00:00
Devang Patel
47a504c87c Implement function notes as function attributes. 
llvm-svn: 56716
 2008-09-26 23:51:19 +00:00
Evan Cheng
d63fc80c1e Implement "punpckldq %xmm0, $xmm0" as "pshufd $0x50, %xmm0, %xmm" unless optimizing for code size. 
llvm-svn: 56711
 2008-09-26 23:41:32 +00:00
Bill Wendling
7273078850 Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc: 
/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition  -isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include  -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...

llvm-svn: 56703
 2008-09-26 22:10:44 +00:00
Dan Gohman
989db64c93 Rename ConstantSDNode's getSignExtended to getSExtValue, for 
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.

llvm-svn: 56700
 2008-09-26 21:54:37 +00:00
Dan Gohman
3bcb327e9c Mark lea fi# as being really rematerializable. 
llvm-svn: 56698
 2008-09-26 21:30:20 +00:00
Evan Cheng
5ce14d532c unpckhps requires sse1, punpckhdq requires sse2. 
llvm-svn: 56697
 2008-09-26 21:26:30 +00:00
Dan Gohman
401470e0c7 Fix X86FastISel's address folding to check displacement 
values for overflow.

llvm-svn: 56686
 2008-09-26 20:04:15 +00:00
Evan Cheng
9946443460 Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0. 
llvm-svn: 56683
 2008-09-26 19:48:35 +00:00
Oscar Fuentes
94d058ba4a CMake: Builds all examples. Corrected name of CBackend target. 
llvm-svn: 56682
 2008-09-26 19:48:03 +00:00
Dale Johannesen
3f62c40108 Add "inreg" field to CallSDNode (doesn't increase 
its size).  Adjust various lowering functions to
pass this info through from CallInst.  Use it to
implement sseregparm returns on X86.  Remove
X86_ssecall calling convention.

llvm-svn: 56677
 2008-09-26 19:31:26 +00:00
Dan Gohman
56b0c33a9d Factor out the code for determining when symblic addresses 
require RIP-relative addressing and use it to fix a bug
in X86FastISel in x86-64 PIC mode, where it was trying to
use base/index registers with RIP-relative addresses. This
fixes a bunch of x86-64 testsuite failures.

llvm-svn: 56676
 2008-09-26 19:15:30 +00:00
Evan Cheng
b4d6625c85 Avoid spilling EBP / RBP twice in the prologue. 
llvm-svn: 56675
 2008-09-26 19:14:21 +00:00
Evan Cheng
0d612aad67 X86 address displacement field must be interpreted as a 32-bit value. 
llvm-svn: 56665
 2008-09-26 16:58:16 +00:00
Oscar Fuentes
65859a84d0 CMake: Builds all targets. 
llvm-svn: 56641
 2008-09-26 04:40:32 +00:00
Dan Gohman
37bd5a0d40 Disable support for x86_f80 in X86FastISel. Supporting it would 
require more work.

llvm-svn: 56637
 2008-09-26 01:39:32 +00:00
Bill Wendling
bf75299f0a If we have a function with an unreachable statement such that the ending debug 
information is in an unreachable block, then it's possible that the high/low pc
values won't be set for the dwarf information. E.g., this function:

void abort(void) __attribute__((__noreturn__));
void dead_beef(void) __attribute__ ((noreturn));

int *b;

void dead_beef(void) {
  *b=0xdeadbeef;
  abort();
}

has a call to "@llvm.dbg.region.end" only in the unreachable block:

define void @dead_beef() noreturn nounwind  {
entry:
	call void @llvm.dbg.func.start(...)
	call void @llvm.dbg.stoppoint(...)
...
	call void @abort( ) noreturn nounwind 
	unreachable

return:		; No predecessors!
	call void @llvm.dbg.stoppoint(...)
	call void @llvm.dbg.region.end(...)
	ret void
}

The dwarf information emitted is something like:

0x00000084:     TAG_subprogram [5]  
                 AT_name( "dead_beef" )
                 AT_external( 0x01 )
                 AT_prototyped( 0x01 )
                 AT_decl_file( 0x01 )
                 AT_decl_line( 0x08 )

Note that this is *not* the best fix for this problem, but a band-aid for an
gaping wound. This code needs to be changed when we revamp our debugging
information.

llvm-svn: 56628
 2008-09-26 00:28:12 +00:00
Evan Cheng
c8674dcfd0 Prefer movlhps over punpcklqdq, etc. in more cases. 
llvm-svn: 56627
 2008-09-25 23:35:16 +00:00
Dan Gohman
524c506db3 Fix a bug in which address displacements were being added to the 
load from the stub, instead of the result of the load from the stub.

llvm-svn: 56626
 2008-09-25 23:34:02 +00:00
Devang Patel
64dd7a2e89 Large mechanical patch. 
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g

This sets the stage 
- to implement function notes as function attributes and 
- to distinguish between function attributes and return value attributes.

This requires corresponding changes in llvm-gcc and clang.

llvm-svn: 56622
 2008-09-25 21:00:45 +00:00
Anton Korobeynikov
7367de00cf Reapply 56585:56589 with proper fix for some gcc versions 
llvm-svn: 56621
 2008-09-25 21:00:33 +00:00
Evan Cheng
d190aeb62d With sse3 and when the source is a load or has multiple uses, favors movddup over shuffp*, pshufd, etc. Without sse3 or when the source is from a register, make use of movlhps 
llvm-svn: 56620
 2008-09-25 20:50:48 +00:00
Dale Johannesen
62f64ab4c8 Accept 'inreg' attribute on x86 functions as 
meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0).  Update documentation
to reflect reality.

llvm-svn: 56619
 2008-09-25 20:47:45 +00:00
Dan Gohman
6f5c6be90f PIC support in X86FastISel. 
llvm-svn: 56608
 2008-09-25 15:24:26 +00:00
Evan Cheng
12a67b5226 Temporarily backing out 56585:56589 to unbreak the build. 
llvm-svn: 56607
 2008-09-25 07:38:08 +00:00
Evan Cheng
d8a6a7beaa pmovsxbq etc. requires sse4.1. 
llvm-svn: 56600
 2008-09-25 00:49:51 +00:00
Evan Cheng
efd1f614ff Fix patterns for SSE4.1 move and sign extend instructions. Also add instructions which fold VZEXT_MOVL and VZEXT_LOAD. 
llvm-svn: 56594
 2008-09-24 23:27:55 +00:00
Evan Cheng
1d0ed88bf9 X86ISD::VZEXT_LOAD should produce and fold a chain. 
llvm-svn: 56593
 2008-09-24 23:26:36 +00:00
Anton Korobeynikov
ff74ae04b1 Minor cleanup 
llvm-svn: 56588
 2008-09-24 22:22:54 +00:00
Anton Korobeynikov
1c1eeb6b7b Get rid of virtual inheritance for ARM TAI 
llvm-svn: 56587
 2008-09-24 22:22:27 +00:00
Anton Korobeynikov
3f07365446 Get rid of virtual inheritance for PPC TAI 
llvm-svn: 56586
 2008-09-24 22:22:03 +00:00
Anton Korobeynikov
9e5cbcc134 Use crazy template-based inheritance instead of virtual one. 
llvm-svn: 56585
 2008-09-24 22:21:39 +00:00
Anton Korobeynikov
b9294473f0 Get rid of ReadOnlySection duplicate 
llvm-svn: 56582
 2008-09-24 22:20:27 +00:00
Anton Korobeynikov
abf1e5277b Use named sections, where they should be 
llvm-svn: 56581
 2008-09-24 22:19:13 +00:00
Anton Korobeynikov
9b9c3a38ad Get rid of now unused {Four,Eight,Sixteen}ByteConstantSection 
llvm-svn: 56580
 2008-09-24 22:18:54 +00:00
Anton Korobeynikov
154a35a723 Cleanup 
llvm-svn: 56578
 2008-09-24 22:17:27 +00:00
Anton Korobeynikov
1b3c67c5cf Get rid of duplicate char*/Section* stuff for TLS sections 
llvm-svn: 56577
 2008-09-24 22:17:06 +00:00
Anton Korobeynikov
021a7eed86 Cleanup, no functionality change 
llvm-svn: 56576
 2008-09-24 22:16:33 +00:00
Anton Korobeynikov
dca16f3acf Get rid of duplicate char*/Section* DataSection 
llvm-svn: 56575
 2008-09-24 22:16:16 +00:00
Anton Korobeynikov
83fa257f55 Get rid of duplicate char*/Section* TextSection 
llvm-svn: 56574
 2008-09-24 22:15:21 +00:00
Anton Korobeynikov
c7ac49c632 Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic. 
llvm-svn: 56573
 2008-09-24 22:14:23 +00:00
Anton Korobeynikov
9e5d24042c Drop obsolete hook and change all usage to new interface 
llvm-svn: 56572
 2008-09-24 22:13:07 +00:00
Anton Korobeynikov
5c9283696b SPU section handling is really huge mess. Replace remaining TAI calls for sections with explicit names in order not to block existing backends during section handling migration. SPU folks! Please consider using new section handling facility someday. 
llvm-svn: 56570
 2008-09-24 22:11:42 +00:00
Anton Korobeynikov
a76d9f547f Remove dead code for PIC16 (preparation to switch to new section handling stuff) 
llvm-svn: 56569
 2008-09-24 22:11:26 +00:00
Anton Korobeynikov
24b906c8a3 XMM6-XMM15 are callee-saved on Win64. Patch by Nicolas Capens! 
llvm-svn: 56568
 2008-09-24 22:03:04 +00:00
Devang Patel
f0bda74eca s/ParamAttrsWithIndex/FnAttributeWithIndex/g 
llvm-svn: 56535
 2008-09-24 00:55:02 +00:00
Devang Patel
25ecdc49d9 Put FN_NOTE_AlwaysInline and others in FnAttr namespace. 
llvm-svn: 56527
 2008-09-24 00:06:15 +00:00
Evan Cheng
f942615847 Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc. 
llvm-svn: 56526
 2008-09-24 00:05:32 +00:00
Devang Patel
b39defd763 Move FN_NOTE_AlwaysInline and other out of ParamAttrs namespace. 
Do not check isDeclaration() in hasNote(). It is clients' responsibility.

llvm-svn: 56524
 2008-09-23 23:52:03 +00:00
Devang Patel
a3e9bf1bca s/ParameterAttributes/Attributes/g 
llvm-svn: 56513
 2008-09-23 23:03:40 +00:00
Devang Patel
ad8ca34acd Use parameter attribute store (soon to be renamed) for 
Function Notes also. Function notes are stored at index ~0.

llvm-svn: 56511
 2008-09-23 22:35:17 +00:00
Dan Gohman
01a070f9c7 Arrange for FastISel code to have access to the MachineModuleInfo 
object. This will be needed to support debug info.

llvm-svn: 56508
 2008-09-23 21:53:34 +00:00
Dan Gohman
a712c8d29e Fix these enums' starting values to reflect the way that 
instruction opcodes are now numbered. No functionality change.

llvm-svn: 56497
 2008-09-23 18:42:32 +00:00
Dan Gohman
e21054687a Delete an unused function. 
llvm-svn: 56495
 2008-09-23 18:26:47 +00:00
Dan Gohman
6bed18a334 Move the code for initializing the global base reg out of 
X86ISelDAGToDAG.cpp and into X86InstrInfo.cpp. This will allow
it to be reused by FastISel.

llvm-svn: 56494
 2008-09-23 18:22:58 +00:00
Matthijs Kooijman
5782b4b1b0 Fix indendation. 
llvm-svn: 56486
 2008-09-23 08:54:41 +00:00
Evan Cheng
5bf702d20a Support x86 specific inline asm modifier 'J'. 
llvm-svn: 56483
 2008-09-22 23:57:37 +00:00
Devang Patel
c7fc5ed65f Add hasNote() to check note associated with a function. 
llvm-svn: 56477
 2008-09-22 22:32:29 +00:00
Evan Cheng
1ded8b6ad6 Instead of setPreservesAll, just mark them preseving machine loop info and machine dominators. 
llvm-svn: 56475
 2008-09-22 22:21:38 +00:00
Dale Johannesen
3722f4c14c Make log, log2, log10, exp, exp2 use Expand by 
default.

llvm-svn: 56471
 2008-09-22 21:57:32 +00:00
Evan Cheng
3bcf0cdd72 Mark several codegen passes as preserving all analysis. 
llvm-svn: 56469
 2008-09-22 20:58:04 +00:00
Oscar Fuentes
e51d9c0c3a CMake build system: support for parallel builds. 
llvm-svn: 56453
 2008-09-22 18:21:51 +00:00
Arnold Schwaighofer
49f49e2086 Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC. 
llvm-svn: 56436
 2008-09-22 14:50:07 +00:00
Oscar Fuentes
0f25988689 Initial support for the CMake build system. 
llvm-svn: 56419
 2008-09-22 01:08:49 +00:00
Chris Lattner
6e5b4c609c Fold immediates into X86 shifts with fast isel. This generates: 
sarl    $3, %ecx

instead of:

movl    $3, %ecx
sarl    %cl, %edx

This shrinks fast isel 176.gcc by about 2000 instructions (.3%)

llvm-svn: 56413
 2008-09-21 21:44:29 +00:00
Dan Gohman
c8477ceabe Instead of building a list and sorting it just to find a maximum element, 
compute the maximum element directly.

llvm-svn: 56411
 2008-09-21 21:01:49 +00:00
Chris Lattner
c018045520 add a note 
llvm-svn: 56391
 2008-09-20 19:17:53 +00:00
Evan Cheng
6a86ec1ef0 No need to print function stubs for Mac OS X 10.5 and up. Linker will handle it. 
llvm-svn: 56378
 2008-09-20 00:13:45 +00:00
Evan Cheng
7bcd8409b7 80 column violation. 
llvm-svn: 56377
 2008-09-20 00:13:08 +00:00
Dan Gohman
af1eeb6421 Fix a FastISel GlobalVariable CSE bug. 
llvm-svn: 56376
 2008-09-19 23:42:04 +00:00
Dan Gohman
f66b3277d3 Refactor X86SelectConstAddr, folding it into X86SelectAddress. This 
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.

llvm-svn: 56371
 2008-09-19 22:16:54 +00:00
Dan Gohman
71b1f15917 Address-mode folding for X86FastISel. It's pretty basic, but it 
catches a fair number of common cases. Note that this currently
causes Fast-ISel to leave behind lots of dead instructions.
Those will be dealt with in subsequent commits.

llvm-svn: 56320
 2008-09-18 23:23:44 +00:00
Dan Gohman
e1c4ad399a Simplify this code. The FastISel class has its own TD member. 
llvm-svn: 56311
 2008-09-18 18:26:43 +00:00
Evan Cheng
6acdef5d11 Duh. Default to ARMCC::AL (always). 
llvm-svn: 56301
 2008-09-18 07:28:19 +00:00
Evan Cheng
99a186e39f Clean up. 
llvm-svn: 56300
 2008-09-18 07:27:23 +00:00
Evan Cheng
b44e839f76 Cosmetic. 
llvm-svn: 56299
 2008-09-18 07:24:33 +00:00
Dan Gohman
5fbd0e95f3 FastISel: For calls, prefer using the callee's address as a constant 
over having it in a register. And wait until after checking type
legality before requesting that the callee address be placed in a
register. Also, fix support for calls with void return type.

This speeds up fast-isel isel time by about 15% and reduces
instruction counts by about 3% overall on certain testcases. It also
changes many indirect calls to direct calls.

llvm-svn: 56292
 2008-09-17 21:18:49 +00:00
Evan Cheng
f2c04a10e6 Fix addrmode1 instruction encodings; fix bx_ret encoding. 
llvm-svn: 56277
 2008-09-17 07:53:38 +00:00
Evan Cheng
d268288d39 Specify instruction encoding using range list to avoid endianess issues. 
llvm-svn: 56276
 2008-09-17 07:16:21 +00:00
Dan Gohman
9475c22537 Simplify and generalize X86DAGToDAGISel::CanBeFoldedBy, and draw 
up some new ascii art to illustrate what it does. This change
currently has no effect on generated code.

llvm-svn: 56270
 2008-09-17 01:39:10 +00:00
Bill Wendling
b2701e541c Add trampoline support to PPC. GCC simply calls the "__trampoline_setup" 
function with appropriate parameters. This allows us to support blocks on PPC.

llvm-svn: 56267
 2008-09-17 00:30:57 +00:00
Bill Wendling
932818c75a Reverting r56249. On further investigation, this functionality isn't needed. 
Apologies for the thrashing.

llvm-svn: 56251
 2008-09-16 21:48:12 +00:00
Bill Wendling
1a240c8033 - Change "ExternalSymbolSDNode" to "SymbolSDNode". 
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol

These changes pave the way to allowing SymbolSDNodes with non-external linkage.

llvm-svn: 56249
 2008-09-16 21:12:30 +00:00
Bruno Cardoso Lopes
f6ad396dfa Fixed Bug 2751 
http://llvm.org/bugs/show_bug.cgi?id=2751

Abicall was enabled even when static code model was provided 
in the command line.
The correct behavior is to disable abicall when static is
specified.

llvm-svn: 56228
 2008-09-15 21:06:55 +00:00
Dan Gohman
fa32c7c6d9 Remove isImm(), isReg(), and friends, in favor of 
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189
 2008-09-13 17:58:21 +00:00
Evan Cheng
63b98ccd5e Fix random abort. 
llvm-svn: 56184
 2008-09-13 01:55:59 +00:00
Dan Gohman
3450a8252f Define CallSDNode, an SDNode subclass for use with ISD::CALL. 
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.

And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.

CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.

llvm-svn: 56183
 2008-09-13 01:54:27 +00:00
Evan Cheng
775a37e4b4 Typo. 
llvm-svn: 56182
 2008-09-13 01:44:01 +00:00
Evan Cheng
200cdea934 Rely on instruction format to determine so_reg operand for now. 
llvm-svn: 56181
 2008-09-13 01:38:29 +00:00
Evan Cheng
0a3a595612 Revert 56176. All those instruction formats are still needed. 
llvm-svn: 56180
 2008-09-13 01:35:33 +00:00
Evan Cheng
1ac0a5f278 Accidentially flipped the condition. 
llvm-svn: 56179
 2008-09-13 01:29:57 +00:00
Evan Cheng
d68f2947a9 Add debug dumps. 
llvm-svn: 56178
 2008-09-13 01:15:21 +00:00
Evan Cheng
18fd8337b3 Eliminate unnecessary instruction formats. 
llvm-svn: 56176
 2008-09-12 23:15:39 +00:00
Evan Cheng
66e7651a16 Addrmode 1 S bit can be dynamically set. Look for CPSR def. 
llvm-svn: 56172
 2008-09-12 22:45:55 +00:00
Evan Cheng
adf6720626 Rewrite address mode 1 code emission routines. 
llvm-svn: 56171
 2008-09-12 22:01:15 +00:00
Dan Gohman
89660301e3 Rename ConstantSDNode::getValue to getZExtValue, for consistency 
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.

llvm-svn: 56159
 2008-09-12 16:56:44 +00:00
Jim Grosbach
a25a322741 udpate header comment: s/VP/VFP/ 
llvm-svn: 56126
 2008-09-11 21:41:29 +00:00
Arnold Schwaighofer
adfb111f10 When tailcallopt is enabled all fastcc calls must have an aligned argument stack size. Add a test case. 
llvm-svn: 56119
 2008-09-11 20:28:43 +00:00
Owen Anderson
743d45821a Fix a bug in ANY_EXTEND handling that was breaking 403.gcc on X86-64 in fast isel. 
llvm-svn: 56117
 2008-09-11 19:44:55 +00:00
Dale Johannesen
10e1cf3df2 The version of AtomicSDNode::AtomicSDNode used (only) for 
cmp-and-swap reversed the Cmp and Swap arguments; comments
make it clear this is unintentional.  Unfortunately, the
x86 BE had a compensating reversal, which is removed here.
PPC is OK.

From inspection of the Alpha code I think it is OK, but
if somebody has that platform please check it out.  I
cannot test on that platform.

llvm-svn: 56091
 2008-09-11 03:12:59 +00:00
Owen Anderson
139baa5f74 If ISD::ANY_EXTEND fails, try ISD::ZERO_EXTEND and ISD::SIGN_EXTEND before giving up. This fixes 445.gobmk on 
X86-64 in fast isel.

llvm-svn: 56088
 2008-09-11 02:41:37 +00:00
Dale Johannesen
8ac17c1f77 Succumb utterly to compatibility and implement 
__sync_fetch_and_nand as ANDC, even though that's
not what nand means.

llvm-svn: 56087
 2008-09-11 02:15:03 +00:00
Dan Gohman
9eca554828 X86FastISel support for double->float and float->double casts. 
llvm-svn: 56070
 2008-09-10 21:02:08 +00:00
Dan Gohman
3ccdde5eef Add X86FastISel support for static allocas, and refences 
to static allocas. As part of this change, refactor the
address mode code for laods and stores.

llvm-svn: 56066
 2008-09-10 20:11:02 +00:00
Evan Cheng
83c694fbe7 Fix a fastcc + sret bug. If fastcc and sret, callee doesn't need to pop the hidden struct ptr; Re-enable fastcc. 
llvm-svn: 56061
 2008-09-10 18:25:29 +00:00
Dale Johannesen
3e4bbf01d0 Handle new intrinsics with vector arguments. 
Patch by Paul Redmond.

llvm-svn: 56059
 2008-09-10 17:31:40 +00:00
Duncan Sands
6e9362aeaa Fix name. 
llvm-svn: 56055
 2008-09-10 13:22:10 +00:00
Duncan Sands
c3de6e13df Add trampoline support for the new FastCC calling 
convention (not related to recent Ada testsuite
failures).

llvm-svn: 56054
 2008-09-10 13:11:09 +00:00
Duncan Sands
63ef24bfb1 Turn off the new FastCC for the moment. It causes 
a slew of Ada testsuite failures on x86-32 linux.
Seems to be related to the use of float.

llvm-svn: 56053
 2008-09-10 13:09:24 +00:00
Dale Johannesen
ba2bbe0c55 Move the uglier parts of deciding not to emit a 
UsedDirective for some symbols in llvm.used into
Darwin-specific code.  I've decided LessPrivateGlobal
is potentially a useful abstraction and left it in
the target-independent area, with improved comment.

llvm-svn: 56024
 2008-09-09 22:29:13 +00:00
Anton Korobeynikov
6ad8b060d0 Make safer variant of alias resolution routine to be default 
llvm-svn: 56005
 2008-09-09 20:05:04 +00:00
Dan Gohman
88053b82e5 Mark IMPLICIT_DEF as being rematerializable and cheap-as-a-move. 
It's already special-cased and treated as rematerializable within
LiveIntervals; this allows it to be handled by other passes
such as TwoAddressInstrctionPass.

llvm-svn: 55999
 2008-09-09 18:25:28 +00:00
Anton Korobeynikov
59a67c60db Replace explicit pointer-size constants to TargetData query. 
No functionality change.

llvm-svn: 55996
 2008-09-09 18:22:57 +00:00
Evan Cheng
dc011a1b10 Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand. 
llvm-svn: 55975
 2008-09-09 01:26:59 +00:00
Dale Johannesen
1ed08a58d1 Fix logic for not emitting no-dead-strip for some 
objects in llvm.used (thanks Anton).  Makes visible
the magic 'l' prefix for symbols on Darwin which are
to be passed through the assembler, then removed at
linktime (previously all references to this had been
hidden in the ObjC FE code, oh well).

llvm-svn: 55973
 2008-09-09 01:21:22 +00:00
Anton Korobeynikov
1d726f1597 Reapply 55901: Drop unused variable 
llvm-svn: 55957
 2008-09-08 21:13:33 +00:00
Anton Korobeynikov
9d896f5566 Reapply 55900: We do support EH on x86-64! 
llvm-svn: 55956
 2008-09-08 21:13:08 +00:00
Anton Korobeynikov
33c69aaf24 Reapply 55899: First draft of EH support on x86/64-linux 
Now with fix, which prevents subtle codegen bug to trigger on darwin.
No fix for bug though, it's still there.

llvm-svn: 55955
 2008-09-08 21:12:47 +00:00
Anton Korobeynikov
8e8f8bf5a6 Reapply blindly reverted 55898: Implement FRAME_TO_ARGS_OFFSET for x86-64 
llvm-svn: 55954
 2008-09-08 21:12:11 +00:00
Bill Wendling
51ddfce77e Reverting r55898 as well. This wasn't reverted in the original revert... 
llvm-svn: 55938
 2008-09-08 19:42:32 +00:00
Bill Wendling
c5e40e77f3 Accidental commit of partial 'stack canaries' code 
llvm-svn: 55937
 2008-09-08 18:12:00 +00:00
Bill Wendling
4cc4caab72 Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8

llvm-svn: 55928
 2008-09-08 17:59:12 +00:00
Evan Cheng
fc78ac5bbe Handle calls which produce i1 results: promote to i8 but and it with 1 to get the low bit. 
llvm-svn: 55925
 2008-09-08 17:15:42 +00:00
Dan Gohman
2498f902ff i128 and f80 are implemented for x86-64 now. 
llvm-svn: 55920
 2008-09-08 16:42:56 +00:00
Dan Gohman
331ed48bc7 Fix copy+pastos in comments. 
llvm-svn: 55918
 2008-09-08 16:31:35 +00:00
Dan Gohman
fedd10cd95 Delete an unused variable. 
llvm-svn: 55915
 2008-09-08 16:28:17 +00:00
Anton Korobeynikov
cd3e839337 Drop unused variable 
llvm-svn: 55901
 2008-09-08 14:22:38 +00:00
Anton Korobeynikov
abd2198853 We do support EH on x86-64! 
llvm-svn: 55900
 2008-09-08 14:22:16 +00:00
Anton Korobeynikov
8528e4dc99 First draft of EH support on x86/64-linux 
llvm-svn: 55899
 2008-09-08 14:21:53 +00:00
Anton Korobeynikov
38cc49e19d Implement FRAME_TO_ARGS_OFFSET for x86-64 
llvm-svn: 55898
 2008-09-08 14:21:10 +00:00
Evan Cheng
66ef6517ad Add support to extend call operands when needed. Enable x86 fastisel call support. 
llvm-svn: 55891
 2008-09-08 06:35:17 +00:00
Evan Cheng
f016785579 Initial fastisel call support for C, Fast, and X86_FastCall calling conventions. It's meant to handle "simple" calls, i.e. no byval, structret, etc. It doesn't support multi-result returns either. 
Not yet turned on, it needs to support sext / zext of arguments and result.

llvm-svn: 55882
 2008-09-07 09:09:33 +00:00
Evan Cheng
ad262ec3a7 Some code clean up. 
llvm-svn: 55881
 2008-09-07 09:07:23 +00:00
Evan Cheng
6690ccd573 Handle x86 truncate to i8 with target hook for now. 
llvm-svn: 55877
 2008-09-07 08:47:42 +00:00
Owen Anderson
ef6d356c39 Fix constant pool loads, and remove broken versions of addConstantPoolReference. 
llvm-svn: 55868
 2008-09-06 01:11:01 +00:00
Owen Anderson
4d5723c58f Fix the X86 addConstantPoolReference, which had the operands in the wrong order. 
llvm-svn: 55867
 2008-09-06 00:50:00 +00:00
Eli Friedman
fecea4b498 Fix for PR2687: Add patterns to match sint_to_fp and fp_to_sint for <2 x 
i32>.  This is a little messy, but it works.

We should really get rid of the intrinsics, though, since they map
perfectly well to standard LLVM instructions.

llvm-svn: 55864
 2008-09-05 23:07:03 +00:00
Dan Gohman
930d0be24c Fix X86FastISel's shift and select code to reject illegal types. 
llvm-svn: 55857
 2008-09-05 21:27:34 +00:00
Dan Gohman
28e33e92e4 Fix the opcodes used by X86FastISel for shifts and conditional moves. 
llvm-svn: 55855
 2008-09-05 21:13:04 +00:00
Evan Cheng
5fd19547f4 Factor out code that emits load and store instructions. 
llvm-svn: 55854
 2008-09-05 21:00:03 +00:00
Owen Anderson
7866b1c4c3 Rename method. 
llvm-svn: 55853
 2008-09-05 20:49:33 +00:00
Dan Gohman
0be4bca4b6 X86FastISel support for shifts and conditional moves. 
llvm-svn: 55844
 2008-09-05 18:30:08 +00:00
Evan Cheng
10a350fa89 If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls. 
llvm-svn: 55840
 2008-09-05 17:24:07 +00:00
Dan Gohman
29cba19a2a Check a comparion's operand type for legality before 
expanding its operands.

llvm-svn: 55820
 2008-09-05 01:33:56 +00:00
Dan Gohman
121baa1723 Fix X86FastISel code for comparisons and conditional branches 
to check the result of getRegForValue before using it, and
to check for illegal operand types.

llvm-svn: 55819
 2008-09-05 01:15:35 +00:00
Dan Gohman
783f38e056 X86FastISel support for conditional branches. 
llvm-svn: 55816
 2008-09-05 01:06:14 +00:00
Owen Anderson
6d5b72d45a Add initial support for selecting constant materializations that require constant 
pool loads on X86 in fast isel.  This isn't actually used yet.

llvm-svn: 55814
 2008-09-05 00:06:23 +00:00
Dan Gohman
88c3de638e X86FastISel support for ICmpInst and FCmpInst. 
llvm-svn: 55811
 2008-09-04 23:26:51 +00:00
Evan Cheng
bd15e330d0 For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries. 
llvm-svn: 55807
 2008-09-04 22:59:58 +00:00
Devang Patel
f3770334a9 If function notes say optimize for size, then adjust alignment. 
llvm-svn: 55794
 2008-09-04 21:03:41 +00:00
Dan Gohman
e1f9be27bc Tidy up several unbeseeming casts from pointer to intptr_t. 
llvm-svn: 55779
 2008-09-04 17:05:41 +00:00
Owen Anderson
cd3ee9198d Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase. 
llvm-svn: 55777
 2008-09-04 16:48:33 +00:00
Dan Gohman
7ee14837e6 Clean up uses of TargetLowering::getTargetMachine. 
llvm-svn: 55769
 2008-09-04 15:39:15 +00:00
Owen Anderson
35485dbae3 Add a first attempt at implementing stores for X86 fast isel using target hooks. 
Dan or Evan, please review.

llvm-svn: 55764
 2008-09-04 07:08:58 +00:00
Evan Cheng
9c728a557d Load from GV stub should be locally CSE'd. 
llvm-svn: 55763
 2008-09-04 06:18:33 +00:00
Evan Cheng
53ce5fa5ce Remove code that pad number of bytes to pop for X86_FastCall CC. The code doesn't do the "aligning" for Cygwin, Mingw, and Windows. But aligning it on Darwin and Linux breaks gcc compatibility. That ruled out all the platforms we support! 
llvm-svn: 55756
 2008-09-04 01:04:15 +00:00
Dale Johannesen
9e4d101fab Add intrinsics for log, log2, log10, exp, exp2. 
No functional change (and no FE change to generate them).

llvm-svn: 55753
 2008-09-04 00:47:13 +00:00
Dan Gohman
18cc2a26df Create HandlePHINodesInSuccessorBlocksFast, a version of 
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.

This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.

llvm-svn: 55746
 2008-09-03 23:12:08 +00:00
Evan Cheng
942d55dd92 Add X86 target hook to implement load (even from GlobalAddress). 
llvm-svn: 55693
 2008-09-03 06:44:39 +00:00
Ted Kremenek
b7236d215b Fix capitalization in #include of FastISel.h. This unbreaks the build on case-sensitive filesystems. 
llvm-svn: 55687
 2008-09-03 02:54:11 +00:00
Evan Cheng
4cef3f6ce1 Unbreak fast isel. 
llvm-svn: 55685
 2008-09-03 01:04:47 +00:00
Evan Cheng
43c7084625 Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class. 
llvm-svn: 55679
 2008-09-03 00:03:49 +00:00
Dale Johannesen
46f19abcec Fix some bugs in the code sequences for atomics. 
llvm-svn: 55643
 2008-09-02 20:30:23 +00:00
Evan Cheng
126bd60288 Add Mac OS X compatible JIT callback routine. 
llvm-svn: 55625
 2008-09-02 07:49:03 +00:00
Evan Cheng
e97c48a34a Revamp ARM JIT. 
llvm-svn: 55624
 2008-09-02 06:52:38 +00:00
Evan Cheng
9817be2f96 Change getBinaryCodeForInstr prototype. First operand MachineInstr& should be const. Make corresponding changes. 
llvm-svn: 55623
 2008-09-02 06:51:36 +00:00
Evan Cheng
738426a2a1 Control flow instruction encodings. 
llvm-svn: 55601
 2008-09-01 08:25:56 +00:00
Evan Cheng
36170e63a3 ldm / stm instruction encodings. 
llvm-svn: 55599
 2008-09-01 07:48:18 +00:00
Evan Cheng
01019d7909 AXI2 and AXI3 instruction encodings. 
llvm-svn: 55598
 2008-09-01 07:34:13 +00:00
Evan Cheng
fdae49e627 Reorganize instruction formats again; AXI1 encoding. 
llvm-svn: 55597
 2008-09-01 07:19:00 +00:00
Evan Cheng
26305b192f addrmode3 instruction encodings. 
llvm-svn: 55596
 2008-09-01 07:00:14 +00:00
Evan Cheng
eb40cb3e42 Reorganize some instruction format definitions. No functionality change. 
llvm-svn: 55594
 2008-09-01 01:51:14 +00:00
Evan Cheng
fa095aec1e Rest of addrmode2 instruction encodings. 
llvm-svn: 55593
 2008-09-01 01:27:33 +00:00
Evan Cheng
4c8338c0d3 Addr2 word / byte load encodings. 
llvm-svn: 55591
 2008-08-31 19:02:21 +00:00
Evan Cheng
94f3d276c6 Addr1 instructions opcodes are encoded in bits 21-24; encode S bit. 
llvm-svn: 55590
 2008-08-31 18:32:16 +00:00
Gabor Greif
7db742d8c2 fix a bunch of 80-col violations 
llvm-svn: 55588
 2008-08-31 15:37:04 +00:00
Bill Wendling
297eb080b6 Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR 
instructions in CellSPU as "Expand" so that they won't be generated. I added a
"FIXME" so that this hack can be addressed and reverted once ISD::ROTR is
supported in the .td files.

llvm-svn: 55582
 2008-08-31 02:59:23 +00:00
Bill Wendling
8faa2f3ec4 Expand for ROTR with MVT::i64. 
Dale, Could you please review this?

llvm-svn: 55581
 2008-08-31 02:53:19 +00:00
Gabor Greif
8fa04b6eb0 fix some 80-col violations 
llvm-svn: 55565
 2008-08-30 10:09:02 +00:00
Evan Cheng
c3c439a624 For now, can't mark XOR64rr isAsCheapAsAMove. It's technically correct. But various passes cannot handle remating these. 
llvm-svn: 55562
 2008-08-30 08:54:22 +00:00
Evan Cheng
4bc8c9652e Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case). 
llvm-svn: 55558
 2008-08-30 02:03:58 +00:00
Dale Johannesen
1cfbb25e75 Add ppc partial-word ATOMIC_CMP_SWAP. 
llvm-svn: 55554
 2008-08-30 00:08:53 +00:00
Evan Cheng
c1c53221c5 Swap fp comparison operands and change predicate to allow load folding (safely this time). 
llvm-svn: 55553
 2008-08-29 23:22:12 +00:00
Evan Cheng
a884330e08 Use static_cast instead of C style cast. 
llvm-svn: 55552
 2008-08-29 23:21:31 +00:00
Evan Cheng
17382f9ffb Backing out 55521. Not safe. 
llvm-svn: 55548
 2008-08-29 22:13:21 +00:00
Dale Johannesen
bc977ce106 Add partial word version of ATOMIC_SWAP. 
llvm-svn: 55546
 2008-08-29 18:29:46 +00:00
Owen Anderson
3aa3841da2 Add initial support for fast isel of instructions that have inputs pinned to physical registers. 
llvm-svn: 55545
 2008-08-29 17:45:56 +00:00
Evan Cheng
3fb02ae0b6 TableGen'ing instruction encodings. 
llvm-svn: 55533
 2008-08-29 07:42:03 +00:00
Evan Cheng
b38decd917 addrmode1 (data processing) instruction encoding: bits 5-6 are 0, bits 7-10 encode the opcode. 
llvm-svn: 55531
 2008-08-29 07:40:52 +00:00
Evan Cheng
5150e3da45 MVN is addrmode1. 
llvm-svn: 55530
 2008-08-29 07:36:24 +00:00
Evan Cheng
f90bc9a050 More refactoring. 
llvm-svn: 55528
 2008-08-29 06:41:12 +00:00
Evan Cheng
cdd06ba3f4 Swap fp comparison operands and change predicate to allow load folding. 
llvm-svn: 55521
 2008-08-28 23:48:31 +00:00
Evan Cheng
c50df85672 Refactor ARM instruction format definitions into a separate file. No functionality changes. 
llvm-svn: 55518
 2008-08-28 23:39:26 +00:00
Dan Gohman
c7b8401b77 Add a target callback for FastISel. 
llvm-svn: 55512
 2008-08-28 23:21:34 +00:00
Gabor Greif
5ec5f19852 remove tabs, fix > 80 cols 
llvm-svn: 55511
 2008-08-28 23:19:51 +00:00
Gabor Greif
86c795a8ca erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics 
llvm-svn: 55504
 2008-08-28 21:40:38 +00:00
Mon P Wang
7566974359 In lowering SELECT_CC, removed cases where we can't flip the true and false when the compare value has a NaN 
llvm-svn: 55499
 2008-08-28 21:04:05 +00:00
Rafael Espindola
1cd4fc3111 Use resize instead of reserve. Reserve doesn't change size(). 
llvm-svn: 55486
 2008-08-28 18:32:53 +00:00
Dale Johannesen
e9a1266213 Implement partial-word binary atomics on ppc. 
llvm-svn: 55478
 2008-08-28 17:53:09 +00:00
Evan Cheng
419506a149 FsFLD0S{S|D} and V_SETALLONES are as cheap as moves. 
llvm-svn: 55466
 2008-08-28 07:52:25 +00:00
Dale Johannesen
490c016734 Split the ATOMIC NodeType's to include the size, e.g. 
ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.

This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad.  This is the alternative.

llvm-svn: 55457
 2008-08-28 02:44:49 +00:00
Bill Wendling
0b5b31a0be Make "movdq2q" and "movq2dq" dependent upon having SSE2 because they use the 
SSE2 registers as well as the MMX registers.

llvm-svn: 55436
 2008-08-27 21:32:04 +00:00
Dan Gohman
3976cccecd Reinstate the x86-64 portion of r55190. When doing extloads into 
64-bit registers from 16-bit and smaller memory locations, prefer
instructions that define the entire 64-bit register, to avoid
partial-register updates.

llvm-svn: 55422
 2008-08-27 17:33:15 +00:00
Gabor Greif
4b86114f92 disallow direct access to SDValue::ResNo, provide a getter instead 
llvm-svn: 55394
 2008-08-26 22:36:50 +00:00
Owen Anderson
fc7b8f3073 These assertions should be return false's instead, allowing the client to detect the failure. 
llvm-svn: 55377
 2008-08-26 18:50:40 +00:00
Owen Anderson
5fef19facf Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested 
was inserted or not.  This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.

llvm-svn: 55375
 2008-08-26 18:03:31 +00:00
Chris Lattner
c5c00890e5 If an xmm register is referenced explicitly in an inline asm, make sure to 
assign it to a version of the xmm register with the regclass that matches its
type.  This fixes PR2715, a bug handling some crazy xpcom case in mozilla.

llvm-svn: 55358
 2008-08-26 06:19:02 +00:00
Evan Cheng
65d29b2553 This is done. 
llvm-svn: 55348
 2008-08-26 01:13:44 +00:00
Dale Johannesen
f201a3aaf3 Implement 32 & 64 bit versions of PPC atomic 
binary primitives.

llvm-svn: 55343
 2008-08-25 22:34:37 +00:00
Evan Cheng
19738e3956 80 col. violations. 
llvm-svn: 55341
 2008-08-25 21:58:43 +00:00
Evan Cheng
569b489cf5 Try approach to moving call address load inside of callseq_start. Now it's done during the preprocess of x86 isel. callseq_start's chain is changed to load's chain node; while load's chain is the last of callseq_start or the loads or copytoreg nodes inserted to move arguments to the right spot. 
llvm-svn: 55338
 2008-08-25 21:27:18 +00:00
Dale Johannesen
fbb408de74 Remove PPC-specific lowering for atomics; the 
generic stuff works fine.

Mark rewritten cmp-and-swap as not using CR1.

llvm-svn: 55336
 2008-08-25 21:09:52 +00:00
Dale Johannesen
39bd83dbc0 It's important for the cmp-and-swap to balance 
loads and stores but it's even more important for
it to store the right value.:(

llvm-svn: 55319
 2008-08-25 18:53:26 +00:00
Bill Wendling
7f52506926 Nevermind. This broke the bootstrap (?!). 
llvm-svn: 55318
 2008-08-25 18:32:39 +00:00
Bill Wendling
f86b246fdb MOVQ2DQ and MOVQ2DQ use SSE2. We should conditionalize the use of these 
instructions on having SSE2.

llvm-svn: 55317
 2008-08-25 18:20:52 +00:00
Evan Cheng
2b9f879a99 Fix asm printing of MOVSDto64mr and MOV64toSDrm. 
llvm-svn: 55300
 2008-08-25 04:11:42 +00:00
Bill Wendling
5728cf59fd Temporarily reverting r55292. It's causing a bootstraping failure: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc ... src/libiberty/make-temp-file.c -o make-temp-file.o
Assertion failed: (Node2Index[SU->NodeNum] > Node2Index[I->Dep->NodeNum] && "Wrong topological sorting"), function InitDAGTopologicalSorting, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 508.
../../../../llvm-gcc.src/libiberty/hashtab.c:955: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
make[4]: *** [hashtab.o] Error 1
make[4]: *** Waiting for unfinished jobs....
make[3]: *** [multi-do] Error 1
make[2]: *** [all] Error 2
make[1]: *** [all-target-libiberty] Error 2
make: *** [all] Error 2

llvm-svn: 55295
 2008-08-24 21:45:30 +00:00
Evan Cheng
a600778748 Move callseq_start above the call address load to allow load to be folded into the call node. 
llvm-svn: 55292
 2008-08-24 19:19:55 +00:00
Cedric Venet
6c99b53fda Use additionnal include directory instead of ../ in #include. 
Suggested by aKor.

llvm-svn: 55282
 2008-08-24 12:30:46 +00:00
Chris Lattner
fe3155fc62 Switch the asmprinter (.ll) and all the stuff it requires over to 
use raw_ostream instead of std::ostream.  Among other goodness,
this speeds up llvm-dis of kc++ with a release build from 0.85s
to 0.49s (88% faster).

Other interesting changes:
 1) This makes Value::print be non-virtual.
 2) AP[S]Int and ConstantRange can no longer print to ostream directly, 
    use raw_ostream instead.
 3) This fixes a bug in raw_os_ostream where it didn't flush itself 
    when destroyed.
 4) This adds a new SDNode::print method, instead of only allowing "dump".


A lot of APIs have both std::ostream and raw_ostream versions, it would
be useful to go through and systematically anihilate the std::ostream 
versions.

This passes dejagnu, but there may be minor fallout, plz let me know if
so and I'll fix it.

llvm-svn: 55263
 2008-08-23 22:23:09 +00:00
Anton Korobeynikov
be3a5a5ce9 Provide a 64 bit variant of mmx.maskmovq intrinsic lowering. 
Is there way to avoid explicit target check?

llvm-svn: 55238
 2008-08-23 15:53:19 +00:00
Dan Gohman
a9d5f9b006 Move the point at which FastISel taps into the SelectionDAGISel 
process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.

Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.

To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.

llvm-svn: 55219
 2008-08-23 02:25:05 +00:00
Anton Korobeynikov
8e795209d3 Make option variables static, so they won't cause nameclash 
llvm-svn: 55203
 2008-08-22 21:27:49 +00:00
Bill Wendling
60e176391d Reverting r55190, r55191, and r55192. They broke the build with this error message: 
{standard input}:17:bad register name `%sil'
make[4]: *** [libgcc/./_addvsi3.o] Error 1
make[4]: *** Waiting for unfinished jobs....
{standard input}:23:bad register name `%dil'
{standard input}:28:bad register name `%dil'
make[4]: *** [libgcc/./_addvdi3.o] Error 1
{standard input}:18:bad register name `%sil'
make[4]: *** [libgcc/./_subvsi3.o] Error 1

llvm-svn: 55200
 2008-08-22 20:51:05 +00:00
Dan Gohman
897aa30d7c Anyext tweaks for x86. When extloading a value to i32 or i64, choose 
instructions that define the full 32 or 64-bit value. When anyexting
from i8 to i16 or i32, it's not necessary to zero out the high
portion of the register.

llvm-svn: 55190
 2008-08-22 19:19:31 +00:00
Dale Johannesen
95a40e3045 Implement __sync_synchronize on ppc32. Patch by Gary Benson. 
llvm-svn: 55186
 2008-08-22 17:20:54 +00:00
Dale Johannesen
1ac64c3718 Rewrite ppc code generated for __sync_{bool|val}_compare_and_swap 
so that lwarx and stwcx are always executed the same number of times.
This is important for performance, I'm told.

llvm-svn: 55163
 2008-08-22 03:49:10 +00:00
Dan Gohman
a398d11527 Factor out the predicate check code from DAGISelEmitter.cpp 
and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.

llvm-svn: 55156
 2008-08-22 00:20:26 +00:00
Bill Wendling
f105f92904 If part of the mask is "undef", then ignore it as we don't care what goes into it. 
llvm-svn: 55147
 2008-08-21 22:36:36 +00:00
Bill Wendling
170bd0a562 Fix whitespace. No functionality change. 
llvm-svn: 55146
 2008-08-21 22:35:37 +00:00
Evan Cheng
ef2509b3ba Fix a number of byval / memcpy / memset related codegen issues. 
1. x86-64 byval alignment should be max of 8 and alignment of type. Previously the code was not doing what the commit message was saying.
2. Do not use byte repeat move and store operations. These are slow.

llvm-svn: 55139
 2008-08-21 21:00:15 +00:00
Mon P Wang
bf7b94fd29 Treat floating point ST1 the same as ST0 when lowering for a call result 
llvm-svn: 55135
 2008-08-21 19:54:16 +00:00
Dan Gohman
b5635a2c51 Add libm-oriented ISD opcodes for rounding operations. 
llvm-svn: 55130
 2008-08-21 17:55:02 +00:00
Anton Korobeynikov
5bbfc7e05f Allow inline asm nodes with empty bodies inside JIT. 
This unbreaks explicit reg vars inside JIT, which are
implemented in such hacky way :)

llvm-svn: 55128
 2008-08-21 17:33:01 +00:00
Dan Gohman
4b801d38a1 Simplify SelectRoot's interface, and factor out some common code 
from all targets.

llvm-svn: 55124
 2008-08-21 16:36:34 +00:00
Bill Wendling
2ba1a2b516 Clean up whitespace. 
llvm-svn: 55117
 2008-08-21 08:38:54 +00:00
Chris Lattner
a87eb40ef4 unbreak the CBE on treeadd an many others. 
llvm-svn: 55112
 2008-08-21 05:51:43 +00:00
Owen Anderson
2c1d54952b Use raw_ostream throughout the AsmPrinter. 
llvm-svn: 55092
 2008-08-21 00:14:44 +00:00
Dan Gohman
411cc551cb Move the handling of ANY_EXTEND, SIGN_EXTEND_INREG, and TRUNCATE 
out of X86ISelDAGToDAG.cpp C++ code and into tablegen code.
Among other things, using tablegen for these things makes them
friendlier to FastISel.

Tablegen can handle the case of i8 subregs on x86-32, but currently
the C++ code for that case uses MVT::Flag in a tricky way, and it
happens to schedule better in some cases. So for now, leave the
C++ code in place to handle the i8 case on x86-32.

llvm-svn: 55078
 2008-08-20 21:27:32 +00:00