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Author SHA1 Message Date
Chris Lattner
eec079a470 add a note 
llvm-svn: 122559
 2010-12-26 03:53:31 +00:00
Chris Lattner
2129ce0891 Generalize a previous change, fixing PR8855 - an valid large immediate 
rejected by the mc assembler.

llvm-svn: 122557
 2010-12-25 21:36:35 +00:00
Chris Lattner
a73a53e67f don't lose TD info 
llvm-svn: 122556
 2010-12-25 20:52:04 +00:00
Chris Lattner
38d6d6d367 switch the inliner alignment enforcement stuff to use the 
getOrEnforceKnownAlignment function, which simplifies the code
and makes it stronger.

llvm-svn: 122555
 2010-12-25 20:42:38 +00:00
Chris Lattner
c4cb20b9bf Move getOrEnforceKnownAlignment out of instcombine into Transforms/Utils. 
llvm-svn: 122554
 2010-12-25 20:37:57 +00:00
Michael J. Spencer
b3e50a570f Support/PathV1: Deprecate makeAbsolute and remove Unix impl because it annoys people. 
llvm-svn: 122553
 2010-12-25 20:10:11 +00:00
Benjamin Kramer
720b32b319 Fix a thinko pointed out by Frits van Bommel: looking through global variables in isBytewiseValue is not safe. 
llvm-svn: 122550
 2010-12-24 22:23:59 +00:00
Rafael Espindola
b2e09adc62 Merge IsFixupFullyResolved and IsSymbolRefDifferenceFullyResolved. We now 
have a single point where targets test if a relocation is needed.

llvm-svn: 122549
 2010-12-24 21:22:02 +00:00
Benjamin Kramer
49e40d4c4b MemCpyOpt: Turn memcpys from a constant into a memset if possible. 
This allows us to compile "int cst[] = {-1, -1, -1};" into
  movl  $-1, 16(%rsp)
  movq  $-1, 8(%rsp)
instead of
  movl  _cst+8(%rip), %eax
  movl  %eax, 16(%rsp)
  movq  _cst(%rip), %rax
  movq  %rax, 8(%rsp)

llvm-svn: 122548
 2010-12-24 21:17:12 +00:00
Daniel Dunbar
592854a10a MC/Mach-O/ARM: Start handling some Thumb branches. 
llvm-svn: 122547
 2010-12-24 16:41:46 +00:00
Andrew Trick
dfa31b1cf9 Minor cleanup related to my latest scheduler changes. 
llvm-svn: 122545
 2010-12-24 07:10:19 +00:00
Andrew Trick
c926e98fc7 Fix a few cases where the scheduler is not checking for phys reg copies. The scheduling node may have a NULL DAG node, yuck. 
llvm-svn: 122544
 2010-12-24 06:46:50 +00:00
Andrew Trick
134b2a5907 Various bits of framework needed for precise machine-level selection 
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.

Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.

Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.

Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.

ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.

ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.

llvm-svn: 122541
 2010-12-24 05:03:26 +00:00
Andrew Trick
53f4556c64 whitespace 
llvm-svn: 122539
 2010-12-24 04:28:06 +00:00
Cameron Zwarich
a7ad357a13 Simplify a check for implicit defs and remove a FIXME. 
llvm-svn: 122537
 2010-12-24 03:09:36 +00:00
Kevin Enderby
ff7e68c5e7 In llvm-mc parse a Hash token as a full line comment. Allows handling of 
preprocessed .s files and matches darwin gas.  rdar://8798690
Also fix a comment on the next line of AsmParser.cpp after this new code.

llvm-svn: 122531
 2010-12-24 00:12:02 +00:00
Jim Grosbach
7fc4f99084 Use a StringSwitch<> instead of a manually constructed string matcher. 
llvm-svn: 122530
 2010-12-24 00:03:39 +00:00
Owen Anderson
6afd90810e When determining if we can fold (x >> C1) << C2, the bits that we need to verify are zero 
are not the low bits of x, but the bits that WILL be the low bits after the operation completes.

llvm-svn: 122529
 2010-12-23 23:56:24 +00:00
Evan Cheng
ea28d16e36 Code clean up. No functionality change. 
llvm-svn: 122528
 2010-12-23 23:54:17 +00:00
Jim Grosbach
03a39130cb Remove dead patterns. 
llvm-svn: 122524
 2010-12-23 23:20:13 +00:00
Jim Grosbach
14f46d80df Recognize a few more documented register name aliases for ARM in the asm lexer. 
llvm-svn: 122523
 2010-12-23 23:19:54 +00:00
Bob Wilson
85dbc89f44 Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions. 
If the basic block containing the BCCi64 (or BCCZi64) instruction ends with
an unconditional branch, that branch needs to be deleted before appending
the expansion of the BCCi64 to the end of the block.

llvm-svn: 122521
 2010-12-23 22:45:49 +00:00
Owen Anderson
be8084acdd It is possible for SimplifyCFG to cause PHI nodes to become redundant too late in the optimization 
pipeline to be caught by instcombine, and it's not feasible to catch them in SimplifyCFG because the
use-lists are in an inconsistent state at the point where it could know that it need to simplify them.
Instead, have CodeGenPrepare look for trivially redundant PHIs as part of its general cleanup effort.

llvm-svn: 122516
 2010-12-23 20:57:35 +00:00
Chris Lattner
01e8c46349 Flag -> Glue, the ongoing saga 
llvm-svn: 122513
 2010-12-23 18:28:41 +00:00
Chris Lattner
b607e7deda flags -> glue for selectiondag 
llvm-svn: 122509
 2010-12-23 17:24:32 +00:00
Chris Lattner
fb9ff7a4ff sdisel flag -> glue. 
llvm-svn: 122507
 2010-12-23 17:13:18 +00:00
Benjamin Kramer
0a0e2c55c4 Remove/fix invalid README entries. The well thought out strcpy function doesn't return a pointer to the end of the string. 
llvm-svn: 122496
 2010-12-23 15:32:07 +00:00
Benjamin Kramer
b21118c91b Remove some obsolete README items, add a new one off the top of my head. 
llvm-svn: 122495
 2010-12-23 15:07:02 +00:00
Andrew Trick
ca2e267ddc Reorganize ListScheduleBottomUp in preparation for modeling machine cycles and instruction issue. 
llvm-svn: 122491
 2010-12-23 05:42:20 +00:00
Andrew Trick
c046a115d4 Converted LiveRegCycles to LiveRegGens. It's easier to work with and allows multiple nodes per cycle. 
llvm-svn: 122474
 2010-12-23 04:16:14 +00:00
Andrew Trick
e48d5d8395 In CheckForLiveRegDef use TRI->getOverlaps. 
llvm-svn: 122473
 2010-12-23 03:43:21 +00:00
Andrew Trick
cc701bcfdc Fixes PR8823: add-with-overflow-128.ll 
In the bottom-up selection DAG scheduling, handle two-address
instructions that read/write unspillable registers. Treat
the entire chain of two-address nodes as a single live range.

llvm-svn: 122472
 2010-12-23 03:15:51 +00:00
Mon P Wang
eb2ae28352 Preserve the address space when generating bitcasts for MemTransferInst in ConvertToScalarInfo 
llvm-svn: 122462
 2010-12-23 01:41:32 +00:00
Jeffrey Yasskin
a199652a3e Change all self assignments X=X to (void)X, so that we can turn on a 
new gcc warning that complains on self-assignments and
self-initializations.

llvm-svn: 122458
 2010-12-23 00:58:24 +00:00
Jim Grosbach
b0e9926c33 Trailing whitespace. 
llvm-svn: 122456
 2010-12-22 23:26:02 +00:00
Benjamin Kramer
49942a90b7 DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal. The latter usually compiles into smaller code. 
example code:
unsigned foo(unsigned x, unsigned y) {
  if (x != 0) y--;
  return y;
}

before:
  _foo:                           ## @foo
    cmpl  $1, 4(%esp)             ## encoding: [0x83,0x7c,0x24,0x04,0x01]
    sbbl  %eax, %eax              ## encoding: [0x19,0xc0]
    notl  %eax                    ## encoding: [0xf7,0xd0]
    addl  8(%esp), %eax           ## encoding: [0x03,0x44,0x24,0x08]
    ret                           ## encoding: [0xc3]

after:
  _foo:                           ## @foo
    cmpl  $1, 4(%esp)             ## encoding: [0x83,0x7c,0x24,0x04,0x01]
    movl  8(%esp), %eax           ## encoding: [0x8b,0x44,0x24,0x08]
    adcl  $-1, %eax               ## encoding: [0x83,0xd0,0xff]
    ret                           ## encoding: [0xc3]

llvm-svn: 122455
 2010-12-22 23:17:45 +00:00
Benjamin Kramer
27d13684f5 InstCombine: creating selects from -1 and 0 is fine, they combine into a sext from i1. 
llvm-svn: 122453
 2010-12-22 23:12:15 +00:00
Benjamin Kramer
d8387aa9bd X86: Lower a select directly to a setcc_carry if possible. 
int test(unsigned long a, unsigned long b) { return -(a < b); }
compiles to
  _test:                              ## @test
    cmpq  %rsi, %rdi                  ## encoding: [0x48,0x39,0xf7]
    sbbl  %eax, %eax                  ## encoding: [0x19,0xc0]
    ret                               ## encoding: [0xc3]
instead of
  _test:                              ## @test
    xorl  %ecx, %ecx                  ## encoding: [0x31,0xc9]
    cmpq  %rsi, %rdi                  ## encoding: [0x48,0x39,0xf7]
    movl  $-1, %eax                   ## encoding: [0xb8,0xff,0xff,0xff,0xff]
    cmovael %ecx, %eax                ## encoding: [0x0f,0x43,0xc1]
    ret                               ## encoding: [0xc3]

llvm-svn: 122451
 2010-12-22 23:09:28 +00:00
Rafael Espindola
9e462b3734 Add r122359 back now that the bug in MCDwarfLineAddrFragment fragment has been 
fixed.

llvm-svn: 122448
 2010-12-22 22:16:24 +00:00
Rafael Espindola
3897d5e658 Assert that the AddrDelta expression is really constant and wrap it in a set 
if we have a lame assembler.

llvm-svn: 122446
 2010-12-22 22:04:28 +00:00
Jakob Stoklund Olesen
f761c75efb When RegAllocGreedy decides to spill the interferences of the current register, 
pick the victim with the lowest total spill weight.

llvm-svn: 122445
 2010-12-22 22:01:30 +00:00
Jakob Stoklund Olesen
71e527ef4b Include a shadow of the original CFG edges in the edge bundle graph. 
llvm-svn: 122444
 2010-12-22 22:01:28 +00:00
Rafael Espindola
81ac7c5fad Rename NeedsSetToChangeDiffSize to HasAggressiveSymbolFolding which is a much 
better name and matches what is used in the MachO writer.

llvm-svn: 122443
 2010-12-22 21:51:29 +00:00
Daniel Dunbar
e6ec0e7149 MC/Mach-O/ARM: Don't try to use scattered relocs for BR24 fixups. 
llvm-svn: 122441
 2010-12-22 21:26:43 +00:00
Rafael Espindola
6baac40d13 Revert r122359 while I debug PR8845. 
llvm-svn: 122427
 2010-12-22 19:05:49 +00:00
Matt Beaumont-Gay
2a54f466cf Fix another conditional expression mismatched enum type warning. 
llvm-svn: 122419
 2010-12-22 18:25:55 +00:00
Duncan Sands
68d969c2f5 When determining whether the new instruction was already present in 
the original instruction, half the cases were missed (making it not
wrong but suboptimal).  Also correct a typo (A <-> B) in the second
chunk. 

llvm-svn: 122414
 2010-12-22 17:15:25 +00:00
Daniel Dunbar
cb8ac619a2 MC/Mach-O/ARM: We always use the SECTDIFF reloc type on ARM, which is 
esp. important given that the LOCAL_SECTDIFF enumeration got redefined.

llvm-svn: 122412
 2010-12-22 16:52:19 +00:00
Daniel Dunbar
63f7a3a108 MC/Mach-O/ARM: Clone off an ARM version of RecordScatteredRelocation until I figure out how it is supposed to work. 
llvm-svn: 122410
 2010-12-22 16:45:29 +00:00
Daniel Dunbar
985567aebc MC/Mach-O: Return to reporting errors if we see unexpected fixup kinds. 
llvm-svn: 122409
 2010-12-22 16:32:41 +00:00
Daniel Dunbar
d85743ca7a MC/Mach-O/ARM: Recognize generic _Data_N fixup kinds. 
llvm-svn: 122408
 2010-12-22 16:32:37 +00:00
Daniel Dunbar
e44a2c1166 MC/Mach-O/ARM: Add enough relocation logic to get BR24 relocations. 
llvm-svn: 122407
 2010-12-22 16:19:24 +00:00
Daniel Dunbar
55eff2421b MC/Mach-O/ARM: Fix thinko. 
llvm-svn: 122406
 2010-12-22 16:19:20 +00:00
Rafael Espindola
c05eac148d Use references and simplify. 
llvm-svn: 122405
 2010-12-22 16:11:57 +00:00
Rafael Espindola
7c995a90fc Simplify the handling of .size expressions. 
llvm-svn: 122404
 2010-12-22 16:03:00 +00:00
Daniel Dunbar
17e19b2d45 MC/Mach-O/ARM: Stub out RecordARMRelocation, which is mostly a copy of 
RecordRelocation with lots of FIXMEs.

llvm-svn: 122402
 2010-12-22 13:50:05 +00:00
Daniel Dunbar
8db4843cd3 Simplify. 
llvm-svn: 122401
 2010-12-22 13:49:56 +00:00
Daniel Dunbar
bc2bf96e91 MC/Mach-O: Split out RecordARMRelocation for now, it is weird enough it isn't 
clear how to keep in the generic path (yet).
 - Will revisit when it actually works.

llvm-svn: 122400
 2010-12-22 13:49:43 +00:00
Duncan Sands
922251757b Add a generic expansion transform: A op (B op' C) -> (A op B) op' (A op C) 
if both A op B and A op C simplify.  This fires fairly often but doesn't
make that much difference.  On gcc-as-one-file it removes two "and"s and
turns one branch into a select.

llvm-svn: 122399
 2010-12-22 13:36:08 +00:00
Che-Liang Chiou
e73ad4387e ptx: add ld instruction and test 
llvm-svn: 122398
 2010-12-22 10:38:51 +00:00
Duncan Sands
9b28a173fe Add some statistics, good for understanding how much more powerful 
instcombine is compared to instsimplify.

llvm-svn: 122397
 2010-12-22 09:40:51 +00:00
Chris Lattner
04ef853e23 Fix a bug in ReduceLoadWidth that wasn't handling extending 
loads properly.  We miscompiled the testcase into:

_test:                                  ## @test
	movl	$128, (%rdi)
	movzbl	1(%rdi), %eax
	ret

Now we get a proper:

_test:                                  ## @test
	movl	$128, (%rdi)
	movsbl	(%rdi), %eax
	movzbl	%ah, %eax
	ret

This fixes PR8757.

llvm-svn: 122392
 2010-12-22 08:02:57 +00:00
Chris Lattner
35fcc63498 more cleanups, move a check for "roundedness" earlier to reject 
unhanded cases faster and simplify code.

llvm-svn: 122391
 2010-12-22 08:01:44 +00:00
Chris Lattner
60dcb2b5c2 reduce indentation and improve comments, no functionality change. 
llvm-svn: 122389
 2010-12-22 07:36:50 +00:00
Wesley Peck
2759b7bc98 Don't generate carry bit when loading immediate values on the Microblaze. 
llvm-svn: 122385
 2010-12-22 01:29:32 +00:00
Wesley Peck
0d64db9772 Add support for some of the LLVM atomic operations to the MBlaze backend. 
llvm-svn: 122384
 2010-12-22 01:15:01 +00:00
Wesley Peck
32c95e5ef4 Modeling the carry bit in the MSR register of the MicroBlaze. 
llvm-svn: 122381
 2010-12-22 00:53:07 +00:00
Wesley Peck
fc577ca406 Fix a regression introduced into the MBlaze delay slot filler. 
llvm-svn: 122379
 2010-12-22 00:22:59 +00:00
Owen Anderson
b4f1511864 Give GVN back the ability to perform simple conditional propagation on conditional branch values. 
I still think that LVI should be handling this, but that capability is some ways off in the future,
and this matters for some significant benchmarks.

llvm-svn: 122378
 2010-12-21 23:54:34 +00:00
Matt Beaumont-Gay
b03146b50a GCC objects to the two sides of a conditional expression having different enum 
types, but they're just getting converted to unsigned anyway, so cast first
(and ask questions later).

llvm-svn: 122377
 2010-12-21 23:43:23 +00:00
Owen Anderson
1ee218de0e Remove dead code. 
llvm-svn: 122371
 2010-12-21 22:31:24 +00:00
Andrew Trick
afec190a28 In DelayForLiveRegsBottomUp, handle instructions that read and write 
the same physical register. Simplifies the fix from the previous
checkin r122211.

llvm-svn: 122370
 2010-12-21 22:27:44 +00:00
Andrew Trick
1e3ad9f721 whitespace 
llvm-svn: 122368
 2010-12-21 22:25:04 +00:00
Dale Johannesen
e0fb87c3d7 Reapply 122353-122355 with fixes. 122354 was wrong; 
the shift type was needed one place, the shift count
type another.  The transform in 123555 had the same
problem.

llvm-svn: 122366
 2010-12-21 21:55:50 +00:00
Benjamin Kramer
369872edfc Add some x86 specific dagcombines for conditional increments. 
(add Y, (sete  X, 0)) -> cmp X, 1; adc  0, Y
(add Y, (setne X, 0)) -> cmp X, 1; sbb -1, Y
(sub (sete  X, 0), Y) -> cmp X, 1; sbb  0, Y
(sub (setne X, 0), Y) -> cmp X, 1; adc -1, Y

for
  unsigned foo(unsigned a, unsigned b) {
    if (a == 0) b++;
    return b;
  }
we now get:
  foo:
    cmpl  $1, %edi
    movl  %esi, %eax
    adcl  $0, %eax
    ret
instead of:
  foo:
    testl %edi, %edi
    sete  %al
    movzbl  %al, %eax
    addl  %esi, %eax
    ret

llvm-svn: 122364
 2010-12-21 21:41:44 +00:00
Benjamin Kramer
fd119319ea GVN's Expression is not POD-like (it contains a SmallVector). Simplify code while at it. 
llvm-svn: 122362
 2010-12-21 21:30:19 +00:00
Dale Johannesen
972aba543a Revert 122353-122355 for the moment, they broke stuff. 
llvm-svn: 122360
 2010-12-21 21:22:27 +00:00
Rafael Espindola
a1091c31ba Simplify EvaluateAsAbsolute now that EvaluateAsRelocatableImpl does all 
the folding it can.

llvm-svn: 122359
 2010-12-21 20:51:42 +00:00
Rafael Espindola
3d9afa3c44 Don't relax org or align. They change size as the relaxation happens, but they 
are not actually relaxed. For example, a section with only alignments will never
needs relaxation.

llvm-svn: 122356
 2010-12-21 20:35:18 +00:00
Dale Johannesen
39186cfb0b Add a new transform to DAGCombiner. 
llvm-svn: 122355
 2010-12-21 20:10:51 +00:00
Dale Johannesen
5f3e7b08f6 Get the type of a shift from the shift, not from its shift 
count operand.  These should be the same but apparently are
not always, and this is cleaner anyway.  This improves the
code in an existing test.

llvm-svn: 122354
 2010-12-21 20:06:19 +00:00
Dale Johannesen
bad19334ee Shift by the word size is invalid IR; don't create it. 
llvm-svn: 122353
 2010-12-21 20:00:06 +00:00
Chris Lattner
8a3058137a fix some typos 
llvm-svn: 122349
 2010-12-21 18:05:22 +00:00
Stuart Hastings
fedc21e594 Fix indentation, add comment. 
llvm-svn: 122345
 2010-12-21 17:16:58 +00:00
Duncan Sands
c7868f60bc Visit instructions deterministically. Use a FIFO so as to approximately 
visit instructions before their uses, since InstructionSimplify does a
better job in that case.  All this prompted by Frits van Bommel.

llvm-svn: 122343
 2010-12-21 17:08:55 +00:00
Stuart Hastings
a1f786efa9 Missing logic for nested CALLSEQ_START/END. 
llvm-svn: 122342
 2010-12-21 17:07:24 +00:00
Duncan Sands
6e2fd37144 If an instruction simplifies, try again to simplify any uses of it. This is 
not very important since the pass is only used for testing, but it does make
it more realistic.  Suggested by Frits van Bommel.

llvm-svn: 122336
 2010-12-21 16:12:03 +00:00
Daniel Dunbar
1c98bbd915 MC/Mach-O: Shuffle enums a bit to make it harder to inadvertently use the wrong 
type.

llvm-svn: 122334
 2010-12-21 15:26:45 +00:00
Duncan Sands
b4497c7e0f While I don't think any later transforms can fire, it seems cleaner to 
not assume this (for example in case more transforms get added below
it).  Suggested by Frits van Bommel.

llvm-svn: 122332
 2010-12-21 15:03:43 +00:00
Duncan Sands
7e94cad96b Fix inverted condition noticed by Frits van Bommel. 
llvm-svn: 122331
 2010-12-21 14:48:48 +00:00
Duncan Sands
6b0ed93a81 Pull a few more simplifications out of instcombine (there are still 
plenty left though!), in particular for multiplication.

llvm-svn: 122330
 2010-12-21 14:00:22 +00:00
Duncan Sands
0bd25425b6 Teach InstructionSimplify about distributive laws. These transforms fire 
quite often, but don't make much difference in practice presumably because
instcombine also knows them and more.

llvm-svn: 122328
 2010-12-21 13:32:22 +00:00
Duncan Sands
2ca8f72575 Move checking of the recursion limit into the various Thread methods. 
No functionality change.

llvm-svn: 122327
 2010-12-21 09:09:15 +00:00
Duncan Sands
5880f299da Add generic simplification of associative operations, generalizing 
a couple of existing transforms.  This fires surprisingly often, for
example when compiling gcc "(X+(-1))+1->X" fires quite a lot as well
as various "and" simplifications (usually with a phi node operand).
Most of the time this doesn't make a real difference since the same
thing would have been done elsewhere anyway, eg: by instcombine, but
there are a few places where this results in simplifications that we
were not doing before.

llvm-svn: 122326
 2010-12-21 08:49:00 +00:00
Cameron Zwarich
0243f1d21e Incremental progress towards a new implementation of StrongPHIElimination. Most 
of the problems with my last attempt were in the updating of LiveIntervals
rather than the coalescing itself. Therefore, I decided to get that right first
by essentially reimplementing the existing PHIElimination using LiveIntervals.

It works correctly, with only a few tests failing (which may not be legitimate
failures) and no new verifier failures (at least as far as I can tell, I didn't
count the number per file).

llvm-svn: 122321
 2010-12-21 06:54:43 +00:00
Bob Wilson
01593c55a2 Add ARM-specific DAG combining to cast i64 vector element load/stores to f64. 
Type legalization splits up i64 values into pairs of i32 values, which leads
to poor quality code when inserting or extracting i64 vector elements.
If the vector element is loaded or stored, it can be treated as an f64 value
and loaded or stored directly from a VPR register.  Use the pre-legalization
DAG combiner to cast those vector elements to f64 types so that the type
legalizer won't mess them up.  Radar 8755338.

llvm-svn: 122319
 2010-12-21 06:43:19 +00:00
Rafael Espindola
e0e966982a Layout one section until no relaxations are done and then move to the next 
section.

This helps because in practice sections form a dag with debug sections pointing
to text sections. Finishing up the text sections first makes the debug section
relaxation trivial.

llvm-svn: 122314
 2010-12-21 04:22:09 +00:00
Eric Christopher
72ceef0a74 Arm and thumb call instructions are also in different orders. 
Fixes rdar://8782223

llvm-svn: 122313
 2010-12-21 03:50:43 +00:00
Chris Lattner
65c5243bd6 rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for 
something that just glues two nodes together, even if it is
sometimes used for flags.

llvm-svn: 122310
 2010-12-21 02:38:05 +00:00
Eric Christopher
81ae56b33c If we're not using reg+reg offset we're using reg+imm, set the opcode 
to be the one we want to use. bugpoint reduced testcase is a little large,
I'll see if I can simplify it down more.

Fixes part of rdar://8782207

llvm-svn: 122307
 2010-12-21 02:12:07 +00:00
Chris Lattner
b37e697277 improve "cannot yet select" errors a trivial amount: now 
they are just as useless, but at least a bit more gramatical

llvm-svn: 122305
 2010-12-21 02:07:03 +00:00
Bill Wendling
856080c8a1 Fix a copy-pasto. When the tBR_JTr instruction was converted to using the 
tPseudoInst class, its size was changed from "special" to "2 bytes". This is
incorrect because the jump table will no longer be taken into account when
calculating branch offsets.
<rdar://problem/8782216>

llvm-svn: 122303
 2010-12-21 01:57:15 +00:00
Bill Wendling
8c7f90099b Comment cleanups. 
llvm-svn: 122302
 2010-12-21 01:54:40 +00:00
Jakob Stoklund Olesen
e9eb1be4dd Add EdgeBundles to SplitKit. 
Edge bundles is an annotation on the CFG that turns it into a bipartite directed
graph where each basic block is connected to an outgoing and an ingoing bundle.
These bundles are useful for identifying regions of the CFG for live range
splitting.

llvm-svn: 122301
 2010-12-21 01:50:21 +00:00
Jakob Stoklund Olesen
86786c46c2 Use IntEqClasses to compute connected components of live intervals. 
llvm-svn: 122296
 2010-12-21 00:48:17 +00:00
Jakob Stoklund Olesen
26b4e8ec0a Add ADT/IntEqClasses.h as a light-weight implementation of EquivalenceClasses.h. 
This implementation already exists as ConnectedVNInfoEqClasses in
LiveInterval.cpp, and it seems to be generally useful to have a light-weight way
of forming equivalence classes of small integers.

IntEqClasses doesn't allow enumeration of the elements in a class.

llvm-svn: 122293
 2010-12-21 00:04:46 +00:00
Owen Anderson
308ca4e488 Speculatively revert the use of DenseMap in LazyValueInfo, which may be causing Linux self-host failures. 
llvm-svn: 122291
 2010-12-20 23:53:19 +00:00
Owen Anderson
b481f13b97 Attempt to appease the DragonEgg buildbots. 
llvm-svn: 122288
 2010-12-20 23:23:18 +00:00
Owen Anderson
c1eee5ac49 Revert r122114 (CallbackVH observing use-list changes) because it caused severe slowdowns on the Linux self-host configuration. 
llvm-svn: 122279
 2010-12-20 22:28:03 +00:00
Nate Begeman
c7dfecb10e Implement feedback from Bruno on making pblendvb an x86-specific ISD node in addition to being an intrinsic, and convert 
lowering to use it.  Hopefully the pattern fragment is doing the right thing with XMM0, looks correct in testing.

llvm-svn: 122277
 2010-12-20 22:04:24 +00:00
Owen Anderson
006186c519 Convert one of LVI's primary maps to a DenseMap, now that we know are more assured of iterator stability. 
llvm-svn: 122273
 2010-12-20 21:30:54 +00:00
Wesley Peck
e8ec7a4d1f Teach the MBlaze disassembler to disassemble special purpose registers. 
llvm-svn: 122269
 2010-12-20 21:18:04 +00:00
Roman Divacky
42b3eee794 Set the value of absolute symbols. 
llvm-svn: 122268
 2010-12-20 21:14:39 +00:00
Duncan Sands
0a1b3c4cee Oops, forgot to add the pass itself! 
llvm-svn: 122265
 2010-12-20 21:07:42 +00:00
Duncan Sands
09fbb211eb Add a new convenience pass for testing InstructionSimplify. Previously 
it could only be tested indirectly, via instcombine, gvn or some other
pass that makes use of InstructionSimplify, which means that testcases
had to be carefully contrived to dance around any other transformations
that that pass did.

llvm-svn: 122264
 2010-12-20 20:54:37 +00:00
Wesley Peck
af2890a051 Teach the MBlaze asm parser how to parse special purpose register names. 
llvm-svn: 122261
 2010-12-20 20:43:24 +00:00
Dale Johannesen
036c3da142 Cosmetic changes. 
llvm-svn: 122259
 2010-12-20 20:10:50 +00:00
Benjamin Kramer
2b3ad7e4dc Add a check missing from my last commit and avoid a potential overflow situation. 
llvm-svn: 122258
 2010-12-20 20:00:31 +00:00
Owen Anderson
7a69be36e5 More LVI cleanups, including trying to simplify the process of maintaining the OverDefinedCache. 
llvm-svn: 122256
 2010-12-20 19:33:41 +00:00
Owen Anderson
2ebd7e9192 Reuse the reference into the LVI cache throughout the solver subsystem. This is much easier to 
verify as being safe thanks its recent de-recursivization.

llvm-svn: 122254
 2010-12-20 18:18:16 +00:00
Benjamin Kramer
d38a47e082 Reduce indentation. 
llvm-svn: 122249
 2010-12-20 16:21:59 +00:00
Benjamin Kramer
bec7a6be15 Teach InstCombine to merge (icmp ult (X + CA), C1) | (icmp eq X, C2) into (icmp ult (X + CA), C1 + 1) if C2 + CA == C1. 
InstCombine creates these so now we compile x == 23 || x == 24 || x == 25 to
  %x.off = add i32 %x, -23
  %1 = icmp ult i32 %x.off, 3
instead of
  %x.off = add i32 %x, -23
  %1 = icmp ult i32 %x.off, 2
  %cmp3 = icmp eq i32 %x, 25
  %ret2 = or i1 %1, %cmp3

llvm-svn: 122248
 2010-12-20 16:18:51 +00:00
Daniel Dunbar
5580eff1f8 Add header... 
llvm-svn: 122247
 2010-12-20 15:45:51 +00:00
Daniel Dunbar
f1deaf06a9 X86/MC/Mach-O: Split out createX86MachObjectWriter(). 
llvm-svn: 122246
 2010-12-20 15:07:39 +00:00
Duncan Sands
f72cfa961d Have SimplifyBinOp dispatch Xor, Add and Sub to the corresponding methods 
(they had just been forgotten before).  Adding Xor causes "main" in the
existing testcase 2010-11-01-lshr-mask.ll to be hugely more simplified.

llvm-svn: 122245
 2010-12-20 14:47:04 +00:00
Michael J. Spencer
8e93c3829f Support/PathV2: Add missing has_relative_path impl. 
llvm-svn: 122243
 2010-12-20 13:30:28 +00:00
Duncan Sands
a37d282962 There is no need for isAssociative to take the type as an argument anymore. 
llvm-svn: 122242
 2010-12-20 13:10:23 +00:00
Chris Lattner
b27b5d0a3a fix PR8807 by making transformConstExprCastCall aware of byval arguments. 
llvm-svn: 122238
 2010-12-20 08:36:38 +00:00
Chris Lattner
a3fea736c1 various cleanups for transformConstExprCastCall 
llvm-svn: 122237
 2010-12-20 08:25:06 +00:00
Chris Lattner
ba962825a4 when eliding a byval copy due to inlining a readonly function, we have 
to make sure that the reused alloca has sufficient alignment.

llvm-svn: 122236
 2010-12-20 08:10:40 +00:00
Chris Lattner
c0a48df9f9 pull byval processing out to its own helper function. 
llvm-svn: 122235
 2010-12-20 07:57:41 +00:00
Chris Lattner
029952c844 fix PR8769, a miscompilation by inliner when inlining a function with a byval 
argument.  The generated alloca has to have at least the alignment of the
byval, if not, the client may be making assumptions that the new alloca won't
satisfy.

llvm-svn: 122234
 2010-12-20 07:45:28 +00:00
Cameron Zwarich
ad29bd5325 MachineVerifier should count landing pad successors as basic blocks rather than 
out-edges. Fixes PR8824.

llvm-svn: 122228
 2010-12-20 04:19:48 +00:00
Cameron Zwarich
6970ec515e Teach MachineVerifier that early clobber defs begin at USE slots and other defs 
begin at DEF slots. Fixes the second half of PR8813.

llvm-svn: 122225
 2010-12-20 03:15:20 +00:00
Cameron Zwarich
31af86ef44 Add a missing check from r122218. 
llvm-svn: 122224
 2010-12-20 02:59:51 +00:00
Chris Lattner
249e131f39 implement type legalization promotion support for SMULO and UMULO, giving 
ARM (and other 32-bit-only) targets support for i8 and i16 overflow 
multiplies.  The generated code isn't great, but this at least fixes
CodeGen/Generic/overflow.ll when running on ARM hosts.

llvm-svn: 122221
 2010-12-20 02:05:39 +00:00
Chris Lattner
bee7320c3c now that addc/adde are gone, "ADDC" in the X86 backend uses EFLAGS results, 
the same as setcc.  Optimize ADDC(0,0,FLAGS) -> SET_CARRY(FLAGS).  This is
a step towards finishing off PR5443.  In the testcase in that bug we now  get:

	movq	%rdi, %rax
	addq	%rsi, %rax
	sbbq	%rcx, %rcx
	testb	$1, %cl
	setne	%dl
	ret

instead of:

	movq	%rdi, %rax
	addq	%rsi, %rax
	movl	$0, %ecx
	adcq	$0, %rcx
	testq	%rcx, %rcx
	setne	%dl
	ret

llvm-svn: 122219
 2010-12-20 01:37:09 +00:00
Cameron Zwarich
bcd02fd9a4 Don't assume that an instruction ending a register's live range always reads 
the register; it may be a dead def instead. Fixes PR8820.

llvm-svn: 122218
 2010-12-20 01:22:37 +00:00
Chris Lattner
2d4e17d195 We lower setb to sbb with the hope that the and will go away, when it 
doesn't, match it back to setb.

On a 64-bit version of the testcase before we'd get:

	movq	%rdi, %rax
	addq	%rsi, %rax
	sbbb	%dl, %dl
	andb	$1, %dl
	ret

now we get:

	movq	%rdi, %rax
	addq	%rsi, %rax
	setb	%dl
	ret

llvm-svn: 122217
 2010-12-20 01:16:03 +00:00
Mon P Wang
4ab0ea216d Avoid dropping the address space when InstCombine optimizes memset 
llvm-svn: 122215
 2010-12-20 01:05:30 +00:00
Chris Lattner
16ea7f257f use for loop over types. 
llvm-svn: 122214
 2010-12-20 01:03:27 +00:00
Chris Lattner
8b1f76cad6 Change the X86 backend to stop using the evil ADDC/ADDE/SUBC/SUBE nodes (which 
their carry depenedencies with MVT::Flag operands) and use clean and beautiful
EFLAGS dependences instead.

We do this by changing the modelling of SBB/ADC to have EFLAGS input and outputs
(which is what requires the previous scheduler change) and change X86 ISelLowering
to custom lower ADDC and friends down to X86ISD::ADD/ADC/SUB/SBB nodes.

With the previous series of changes, this causes no changes in the testsuite, woo.

llvm-svn: 122213
 2010-12-20 00:59:46 +00:00
Chris Lattner
0f801998bf Fix a bug in the scheduler's handling of "unspillable" vregs. 
Imagine we see:

EFLAGS = inst1
EFLAGS = inst2 FLAGS
gpr = inst3 EFLAGS

Previously, we would refuse to schedule inst2 because it clobbers
the EFLAGS of the predecessor.  However, it also uses the EFLAGS
of the predecessor, so it is safe to emit.  SDep edges ensure that
the right order happens already anyway.

This fixes 2 testsuite crashes with the X86 patch I'm going to
commit next.

llvm-svn: 122211
 2010-12-20 00:55:43 +00:00
Chris Lattner
85875bf06b the result of CheckForLiveRegDef is dead, remove it. 
llvm-svn: 122209
 2010-12-20 00:51:56 +00:00
Chris Lattner
ee7fa0d706 reduce indentation, no functionality change. 
llvm-svn: 122208
 2010-12-20 00:50:16 +00:00
Cameron Zwarich
8c00d690f5 Ignore debug values when performing MachineVerifier liveness checks. Fixes 
PR8822.

llvm-svn: 122207
 2010-12-20 00:08:10 +00:00
Mon P Wang
d3adab7a64 Prevents PerformShuffleCombine from creating a node with an illegal type after legalize types 
has run, e.g., prevent creating an i64 node from a v2i64 when i64 is not a legal type.

llvm-svn: 122206
 2010-12-19 23:55:53 +00:00
Cameron Zwarich
c8dfbe7503 Early clobber operands are allowed to be defined at use indices. This fixes one 
half of PR8813.

llvm-svn: 122205
 2010-12-19 23:50:53 +00:00
Chris Lattner
c8327b2f7c fix an oversight caught by Frits! 
llvm-svn: 122204
 2010-12-19 23:24:04 +00:00
Cameron Zwarich
6f5c1021ba Fix PR8815 by checking for an explicit clobber def tied to a use operand in 
ConnectedVNInfoEqClasses::Classify().

llvm-svn: 122202
 2010-12-19 22:12:45 +00:00
Chris Lattner
297259f6f1 improve the setcc -> setcc_carry optimization to happen more 
consistently by moving it out of lowering into dag combine.

Add some missing patterns for matching away extended versions of setcc_c.

llvm-svn: 122201
 2010-12-19 22:08:31 +00:00
Cameron Zwarich
37aec9c35d Fix PR8811 by teaching MachineVerifier about optional defs. 
llvm-svn: 122199
 2010-12-19 21:37:23 +00:00
Cameron Zwarich
64fbc5e267 StrongPHIElimination will never run before TwoAddressInstructionPass. 
llvm-svn: 122197
 2010-12-19 21:32:29 +00:00
Chris Lattner
1f31c7fa15 simplify some code to just reuse a setcc if we can instead of 
going through the CSE maps to get it.

llvm-svn: 122196
 2010-12-19 21:23:48 +00:00
Nick Lewycky
c85935836b Add missing standard headers. Patch by Joerg Sonnenberger! 
llvm-svn: 122193
 2010-12-19 20:43:38 +00:00
Nick Lewycky
e718af6c63 Add missing std:: prefixes to some calls. C++ doesn't require that <cfoo> 
headers provide symbols outside namespace std and the LLVM coding standards
state that we should prefix all of them.

llvm-svn: 122192
 2010-12-19 20:42:43 +00:00
Chris Lattner
92dcd2af36 teach MaskedValueIsZero how to analyze ADDE. This is 
enough to teach it that ADDE(0,0) is known 0 except the 
low bit, for example.

llvm-svn: 122191
 2010-12-19 20:38:28 +00:00
Chris Lattner
45f7e2d4cb tidy up 
llvm-svn: 122190
 2010-12-19 20:24:28 +00:00
Chris Lattner
2d59eef5fd now that generic vector types aren't selected onto MMX operations, 
we don't need -disable-mmx anymore.

llvm-svn: 122189
 2010-12-19 20:19:20 +00:00
Chris Lattner
30438e63c8 reduce copy/paste programming with the power of for loops. 
llvm-svn: 122187
 2010-12-19 20:07:10 +00:00
Chris Lattner
29475c23d0 X86 supports i8/i16 overflow ops (except i8 multiplies), we should 
generate them.  

Now we compile:

define zeroext i8 @X(i8 signext %a, i8 signext %b) nounwind ssp {
entry:
  %0 = tail call %0 @llvm.sadd.with.overflow.i8(i8 %a, i8 %b)
  %cmp = extractvalue %0 %0, 1
  br i1 %cmp, label %if.then, label %if.end

into:

_X:                                     ## @X
## BB#0:                                ## %entry
	subl	$12, %esp
	movb	16(%esp), %al
	addb	20(%esp), %al
	jo	LBB0_2

Before we were generating:

_X:                                     ## @X
## BB#0:                                ## %entry
	pushl	%ebp
	movl	%esp, %ebp
	subl	$8, %esp
	movb	12(%ebp), %al
	testb	%al, %al
	setge	%cl
	movb	8(%ebp), %dl
	testb	%dl, %dl
	setge	%ah
	cmpb	%cl, %ah
	sete	%cl
	addb	%al, %dl
	testb	%dl, %dl
	setge	%al
	cmpb	%al, %ah
	setne	%al
	andb	%cl, %al
	testb	%al, %al
	jne	LBB0_2

llvm-svn: 122186
 2010-12-19 20:03:11 +00:00
Chris Lattner
7858cb9c08 move a transformation to a more logical place, simplifying it. 
llvm-svn: 122183
 2010-12-19 19:43:52 +00:00
Chris Lattner
3bc741a0d2 recognize an unsigned add with overflow idiom into uadd. 
This resolves a README entry and technically resolves PR4916,
but we still get poor code for the testcase in that PR because
GVN isn't CSE'ing uadd with add, filed as PR8817.

Previously we got:

_test7:                                 ## @test7
	addq	%rsi, %rdi
	cmpq	%rdi, %rsi
	movl	$42, %eax
	cmovaq	%rsi, %rax
	ret

Now we get:

_test7:                                 ## @test7
	addq	%rsi, %rdi
	movl	$42, %eax
	cmovbq	%rsi, %rax
	ret

llvm-svn: 122182
 2010-12-19 19:37:52 +00:00
Chris Lattner
faef9b6bfb optimize uadd(x, cst) into a comparison when the normal 
result is dead.  This is required for my next patch to not
regress the testsuite.

llvm-svn: 122181
 2010-12-19 19:35:32 +00:00
Chris Lattner
c5074803db use IC.ReplaceInstUsesWith instead of a raw RAUW so that uses of 
the old thing end up on the instcombine worklist.  Not doing this
can cause an extra top-level iteration of instcombine, burning
compile time.

llvm-svn: 122179
 2010-12-19 18:38:44 +00:00
Chris Lattner
d1f114d8f2 generalize the sadd creation code to not require that the 
sadd formed is half the size of the original type. We can
now compile this into a sadd.i8:

unsigned char X(char a, char b) {
  int res = a+b;
  if ((unsigned )(res+128) > 255U)
    abort();
  return res;
}

llvm-svn: 122178
 2010-12-19 18:35:09 +00:00
Chris Lattner
bb0d067691 fix another miscompile in the llvm.sadd formation logic: it wasn't 
checking to see if the high bits of the original add result were dead.
Inserting a smaller add and zexting back to that size is not good enough.

This is likely to be the fix for 8816.

llvm-svn: 122177
 2010-12-19 18:22:06 +00:00
Cameron Zwarich
163792fb1f Remove some checks for StrongPHIElim. These checks make it impossible to use an 
alternative register allocator that does not require LiveIntervals by specifying
it on the command-line for a target that has StrongPHIElimination enabled by
default.

These checks are pretty meaningless anyways, since StrongPHIElimination and
PHIElimination are never used at the same time.

llvm-svn: 122176
 2010-12-19 18:03:27 +00:00
Chris Lattner
c7876edb16 fix a bug (possibly 8816) in the sadd forming xform: it isn't 
profitable (or safe) to promote code when the add-with-constant
has other uses.

llvm-svn: 122175
 2010-12-19 17:59:02 +00:00
Chris Lattner
cc804862d5 rework the code added in r122072 to pull it out to its own 
helper function, clean up comments, and reduce indentation.
No functionality change.

llvm-svn: 122174
 2010-12-19 17:52:50 +00:00
Chris Lattner
bb93cd80d6 Enhance LICM to promote alias sets whose pointers themselves are stored, 
which doesn't affect the memory address being promoted.

llvm-svn: 122172
 2010-12-19 05:57:25 +00:00
Chris Lattner
71fcecf597 fix PR8602, a bug in an assertion: a volatile store *of* a pointer 
does not make the alias set for that pointer volatile, just stores
*to* the pointer.

llvm-svn: 122171
 2010-12-19 05:51:54 +00:00
Chris Lattner
ac82ea26da fix PR8642: if a critical edge has a PHI value that can trap, 
isel is *required* to split the edge.  PHI values get evaluated
on the edge, not in their predecessor block.

llvm-svn: 122170
 2010-12-19 04:58:57 +00:00
Chris Lattner
0965f3f76d revert r122164, I'm going to go with a different approach. 
llvm-svn: 122168
 2010-12-19 04:23:03 +00:00
Rafael Espindola
894b34478f Fixed version of 122160 (the previous one would fold undefined symbols). 
llvm-svn: 122167
 2010-12-19 04:18:56 +00:00
Rafael Espindola
702b7a3b37 Revert 122160 while I debug it. 
llvm-svn: 122165
 2010-12-19 03:22:05 +00:00
Chris Lattner
14a3e26146 first step to fixing PR8642: don't fold away empty basic blocks 
which have trapping constant exprs in them due to PHI nodes.
Eliminating them can cause the constant expr to be evalutated
on new paths if the input edges are critical.

llvm-svn: 122164
 2010-12-19 03:02:34 +00:00
Rafael Espindola
50fd4aa80f Move all folding to AttemptToFoldSymbolOffsetDifference. 
llvm-svn: 122160
 2010-12-19 02:15:04 +00:00
Michael J. Spencer
6269cd9426 Fix whitespace. 
llvm-svn: 122158
 2010-12-18 22:23:15 +00:00
Michael J. Spencer
4701f704be Support/PathV1: Deprecate get{Basename,Dirname,Suffix}. 
llvm-svn: 122157
 2010-12-18 22:23:07 +00:00
Chris Lattner
25d76d1e53 simplify this a bit. 
llvm-svn: 122156
 2010-12-18 20:22:49 +00:00
Anton Korobeynikov
f49c9c02d6 Restore the behavior of frame lowering before my refactoring. 
It turns out that ppc backend has really weird interdependencies
over different hooks and all stuff is fragile wrt small changes.
This should fix PR8749

llvm-svn: 122155
 2010-12-18 19:53:14 +00:00
Roman Divacky
ed5bb14415 Add support for lexing single quotes like 'c'. 
This fixed 8615.

llvm-svn: 122150
 2010-12-18 08:56:37 +00:00
Owen Anderson
7103acd18e Revert r122143 through r122140, which collectively broke the LLVMC tests on 
the buildbots.

llvm-svn: 122149
 2010-12-18 07:37:18 +00:00
Rafael Espindola
df98fb74f6 Merge isAbsolute into IsSymbolRefDifferenceFullyResolved. 
llvm-svn: 122148
 2010-12-18 06:27:54 +00:00
Rafael Espindola
7f9be9e112 Remove the MCObjectFormat class. 
llvm-svn: 122147
 2010-12-18 05:37:28 +00:00
Rafael Espindola
0b15443dd3 Add a FIXME and explain a hack. 
llvm-svn: 122144
 2010-12-18 04:19:20 +00:00
Michael J. Spencer
1bbb8752a8 Fix whitespace. 
llvm-svn: 122142
 2010-12-18 04:13:46 +00:00
Michael J. Spencer
6d64a36ced Support/PathV1: Deprecate get{Basename,Dirname,Suffix}. 
llvm-svn: 122141
 2010-12-18 04:13:36 +00:00
Rafael Espindola
b8369170e9 Fix the note. 
llvm-svn: 122139
 2010-12-18 04:01:45 +00:00
Rafael Espindola
f3aeaaa3f4 Revert 122011, 122012, 122013, 122023 adding back an important optimization. 
I added a note, but suggestions on how to add a test are really welcome.

llvm-svn: 122138
 2010-12-18 03:57:21 +00:00
Jakob Stoklund Olesen
bdf06d6c7b Apparently, operandices is not a word. 
llvm-svn: 122135
 2010-12-18 03:28:32 +00:00
Rafael Espindola
9a4bfd7755 Move some data to the TargetWriter. 
llvm-svn: 122134
 2010-12-18 03:27:34 +00:00
Jakob Stoklund Olesen
e06ded7533 Teach the inline spiller to attempt folding a load instruction into its single 
use before rematerializing the load.

This allows us to produce:

    addps	LCPI0_1(%rip), %xmm2

Instead of:

    movaps	LCPI0_1(%rip), %xmm3
    addps	%xmm3, %xmm2

Saving a register and an instruction. The standard spiller already knows how to
do this.

llvm-svn: 122133
 2010-12-18 03:04:14 +00:00
Jakob Stoklund Olesen
485b7965b3 Tweak debug spew. 
llvm-svn: 122132
 2010-12-18 03:04:11 +00:00
Bill Wendling
9b2ef1c9be r120333 changed the opcode for the Thumb1 stuff from ARM::tMOVr to 
ARM::tMOVgpr2gpr. But this check didn't change. As a result, we were getting
misaligned references to the jump table from an ADR instruction.

There is a test case, but unfortunately it's sensitive to random code changes.

<rdar://problem/8782223>

llvm-svn: 122131
 2010-12-18 02:13:59 +00:00
Bill Wendling
2dde4e38c9 RemoveUnusedCPEntries can change things. Track it. 
llvm-svn: 122129
 2010-12-18 01:53:06 +00:00
Jakob Stoklund Olesen
a2f2eab8d4 Check that the register is live-in to the loop header before inserting copies in 
the loop predecessors.

The register can be live-out from a predecessor without being live-in to the
loop header if there is a critical edge from the predecessor.

llvm-svn: 122123
 2010-12-18 01:06:19 +00:00
Nick Lewycky
30eef45106 Fix GCC warning: 
lib/CodeGen/RegAllocGreedy.cpp:311: error: unused variable 'PhysReg' [-Wunused-variable]

llvm-svn: 122122
 2010-12-18 01:05:55 +00:00
Rafael Espindola
ba05bec626 Relax push instructions. 
llvm-svn: 122121
 2010-12-18 01:01:34 +00:00
Nick Lewycky
44a08d5812 Make LazyValueInfo non-recursive. 
llvm-svn: 122120
 2010-12-18 01:00:40 +00:00
Bob Wilson
5f9e78fe20 Rearrange some Neon multiclasses. No functional changes. 
llvm-svn: 122119
 2010-12-18 00:42:58 +00:00
Michael J. Spencer
bb238417bb Support/PathV1: Deprecate getLast. 
llvm-svn: 122116
 2010-12-18 00:19:10 +00:00
Owen Anderson
702d715185 Add support to CallbackVH to receive notification when a Value's use-list changes. 
llvm-svn: 122114
 2010-12-18 00:07:15 +00:00
Jakob Stoklund Olesen
2879da5e13 Pass a Banner argument to the machine code verifier both from 
createMachineVerifierPass and MachineFunction::verify.

The banner is printed before the machine code dump, just like the printer pass.

llvm-svn: 122113
 2010-12-18 00:06:56 +00:00
Bob Wilson
776d3f73eb Fix result type of Neon floating-point comparisons against zero. 
The result vector elements are always integers.  Radar 8782191.

llvm-svn: 122112
 2010-12-18 00:04:33 +00:00
Bob Wilson
c000db3584 Add some missing entries in ARMTargetLowering::getTargetNodeName. 
llvm-svn: 122111
 2010-12-18 00:04:26 +00:00
Bill Wendling
b1f6875ae3 Whitespace fixes. No functionality change. 
llvm-svn: 122110
 2010-12-17 23:27:41 +00:00
Jakob Stoklund Olesen
6498db2c8c Avoid dereferencing end() in collectInterferingVRegs() when there is no 
interference.

llvm-svn: 122108
 2010-12-17 23:16:38 +00:00
Jakob Stoklund Olesen
db4b62f32e Make the -verify-regalloc command line option available to base classes as 
RegAllocBase::VerifyEnabled.

Run the machine code verifier in a few interesting places during RegAllocGreedy.

llvm-svn: 122107
 2010-12-17 23:16:35 +00:00
Jakob Stoklund Olesen
df9e162423 Enable loop splitting in RegAllocGreedy. 
The heuristics split around the largest loop where the current register may be
allocated without interference.

llvm-svn: 122106
 2010-12-17 23:16:32 +00:00
Nate Begeman
063d88d6fb Add vector versions of some existing scalar transforms to aid codegen in matching psign & pblend operations to the IR produced by clang/gcc for their C idioms. 
llvm-svn: 122105
 2010-12-17 23:12:19 +00:00
Bill Wendling
c16f9b1ccc During local stack slot allocation, the materializeFrameBaseRegister function 
may be called. If the entry block is empty, the insertion point iterator will be
the "end()" value. Calling ->getParent() on it (among others) causes problems.

Modify materializeFrameBaseRegister to take the machine basic block and insert
the frame base register at the beginning of that block. (It's very similar to
what the code does all ready. The only difference is that it will always insert
at the beginning of the entry block instead of after a previous materialization
of the frame base register. I doubt that that matters here.)

<rdar://problem/8782198>

llvm-svn: 122104
 2010-12-17 23:09:14 +00:00
Bob Wilson
c57c2d755b Fix a DAGCombiner crash when folding binary vector operations with constant 
BUILD_VECTOR operands where the element type is not legal.  I had previously
changed this code to insert TRUNCATE operations, but that was just wrong.

llvm-svn: 122102
 2010-12-17 23:06:49 +00:00
Bob Wilson
12f2b81599 Avoid report_fatal_error in ARM's PrintAsmOperand method. 
The standard error handling in AsmPrinter::EmitInlineAsm handles this much
better, so just use it.

llvm-svn: 122100
 2010-12-17 23:06:42 +00:00
Bob Wilson
21981d44ce Remove trailing whitespace. 
llvm-svn: 122099
 2010-12-17 23:06:32 +00:00
Nate Begeman
ef5f3c0fa7 Add support for matching psign & plendvb to the x86 target 
Remove unnecessary pandn patterns, 'vnot' patfrag looks through bitcasts

llvm-svn: 122098
 2010-12-17 22:55:37 +00:00
Owen Anderson
900ac27338 Thumb's forced-PC-alignment requirement applies to the _total_ displacement, not just to the fragment relative 
portion.  While the fragment boundary is usually already aligned, it is possible for it not to be, which 
would lead to a non-aligned final displacement.

llvm-svn: 122091
 2010-12-17 21:49:48 +00:00
Dale Johannesen
c2c6ebd82a Add a transform to DAG Combiner. This improves the 
code for the case where 32-bit divide by constant is
turned into 64-bit multiply by constant.  8771012.

llvm-svn: 122090
 2010-12-17 21:45:49 +00:00
Michael J. Spencer
f2bf8518fb Support/Path: Deprecate PathV1::isAbsolute. 
llvm-svn: 122086
 2010-12-17 21:21:31 +00:00
Benjamin Kramer
8aca840aff PathV2: Use StringRef::substr to simplify substring creation. 
llvm-svn: 122085
 2010-12-17 20:27:37 +00:00
Jakob Stoklund Olesen
0dc90e6b1b Allow missing kill flags on an untied operand of a two-address instruction when 
the operand uses the same register as a tied operand:

  %r1 = add %r1, %r1

If add were a three-address instruction, kill flags would be required on at
least one of the uses. Since it is a two-address instruction, the tied use
operand must not have a kill flag.

This change makes the kill flag on the untied use operand optional.

llvm-svn: 122082
 2010-12-17 19:18:41 +00:00
Jim Grosbach
7ca8ed3d5d If The ARM WriteNopData() gets an unaligned byte count to pad out, fill in with 
a partial value. rdar://8782954

llvm-svn: 122078
 2010-12-17 19:03:02 +00:00
Benjamin Kramer
a7366b3f19 Missed some StringRefRefs. 
llvm-svn: 122077
 2010-12-17 18:59:09 +00:00
Jim Grosbach
9017f2d179 Add bits 31-28 to the Thumb2 encoding of TBB/TBH. 
llvm-svn: 122076
 2010-12-17 18:42:56 +00:00
Jim Grosbach
e0f65aaf8d Handle 2 and 4 byte data blob fixup values for ARM. 
llvm-svn: 122075
 2010-12-17 18:39:10 +00:00
Benjamin Kramer
89db30db3a Pass StringRefs by value, for consistency. 
llvm-svn: 122074
 2010-12-17 18:19:06 +00:00
Jakob Stoklund Olesen
f4a0c81371 Add MachineLoopRange comparators for sorting loop lists by number and by area. 
llvm-svn: 122073
 2010-12-17 18:13:52 +00:00
Owen Anderson
6acf8c9125 Reapply r121905 (automatic synthesis of @llvm.sadd.with.overflow) with a fix for a bug that manifested itself 
on the DragonEgg self-host bot.  Unfortunately, the testcase is pretty messy and doesn't reduce well due to
interactions with other parts of InstCombine.

llvm-svn: 122072
 2010-12-17 18:08:00 +00:00
Rafael Espindola
3da3498b0a Store and free the TargetObjectWriter. 
llvm-svn: 122070
 2010-12-17 18:01:31 +00:00
Rafael Espindola
b9ca29bc1c Stub out explicit MCELFObjectTargetWriter interface. 
llvm-svn: 122067
 2010-12-17 17:45:22 +00:00
Rafael Espindola
38e6fdfd1d Move createELFObjectWriter to its own header. 
llvm-svn: 122064
 2010-12-17 16:59:53 +00:00
Benjamin Kramer
39b30b18fa SimplifyCFG: Ranges can be larger than 64 bits. Fixes Release-selfhost build. 
llvm-svn: 122054
 2010-12-17 10:48:14 +00:00
Benjamin Kramer
2203fe28df Fix mismatched new[]/delete. 
llvm-svn: 122053
 2010-12-17 09:56:50 +00:00
Kalle Raiskila
68f221707a Don't feed 19 bit immediates to ILA. 
Patch (slightly modified) by Visa Putkinen.

llvm-svn: 122052
 2010-12-17 09:36:09 +00:00
Rafael Espindola
709ffb7084 Use getFixupKindInfo to implement isFixupKindPCRel, ELF version. 
llvm-svn: 122050
 2010-12-17 07:28:17 +00:00
Chris Lattner
e92f8121d4 improve switch formation to handle small range 
comparisons formed by comparisons.  For example,
this:

void foo(unsigned x) {
  if (x == 0 || x == 1 || x == 3 || x == 4 || x == 6) 
    bar();
}

compiles into:

_foo:                                   ## @foo
## BB#0:                                ## %entry
	cmpl	$6, %edi
	ja	LBB0_2
## BB#1:                                ## %entry
	movl	%edi, %eax
	movl	$91, %ecx
	btq	%rax, %rcx
	jb	LBB0_3

instead of:

_foo:                                   ## @foo
## BB#0:                                ## %entry
	cmpl	$2, %edi
	jb	LBB0_4
## BB#1:                                ## %switch.early.test
	cmpl	$6, %edi
	ja	LBB0_3
## BB#2:                                ## %switch.early.test
	movl	%edi, %eax
	movl	$88, %ecx
	btq	%rax, %rcx
	jb	LBB0_4

This catches a bunch of cases in GCC, which look like this:

 %804 = load i32* @which_alternative, align 4, !tbaa !0
 %805 = icmp ult i32 %804, 2
 %806 = icmp eq i32 %804, 3
 %or.cond121 = or i1 %805, %806
 %807 = icmp eq i32 %804, 4
 %or.cond124 = or i1 %or.cond121, %807
 br i1 %or.cond124, label %.thread, label %808

turning this into a range comparison.

llvm-svn: 122045
 2010-12-17 06:20:15 +00:00
Daniel Dunbar
eea7fd1c3e MC/ARM: Use aggressive symbol folding (important for jump tables, for example). 
llvm-svn: 122044
 2010-12-17 06:00:24 +00:00
Daniel Dunbar
1f9fd0b79b MC/Expr: Implemnt more aggressive folding during symbol evaluation using 
IsSymbolRefDifferenceFullyResolved(). For example, we will now fold away
something like:
--
_a:
...
L0:
...
L1:
...
.long (L1 - L0) / 2
--

llvm-svn: 122043
 2010-12-17 05:50:33 +00:00
Daniel Dunbar
6979fc1057 MC/Mach-O: On second thought, use a custom hook for enabling aggressive 
IsSymbolRefDifferenceFullyResolved, it turns out this does change behavior on
enough cases for x86-32 that I would rather wait a bit on it.
 - In practice, we will want to change this eventually because it only means we
   generate less relocations (it also eliminates the need for the horrible
   '.set' hack that Darwin requires in some places).

llvm-svn: 122042
 2010-12-17 05:50:29 +00:00
Daniel Dunbar
14208868a4 MC/Mach-O: Implement IsSymbolRefDifferenceFullyResolved. 
- Unlike for fixups, we always do the "reliable" thing (not just for x86_64).
 - Since Darwin 'as' would typically reject things that using this will allow,
   we don't need to worry about compatibility.

llvm-svn: 122038
 2010-12-17 04:54:58 +00:00
Daniel Dunbar
2caf23b5a9 MC/ObjectWriter: Add a new IsSymbolRefDifferenceFullyResolved target format specific hook. 
- Currently just has stub implementations for Mach-O, ELF, and COFF.

llvm-svn: 122037
 2010-12-17 04:54:54 +00:00
Jakob Stoklund Olesen
40f23cd5ca Provide LiveIntervalUnion::Query::checkLoopInterference. 
This is a three-way interval list intersection between a virtual register, a
live interval union, and a loop. It will be used to identify interference-free
loops for live range splitting.

llvm-svn: 122034
 2010-12-17 04:09:47 +00:00
Daniel Dunbar
f77af712b7 MC/Assembler: Strip out object writer arguments, now that it is always available 
-- and remove FIXME asking for the same!

llvm-svn: 122032
 2010-12-17 02:45:59 +00:00
Daniel Dunbar
54b3f3e5db MC/Assembler: Make the MCObjectWriter available through the lifetime of the 
assembler.

llvm-svn: 122031
 2010-12-17 02:45:41 +00:00
Jim Grosbach
3bb926adff Trailing whitespace and 80 column fixups. 
llvm-svn: 122026
 2010-12-17 02:10:59 +00:00
Daniel Dunbar
6d4a3e98f3 MC/Target: Remove HasScatteredSymbols target hook variable, which has been 
superceded and was effectively dead.

llvm-svn: 122024
 2010-12-17 02:06:08 +00:00
Daniel Dunbar
0d8fdf42c7 MC/Expr: Simplify. 
llvm-svn: 122023
 2010-12-17 02:05:45 +00:00
Bob Wilson
e06f6eabe7 Fix crash compiling a QQQQ REG_SEQUENCE for a Neon vld3_lane operation. 
Radar 8776599

llvm-svn: 122018
 2010-12-17 01:21:12 +00:00
Bob Wilson
125f1a26e0 Use PairDRegs to implement ConcatVectors. No functionality change. 
llvm-svn: 122017
 2010-12-17 01:21:08 +00:00