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AsmParser
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[AMDGPU][MC] Added lds support for MUBUF instructions
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2018-02-21 13:13:48 +00:00 |
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Disassembler
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[AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifier
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2018-02-05 14:18:53 +00:00 |
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InstPrinter
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[AMDGPU] Add HW_REG_SH_MEM_BASES symbolic name for s_getreg_b32
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2018-01-15 18:49:15 +00:00 |
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MCTargetDesc
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AMDGPU: Remove unused private member of AMDGPUTargetELFStreamer
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2018-02-16 23:04:11 +00:00 |
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TargetInfo
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Utils
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[AMDGPU] Add default ISA version targets
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2018-03-06 18:33:55 +00:00 |
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AMDGPU.h
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[AMDGPU] Change constant addr space to 4
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2018-02-13 18:00:25 +00:00 |
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AMDGPU.td
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AMDGPU: Add fast fmaf feature to gfx702
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2018-02-27 21:46:15 +00:00 |
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AMDGPUAliasAnalysis.cpp
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[AMDGPU] Change constant addr space to 4
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2018-02-13 18:00:25 +00:00 |
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AMDGPUAliasAnalysis.h
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AMDGPUAlwaysInlinePass.cpp
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AMDGPUAnnotateKernelFeatures.cpp
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AMDGPUAnnotateUniformValues.cpp
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AMDGPUArgumentUsageInfo.cpp
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AMDGPUArgumentUsageInfo.h
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AMDGPUAsmPrinter.cpp
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[AMDGPU] do not generate .AMDGPU.config for amdpal os type
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2018-02-06 13:39:38 +00:00 |
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AMDGPUAsmPrinter.h
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AMDGPUCallingConv.td
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AMDGPUCallLowering.cpp
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[AMDGPU] Change constant addr space to 4
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2018-02-13 18:00:25 +00:00 |
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AMDGPUCallLowering.h
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AMDGPUCodeGenPrepare.cpp
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Reapply "AMDGPU: Add 32-bit constant address space"
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2018-02-09 16:57:57 +00:00 |
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUGenRegisterBankInfo.def
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AMDGPU/GlobalISel: Use a more correct getValueMapping
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2018-03-01 21:08:51 +00:00 |
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AMDGPUInline.cpp
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AMDGPUInstrInfo.cpp
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Reapply "AMDGPU: Add 32-bit constant address space"
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2018-02-09 16:57:57 +00:00 |
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AMDGPUInstrInfo.h
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AMDGPU: Fix layering issue
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2018-02-09 16:57:48 +00:00 |
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AMDGPUInstrInfo.td
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AMDGPU: Add intrinsics llvm.amdgcn.cvt.{pknorm.i16, pknorm.u16, pk.i16, pk.u16}
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2018-01-31 20:18:04 +00:00 |
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AMDGPUInstructions.td
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[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
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2018-03-09 17:41:39 +00:00 |
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AMDGPUInstructionSelector.cpp
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Reapply "AMDGPU: Add 32-bit constant address space"
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2018-02-09 16:57:57 +00:00 |
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AMDGPUInstructionSelector.h
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AMDGPUIntrinsicInfo.cpp
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AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPUISelDAGToDAG.cpp
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Revert: r327172 "Correct load-op-store cycle detection analysis"
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2018-03-10 02:16:15 +00:00 |
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AMDGPUISelLowering.cpp
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Pass Divergence Analysis data to Selection DAG to drive divergence
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2018-03-05 15:12:21 +00:00 |
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AMDGPUISelLowering.h
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AMDGPU: Fix build warning about override
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2018-03-05 16:25:10 +00:00 |
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AMDGPULegalizerInfo.cpp
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AMDGPU/GlobalISel: Make some G_MERGE_VALUEs legal
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2018-03-12 13:35:43 +00:00 |
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AMDGPULegalizerInfo.h
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AMDGPU/GlobalISel: Pass subtarget + TM to LegalizerInfo
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2018-03-08 16:24:16 +00:00 |
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AMDGPULibCalls.cpp
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AMDGPULibFunc.cpp
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AMDGPULibFunc.h
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AMDGPULowerIntrinsics.cpp
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AMDGPUMachineCFGStructurizer.cpp
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AMDGPUMachineFunction.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AMDGPUMachineFunction.h
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AMDGPUMachineModuleInfo.cpp
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AMDGPUMachineModuleInfo.h
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AMDGPUMacroFusion.cpp
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AMDGPUMacroFusion.h
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AMDGPUMCInstLower.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AMDGPUMCInstLower.h
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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[AMDGPU] Fix lowering OpenCL enqueue_kernel
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2018-03-06 16:04:39 +00:00 |
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AMDGPUOpenCLImageTypeLoweringPass.cpp
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AMDGPUPromoteAlloca.cpp
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AMDGPU/SI: Extend promoting alloca to vector to arrays of up to 16 elements
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2018-02-16 19:14:17 +00:00 |
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AMDGPUPTNote.h
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AMDGPURegAsmNames.inc.cpp
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AMDGPURegisterBankInfo.cpp
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AMDGPU/GlobalISel: Add InstrMapping for G_EXTRACT
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2018-03-05 16:25:18 +00:00 |
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AMDGPURegisterBankInfo.h
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AMDGPU/GlobalISel: Define instruction mapping for G_OR
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2018-03-01 21:25:25 +00:00 |
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AMDGPURegisterBanks.td
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AMDGPU/GlobalISel: Define InstrMappings for G_ICMP
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2018-03-01 19:27:10 +00:00 |
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AMDGPURegisterInfo.cpp
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[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
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2018-01-24 18:09:53 +00:00 |
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AMDGPURegisterInfo.h
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[AMDGPU] Return true in enableMultipleCopyHints().
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2018-02-17 10:00:28 +00:00 |
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AMDGPURegisterInfo.td
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AMDGPURewriteOutArguments.cpp
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AMDGPUSubtarget.cpp
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AMDGPU/GlobalISel: Pass subtarget + TM to LegalizerInfo
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2018-03-08 16:24:16 +00:00 |
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AMDGPUSubtarget.h
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[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
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2018-03-09 17:41:39 +00:00 |
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AMDGPUTargetMachine.cpp
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[AMDGPU] Change constant addr space to 4
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2018-02-13 18:00:25 +00:00 |
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AMDGPUTargetMachine.h
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(Re-landing) Expose a TargetMachine::getTargetTransformInfo function
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2017-12-22 18:21:59 +00:00 |
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AMDGPUTargetObjectFile.cpp
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AMDGPUTargetObjectFile.h
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AMDGPUTargetTransformInfo.cpp
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[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
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2018-03-09 17:41:39 +00:00 |
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AMDGPUTargetTransformInfo.h
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[AMDGPU] Increased vector length for global/constant loads.
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2018-03-07 17:09:18 +00:00 |
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AMDGPUUnifyDivergentExitNodes.cpp
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AMDGPUUnifyMetadata.cpp
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AMDILCFGStructurizer.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AMDKernelCodeT.h
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BUFInstructions.td
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[AMDGPU][MC] Added lds support for MUBUF instructions
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2018-02-21 13:13:48 +00:00 |
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CaymanInstructions.td
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CMakeLists.txt
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DSInstructions.td
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[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
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2018-03-09 17:41:39 +00:00 |
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EvergreenInstructions.td
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AMDGPU: Select BFI patterns with 64-bit ints
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2018-02-07 00:21:34 +00:00 |
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FLATInstructions.td
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GCNHazardRecognizer.cpp
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GCNHazardRecognizer.h
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GCNILPSched.cpp
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GCNIterativeScheduler.cpp
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[NFC] fix trivial typos in comments and documents
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2018-01-29 05:17:03 +00:00 |
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GCNIterativeScheduler.h
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GCNMinRegStrategy.cpp
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GCNProcessors.td
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AMDGPU: Bring processors and features in sync with the spec
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2018-02-16 21:26:25 +00:00 |
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GCNRegPressure.cpp
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Rename LiveIntervalAnalysis.h to LiveIntervals.h
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2017-12-13 02:51:04 +00:00 |
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GCNRegPressure.h
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Rename LiveIntervalAnalysis.h to LiveIntervals.h
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2017-12-13 02:51:04 +00:00 |
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GCNSchedStrategy.cpp
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[NFC] fix trivial typos in comments
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2018-01-22 05:54:46 +00:00 |
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GCNSchedStrategy.h
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LLVMBuild.txt
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MIMGInstructions.td
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[AMDGPU][MC] Added support of 64-bit image atomics
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2018-01-26 15:43:29 +00:00 |
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R600ClauseMergePass.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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R600ControlFlowFinalizer.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600FrameLowering.cpp
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R600FrameLowering.h
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R600InstrFormats.td
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R600InstrInfo.cpp
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[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
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2018-01-24 18:09:53 +00:00 |
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R600InstrInfo.h
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[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
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2018-01-24 18:09:53 +00:00 |
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R600Instructions.td
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AMDGPU: Move ADDRIndirect complex pattern into R600Instructions.td
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2018-01-29 23:29:26 +00:00 |
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R600Intrinsics.td
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R600ISelLowering.cpp
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R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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R600Packetizer.cpp
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R600Processors.td
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R600RegisterInfo.cpp
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[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
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2018-01-24 18:09:53 +00:00 |
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R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
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R700Instructions.td
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SIAnnotateControlFlow.cpp
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AMDGPU: Error in SIAnnotateControlFlow instead of assert
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2018-01-17 16:30:01 +00:00 |
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SIDebuggerInsertNops.cpp
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SIDefines.h
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AMDGPU/SI: Add d16 support for image intrinsics.
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2018-01-18 22:08:53 +00:00 |
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SIFixSGPRCopies.cpp
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SIFixVGPRCopies.cpp
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SIFixWWMLiveness.cpp
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Rename LiveIntervalAnalysis.h to LiveIntervals.h
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2017-12-13 02:51:04 +00:00 |
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SIFoldOperands.cpp
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AMDGPU: Fix crash when constant folding with physreg operand
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2018-03-10 16:05:35 +00:00 |
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SIFrameLowering.cpp
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[AMDGPU] Scratch setup fix on AMDPAL gfx9+ merge shader
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2018-02-26 14:46:43 +00:00 |
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SIFrameLowering.h
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SIInsertSkips.cpp
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Fix compiler warning introduced in r325931. NFC.
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2018-02-23 19:11:33 +00:00 |
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SIInsertWaitcnts.cpp
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[AMDGPU] Make note of existing waitcnt instrs; this is add-on work related to suppression of redundant waitcnt instrs. It is necessary to make note of these existing waitcnt instrs so that we do not fall into an infinite loop when handling loops. Also, [NFC] some minor code clean-up.
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2018-02-19 19:19:59 +00:00 |
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SIInsertWaits.cpp
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[NFC] fix trivial typos in comments
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2018-02-22 07:48:29 +00:00 |
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SIInstrFormats.td
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[MachineOperand][Target] MachineOperand::isRenamable semantics changes
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2018-02-23 18:25:08 +00:00 |
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SIInstrInfo.cpp
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[AMDGPU] added writelane intrinsic
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2018-02-28 19:10:32 +00:00 |
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SIInstrInfo.h
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[AMDGPU][MC] Added lds support for MUBUF instructions
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2018-02-21 13:13:48 +00:00 |
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SIInstrInfo.td
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[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
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2018-03-09 17:41:39 +00:00 |
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SIInstructions.td
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AMDGPU/GCN: Promote i16 ctpop
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2018-03-02 02:50:22 +00:00 |
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SIIntrinsics.td
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SIISelLowering.cpp
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[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
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2018-03-09 17:41:39 +00:00 |
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SIISelLowering.h
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AMDGPU/SI: Add d16 support for buffer intrinsics.
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2018-01-12 21:12:19 +00:00 |
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SILoadStoreOptimizer.cpp
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AMDGPU: Track physreg uses in SILoadStoreOptimizer
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2018-02-23 10:45:56 +00:00 |
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SILowerControlFlow.cpp
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Rename LiveIntervalAnalysis.h to LiveIntervals.h
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2017-12-13 02:51:04 +00:00 |
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SILowerI1Copies.cpp
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Rename LiveIntervalAnalysis.h to LiveIntervals.h
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2017-12-13 02:51:04 +00:00 |
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SIMachineFunctionInfo.cpp
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Reapply "AMDGPU: Add 32-bit constant address space"
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2018-02-09 16:57:57 +00:00 |
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SIMachineFunctionInfo.h
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[AMDGPU] stop buffer_store being moved illegally
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2018-02-20 10:03:38 +00:00 |
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SIMachineScheduler.cpp
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Rename LiveIntervalAnalysis.h to LiveIntervals.h
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2017-12-13 02:51:04 +00:00 |
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SIMachineScheduler.h
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SIMemoryLegalizer.cpp
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[AMDGPU] More descriptive names in the memory legalizer
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2018-02-09 06:05:33 +00:00 |
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SIOptimizeExecMasking.cpp
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[MachineOperand][Target] MachineOperand::isRenamable semantics changes
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2018-02-23 18:25:08 +00:00 |
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SIOptimizeExecMaskingPreRA.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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SIPeepholeSDWA.cpp
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Test commit - change comment slightly.
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2018-03-11 03:27:50 +00:00 |
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SIRegisterInfo.cpp
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[AMDGPU] : fix for the crash in SIRegisterInfo when the regiser class not found
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2018-03-01 17:36:43 +00:00 |
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SIRegisterInfo.h
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[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
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2018-01-24 18:09:53 +00:00 |
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SIRegisterInfo.td
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[AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK support
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2018-01-10 14:22:19 +00:00 |
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SISchedule.td
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SIShrinkInstructions.cpp
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[AMDGPU] Shrinking V_SUBBREV_U32
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2018-02-24 01:32:32 +00:00 |
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SIWholeQuadMode.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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SMInstructions.td
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Pass Divergence Analysis data to Selection DAG to drive divergence
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2018-03-05 15:12:21 +00:00 |
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SOPInstructions.td
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VIInstrFormats.td
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VIInstructions.td
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VOP1Instructions.td
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[AMDGPU] Copy impdefs from pseudo to real instructions
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2018-01-15 17:55:35 +00:00 |
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VOP2Instructions.td
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[AMDGPU] added writelane intrinsic
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2018-02-28 19:10:32 +00:00 |
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VOP3Instructions.td
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[AMDGPU] Fixed V_DIV_FIXUP_F16 selection on GFX9
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2018-03-09 07:21:43 +00:00 |
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VOP3PInstructions.td
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VOPCInstructions.td
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[AMDGPU] Copy impdefs from pseudo to real instructions
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2018-01-15 17:55:35 +00:00 |
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VOPInstructions.td
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[MachineOperand][Target] MachineOperand::isRenamable semantics changes
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2018-02-23 18:25:08 +00:00 |
