NAKAMURA Takumi
d418ff3b1a
lib/Target/X86/X86ISelDAGToDAG.cpp: __main should be WINCALL64 on Win64.
...
CALL64 marks %xmm* as dead.
llvm-svn: 124354
2011-01-27 03:20:19 +00:00
David Greene
5c173a307b
[AVX] Add INSERT_SUBVECTOR and support it on x86. This provides a
...
default implementation for x86, going through the stack in a similr
fashion to how the codegen implements BUILD_VECTOR. Eventually this
will get matched to VINSERTF128 if AVX is available.
llvm-svn: 124307
2011-01-26 19:13:22 +00:00
David Greene
93b74739e7
[AVX] Support EXTRACT_SUBVECTOR on x86. This provides a default
...
implementation of EXTRACT_SUBVECTOR for x86, going through the stack
in a similr fashion to how the codegen implements BUILD_VECTOR.
Eventually this will get matched to VEXTRACTF128 if AVX is available.
llvm-svn: 124292
2011-01-26 15:38:49 +00:00
NAKAMURA Takumi
8ace7260cc
Target/X86: Tweak win64's tailcall.
...
llvm-svn: 124272
2011-01-26 02:04:09 +00:00
NAKAMURA Takumi
066378440a
Fix whitespace.
...
llvm-svn: 124270
2011-01-26 02:03:37 +00:00
NAKAMURA Takumi
a3d094f248
lib/Target/X86/X86RegisterInfo.cpp: Fix whitespace.
...
llvm-svn: 124268
2011-01-26 01:28:06 +00:00
NAKAMURA Takumi
1557668f7b
lib/Target/X86/X86RegisterInfo.cpp: Fix a typo in comment.
...
llvm-svn: 124267
2011-01-26 01:27:58 +00:00
Chris Lattner
9ba0a83f2b
fix a missing shuffle pattern, PR9009. Patch by Artiom Myaskouvskey!
...
llvm-svn: 124102
2011-01-24 03:42:46 +00:00
Rafael Espindola
547873da60
Add support for the --noexecstack option.
...
llvm-svn: 124077
2011-01-23 17:55:27 +00:00
Ted Kremenek
880c19c032
Null initialize a few variables flagged by
...
clang's -Wuninitialized-experimental warning.
While these don't look like real bugs, clang's
-Wuninitialized-experimental analysis is stricter
than GCC's, and these fixes have the benefit
of being general nice cleanups.
llvm-svn: 124073
2011-01-23 17:05:06 +00:00
Rafael Espindola
492ad6ca06
Remove more duplicated code.
...
llvm-svn: 124056
2011-01-23 04:43:11 +00:00
Rafael Espindola
59c1246cee
Remove duplicated code.
...
llvm-svn: 124054
2011-01-23 04:28:49 +00:00
Eric Christopher
e8aa8b114f
The stub routine that we're calling uses test and so clobbers
...
the flags.
llvm-svn: 123712
2011-01-18 01:37:20 +00:00
Douglas Gregor
49f7d8c38c
Add a missing <cctype> include, from Joerg Sonnenberger!
...
llvm-svn: 123670
2011-01-17 19:17:01 +00:00
Chris Lattner
dde85de90f
fix PR8514, a bug where the "heroic" transformation of shift/and
...
into and/shift would cause nodes to move around and a dangling pointer
to happen. The code tried to avoid this with a HandleSDNode, but
got the details wrong.
llvm-svn: 123578
2011-01-16 08:48:11 +00:00
Chris Lattner
24ea7f696e
fix PR8981, a crash trying to form a conditional inc with a floating point compare.
...
llvm-svn: 123560
2011-01-16 02:56:53 +00:00
Chris Lattner
c4d1d86d3e
reapply my fix for PR8961 with a tweak to properly handle
...
multi-instruction sequences like calls. Many thanks to Jakob for
finding a testcase.
llvm-svn: 123559
2011-01-16 02:27:38 +00:00
Ted Kremenek
4b09cdedb2
'HiReg' is written but never read. Nuke its
...
declaration and its assignments.
Found by clang static analyzer.
llvm-svn: 123486
2011-01-14 22:34:13 +00:00
Anton Korobeynikov
1f9df99db1
Add a possibility to switch between CFI directives- and table-based frame description emission. Currently all the backends use table-based stuff.
...
llvm-svn: 123476
2011-01-14 21:58:08 +00:00
Anton Korobeynikov
6b2f110a3d
Cleanup
...
llvm-svn: 123475
2011-01-14 21:57:58 +00:00
Chris Lattner
eba719204c
revert my fastisel patch again which apparently still gives the
...
llvm-gcc-i386-linux-selfhost buildbot heartburn...
llvm-svn: 123431
2011-01-14 06:14:33 +00:00
Chris Lattner
ee950eeb24
reapply r123414 now that the botz are calmed down and the fix is already in.
...
llvm-svn: 123427
2011-01-14 04:24:28 +00:00
Chris Lattner
349735530b
r123414 broke llvm-gcc bootstrap apparently, revert
...
llvm-svn: 123422
2011-01-14 02:07:32 +00:00
Chris Lattner
5baec05809
fix PR8961 - a fast isel miscompilation where we'd insert a new instruction
...
after sext's generated for addressing that got folded. Previously we compiled
test5 into:
_test5: ## @test5
## BB#0:
movq -8(%rsp), %rax ## 8-byte Reload
movq (%rdi,%rax), %rdi
addq %rdx, %rdi
movslq %esi, %rax
movq %rax, -8(%rsp) ## 8-byte Spill
movq %rdi, %rax
ret
which is insane and wrong. Now we produce:
_test5: ## @test5
## BB#0:
movslq %esi, %rax
movq (%rdi,%rax), %rax
addq %rdx, %rax
ret
llvm-svn: 123414
2011-01-14 00:01:01 +00:00
Jakob Stoklund Olesen
918de3a3b8
Fix a few more places that should use MBB::getLastNonDebugInstr().
...
llvm-svn: 123408
2011-01-13 22:47:43 +00:00
Jakob Stoklund Olesen
0f2b9d9dc4
Teach frame lowering to ignore debug values after the terminators.
...
llvm-svn: 123399
2011-01-13 21:28:52 +00:00
Eric Christopher
3821f63f4b
Experiment with changing the default 32-bit linux stack alignment to
...
16 bytes for PR8969. Update all testcases accordingly.
llvm-svn: 123367
2011-01-13 06:47:10 +00:00
Chris Lattner
586e7af07d
Fix PR8946, a missing reg/reg form of movdqu.
...
llvm-svn: 123242
2011-01-11 17:04:55 +00:00
Anton Korobeynikov
abd9a868df
Update CMake stuff
...
llvm-svn: 123171
2011-01-10 12:39:23 +00:00
Anton Korobeynikov
cf5967630b
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
...
llvm-svn: 123170
2011-01-10 12:39:04 +00:00
Jakob Stoklund Olesen
32f1783ca1
Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
...
These functions not longer assert when passed 0, but simply return false instead.
No functional change intended.
llvm-svn: 123155
2011-01-10 02:58:51 +00:00
Jakob Stoklund Olesen
e2e0850651
Fix the last virtual register enumerations.
...
llvm-svn: 123102
2011-01-08 23:11:11 +00:00
Evan Cheng
1afd04fc59
Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call.
...
llvm-svn: 123048
2011-01-08 01:24:27 +00:00
Evan Cheng
aa16fd02ad
Do not model all INLINEASM instructions as having unmodelled side effects.
...
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.
This allows memory instructions to be moved around INLINEASM instructions.
llvm-svn: 123044
2011-01-07 23:50:32 +00:00
Evan Cheng
ae26b91353
Revert r122955. It seems using movups to lower memcpy can cause massive regression (even on Nehalem) in edge cases. I also didn't see any real performance benefit.
...
llvm-svn: 123015
2011-01-07 19:35:30 +00:00
Rafael Espindola
64814fff0b
Correctly disassemble truncated asm.
...
Patch by Richard Simth.
llvm-svn: 122962
2011-01-06 16:48:42 +00:00
Benjamin Kramer
dcff486813
Remove dead code and silence warnings.
...
llvm-svn: 122957
2011-01-06 13:01:02 +00:00
Evan Cheng
1a1771584e
Use movups to lower memcpy and memset even if it's not fast (like corei7).
...
The theory is it's still faster than a pair of movq / a quad of movl. This
will probably hurt older chips like P4 but should run faster on current
and future Intel processors. rdar://8817010
llvm-svn: 122955
2011-01-06 07:58:36 +00:00
Evan Cheng
cb39cc2164
Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpy
...
etc. takes an option OptSize. If OptSize is true, it would return
the inline limit for functions with attribute OptSize.
llvm-svn: 122952
2011-01-06 06:52:41 +00:00
Bill Wendling
a59afdaec5
PR8919 - LLVM incorrectly generates "_alloca" as the stack probing call. That
...
works only on MinGW32. On 64-bit, the function to call is "__chkstk".
Patch by KS Sreeram!
llvm-svn: 122934
2011-01-06 00:50:34 +00:00
Bill Wendling
fae0dd1afa
PR8918 - When used with MinGW64, LLVM generates a "calll __main" at the
...
beginning of the "main" function. The assembler complains about the invalid
suffix for the 'call' instruction. The right instruction is "callq __main".
Patch by KS Sreeram!
llvm-svn: 122933
2011-01-06 00:47:10 +00:00
Chris Lattner
3ef9db5cd4
fix PR8900, a shuffle miscompilation. Patch by Nadav Rotem!
...
llvm-svn: 122921
2011-01-05 22:28:46 +00:00
Chris Lattner
0caa2500c0
silence more self assignment warnings.
...
llvm-svn: 122920
2011-01-05 22:26:52 +00:00
Jakob Stoklund Olesen
76e782c385
Use the EdgeBundles analysis in X86FloatingPoint instead of recomputing CFG
...
bundles in the pass.
llvm-svn: 122833
2011-01-04 21:10:11 +00:00
Jakob Stoklund Olesen
abf8941a60
Turn the EdgeBundles class into a stand-alone machine CFG analysis pass.
...
The analysis will be needed by both the greedy register allocator and the
X86FloatingPoint pass. It only needs to be computed once when the CFG doesn't
change.
This pass is very fast, usually showing up as 0.0% wall time.
llvm-svn: 122832
2011-01-04 21:10:05 +00:00
Dale Johannesen
c7168aa6fe
Eliminate a warning compiling with llvm-gcc. (IMO the
...
warning is overzealous but gcc is what it is.)
llvm-svn: 122829
2011-01-04 19:31:24 +00:00
Evan Cheng
25f7df1bce
Use pushq / popq instead of subq $8, %rsp / addq $8, %rsp to adjust stack in
...
prologue and epilogue if the adjustment is 8. Similarly, use pushl / popl if
the adjustment is 4 in 32-bit mode.
In the epilogue, takes care to pop to a caller-saved register that's not live
at the exit (either return or tailcall instruction).
rdar://8771137
llvm-svn: 122783
2011-01-03 22:53:22 +00:00
Benjamin Kramer
a58b69aa9d
Try to reuse the value when lowering memset.
...
This allows us to compile:
void test(char *s, int a) {
__builtin_memset(s, a, 15);
}
into 1 mul + 3 stores instead of 3 muls + 3 stores.
llvm-svn: 122710
2011-01-02 19:57:05 +00:00
Oscar Fuentes
6514b0ac68
A workaround for a bug in cmake 2.8.3 diagnosed on PR 8885.
...
llvm-svn: 122706
2011-01-02 19:32:31 +00:00
Chris Lattner
222b24e2de
update a bunch of entries.
...
llvm-svn: 122700
2011-01-02 18:31:38 +00:00
Rafael Espindola
55f7a5057d
Add support for the 'H' modifier.
...
llvm-svn: 122667
2011-01-01 20:58:46 +00:00
Oscar Fuentes
a63d0dbfbf
Add to the list of cmake files the object file, not the asm file. This
...
is necessary for executing the custom command that runs the
assember. Fixes PR8877.
llvm-svn: 122649
2010-12-31 20:15:37 +00:00
Nick Lewycky
5cb84ee2cf
Add another non-commutable instruction that gas accepts commuted forms for.
...
Fixes PR8861.
llvm-svn: 122641
2010-12-30 22:10:49 +00:00
NAKAMURA Takumi
2160b3953b
CMake: Add disabling optimization on MSVC8 and MSVC10 as workaround for some files in Target/ARM and Target/X86.
...
llvm-svn: 122623
2010-12-29 03:59:27 +00:00
Rafael Espindola
e7e67fce10
Add support for the same encodings of the personality function that gnu as
...
supports.
llvm-svn: 122577
2010-12-27 00:36:05 +00:00
Chris Lattner
a6f2b8316f
fix some sort of weird pasto
...
llvm-svn: 122560
2010-12-26 12:05:11 +00:00
Chris Lattner
eec079a470
add a note
...
llvm-svn: 122559
2010-12-26 03:53:31 +00:00
Evan Cheng
ea28d16e36
Code clean up. No functionality change.
...
llvm-svn: 122528
2010-12-23 23:54:17 +00:00
Chris Lattner
01e8c46349
Flag -> Glue, the ongoing saga
...
llvm-svn: 122513
2010-12-23 18:28:41 +00:00
Benjamin Kramer
b21118c91b
Remove some obsolete README items, add a new one off the top of my head.
...
llvm-svn: 122495
2010-12-23 15:07:02 +00:00
Benjamin Kramer
d8387aa9bd
X86: Lower a select directly to a setcc_carry if possible.
...
int test(unsigned long a, unsigned long b) { return -(a < b); }
compiles to
_test: ## @test
cmpq %rsi, %rdi ## encoding: [0x48,0x39,0xf7]
sbbl %eax, %eax ## encoding: [0x19,0xc0]
ret ## encoding: [0xc3]
instead of
_test: ## @test
xorl %ecx, %ecx ## encoding: [0x31,0xc9]
cmpq %rsi, %rdi ## encoding: [0x48,0x39,0xf7]
movl $-1, %eax ## encoding: [0xb8,0xff,0xff,0xff,0xff]
cmovael %ecx, %eax ## encoding: [0x0f,0x43,0xc1]
ret ## encoding: [0xc3]
llvm-svn: 122451
2010-12-22 23:09:28 +00:00
Benjamin Kramer
369872edfc
Add some x86 specific dagcombines for conditional increments.
...
(add Y, (sete X, 0)) -> cmp X, 1; adc 0, Y
(add Y, (setne X, 0)) -> cmp X, 1; sbb -1, Y
(sub (sete X, 0), Y) -> cmp X, 1; sbb 0, Y
(sub (setne X, 0), Y) -> cmp X, 1; adc -1, Y
for
unsigned foo(unsigned a, unsigned b) {
if (a == 0) b++;
return b;
}
we now get:
foo:
cmpl $1, %edi
movl %esi, %eax
adcl $0, %eax
ret
instead of:
foo:
testl %edi, %edi
sete %al
movzbl %al, %eax
addl %esi, %eax
ret
llvm-svn: 122364
2010-12-21 21:41:44 +00:00
Chris Lattner
65c5243bd6
rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
...
something that just glues two nodes together, even if it is
sometimes used for flags.
llvm-svn: 122310
2010-12-21 02:38:05 +00:00
Nate Begeman
c7dfecb10e
Implement feedback from Bruno on making pblendvb an x86-specific ISD node in addition to being an intrinsic, and convert
...
lowering to use it. Hopefully the pattern fragment is doing the right thing with XMM0, looks correct in testing.
llvm-svn: 122277
2010-12-20 22:04:24 +00:00
Daniel Dunbar
5580eff1f8
Add header...
...
llvm-svn: 122247
2010-12-20 15:45:51 +00:00
Daniel Dunbar
f1deaf06a9
X86/MC/Mach-O: Split out createX86MachObjectWriter().
...
llvm-svn: 122246
2010-12-20 15:07:39 +00:00
Chris Lattner
bee7320c3c
now that addc/adde are gone, "ADDC" in the X86 backend uses EFLAGS results,
...
the same as setcc. Optimize ADDC(0,0,FLAGS) -> SET_CARRY(FLAGS). This is
a step towards finishing off PR5443. In the testcase in that bug we now get:
movq %rdi, %rax
addq %rsi, %rax
sbbq %rcx, %rcx
testb $1, %cl
setne %dl
ret
instead of:
movq %rdi, %rax
addq %rsi, %rax
movl $0, %ecx
adcq $0, %rcx
testq %rcx, %rcx
setne %dl
ret
llvm-svn: 122219
2010-12-20 01:37:09 +00:00
Chris Lattner
2d4e17d195
We lower setb to sbb with the hope that the and will go away, when it
...
doesn't, match it back to setb.
On a 64-bit version of the testcase before we'd get:
movq %rdi, %rax
addq %rsi, %rax
sbbb %dl, %dl
andb $1, %dl
ret
now we get:
movq %rdi, %rax
addq %rsi, %rax
setb %dl
ret
llvm-svn: 122217
2010-12-20 01:16:03 +00:00
Chris Lattner
16ea7f257f
use for loop over types.
...
llvm-svn: 122214
2010-12-20 01:03:27 +00:00
Chris Lattner
8b1f76cad6
Change the X86 backend to stop using the evil ADDC/ADDE/SUBC/SUBE nodes (which
...
their carry depenedencies with MVT::Flag operands) and use clean and beautiful
EFLAGS dependences instead.
We do this by changing the modelling of SBB/ADC to have EFLAGS input and outputs
(which is what requires the previous scheduler change) and change X86 ISelLowering
to custom lower ADDC and friends down to X86ISD::ADD/ADC/SUB/SBB nodes.
With the previous series of changes, this causes no changes in the testsuite, woo.
llvm-svn: 122213
2010-12-20 00:59:46 +00:00
Mon P Wang
d3adab7a64
Prevents PerformShuffleCombine from creating a node with an illegal type after legalize types
...
has run, e.g., prevent creating an i64 node from a v2i64 when i64 is not a legal type.
llvm-svn: 122206
2010-12-19 23:55:53 +00:00
Chris Lattner
297259f6f1
improve the setcc -> setcc_carry optimization to happen more
...
consistently by moving it out of lowering into dag combine.
Add some missing patterns for matching away extended versions of setcc_c.
llvm-svn: 122201
2010-12-19 22:08:31 +00:00
Chris Lattner
1f31c7fa15
simplify some code to just reuse a setcc if we can instead of
...
going through the CSE maps to get it.
llvm-svn: 122196
2010-12-19 21:23:48 +00:00
Chris Lattner
2d59eef5fd
now that generic vector types aren't selected onto MMX operations,
...
we don't need -disable-mmx anymore.
llvm-svn: 122189
2010-12-19 20:19:20 +00:00
Chris Lattner
30438e63c8
reduce copy/paste programming with the power of for loops.
...
llvm-svn: 122187
2010-12-19 20:07:10 +00:00
Chris Lattner
29475c23d0
X86 supports i8/i16 overflow ops (except i8 multiplies), we should
...
generate them.
Now we compile:
define zeroext i8 @X(i8 signext %a, i8 signext %b) nounwind ssp {
entry:
%0 = tail call %0 @llvm.sadd.with.overflow.i8(i8 %a, i8 %b)
%cmp = extractvalue %0 %0, 1
br i1 %cmp, label %if.then, label %if.end
into:
_X: ## @X
## BB#0: ## %entry
subl $12, %esp
movb 16(%esp), %al
addb 20(%esp), %al
jo LBB0_2
Before we were generating:
_X: ## @X
## BB#0: ## %entry
pushl %ebp
movl %esp, %ebp
subl $8, %esp
movb 12(%ebp), %al
testb %al, %al
setge %cl
movb 8(%ebp), %dl
testb %dl, %dl
setge %ah
cmpb %cl, %ah
sete %cl
addb %al, %dl
testb %dl, %dl
setge %al
cmpb %al, %ah
setne %al
andb %cl, %al
testb %al, %al
jne LBB0_2
llvm-svn: 122186
2010-12-19 20:03:11 +00:00
Rafael Espindola
7f9be9e112
Remove the MCObjectFormat class.
...
llvm-svn: 122147
2010-12-18 05:37:28 +00:00
Rafael Espindola
9a4bfd7755
Move some data to the TargetWriter.
...
llvm-svn: 122134
2010-12-18 03:27:34 +00:00
Rafael Espindola
ba05bec626
Relax push instructions.
...
llvm-svn: 122121
2010-12-18 01:01:34 +00:00
Nate Begeman
ef5f3c0fa7
Add support for matching psign & plendvb to the x86 target
...
Remove unnecessary pandn patterns, 'vnot' patfrag looks through bitcasts
llvm-svn: 122098
2010-12-17 22:55:37 +00:00
Rafael Espindola
b9ca29bc1c
Stub out explicit MCELFObjectTargetWriter interface.
...
llvm-svn: 122067
2010-12-17 17:45:22 +00:00
Rafael Espindola
38e6fdfd1d
Move createELFObjectWriter to its own header.
...
llvm-svn: 122064
2010-12-17 16:59:53 +00:00
Daniel Dunbar
6979fc1057
MC/Mach-O: On second thought, use a custom hook for enabling aggressive
...
IsSymbolRefDifferenceFullyResolved, it turns out this does change behavior on
enough cases for x86-32 that I would rather wait a bit on it.
- In practice, we will want to change this eventually because it only means we
generate less relocations (it also eliminates the need for the horrible
'.set' hack that Darwin requires in some places).
llvm-svn: 122042
2010-12-17 05:50:29 +00:00
Daniel Dunbar
6d4a3e98f3
MC/Target: Remove HasScatteredSymbols target hook variable, which has been
...
superceded and was effectively dead.
llvm-svn: 122024
2010-12-17 02:06:08 +00:00
Rafael Espindola
3ee4530406
Make pushq produce signed relocations.
...
llvm-svn: 122005
2010-12-16 22:50:01 +00:00
Daniel Dunbar
2277f06687
MC/Mach-O: Lift some MachObjectWriter arguments into the target specific
...
interface.
llvm-svn: 121981
2010-12-16 17:21:02 +00:00
Daniel Dunbar
5fee4f6862
MC/Mach-O: Stub out explicit MCMachObjectTargetWriter interface.
...
llvm-svn: 121973
2010-12-16 16:09:19 +00:00
Daniel Dunbar
636e690f58
MC/Mach-O: Move createMachObjectWriter into MCMachObjectWriter.h.
...
llvm-svn: 121971
2010-12-16 16:08:33 +00:00
Daniel Dunbar
fc14f1e5f6
MC: Move target specific fixup info descriptors to TargetAsmBackend instead of
...
the MCCodeEmitter, which seems like a better organization.
- Also, cleaned up some magic constants while in the area.
llvm-svn: 121953
2010-12-16 03:20:06 +00:00
Evan Cheng
72dca1ee17
Only rr forms of ADD*_DB are commutable.
...
llvm-svn: 121908
2010-12-15 22:57:36 +00:00
Evan Cheng
190ff7fa88
Disable auto-detection of AVX support since AVX codegen support is not ready.
...
llvm-svn: 121677
2010-12-13 04:23:53 +00:00
Benjamin Kramer
5a1721f4ac
Factor the (x & 2^n) ? 2^m : 0 instcombine into its own method and generalize it
...
to catch cases where n != m with a shift.
llvm-svn: 121608
2010-12-11 09:42:59 +00:00
Rafael Espindola
0e665e502d
Fixed version of 121434 with no new memory leaks.
...
llvm-svn: 121471
2010-12-10 07:39:47 +00:00
Rafael Espindola
011e168728
Revert my previous patch to make the valgrind bots happy.
...
llvm-svn: 121461
2010-12-10 04:01:09 +00:00
Nate Begeman
8c00ecd290
Add some missing predicates.
...
llvm-svn: 121445
2010-12-10 00:54:26 +00:00
Nate Begeman
cb6d1c8193
Formalize the notion that AVX and SSE are non-overlapping extensions from the compiler's point of view. Per email discussion, we either want to always use VEX-prefixed instructions or never use them, and are taking "HasAVX" to mean "Always use VEX". Passing -mattr=-avx,+sse42 should serve to restore legacy SSE support when desirable.
...
llvm-svn: 121439
2010-12-10 00:26:57 +00:00
Rafael Espindola
03ad1e8f1f
Initial support for the cfi directives. This is just enough to get
...
f:
.cfi_startproc
nop
.cfi_endproc
assembled (on ELF).
llvm-svn: 121434
2010-12-09 23:48:29 +00:00
Nate Begeman
4a62a3e229
Add support for AVX to materialize +0.0 when doing scalar FP.
...
llvm-svn: 121415
2010-12-09 21:43:51 +00:00
Eric Christopher
0e40452eb0
Rewrite the darwin tlv support to use a chain and return to copying
...
the output to the correct register. Fixes a hidden problem uncovered
by the last patch where we'd try to DAG combine our MVT::Other node
oddly.
llvm-svn: 121358
2010-12-09 06:25:53 +00:00
Eric Christopher
64e662fce9
Stop confusing people, it's not really a chain, or a tumor.
...
llvm-svn: 121340
2010-12-09 00:57:19 +00:00
Eric Christopher
0100a8fda4
Remove extraneous copy from DAG conversion for darwin tls. This was
...
popping up at O0 when it wasn't folded and the fast allocator would
complain.
llvm-svn: 121330
2010-12-09 00:27:58 +00:00
Eric Christopher
cc8a622ca4
Add rsp to the uses for the same reason as 32-bit.
...
llvm-svn: 121328
2010-12-09 00:26:41 +00:00
Kevin Enderby
988dab6b5c
Allow a slash, '/', as a prefix separator for X86. rdar://8741045
...
llvm-svn: 121320
2010-12-08 23:57:59 +00:00
NAKAMURA Takumi
7947c9770a
lib/Target/X86/X86MCAsmInfo.cpp: [PR8741] On Win64, specify explicit PrivateGlobalPrefix as ".L".
...
Or, global symbols @Lxxxx might be treated as temporal symbol by MCSymbol.
llvm-svn: 121103
2010-12-07 02:43:45 +00:00
Rafael Espindola
65c25aef87
Remove the instruction fragment to data fragment lowering since it was causing
...
freed data to be read. I will open a bug to track it being reenabled.
llvm-svn: 121028
2010-12-06 19:08:48 +00:00
Rafael Espindola
3e954d16f4
Second try at making direct object emission produce the same results
...
as llc + llvm-mc. This time ELF is not changed and I tested that llvm-gcc
bootstrap on darwin10 using darwin9's assembler and linker.
llvm-svn: 121006
2010-12-06 17:27:56 +00:00
Chris Lattner
e30adfb732
Teach X86ISelLowering that the second result of X86ISD::UMUL is a flags
...
result. This allows us to compile:
void *test12(long count) {
return new int[count];
}
into:
test12:
movl $4, %ecx
movq %rdi, %rax
mulq %rcx
movq $-1, %rdi
cmovnoq %rax, %rdi
jmp __Znam ## TAILCALL
instead of:
test12:
movl $4, %ecx
movq %rdi, %rax
mulq %rcx
seto %cl
testb %cl, %cl
movq $-1, %rdi
cmoveq %rax, %rdi
jmp __Znam
Of course it would be even better if the regalloc inverted the cmov to 'cmovoq',
which would eliminate the need for the 'movq %rdi, %rax'.
llvm-svn: 120936
2010-12-05 07:49:54 +00:00
Chris Lattner
76601e7a99
it turns out that when ".with.overflow" intrinsics were added to the X86
...
backend that they were all implemented except umul. This one fell back
to the default implementation that did a hi/lo multiply and compared the
top. Fix this to check the overflow flag that the 'mul' instruction
sets, so we can avoid an explicit test. Now we compile:
void *func(long count) {
return new int[count];
}
into:
__Z4funcl: ## @_Z4funcl
movl $4, %ecx ## encoding: [0xb9,0x04,0x00,0x00,0x00]
movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
mulq %rcx ## encoding: [0x48,0xf7,0xe1]
seto %cl ## encoding: [0x0f,0x90,0xc1]
testb %cl, %cl ## encoding: [0x84,0xc9]
movq $-1, %rdi ## encoding: [0x48,0xc7,0xc7,0xff,0xff,0xff,0xff]
cmoveq %rax, %rdi ## encoding: [0x48,0x0f,0x44,0xf8]
jmp __Znam ## TAILCALL
instead of:
__Z4funcl: ## @_Z4funcl
movl $4, %ecx ## encoding: [0xb9,0x04,0x00,0x00,0x00]
movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
mulq %rcx ## encoding: [0x48,0xf7,0xe1]
testq %rdx, %rdx ## encoding: [0x48,0x85,0xd2]
movq $-1, %rdi ## encoding: [0x48,0xc7,0xc7,0xff,0xff,0xff,0xff]
cmoveq %rax, %rdi ## encoding: [0x48,0x0f,0x44,0xf8]
jmp __Znam ## TAILCALL
Other than the silly seto+test, this is using the o bit directly, so it's going in the right
direction.
llvm-svn: 120935
2010-12-05 07:30:36 +00:00
Chris Lattner
16bafb2414
generalize the previous check to handle -1 on either side of the
...
select, inserting a not to compensate. Add a missing isZero check
that I lost somehow.
This improves codegen of:
void *func(long count) {
return new int[count];
}
from:
__Z4funcl: ## @_Z4funcl
movl $4, %ecx ## encoding: [0xb9,0x04,0x00,0x00,0x00]
movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
mulq %rcx ## encoding: [0x48,0xf7,0xe1]
testq %rdx, %rdx ## encoding: [0x48,0x85,0xd2]
movq $-1, %rdi ## encoding: [0x48,0xc7,0xc7,0xff,0xff,0xff,0xff]
cmoveq %rax, %rdi ## encoding: [0x48,0x0f,0x44,0xf8]
jmp __Znam ## TAILCALL
## encoding: [0xeb,A]
to:
__Z4funcl: ## @_Z4funcl
movl $4, %ecx ## encoding: [0xb9,0x04,0x00,0x00,0x00]
movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
mulq %rcx ## encoding: [0x48,0xf7,0xe1]
cmpq $1, %rdx ## encoding: [0x48,0x83,0xfa,0x01]
sbbq %rdi, %rdi ## encoding: [0x48,0x19,0xff]
notq %rdi ## encoding: [0x48,0xf7,0xd7]
orq %rax, %rdi ## encoding: [0x48,0x09,0xc7]
jmp __Znam ## TAILCALL
## encoding: [0xeb,A]
llvm-svn: 120932
2010-12-05 02:00:51 +00:00
Chris Lattner
474ed0aa9b
Improve an integer select optimization in two ways:
...
1. generalize
(select (x == 0), -1, 0) -> (sign_bit (x - 1))
to:
(select (x == 0), -1, y) -> (sign_bit (x - 1)) | y
2. Handle the identical pattern that happens with !=:
(select (x != 0), y, -1) -> (sign_bit (x - 1)) | y
cmov is often high latency and can't fold immediates or
memory operands. For example for (x == 0) ? -1 : 1, before
we got:
< testb %sil, %sil
< movl $-1, %ecx
< movl $1, %eax
< cmovel %ecx, %eax
now we get:
> cmpb $1, %sil
> sbbl %eax, %eax
> orl $1, %eax
llvm-svn: 120929
2010-12-05 01:23:24 +00:00
Bill Wendling
2b53c0830d
Initialize HasPOPCNT.
...
llvm-svn: 120923
2010-12-04 23:57:24 +00:00
Benjamin Kramer
851691ddb2
Add patterns for the x86 popcnt instruction.
...
- Also adds a new POPCNT subtarget feature that is currently enabled if the target
supports SSE4.2 (nehalem) or SSE4A (barcelona).
llvm-svn: 120917
2010-12-04 20:32:23 +00:00
Benjamin Kramer
77faee6ba1
Simplify code. No functionality change.
...
llvm-svn: 120907
2010-12-04 14:22:24 +00:00
Rafael Espindola
9215947c83
There are two reasons why we might want to use
...
foo = a - b
.long foo
instead of just
.long a - b
First, on darwin9 64 bits the assembler produces the wrong result. Second,
if "a" is the end of the section all darwin assemblers (9, 10 and mc) will not
consider a - b to be a constant but will if the dummy foo is created.
Split how we handle these cases. The first one is something MC should take care
of. The second one has to be handled by the caller.
llvm-svn: 120889
2010-12-04 03:21:47 +00:00
Nate Begeman
d4310b6d7c
Revert this change since it breaks a couple of the AVX tests.
...
I'm unclear if the tests are actually correct or not, but reverting for now.
llvm-svn: 120847
2010-12-03 22:29:15 +00:00
Nate Begeman
deb26223bd
Scalar f32/f64 are also subregs of ymm regs
...
llvm-svn: 120844
2010-12-03 21:54:39 +00:00
Nate Begeman
3911dcfd71
Remove SSE1-4 disable when AVX is enabled. While this may be useful for development,
...
it completely breaks scalar fp in xmm regs when AVX is enabled.
llvm-svn: 120843
2010-12-03 21:54:14 +00:00
Devang Patel
409a5ff824
Revert r120580.
...
llvm-svn: 120630
2010-12-02 00:22:29 +00:00
Evan Cheng
4118b24aca
Fix and re-enable tail call optimization of expanded libcalls.
...
llvm-svn: 120622
2010-12-01 22:59:46 +00:00
Devang Patel
e68cb5a5cf
Disable debug info for x86-darwin9 and earlier until PR 8715 and radar 8709290 are fixed.
...
llvm-svn: 120580
2010-12-01 16:59:34 +00:00
Duncan Sands
cd4f56b8e2
I don't think it makes any sense to assert that the target supports SSE3 here.
...
The user (i.e. whoever generated a call to the intrinsic in the first place) is
essentially asking for a particular instruction to be placed in the assembler.
If that instruction won't execute on the target machine, that's their problem
not ours. Two buildbots with processors that don't support SSE3 were barfing
on the apm.ll test in CodeGen/X86 because of this assertion.
llvm-svn: 120574
2010-12-01 12:58:13 +00:00
Evan Cheng
84162760b7
Speculatively disable x86 portion of r120501 to appease the x86_64 buildbot.
...
llvm-svn: 120549
2010-12-01 03:27:20 +00:00
Evan Cheng
f7e586d749
Enable sibling call optimization of libcalls which are expanded during
...
legalization time. Since at legalization time there is no mapping from
SDNode back to the corresponding LLVM instruction and the return
SDNode is target specific, this requires a target hook to check for
eligibility. Only x86 and ARM support this form of sibcall optimization
right now.
rdar://8707777
llvm-svn: 120501
2010-11-30 23:55:39 +00:00
Eric Christopher
3a1c712e47
Move X86InstrFPStack.td over to PseudoI as well.
...
llvm-svn: 120470
2010-11-30 21:57:32 +00:00
Eric Christopher
b15c993a73
Migrate X86InstrControl.td to use PseudoI and fix a couple of 80-col violations
...
while I'm in there.
llvm-svn: 120466
2010-11-30 21:37:36 +00:00
Eric Christopher
1a99e7ebdb
Fix some grammar in comments I noticed.
...
llvm-svn: 120416
2010-11-30 09:11:54 +00:00
Eric Christopher
d8e045d29e
This defaults to GenericDomain.
...
llvm-svn: 120415
2010-11-30 09:11:07 +00:00
Eric Christopher
6a21ceab5c
Implement a PseudoI class and transfer the sse instructions over to use
...
it.
llvm-svn: 120412
2010-11-30 08:57:23 +00:00
Eric Christopher
73365ae8b6
Fix insertion point in pcmp expander.
...
While I'm there, clean up too many \n even for me.
llvm-svn: 120411
2010-11-30 08:20:21 +00:00
Eric Christopher
2170738538
Fix some cleanups from my last patch.
...
llvm-svn: 120410
2010-11-30 08:10:28 +00:00
Eric Christopher
f27f0b5234
Rewrite mwait and monitor support and custom lower arguments.
...
Fixes PR8573.
llvm-svn: 120404
2010-11-30 07:20:12 +00:00
Michael J. Spencer
d5ec932c3a
Merge System into Support.
...
llvm-svn: 120298
2010-11-29 18:16:10 +00:00
Rafael Espindola
9287c4b38f
Move lowering of TLS_addr32 and TLS_addr64 to X86MCInstLower.
...
llvm-svn: 120263
2010-11-28 21:16:39 +00:00
Chris Lattner
a11c5c5c32
fix PR8686, accepting a 'b' suffix at the end of all the setcc
...
instructions. I choose to handle this with an asmparser hack,
though it could be handled by changing all the instruction definitions
to allow be "setneb" instead of "setne". The asm parser hack is
better in this case, because we want the disassembler to produce
setne, not setneb.
llvm-svn: 120260
2010-11-28 20:23:50 +00:00
Rafael Espindola
f77005db2b
Define generic 1, 2 and 4 byte pc relative relocations. They are common
...
and at least the 4 byte one will be needed to implement the .cfi_* directives.
llvm-svn: 120240
2010-11-28 14:17:56 +00:00
Anton Korobeynikov
598465c605
Move more PEI-related hooks to TFI
...
llvm-svn: 120229
2010-11-27 23:05:25 +00:00
Anton Korobeynikov
c87f68e32e
Move callee-saved regs spills / reloads to TFI
...
llvm-svn: 120228
2010-11-27 23:05:03 +00:00
Rafael Espindola
45cd9713f2
Lower TLS_addr32 and TLS_addr64.
...
llvm-svn: 120225
2010-11-27 20:43:02 +00:00
Rafael Espindola
6f5680f4a0
Implement the data16 prefix.
...
llvm-svn: 120224
2010-11-27 20:29:45 +00:00
Daniel Dunbar
bcc15fb05d
MC/Mach-O: Switch to using MachOFormat.h.
...
- I'm leaving MachO.h, because I believe it has external consumers, but I would really like to eliminate it (we have stylistic disagreements with one another).
llvm-svn: 120187
2010-11-27 04:38:36 +00:00
Rafael Espindola
0641196380
Remove the unused TheTarget member.
...
llvm-svn: 120168
2010-11-26 04:24:21 +00:00
Rafael Espindola
e3dc1c951c
Use multiple 0x66 prefixes so that all nops up to 15 bytes are a single instruction.
...
llvm-svn: 120147
2010-11-25 17:14:16 +00:00
Rafael Espindola
72c8de703d
Implement the rex64 prefix.
...
llvm-svn: 120017
2010-11-23 11:23:24 +00:00
Rafael Espindola
6f069fc35f
Produce a relocation for pcrel absolute values. Based on a patch by David Meyer.
...
llvm-svn: 120006
2010-11-23 07:20:12 +00:00
Wesley Peck
d589353ad0
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
...
llvm-svn: 119990
2010-11-23 03:31:01 +00:00
Rafael Espindola
492580fa9a
Remove duplicated constants. Thanks to Jason for noticing it.
...
llvm-svn: 119985
2010-11-22 21:49:05 +00:00
Chris Lattner
dd03f96698
apparently tailcalls are better on darwin/x86-64 than on linux?
...
llvm-svn: 119947
2010-11-21 18:59:20 +00:00
Chris Lattner
4aaa7fbb98
implement PR8524, apparently mainline gas accepts movq as an alias for movd
...
when transfering between i64 gprs and mmx regs.
llvm-svn: 119931
2010-11-21 08:18:57 +00:00
Anton Korobeynikov
ff8c52bd51
Move some more hooks to TargetFrameInfo
...
llvm-svn: 119904
2010-11-20 15:59:32 +00:00
Duncan Sands
028cf0619e
On X86, MEMBARRIER, MFENCE, SFENCE, LFENCE are not target memory intrinsics,
...
so don't claim they are. They are allocated using DAG.getNode, so attempts
to access MemSDNode fields results in reading off the end of the allocated
memory. This fixes crashes with "llc -debug" due to debug code trying to
print MemSDNode fields for these barrier nodes (since the crashes are not
deterministic, use valgrind to see this). Add some nasty checking to try
to catch this kind of thing in the future.
llvm-svn: 119901
2010-11-20 11:25:00 +00:00
Anton Korobeynikov
ce676f96e1
Move getInitialFrameState() to TargetFrameInfo
...
llvm-svn: 119754
2010-11-18 23:25:52 +00:00
Anton Korobeynikov
269e7d3be1
Move hasFP() and few related hooks to TargetFrameInfo.
...
llvm-svn: 119740
2010-11-18 21:19:35 +00:00
Chris Lattner
c85f76f7da
trivial QoI improvement. On this invalid input:
...
sahf movl 344(%rdi),%r14d
we used to produce:
t.s:2:1: error: unexpected token in argument list
^
we now produce:
t.s:1:11: error: unexpected token in argument list
sahf movl 344(%rdi),%r14d
^
rdar://8581401
llvm-svn: 119676
2010-11-18 02:53:02 +00:00
Rafael Espindola
7fc5cd0a58
make isVirtualSection a virtual method on MCSection. Chris' suggestion.
...
llvm-svn: 119547
2010-11-17 20:03:54 +00:00
Dan Gohman
348c3f8197
Reapply r118917. With pseudo-instruction expansion moved to
...
a different pass, the complicated interaction between cmov expansion
and fast isel is no longer a concern.
llvm-svn: 119400
2010-11-16 22:43:23 +00:00
Oscar Fuentes
690d065e70
Fix assembling X86CompilationCallback_Win64.asm on VS 10.
...
Patch by Louis Zhuang!
llvm-svn: 119394
2010-11-16 22:07:47 +00:00
Rafael Espindola
53a8ae85b7
Change the 11 byte nop to be a single instruction.
...
llvm-svn: 119286
2010-11-15 23:10:30 +00:00
Chris Lattner
b2daeac125
add fields to the .td files unconditionally, simplifying tblgen a bit.
...
Switch the ARM backend to use 'let' instead of 'set' with this change.
llvm-svn: 119120
2010-11-15 05:19:05 +00:00
Chris Lattner
9a0a840839
add targetoperand flags for jump tables, constant pool and block address
...
nodes to indicate when ha16/lo16 modifiers should be used. This lets
us pass PowerPC/indirectbr.ll.
The one annoying thing about this patch is that the MCSymbolExpr isn't
expressive enough to represent ha16(label1-label2) which we need on
PowerPC. I have a terrible hack in the meantime, but this will have
to be revisited at some point.
Last major conversion item left is global variable references.
llvm-svn: 119105
2010-11-15 02:46:57 +00:00
Anton Korobeynikov
794259aec0
Attempt to unbreak cmake-based builds
...
llvm-svn: 119098
2010-11-15 00:48:12 +00:00
Anton Korobeynikov
76c52dcf44
First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place
...
llvm-svn: 119097
2010-11-15 00:06:54 +00:00
Chris Lattner
b347be831c
tidy up, no functionality change.
...
llvm-svn: 119092
2010-11-14 23:32:42 +00:00
Chris Lattner
51168d6510
move the pic base symbol stuff up to MachineFunction
...
since it is trivial and will be shared between ppc and x86.
This substantially simplifies the X86 backend also.
llvm-svn: 119089
2010-11-14 22:48:15 +00:00
Chris Lattner
09ea2ce78f
simplify getPICBaseSymbol a bit.
...
llvm-svn: 119088
2010-11-14 22:37:11 +00:00
Chris Lattner
3e3e29381e
random acts of tidiness.
...
llvm-svn: 119049
2010-11-14 18:09:50 +00:00
Peter Collingbourne
4ec6b2dbe7
Recognise 32-bit ror-based bswap implementation used by uclibc
...
llvm-svn: 119007
2010-11-13 19:54:30 +00:00
Peter Collingbourne
6c3094234e
Support ; as asm separator
...
llvm-svn: 119006
2010-11-13 19:54:23 +00:00
Daniel Dunbar
2ba9f79194
MC: Simplify Mach-O and ELF object writer implementations.
...
- What was I thinking?????
llvm-svn: 118992
2010-11-13 07:33:40 +00:00
Dan Gohman
a4aa69cf2a
Revert r118917, which is implicated in the llvm-gcc-i386-linux-selfhost failure.
...
llvm-svn: 118954
2010-11-13 00:31:40 +00:00
Dan Gohman
8b86287a06
When the definition of an address value is in a different block
...
from the user of the address, fall back to just using the
address in a register instead of bailing out of fast-isel
altogether.
llvm-svn: 118917
2010-11-12 19:14:00 +00:00
Chris Lattner
2a70c4e38a
accept lret as an alias for lretl, fixing the reopened part of PR8592
...
llvm-svn: 118916
2010-11-12 18:54:56 +00:00
Chris Lattner
612039e538
implement PR8592: empirically "lretq" is a "lret" with a rex.w prefix.
...
llvm-svn: 118903
2010-11-12 17:41:20 +00:00
Chris Lattner
bcdb696f6c
tidy up.
...
llvm-svn: 118896
2010-11-12 17:24:29 +00:00
Dale Johannesen
659061fcd3
Remove possibly useful info from comment, per Chris.
...
llvm-svn: 118865
2010-11-12 00:43:18 +00:00
Rafael Espindola
5766346831
Remove some explicit arguments to getELFSection. This is
...
a leftover from the removal of isExplicit.
llvm-svn: 118774
2010-11-11 03:40:25 +00:00
Bruno Cardoso Lopes
9f9f796756
Fix PR8211
...
llvm-svn: 118445
2010-11-08 21:24:59 +00:00
Chris Lattner
24ba201941
implement aliases for div/idiv that have an explicit A register operand,
...
implementing rdar://8431864
llvm-svn: 118364
2010-11-06 22:41:18 +00:00
Chris Lattner
25f31dcc8f
add aliases for movs between seg registers and mem. There are multiple
...
different forms of this instruction (movw/movl/movq) which we reported
as being ambiguous. Since they all do the same thing, gas just picks the
one with the shortest encoding. Follow its lead here.
This implements rdar://8208615
llvm-svn: 118362
2010-11-06 22:35:34 +00:00
Chris Lattner
5cd42cb6f4
move the "sh[lr]d op,op" -> "shld $1, op,op" aliases to the .td file.
...
llvm-svn: 118361
2010-11-06 22:25:39 +00:00
Chris Lattner
95add4d79a
work-in-progress
...
llvm-svn: 118358
2010-11-06 22:05:43 +00:00
Chris Lattner
0d6d870628
go to great lengths to work around a GAS bug my previous patch
...
exposed:
GAS doesn't accept "fcomip %st(1)", it requires "fcomip %st(1), %st(0)"
even though st(0) is implicit in all other fp stack instructions.
Fortunately, there is an alias for fcomip named "fcompi" and gas does
accept the default argument for the alias (boggle!).
As such, switch the canonical form of this instruction to "pi" instead
of "ip". This makes the code generator and disassembler generate pi,
avoiding the gas bug.
llvm-svn: 118356
2010-11-06 21:37:06 +00:00
Chris Lattner
bbd318b76a
rework the rotate-by-1 instructions to be defined like the
...
shift-by-1 instructions, where the asmstring doesn't contain
the implicit 1. It turns out that a bunch of these rotate
instructions were completely broken because they used 1
instead of $1.
This fixes assembly mismatches on "rclb $1, %bl" and friends,
where we used to generate the 3 byte form, we now generate the
proper 2-byte form.
llvm-svn: 118355
2010-11-06 21:23:40 +00:00
Chris Lattner
af1f50772a
change the fp comparison instructions to not have %st0 explicitly
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listed in its asm string, for consistency with the other similar
instructions.
llvm-svn: 118354
2010-11-06 20:55:09 +00:00
Chris Lattner
b64f8e10ab
move the plethora of fp stack aliases to the .td file.
...
llvm-svn: 118353
2010-11-06 20:47:38 +00:00
Chris Lattner
4834890f0a
add (and document) the ability for alias results to have
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fixed physical registers. Start moving fp comparison
aliases to the .td file (which default to using %st1 if
nothing is specified).
llvm-svn: 118352
2010-11-06 19:57:21 +00:00
Chris Lattner
c0e756dc47
generalize alias support to allow the result of an alias to
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add fixed immediate values. Move the aad and aam aliases to
use this, and document it.
llvm-svn: 118350
2010-11-06 19:25:43 +00:00
Chris Lattner
a7c7312e55
move fnstsw aliases to .td file, fix typo
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llvm-svn: 118349
2010-11-06 18:58:32 +00:00
Chris Lattner
b686fb93c7
move in/out aliases to the .td files.
...
llvm-svn: 118348
2010-11-06 18:52:40 +00:00
Chris Lattner
6b905e3a10
move sldt, imul, and movabsq aliases from c++ to .td file.
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llvm-svn: 118347
2010-11-06 18:44:26 +00:00
Chris Lattner
1beb2b3fc5
correct suffix matching to search for s/l/t suffixes on
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floating point stack instructions instead of looking for b/w/l/q.
This fixes issues where we'd accidentally match fistp to fistpl,
when it is in fact an ambiguous instruction.
This changes the behavior of llvm-mc to reject fstp, which was the
correct fix for rdar://8456389:
t.s:1:1: error: ambiguous instructions require an explicit suffix (could be 'fstps', 'fstpl', or 'fstpt')
fstp (%rax)
it also causes us to correctly reject fistp and fist, which addresses
PR8528:
t.s:2:1: error: ambiguous instructions require an explicit suffix (could be 'fistps', or 'fistpl')
fistp (%rax)
^
t.s:3:1: error: ambiguous instructions require an explicit suffix (could be 'fists', or 'fistl')
fist (%rax)
^
Thanks to Ismail Donmez for tracking down the issue here!
llvm-svn: 118346
2010-11-06 18:28:02 +00:00
Chris Lattner
637f4910c3
fix a bug where we had an implicit assumption that the
...
result instruction operand numbering matched the result pattern.
Fixing this allows us to move the xchg/test aliases to the .td file.
llvm-svn: 118334
2010-11-06 08:20:59 +00:00
Chris Lattner
4fd3b4ad94
move the lcall/ljmp aliases to the .td file.
...
llvm-svn: 118332
2010-11-06 07:48:45 +00:00
Chris Lattner
66c868f386
move the "movsd -> movsl" alias to the .td files,
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tidy up the movsx and movzx aliases.
llvm-svn: 118331
2010-11-06 07:34:58 +00:00
Chris Lattner
ec0ef3385d
fix some bugs in the alias support, unblocking changing of "clr" aliases
...
from c++ hacks to proper .td InstAlias definitions. Change them!
llvm-svn: 118330
2010-11-06 07:31:43 +00:00
Chris Lattner
5d1361e9ed
Reimplement BuildResultOperands to be in terms of the result instruction's
...
operand list instead of the operand list redundantly declared on the alias
or instruction.
With this change, we finally remove the ins/outs list on the alias. Before:
def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
"movsx $src, $dst",
(MOVSX16rr8W GR16:$dst, GR8:$src)>;
After:
def : InstAlias<"movsx $src, $dst",
(MOVSX16rr8W GR16:$dst, GR8:$src)>;
This also makes the alias mechanism more general and powerful, which will
be exploited in subsequent patches.
llvm-svn: 118329
2010-11-06 07:14:44 +00:00
Jim Grosbach
a85416eb77
Allow targets to specify the MachO CPUType/CPUSubtype information.
...
llvm-svn: 118288
2010-11-05 18:48:58 +00:00
Duncan Sands
1af5c00d3c
When passing a huge parameter using the byval mechanism, a long
...
sequence of loads and stores was being generated to perform the
copy on the x86 targets if the parameter was less than 4 byte
aligned, causing llc to use up vast amounts of memory and time.
Use a "rep movs" form instead. PR7170.
llvm-svn: 118260
2010-11-04 21:16:46 +00:00
Duncan Sands
3bf2a701a5
In the calling convention logic, ValVT is always a legal type,
...
and as such can be represented by an MVT - the more complicated
EVT is not needed. Use MVT for ValVT everywhere.
llvm-svn: 118245
2010-11-04 10:49:57 +00:00
Duncan Sands
41edf30895
Simplify uses of MVT and EVT. An MVT can be compared directly
...
with a SimpleValueType, while an EVT supports equality and
inequality comparisons with SimpleValueType.
llvm-svn: 118169
2010-11-03 12:17:33 +00:00
Duncan Sands
f6e5e02c9b
Inside the calling convention logic LocVT is always a simple
...
value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.
llvm-svn: 118167
2010-11-03 11:35:31 +00:00
Chris Lattner
f94c2b782a
rearrange a bit.
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llvm-svn: 117967
2010-11-01 23:07:52 +00:00
Chris Lattner
b0ac93cf15
use our fancy new MnemonicAlias mechanism to remove a bunch of hacks
...
from X86AsmParser.cpp
llvm-svn: 117952
2010-11-01 21:06:34 +00:00
Chris Lattner
d595d1f4d7
"mov[zs]x (mem), GR16" are not ambiguous: the mem
...
must be 8 bits. Support this memory form.
llvm-svn: 117902
2010-11-01 05:41:10 +00:00
Chris Lattner
81d051481e
Implement enough of the missing instalias support to get
...
aliases installed and working. They now work when the
matched pattern and the result instruction have exactly
the same operand list.
This is now enough for us to define proper aliases for
movzx and movsx, implementing rdar://8017633 and PR7459.
Note that we do not accept instructions like:
movzx 0(%rsp), %rsi
GAS accepts this instruction, but it doesn't make any
sense because we don't know the size of the memory
operand. It could be 8/16/32 bits.
llvm-svn: 117901
2010-11-01 05:34:34 +00:00
Chris Lattner
0a4807eefc
make the asm matcher emitter reject instructions that have comments
...
in their asmstring. Fix the two x86 "NOREX" instructions that have them.
If these comments are important, the instlowering stuff can print them.
llvm-svn: 117897
2010-11-01 04:44:29 +00:00
Chris Lattner
9da275f86b
reject instructions that contain a \n in their asmstring. Mark
...
various X86 and ARM instructions that are bitten by this as isCodeGenOnly,
as they are.
llvm-svn: 117884
2010-11-01 00:46:16 +00:00
Chris Lattner
a4c36d0efe
fix the !eq operator in tblgen to return a bit instead of an int.
...
Use this to make the X86 and ARM targets set isCodeGenOnly=1
automatically for their instructions that have Format=Pseudo,
resolving a hack in tblgen.
llvm-svn: 117862
2010-10-31 19:22:57 +00:00
Chris Lattner
5d088218e5
two changes: make the asmmatcher generator ignore ARM pseudos properly,
...
and make it a hard error for instructions to not have an asm string.
These instructions should be marked isCodeGenOnly.
llvm-svn: 117861
2010-10-31 19:15:18 +00:00
Chris Lattner
8aaac91ca4
sketch out the planned instruction alias mechanism, add some comments about
...
how the push/pop mnemonic aliases are wrong.
llvm-svn: 117857
2010-10-31 18:43:46 +00:00
Duncan Sands
92f33ea784
Factorize the duplicated logic for choosing the right argument
...
calling convention out of the fast and normal ISel files, and
into the calling convention TD file.
llvm-svn: 117856
2010-10-31 13:21:44 +00:00
Duncan Sands
0f49c49476
Remove CCAssignFnForRet from X86 FastISel in favour of RetCC_X86,
...
which has the same logic specified in the CallingConv TD file.
This brings FastISel in line with the standard X86 ISel.
llvm-svn: 117855
2010-10-31 13:02:38 +00:00
Chris Lattner
49227ad505
Resolve a terrible hack in tblgen: instead of hardcoding
...
"In32BitMode" and "In64BitMode" into tblgen, allow any
predicate that inherits from AssemblerPredicate.
llvm-svn: 117831
2010-10-30 19:38:20 +00:00
Chris Lattner
15e92ddd01
Implement (and document!) support for MnemonicAlias's to have Requires
...
directives, allowing things like this:
def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>;
def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>;
Move the rest of the X86 MnemonicAliases over to the .td file.
llvm-svn: 117830
2010-10-30 19:23:13 +00:00
Chris Lattner
441672d7cb
really zap alias.
...
llvm-svn: 117824
2010-10-30 18:23:25 +00:00
Chris Lattner
ba9271be5b
move fcompi alias to .td file and zap some useless code.
...
llvm-svn: 117823
2010-10-30 18:22:53 +00:00
Chris Lattner
1b3b2e113f
move rep aliases to td file
...
llvm-svn: 117822
2010-10-30 18:17:33 +00:00
Chris Lattner
49f977366f
move sal aliases to .td file.
...
llvm-svn: 117821
2010-10-30 18:14:54 +00:00
Chris Lattner
54892b4d8d
fix an encoding mismatch where "sal %eax, 1" was not using the short encoding
...
for shl. Caught by inspection.
llvm-svn: 117820
2010-10-30 18:13:10 +00:00
Chris Lattner
38179edecd
move a bunch more aliases from .cpp -> .td file.
...
llvm-svn: 117819
2010-10-30 18:07:17 +00:00
Chris Lattner
ac7f4957b1
move cmov aliases to .td file.
...
llvm-svn: 117818
2010-10-30 17:56:50 +00:00
Chris Lattner
acec7b7d46
move setcc and jcc aliases from .cpp to .td
...
llvm-svn: 117817
2010-10-30 17:51:45 +00:00
Chris Lattner
e90ff8dcb6
move some code.
...
llvm-svn: 117816
2010-10-30 17:38:55 +00:00
Chris Lattner
7c61e4bca2
implement (and document!) the first kind of MC assembler alias, which
...
just remaps one mnemonic to another. Convert a few of the X86 aliases
from .cpp to .td code.
llvm-svn: 117815
2010-10-30 17:36:36 +00:00
Jim Grosbach
951667ac39
Clean up comments.
...
llvm-svn: 117785
2010-10-30 13:48:28 +00:00
Chris Lattner
45c679522d
stay out of the reserved namespace
...
llvm-svn: 117773
2010-10-30 04:57:14 +00:00
John Thompson
6115a7f1d4
Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
...
llvm-svn: 117667
2010-10-29 17:29:13 +00:00
Dale Johannesen
b78530f9b0
Fix pastos in handling of AVX cvttsd2si, PR8491.
...
Bruno, please review, but I'm pretty sure this is right.
Patch by Alex Mac!
llvm-svn: 117514
2010-10-28 00:35:54 +00:00
Kevin Enderby
a53cc6a764
Added the x86 instruction ud2b (2nd official undefined instruction).
...
llvm-svn: 117485
2010-10-27 20:46:49 +00:00
Michael J. Spencer
5518dda87e
x86-Win32: Switch ftol2 calling convention from stdcall to C.
...
llvm-svn: 117474
2010-10-27 18:52:38 +00:00
Kevin Enderby
74a2614673
Yet another tweak to X86 instructions to add ud2a as an alias to ud2
...
(still to add ud2b).
llvm-svn: 117435
2010-10-27 03:01:02 +00:00
Kevin Enderby
d22f3b9de7
Another tweak to X86 instructions to add the missing flex instruction (without
...
the wait prefix).
llvm-svn: 117434
2010-10-27 02:53:04 +00:00
Kevin Enderby
e812b356cc
Tweaks to X86 instructions to allow the 'w' suffix in places it makes
...
sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler
allows for these instructions. Done differently than in r117031 that
caused a valgrind error which was later reverted.
llvm-svn: 117433
2010-10-27 02:32:19 +00:00
Kevin Enderby
d5235bb45c
Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mc
...
will accept versions that the darwin assembler allows. Forms ending in "pi" and
forms without all the operands.
llvm-svn: 117427
2010-10-27 00:59:28 +00:00
Dale Johannesen
e7f07349e4
Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches
...
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet). No functional change except
for dump output.
llvm-svn: 117413
2010-10-26 23:11:10 +00:00
Rafael Espindola
adaf2ea5c6
handle X86::EH_RETURN64 and X86::EH_RETURN.
...
llvm-svn: 117378
2010-10-26 18:09:55 +00:00
Rafael Espindola
e38790534e
Implement some relaxations for arithmetic instructions. The limitation
...
on RIP relative relocations looks artificial, but this is a superset of
what we were able to do before.
llvm-svn: 117364
2010-10-26 14:09:12 +00:00
Dale Johannesen
2566d39d07
An stdcall function calling a non-stdcall function
...
cannot use tailcall. PR 8461.
llvm-svn: 117322
2010-10-25 22:17:05 +00:00
Rafael Espindola
c6e7790c4b
Add X86::reloc_global_offset_table and use it to have a single place where
...
we check for _GLOBAL_OFFSET_TABLE_.
llvm-svn: 117241
2010-10-24 17:35:42 +00:00
Benjamin Kramer
ed68a7877c
Make the disassembler tables const so they end up in read-only memory.
...
llvm-svn: 117206
2010-10-23 09:10:44 +00:00
Michael J. Spencer
87c8212d41
X86: Emit _fltused instead of __fltused on Windows x64.
...
llvm-svn: 117205
2010-10-23 09:06:59 +00:00
Chandler Carruth
ea67aaa252
Remove a define which is never referenced.
...
llvm-svn: 117202
2010-10-23 08:25:16 +00:00
Chandler Carruth
7799a873bb
Switch attribute macros to use 'LLVM_' as a prefix. We retain the old names
...
until other LLVM projects using these are cleaned up.
llvm-svn: 117200
2010-10-23 08:10:43 +00:00
Wesley Peck
488027efa3
Making the e_machine configurable by the target backend in ELFObjectWriter.
...
llvm-svn: 117099
2010-10-22 15:52:49 +00:00
Andrew Trick
b9e8700beb
Reverting r117031 to cleanup valgrind errors.
...
It doesn't look like anything is wrong with the checkin,
but the new test cases expose a mem bug in AsmParser.
llvm-svn: 117087
2010-10-22 03:58:29 +00:00
Sean Callanan
9a40554de4
Fixed handling of immediate operand sizes, which
...
weren't properly reflecting the OperandSize attribute
of the instruction leading to improper decoding of
certain instructions with the 66H prefix. Also added
a test case for this.
llvm-svn: 117084
2010-10-22 01:24:11 +00:00
Kevin Enderby
c63105a064
More tweaks to X86 instructions to allow the 'w' suffix in places it makes
...
sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler allows
for these instructions. Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).
llvm-svn: 117031
2010-10-21 17:16:46 +00:00
Duncan Sands
0c166168a0
Remove some variables that are never really used
...
(gcc-4.6 warns about these).
llvm-svn: 117021
2010-10-21 16:03:28 +00:00
Duncan Sands
8c5f243aa0
Add parentheses to pacify gcc, which warns otherwise.
...
llvm-svn: 117020
2010-10-21 16:02:12 +00:00
Michael J. Spencer
5a68d7ce94
X86: Add alloca probing to dynamic alloca on Windows. Fixes PR8424.
...
llvm-svn: 116984
2010-10-21 01:41:01 +00:00
Michael J. Spencer
b9cffadc06
CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args.
...
This should be the minimum set of functions that could possibly need it.
llvm-svn: 116978
2010-10-21 00:08:21 +00:00