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367 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
df02d037e4 Add AVX SSE4.1 Horizontal Minimum and Position instruction 
llvm-svn: 107552
 2010-07-03 00:49:21 +00:00
Bruno Cardoso Lopes
e6b70efcb0 Add AVX SSE4.1 round instructions 
llvm-svn: 107549
 2010-07-03 00:37:44 +00:00
Bruno Cardoso Lopes
4931e183b5 - Add support for the rest of AVX SSE3 instructions 
- Fix VEX prefix to be emitted with 3 bytes whenever VEX_5M
represents a REX equivalent two byte leading opcode

llvm-svn: 107523
 2010-07-02 22:06:54 +00:00
Bruno Cardoso Lopes
511e5f47de Move SSE3 Move patterns to a more appropriate section 
Add AVX SSE3 packed horizontal and & sub instructions

llvm-svn: 107405
 2010-07-01 17:35:02 +00:00
Bruno Cardoso Lopes
0a3048e8b9 Add AVX SSE3 packed addsub instructions 
llvm-svn: 107404
 2010-07-01 17:08:18 +00:00
Bruno Cardoso Lopes
c1abe91367 Add AVX SSE3 replicate and convert instructions 
llvm-svn: 107375
 2010-07-01 02:33:39 +00:00
Bruno Cardoso Lopes
956316a3d7 - Add AVX SSE2 Move doubleword and quadword instructions. 
- Add encode bits for VEX_W
- All 128-bit SSE 1 & SSE2 instructions that are described
  in the .td file now have a AVX encoded form already working.

llvm-svn: 107365
 2010-07-01 01:20:06 +00:00
Bruno Cardoso Lopes
f8855c22be Add AVX SSE2 mask creation and conditional store instructions 
llvm-svn: 107306
 2010-06-30 18:38:10 +00:00
Bruno Cardoso Lopes
3c02702830 Add AVX SSE2 packed integer extract/insert instructions 
llvm-svn: 107293
 2010-06-30 17:03:03 +00:00
Bruno Cardoso Lopes
39594cc5d0 Add AVX SSE2 integer unpack instructions 
llvm-svn: 107246
 2010-06-30 04:06:39 +00:00
Bruno Cardoso Lopes
419f8f29c3 Add AVX SSE2 packed integer shuffle instructions 
llvm-svn: 107245
 2010-06-30 03:47:56 +00:00
Bruno Cardoso Lopes
d9acb34aa2 Add AVX SSE2 pack with saturation integer instructions 
llvm-svn: 107241
 2010-06-30 02:30:25 +00:00
Bruno Cardoso Lopes
c470ba9937 Add AVX SSE2 integer packed compare instructions 
llvm-svn: 107240
 2010-06-30 02:21:09 +00:00
Bruno Cardoso Lopes
cfbebb3921 - Add AVX form of all SSE2 logical instructions 
- Add VEX encoding bits to x86 MRM0r-MRM7r

llvm-svn: 107238
 2010-06-30 01:58:37 +00:00
Bruno Cardoso Lopes
2439877e05 Add *several* AVX integer packed binop instructions 
llvm-svn: 107225
 2010-06-29 23:47:49 +00:00
Bruno Cardoso Lopes
e1b05180de Add AVX ld/st XCSR register. 
Add VEX encoding bits for MRMXm x86 form

llvm-svn: 107204
 2010-06-29 20:35:48 +00:00
Bruno Cardoso Lopes
e60533aa42 Add AVX non-temporal stores 
llvm-svn: 107178
 2010-06-29 18:22:01 +00:00
Bruno Cardoso Lopes
2dca1dd168 Add sqrt, rsqrt and rcp AVX instructions 
llvm-svn: 107166
 2010-06-29 17:26:30 +00:00
Bruno Cardoso Lopes
e4809f15bf Described the missing AVX forms of SSE2 convert instructions 
llvm-svn: 107108
 2010-06-29 00:36:02 +00:00
Bruno Cardoso Lopes
277fcdf1c1 Add AVX convert CVTSS2SI{rr,rm} and CVTDQ2PS{rr,rm} instructions 
llvm-svn: 106917
 2010-06-25 23:47:23 +00:00
Bruno Cardoso Lopes
45109dd6c1 Reapply r106896: 
Add several AVX MOV flavors
Support VEX encoding for MRMDestReg

llvm-svn: 106912
 2010-06-25 23:33:42 +00:00
Bruno Cardoso Lopes
cc4c01f859 revert this now, it's using avx instead of sse :) 
llvm-svn: 106906
 2010-06-25 23:04:29 +00:00
Bruno Cardoso Lopes
04ac570a8d Add several AVX MOV flavors 
Support VEX encoding for MRMDestReg

llvm-svn: 106896
 2010-06-25 22:27:51 +00:00
Bruno Cardoso Lopes
bde2881855 Add some AVX convert instructions 
llvm-svn: 106815
 2010-06-25 00:39:30 +00:00
Bruno Cardoso Lopes
11a236d970 - Add AVX COMI{SS,SD}{rr,rm} and UCOMI{SS,SD}{rr,rm}. 
- Fix a small VEX encoding issue.
- Move compare instructions to their appropriate place.

llvm-svn: 106787
 2010-06-24 20:48:23 +00:00
Chris Lattner
606dc0529b Teach the x86 mc assembler that %dr6 = %db6, this implements 
rdar://8013734

llvm-svn: 106725
 2010-06-24 07:29:18 +00:00
Bruno Cardoso Lopes
633f345ba9 Add AVX CMP{SS,SD}{rr,rm} instructions and encoding testcases 
llvm-svn: 106705
 2010-06-24 00:32:06 +00:00
Bruno Cardoso Lopes
b1bfbacead Add AVX MOVMSK{PS,PD}rr instructions 
llvm-svn: 106683
 2010-06-23 21:30:27 +00:00
Bruno Cardoso Lopes
c6ac26123d Add tests for different AVX cmp opcodes, also teach the x86 asm parser to understand the vcmp instruction 
llvm-svn: 106678
 2010-06-23 21:10:57 +00:00
Bruno Cardoso Lopes
8cfdcf7691 Add AVX SHUF{PS,PD}{rr,rm} instructions 
llvm-svn: 106672
 2010-06-23 20:07:15 +00:00
Nico Weber
04606293a5 Add support for the x86 instructions "pusha" and "popa". 
llvm-svn: 106671
 2010-06-23 20:00:58 +00:00
Bruno Cardoso Lopes
db9027d95d Add AVX compare packed instructions 
llvm-svn: 106600
 2010-06-22 23:37:59 +00:00
Bruno Cardoso Lopes
424b206ad4 Reapply support for AVX unpack and interleave instructions, with 
testcases this time.

llvm-svn: 106593
 2010-06-22 23:02:38 +00:00
Bruno Cardoso Lopes
93ec8dcd01 Add AVX MOV{SS,SD}{rr,rm} instructions 
llvm-svn: 106588
 2010-06-22 22:38:56 +00:00
Eric Christopher
48c062d65b Move a 64-bit test to the 64-bit file. Fixes an llvm-mc assertion 
during test runs.

llvm-svn: 106577
 2010-06-22 21:11:51 +00:00
Bruno Cardoso Lopes
c41dfa7cad Refactor aliased packed logical instructions, also add 
AVX AND,OR,XOR,NAND{P}{S,D}{rr,rm} instructions.

llvm-svn: 106374
 2010-06-19 02:44:01 +00:00
Bruno Cardoso Lopes
d6d12f37c6 Shrink down code and add for free AVX {MIN,MAX}P{S,D}{rm,rr} instructions 
llvm-svn: 106366
 2010-06-19 00:37:31 +00:00
Chris Lattner
ed5a217085 fix rdar://7873482 by teaching the instruction encoder to emit 
segment prefixes.  Daniel wrote most of this patch.

llvm-svn: 106364
 2010-06-19 00:34:00 +00:00
Bruno Cardoso Lopes
ea44492375 Add {mix,max}{ss,sd}{rr,rm} AVX forms. 
llvm-svn: 106264
 2010-06-18 01:12:56 +00:00
Bruno Cardoso Lopes
7e28e6925c More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rm 
llvm-svn: 105870
 2010-06-12 01:53:48 +00:00
Bruno Cardoso Lopes
df3435eb33 More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rr 
Handle OpSize TSFlag for AVX

llvm-svn: 105869
 2010-06-12 01:23:26 +00:00
Bruno Cardoso Lopes
69141fd639 More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm) 
Introduce the VEX_X field

llvm-svn: 105859
 2010-06-11 23:50:47 +00:00
Bruno Cardoso Lopes
255fda615d Reapply r105521, this time appending "LLU" to 64 bit 
immediates to avoid breaking the build.

llvm-svn: 105652
 2010-06-08 22:51:23 +00:00
Chris Lattner
33d0622cdc revert r105521, which is breaking the buildbots with stuff like this: 
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type

llvm-svn: 105524
 2010-06-05 04:17:30 +00:00
Bruno Cardoso Lopes
b05131d907 Initial AVX support for some instructions. No patterns matched 
yet, only assembly encoding support.

llvm-svn: 105521
 2010-06-05 03:53:24 +00:00
Kevin Enderby
fbd982b12f MC/X86: Add alias for movzx. 
llvm-svn: 105005
 2010-05-28 21:20:21 +00:00
Kevin Enderby
922954fe32 MC/X86: Add alias for fwait. 
llvm-svn: 105001
 2010-05-28 20:59:10 +00:00
Kevin Enderby
3db5d4603e Fix the use of x86 control and debug registers so that the assertion failure in 
getX86RegNum() does not happen.  Patch by Shantonu Sen!

llvm-svn: 104994
 2010-05-28 19:01:27 +00:00
Kevin Enderby
7eae1aeb51 Fix the x86 move to/from segment register instructions. 
llvm-svn: 104731
 2010-05-26 20:10:45 +00:00
Kevin Enderby
392dd2b35f Changed the encoding of X86 floating point stack operations where both operands 
are st(0).  These can be encoded using an opcode for storing in st(0) or using
an opcode for storing in st(i), where i can also be 0.  To allow testing with
the darwin assembler and get a matching binary the opcode for storing in st(0)
is now used.  To do this the same logical trick is use from the darwin assembler
in converting things like this:

fmul %st(0), %st

into this:

fmul %st(0)

by looking for the second operand being X86::ST0 for specific floating point
mnemonics then removing the second X86::ST0 operand.  This also has the add
benefit to allow things like:

fmul %st(1), %st

that llvm-mc did not assemble.

llvm-svn: 104634
 2010-05-25 20:52:34 +00:00
Daniel Dunbar
15b9844a05 MC/X86: Add a hack to allow recognizing 'cmpltps' and friends. 
llvm-svn: 104626
 2010-05-25 19:49:32 +00:00
Daniel Dunbar
28018eed17 MC/X86: Define explicit immediate forms of cmp{ss,sd,ps,pd}. 
llvm-svn: 104622
 2010-05-25 18:40:53 +00:00
Kevin Enderby
e336aaa32b The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required 
for the 64-bit version of the Bit Test instruction.

llvm-svn: 104621
 2010-05-25 18:16:58 +00:00
Eric Christopher
627e887b3d Make sure aeskeygenassist uses an unsigned immediate field. 
Fixes rdar://8017638

llvm-svn: 104617
 2010-05-25 17:33:22 +00:00
Dan Gohman
824858ebb0 Fix an mmx movd encoding. 
llvm-svn: 104552
 2010-05-24 20:51:08 +00:00
Kevin Enderby
a911679139 MC/X86: Add aliases for CMOVcc variants. 
llvm-svn: 104549
 2010-05-24 20:32:23 +00:00
Daniel Dunbar
50265dbaf0 MC/X86: Subdivide immediates a bit more, so that we properly recognize immediates based on the width of the target instruction. For example: 
addw $0xFFFF, %ax
should match the same as
  addw $-1, %ax
but we used to match it to the longer encoding.

llvm-svn: 104453
 2010-05-22 21:02:33 +00:00
Daniel Dunbar
7c60f7caa2 MC/X86: Add alias for setz, setnz, jz, jnz. 
llvm-svn: 104435
 2010-05-22 06:37:33 +00:00
Kevin Enderby
1e4a4f5899 Added retl for 32-bit x86 and added retq for 64-bit x86. 
llvm-svn: 104394
 2010-05-21 23:01:38 +00:00
Daniel Dunbar
3a0c98ca87 MC/X86: Add movq alias for movabsq, to allow matching 64-bit immediates with movq. 
llvm-svn: 104275
 2010-05-20 20:36:29 +00:00
Dan Gohman
c8b4555a94 Fix assembly parsing and encoding of the pushf and popf family of 
instructions.

llvm-svn: 104231
 2010-05-20 16:16:00 +00:00
Dan Gohman
52dcd5fb9a Define the x86 pause instruction. 
llvm-svn: 104204
 2010-05-20 01:35:50 +00:00
Dan Gohman
00b8752500 Fix the sfence instruction to use MRM_F8 instead of MRM7r, since it 
doesn't have a register operand. Also, use I instead of PSI, for
consistency with mfence and lfence.

llvm-svn: 104203
 2010-05-20 01:23:41 +00:00
Chris Lattner
aedd148163 fix rdar://7986634 - match instruction opcodes case insensitively. 
llvm-svn: 104183
 2010-05-19 23:34:33 +00:00
Eric Christopher
6ea9cf8425 More data/parsing support for tls directives. Add a few more testcases 
and cleanup comments as well.

llvm-svn: 103985
 2010-05-17 22:53:55 +00:00
Daniel Dunbar
8f5da3624f llvm-mc: Support reassignment of variables in one special case, when the 
variable has not yet been used in an expression. This allows us to support a few
cases that show up in real code (mostly because gcc generates it for Objective-C
on Darwin), without giving up a reasonable semantic model for assignment.

llvm-svn: 103950
 2010-05-17 17:46:23 +00:00
Eric Christopher
950f0d7892 Assume that we'll handle mangling the symbols earlier and just put the 
symbol to the file as we have it.  Simplifies out tbss handling.

llvm-svn: 103928
 2010-05-17 02:13:02 +00:00
Kevin Enderby
dc13d89540 Fix so "int3" is correctly accepted, added "into" and fixed "int" with an 
argument, like "int $4", to not get an Assertion error.

llvm-svn: 103791
 2010-05-14 19:16:02 +00:00
Eric Christopher
ebea91f168 Add AsmParser support for darwin tbss directive. 
Nothing uses this yet.

llvm-svn: 103757
 2010-05-14 01:50:28 +00:00
Chris Lattner
ca57d80f83 fix rdar://7965971 and a fixme: use ParseIdentifier in 
ParseDirectiveDarwinZerofill instead of hard coding the
check for identifier. This allows quoted symbol names to
be used.

llvm-svn: 103682
 2010-05-13 00:10:34 +00:00
Chris Lattner
887e8f9f53 reapply r103668 with a fix. Never make "minor syntax changes" 
after testing before committing.

llvm-svn: 103681
 2010-05-13 00:02:47 +00:00
Chris Lattner
361c115f23 revert r103668 for now, it is apparently breaking things. 
llvm-svn: 103677
 2010-05-12 23:40:59 +00:00
Chris Lattner
91a836a9c7 moffset forms of moves are x86-32 only, make the parser 
lower them to the correct x86-64 instructions since we 
don't have a clean way to handle this in td files yet.
rdar://7947184

llvm-svn: 103668
 2010-05-12 23:13:36 +00:00
Chris Lattner
1960255123 fix the encoding of the obscure "moffset" forms of moves, i386 
part first.  rdar://7947184

llvm-svn: 103660
 2010-05-12 22:48:24 +00:00
Daniel Dunbar
469dddef0e MC/X86: Extend suffix matching hack to match 'q' suffix. 
llvm-svn: 103535
 2010-05-12 00:54:20 +00:00
Daniel Dunbar
45589cd853 MC/X86: X86AbsMemAsmOperand is subclass of X86NoSegMemAsmOperand. 
- This fixes "leal 0, %eax", for example.

llvm-svn: 103205
 2010-05-06 22:39:14 +00:00
Chris Lattner
c788971da7 fix rdar://7947167 - llvm-mc doesn't match movsq 
llvm-svn: 103199
 2010-05-06 21:48:14 +00:00
Daniel Dunbar
a3731b17c0 Revert r103137, fix for $ in labels. It looks like we can't actually handle this 
at the token level. Consider the following horrible test case:

  a = 1
  .globl $a
  movl ($a), %eax
  movl $a, %eax
  movl $$a, %eax

llvm-svn: 103178
 2010-05-06 14:46:38 +00:00
Chris Lattner
ca80f41a4d fix rdar://7946934 - in some limited cases, the assembler should 
allow $ at the start of a symbol name.

llvm-svn: 103137
 2010-05-05 23:51:28 +00:00
Daniel Dunbar
e335a71a56 MC/X86: Chris pointed that 'as' isn't consistent in accepting the long form of 
instructions which have no direct register usage.

Darwin 'as' accepts:
  add $0, (%rax)
but rejects
  mov $0, (%rax)
for example.

Given that, only accept suffix matches which match exactly one form. We still
need to emit nice diagnostics for failures...

llvm-svn: 103015
 2010-05-04 17:31:02 +00:00
Daniel Dunbar
648d1ae783 MC/X86: Add "support" for matching ATT style mnemonic prefixes. 
- The idea is that when a match fails, we just try to match each of +'b', +'w',
   +'l'. If exactly one matches, we assume this is a mnemonic prefix and accept
   it. If all match, we assume it is width generic, and take the 'l' form.

 - This would be a horrible hack, if it weren't so simple. Therefore it is an
   elegant solution! Chris gets the credit for this particular elegant
   solution. :)

 - Next step to making this more robust is to have the X86 matcher generate the
   mnemonic prefix information. Ideally we would also compute up-front exactly
   which mnemonic to attempt to match, but this may require more custom code in
   the matcher than is really worth it.

llvm-svn: 103012
 2010-05-04 16:12:42 +00:00
Kevin Enderby
ce7a24a57f Changed llvm-mc to use the same suffixes with floating point compare 
instructions as the Mac OS X darwin assembler.  Some of which like 'fcoml'
assembled to different opcodes.  While some of the suffixes were just different.

llvm-svn: 102958
 2010-05-03 21:31:40 +00:00
Kevin Enderby
be2804f752 Fixed the encoding of two of the X86 movq instuctions. The Move quadword from 
mm to mm/m64 and the Move quadword from xmm2/mem64 to xmm1 had the incorrect
encodings.

llvm-svn: 102952
 2010-05-03 21:03:31 +00:00
Kevin Enderby
c1eeb061e7 Fixed the encoding of the x86 push instructions. Using a 32-bit immediate value 
caused the a pushl instruction to be incorrectly encoding using only two bytes
of immediate, causing the following 2 instruction bytes to be part of the 32-bit
immediate value.  Also fixed the one byte form of push to be used when the
immediate would fit in a signed extended byte.  Lastly changed the names to not
include the 32 of PUSH32 since they actually push the size of the stack pointer.

llvm-svn: 102951
 2010-05-03 20:45:05 +00:00
Kevin Enderby
58bed5a913 Fixed the word sized Bit Scan Forward/Reverse instructions, they needed the 
Operand size override prefix to be part of their records.

llvm-svn: 102556
 2010-04-28 23:20:40 +00:00
Chris Lattner
65d1e40895 teach the x86 asm parser how to handle segment prefixes 
in memory operands.  rdar://7874844

llvm-svn: 101661
 2010-04-17 18:56:34 +00:00
Chris Lattner
42337931b2 a bunch of ssse3 instructions are misencoded to think they have an 
i8 field when they really do not.  This fixes rdar://7840289

llvm-svn: 101629
 2010-04-17 07:38:24 +00:00
Chris Lattner
124dc743bc implement mc asmparser support for '.', which gets the 
current PC.  rdar://7834775

We now produce an identical .o file compared to the cctools
assembler for something like this:

_f0:
L0:
        jmp L1
        .long . - L0
L1:
        jmp A
        .long . - L1

        .zerofill __DATA,_bss,A,0

llvm-svn: 101227
 2010-04-14 04:40:28 +00:00
Bob Wilson
04e9ff15cb Reapply Kevin's change 94440, now that Chris has fixed the limitation on 
opcode values fitting in one byte (svn r99494).

llvm-svn: 99514
 2010-03-25 16:36:14 +00:00
Bob Wilson
d5673d9f1f Speculatively revert this to see if it fixes buildbot failures. 
--- Reverse-merging r99440 into '.':
U    test/MC/AsmParser/X86/x86_32-bit_cat.s
U    test/MC/AsmParser/X86/x86_32-encoding.s
U    include/llvm/IntrinsicsX86.td
U    include/llvm/CodeGen/SelectionDAGNodes.h
U    lib/Target/X86/X86InstrSSE.td
U    lib/Target/X86/X86ISelLowering.h

llvm-svn: 99450
 2010-03-24 23:26:29 +00:00
Kevin Enderby
9cab7fdb12 Added the Advanced Encryption Standard (AES) Instructions. 
llvm-svn: 99440
 2010-03-24 22:33:33 +00:00
Kevin Enderby
8d8cb5c491 Fixed the SS42AI template for the SSE 4.2 instructions with TA prefix so it does 
not get an "Unknown immediate size" assert failure when used.  All instructions 
of this form have an 8-bit immediate.  Also added a test case of an example
instruction that is of this form.

llvm-svn: 99435
 2010-03-24 22:28:42 +00:00
Kevin Enderby
766909ae3b Fixed the encoding problems of the crc32 instructions. All had the Operand size 
override prefix and only the r/m16 forms should have had that.  Also for variant
one, the AT&T syntax, added suffixes to all forms.  Also added the missing
64-bit form for 'CRC32 r64, r/m8'.  Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.

llvm-svn: 98980
 2010-03-19 20:04:42 +00:00
Daniel Dunbar
f803121396 MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen only" so they don't get selected by the asm matcher. 
llvm-svn: 98972
 2010-03-19 18:07:48 +00:00
Daniel Dunbar
3ef39d497f X86: Fix encoding for TEST64rr. 
llvm-svn: 98919
 2010-03-19 01:15:03 +00:00
Daniel Dunbar
1a50b05aff X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, we 
were missing it on some movq instructions and were not including the appropriate
PCrel bias.

llvm-svn: 98880
 2010-03-18 21:53:54 +00:00
Daniel Dunbar
ab14df376a MC/X86/AsmMatcher: Use the new instruction cleanup routine to implement a 
temporary workaround for matching inc/dec on x86_64 to the correct instruction.
 - This hack will eventually be replaced with a robust mechanism for handling
   matching instructions based on the available target features.

llvm-svn: 98858
 2010-03-18 20:06:02 +00:00
Chris Lattner
bf3e096258 fix an x86-64 encoding bug Daniel found. 
llvm-svn: 98855
 2010-03-18 20:04:36 +00:00
Chris Lattner
45ab55ccec add a special relocation type for movq loads for object 
files that produce special relocation types where the 
linker changes movq's into lea's.

llvm-svn: 98839
 2010-03-18 18:10:56 +00:00
Chris Lattner
3e251f1db0 xfail these tests temporarily to get teh buildbots back to happy land. 
llvm-svn: 98476
 2010-03-14 07:32:48 +00:00
Daniel Dunbar
a6526284f4 X86: Fix ADD64i32 encoding. 
llvm-svn: 98457
 2010-03-13 22:49:39 +00:00
Daniel Dunbar
6d5fa0c9d6 MC/X86_64: Fix matching of leaq. 
llvm-svn: 98444
 2010-03-13 19:31:44 +00:00
Daniel Dunbar
de2f4ae158 MC/X86_64: Fix matching of callq. 
llvm-svn: 98443
 2010-03-13 19:31:38 +00:00
Daniel Dunbar
9ffe22ec23 MC/X86: Add temporary hack to match shrl $1,%eax correctly, to support testing 
other functionality on 403.gcc compiled at -O0.

llvm-svn: 98405
 2010-03-13 00:47:29 +00:00
Daniel Dunbar
3eab04b641 MC/X86: Add an XFAIL test where we aren't matching the correct instruction 
because we don't understand how the specific instruction is doing sign
extension.

llvm-svn: 98404
 2010-03-13 00:47:25 +00:00
Daniel Dunbar
0bc3059b94 MC/X86: Rename alternate spellings of ADD{8,16,32} and mark as "code gen only" so they don't get selected by the asm matcher. 
llvm-svn: 98098
 2010-03-09 22:50:46 +00:00
Daniel Dunbar
d92e9bc7c1 MC/X86: Rename alternate spellings of CMP{8,16,32} and mark as "code gen only" so they don't get selected by the asm matcher. 
llvm-svn: 98097
 2010-03-09 22:50:40 +00:00
Daniel Dunbar
66c79cf44d X86: Fix encoding for TEST{8,16,32}rr. 
llvm-svn: 97982
 2010-03-08 21:10:36 +00:00
Chris Lattner
b29b154904 make pcrel immediate values relative to the start of the field, 
not the end of the field, fixing rdar://7651978

llvm-svn: 96330
 2010-02-16 05:03:17 +00:00
Chris Lattner
8530ba626c add encoder support and tests for rdtscp 
llvm-svn: 96076
 2010-02-13 03:42:24 +00:00
Daniel Dunbar
09733841aa MC/AsmParser: Attempt to constant fold expressions up-front. This ensures we avoid fixups for obvious cases like '-(16)'. 
llvm-svn: 96064
 2010-02-13 01:28:07 +00:00
Chris Lattner
d4fe983f23 rip out the 'heinous' x86 MCCodeEmitter implementation. 
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.

llvm-svn: 96059
 2010-02-13 00:49:29 +00:00
Chris Lattner
5b01ab848c remove special cases for vmlaunch, vmresume, vmxoff, and swapgs 
fix swapgs to be spelled right.

llvm-svn: 96058
 2010-02-13 00:41:14 +00:00
Daniel Dunbar
4ef0be5df5 MC/X86: Push immediate operands as immediates not expressions when possible. 
llvm-svn: 96055
 2010-02-13 00:17:21 +00:00
Chris Lattner
4170bb81da implement the rest of correct x86-64 encoder support for 
rip-relative addresses, and add a testcase.

llvm-svn: 96040
 2010-02-12 23:24:09 +00:00
Chris Lattner
9307e00dc0 fix the encodings of monitor and mwait, which were completely 
busted in both encoders.  I'm not bothering to fix it in the
old one at this point.

llvm-svn: 95947
 2010-02-12 01:06:22 +00:00
Kevin Enderby
b1094f1489 Remove the few # TAILCALL comments that snuck in. As they may fail on linux. 
llvm-svn: 95827
 2010-02-11 00:18:12 +00:00
Kevin Enderby
3763f70025 Update the X86 assembler matcher test case now that a few more things match 
with some of the recent changes that have gone into llvm-mc.

llvm-svn: 95826
 2010-02-11 00:13:43 +00:00
Daniel Dunbar
b20be19ae6 MC/X86 AsmMatcher: Fix a use after free spotted by d0k, and de-XFAIL 
x86_32-encoding.s in on expectation of it passing.

llvm-svn: 95806
 2010-02-10 21:19:28 +00:00
Daniel Dunbar
7f6e51fc2a XFAIL this on linux until I figure out what is happening. 
llvm-svn: 95804
 2010-02-10 21:01:04 +00:00
Kevin Enderby
9be8c4c590 Replace this file containing 4 tests of x86 32-bit encodings with a file 
containing the subset of the full auto generated test case that currently
encodes correctly.  Again it is useful as we bring up the the new encoder
to make sure currently working stuff stays working.

llvm-svn: 95791
 2010-02-10 19:13:56 +00:00
Kevin Enderby
f31bc700f1 Fix the encoding of the movntdqa X86 instruction. It was missing the 0x66 
prefix which is part of the opcode encoding.

llvm-svn: 95729
 2010-02-10 00:10:31 +00:00
Chris Lattner
2457a30898 fix X86 encoder to output [disp] only addresses with no SIB byte 
in X86-32 mode.  This is still required in x86-64 mode to avoid
forming [disp+rip] encoding.  Rewrite the SIB byte decision logic
to be actually understandable.

llvm-svn: 95693
 2010-02-09 21:47:19 +00:00
Chris Lattner
682f64dc8d Implement x86 asm parsing support for %st and %st(4) 
llvm-svn: 95634
 2010-02-09 00:49:22 +00:00
Chris Lattner
e1b8c529a4 fix incorrect encoding of SBB8mi that Kevin noticed. 
llvm-svn: 95448
 2010-02-05 22:56:11 +00:00
Chris Lattner
9d4e878b6a fix a case where we'd mis-encode fisttp because of an incorrect (and 
redundant with a correct one) pattern that was added for the disassembler.

llvm-svn: 95446
 2010-02-05 22:49:06 +00:00
Chris Lattner
bec530a499 remove fixme 
llvm-svn: 95444
 2010-02-05 22:46:46 +00:00
Kevin Enderby
57859abd72 Added support for X86 instruction prefixes so llvm-mc can assemble them. The 
Lock prefix, Repeat string operation prefixes and the Segment override prefixes.
Also added versions of the move string and store string instructions without the
repeat prefixes to X86InstrInfo.td. And finally marked the rep versions of
move/store string records in X86InstrInfo.td as isCodeGenOnly = 1 so tblgen is
happy building the disassembler files.

llvm-svn: 95252
 2010-02-03 21:04:42 +00:00
Daniel Dunbar
c6f8382263 AsmParser/X86: Add temporary hack to allow parsing "sal". Eventually we need 
some mechanism for specifying alternative syntaxes, but I'm not sure what form
that should take yet.

llvm-svn: 95158
 2010-02-02 23:46:47 +00:00
Chris Lattner
c49053be3f remove the # TAILCALL markers, which was causing the to fail. 
It's unclear if the matcher is nondeterminstic of what here,
but I'm getting matches without TAILCALL and some other hosts
are getting matches with it.

llvm-svn: 95149
 2010-02-02 22:36:29 +00:00
Chris Lattner
7c37b4942d this apparently depends on the host somehow. 
llvm-svn: 95122
 2010-02-02 20:57:28 +00:00
Chris Lattner
136eeef6b6 disable this test for now. 
llvm-svn: 95120
 2010-02-02 20:41:39 +00:00
Kevin Enderby
a10566900d Added another version of the X86 assembler matcher test case. 
This test case is different subset of the full auto generated test case, and a
larger subset that is in x86_32-bit.s (that set will encode correctly).  These
instructions can pass though llvm-mc as it were a logical cat(1) and then
reassemble to the same instruction.  It is useful as we bring up the parser and
matcher so we don't break things that currently work.

llvm-svn: 95107
 2010-02-02 19:05:57 +00:00
Daniel Dunbar
23e8bc782c MC/X86 AsmParser: Handle absolute memory operands correctly. We were doing 
something totally broken and parsing them as immediates, but the .td file also
had the wrong match class so things sortof worked. Except, that is, that we
would parse
  movl $0, %eax
as
  movl 0, %eax
Feel free to guess how well that worked.

llvm-svn: 94869
 2010-01-30 01:02:48 +00:00
Daniel Dunbar
b0a870919b MC/X86: Add a nice X86 assembler matcher test case from Kevin Enderby. 
- This test case is auto generated, and has been verified to round-trip
   correctly through llvm-mc by checking the assembled .o file before and after
   piping through llvm-mc. It will be extended over time as the matcher grows
   support for more instructions.

llvm-svn: 94857
 2010-01-29 23:32:40 +00:00
Chris Lattner
5f919913e8 wirte up .file and .file to the mc asmparser. 
llvm-svn: 94438
 2010-01-25 19:02:58 +00:00
Chris Lattner
5d31547fec fix a parsing problem on instructions like: 
movw	$8, (_cost_table_-L97$pb)+66(%eax)

After the parens, we could still have a binop.

llvm-svn: 94345
 2010-01-24 01:07:33 +00:00
Chris Lattner
e46549ed67 teach MCAsmStreamer::EmitBytes to use .ascii and .asciz 
llvm-svn: 94259
 2010-01-23 00:15:00 +00:00
Daniel Dunbar
5d1a686840 Mark EH_RETURN64 as CodeGenOnly. 
llvm-svn: 94205
 2010-01-22 20:16:37 +00:00
Chris Lattner
7c3ff46d45 add an MCAsmStreamer::EmitFill specialization of EmitFill that 
emits one directive instead of N.  Not doing this would be a
significant regression on the # bytes generated by .fill.

llvm-svn: 93889
 2010-01-19 18:52:28 +00:00
Chris Lattner
79166b498e only darwin has zerofill 
llvm-svn: 93866
 2010-01-19 06:21:23 +00:00
Daniel Dunbar
9483297711 Force triple in tests. 
llvm-svn: 84257
 2009-10-16 16:30:02 +00:00
Daniel Dunbar
af3162e523 MC: Tweak variable assignment diagnostics, and make reassignment of non-absolute 
variables and symbols invalid.

llvm-svn: 84232
 2009-10-16 01:57:39 +00:00
Daniel Dunbar
a4df6e46a4 MC: When parsing a variable reference, substitute absolute variables immediately 
since they are allowed to be redefined.

llvm-svn: 84230
 2009-10-16 01:34:54 +00:00
Daniel Dunbar
5396b3534f Move ARM and X86 specific AsmParser tests into separate subdirectories, and only 
run if appropriate target is supported.

llvm-svn: 82419
 2009-09-21 00:05:30 +00:00
Chris Lattner
f411f53f9c Add an intel syntax MCInstPrinter implementation. You can now 
transcode from AT&T to intel syntax with "llvm-mc foo.s -output-asm-variant=1"

llvm-svn: 82385
 2009-09-20 07:17:49 +00:00
Kevin Enderby
da3290e68c Added the first bits of the ARM target assembler to llvm-mc. For now it only 
parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will
give an error is called.  Broke out the test of the .word directive into two
different test cases, one for x86 and one for arm.

llvm-svn: 81817
 2009-09-15 00:27:25 +00:00
Chris Lattner
fff91a414b unbreak this test by working around an asmparser bug. 
llvm-svn: 81724
 2009-09-13 22:28:17 +00:00
Dan Gohman
0a1df51219 Unbreak these tests. Chris, please verify that these changes are intended. 
llvm-svn: 81217
 2009-09-08 14:14:24 +00:00
Chris Lattner
4d3c6058a3 use a darwin triple 
llvm-svn: 80900
 2009-09-03 06:15:11 +00:00
Chris Lattner
8739ae0c8a adjust expected lines. 
llvm-svn: 80898
 2009-09-03 06:13:45 +00:00
Chris Lattner
443c84a6a9 update test for alignment value in hex 
llvm-svn: 80876
 2009-09-03 04:03:44 +00:00
Daniel Dunbar
3a44b6da61 llvm-mc: Pass values to MCStreamer as MCExprs, not MCValues. 
llvm-svn: 80578
 2009-08-31 08:09:28 +00:00
Daniel Dunbar
b897e807c4 llvm-mc: Simplify EmitAssignment ('.set' is identical to '='). 
llvm-svn: 80577
 2009-08-31 08:09:09 +00:00
Daniel Dunbar
fcb32716eb llvm-mc: Switch MCInst to storing an MCExpr* instead of an MCValue. 
Also, use MCInst::print instead of custom code in MCAsmPrinter.

llvm-svn: 80575
 2009-08-31 08:08:38 +00:00
Daniel Dunbar
8cbbfb58e7 Update test. 
llvm-svn: 80490
 2009-08-30 07:01:09 +00:00
Daniel Dunbar
bc61205626 llvm-mc: MCStreamer cleanups. - Remove EmitLocalSymbol, this is unsupported for now. 
- Switch Emit{CommonSymbol,Zerofill} to take alignment in bytes (for consistency).

llvm-svn: 80484
 2009-08-30 06:17:16 +00:00
Daniel Dunbar
09ed9fabde llvm-mc: Emit .lcomm as .zerofill. 
llvm-svn: 80343
 2009-08-28 05:48:46 +00:00
Daniel Dunbar
838ad81771 For now, only run MC tests if X86 is configured. 
llvm-svn: 80213
 2009-08-27 06:11:15 +00:00
Daniel Dunbar
fe93385495 llvm-mc: Accept .fill size of 8. 
llvm-svn: 79635
 2009-08-21 15:43:35 +00:00
Daniel Dunbar
3f9ca6d30c Fix typo 
llvm-svn: 79445
 2009-08-19 18:35:54 +00:00
Chris Lattner
aeed3004c1 fix asmstreaming of 2/4 byte elements with pow-2 alignments. 
llvm-svn: 79408
 2009-08-19 06:35:36 +00:00
Daniel Dunbar
3c9ab92a24 llvm-mc: Fix bugs where bytes were unintentionally being printed as signed. 
- We now print all of 403.gcc cleanly (llvm-mc -> 'as' as diffed to 'as'), minus two 
   'rep;movsl' instructions (which I missed before).

llvm-svn: 79031
 2009-08-14 19:59:24 +00:00
Daniel Dunbar
b9d9ce9513 llvm-mc: When handling a .set, make sure to print subsequent references to the 
symbol as the symbol name itself, not the expression it was defined to. These
have different semantics due to the quirky .set behavior (which absolutizes an
expression that would otherwise be treated as a relocation).

llvm-svn: 79025
 2009-08-14 19:10:46 +00:00
Daniel Dunbar
b00271e266 llvm-mc: zerofill shouldn't print quotes around the section,segment. 
llvm-svn: 79017
 2009-08-14 18:51:45 +00:00
Daniel Dunbar
4990c2b03d llvm-mc: Support escaped characters in string literals (for .ascii and .asciz) 
llvm-svn: 79010
 2009-08-14 18:19:52 +00:00
Daniel Dunbar
dc5840c57c Update llvm-mc / MCAsmStreamer to print the instruction using the actual target 
specific printer (this only works on x86, for now).
 - This makes it possible to do some correctness checking of the parsing and
   matching, since we can compare the results of 'as' on the original input, to
   those of 'as' on the output from llvm-mc.

 - In theory, we could now have an easy ATT -> Intel syntax converter. :)

llvm-svn: 78986
 2009-08-14 03:48:55 +00:00
Daniel Dunbar
ec2e96e628 llvm-mc/AsmParser: Match hard coded registers (e.g. 'shldl %cl, %eax, %eax') 
We now match all of 403.gcc (as emitted by clang). :)

llvm-svn: 78750
 2009-08-11 23:23:44 +00:00
Daniel Dunbar
d4f20f9186 llvm-mc: Fix a crash on invalid due to a typo in relocatable expression 
evaluation.

llvm-svn: 78692
 2009-08-11 17:47:52 +00:00
Daniel Dunbar
4e0d543e35 llvm-mc/X86: Parse '*' correctly (in the way the matcher expects). 
llvm-svn: 78642
 2009-08-11 05:00:25 +00:00
Daniel Dunbar
8b8ee45c05 llvm-mc: Accept .word as a synonym for .short 
llvm-svn: 78641
 2009-08-11 04:44:00 +00:00
Daniel Dunbar
9c03cc13de llvm-mc: Sketch parsing for .file, .line, and .loc. No streamer hooks for these 
yet (I'm not even sure what they do).

llvm-svn: 78639
 2009-08-11 04:24:50 +00:00
Daniel Dunbar
677e05c42d llvm-mc: Fix darwin .section parsing. It was skipping the section name and a ',' 
(and outputting a diagnostic pointing at the wrong place), all of which lead to
much confusion.

llvm-svn: 78637
 2009-08-11 03:42:33 +00:00
Daniel Dunbar
8cf3a3f1b2 llvm-mc/AsmParser: Implement automatic classification of RegisterClass operands. 
- This drops us to 123 ambiguous instructions (previously ~500) on X86.

llvm-svn: 78636
 2009-08-11 02:59:53 +00:00
Daniel Dunbar
1ff8dc01aa llvm-mc/AsmParser: Disambiguate i64i8imm. 
llvm-svn: 78598
 2009-08-10 21:06:41 +00:00
Daniel Dunbar
5ae2827607 llvm-mc/AsmParser: Check for matches with super classes when matching 
instruction operands.

llvm-svn: 78565
 2009-08-10 16:05:47 +00:00
Daniel Dunbar
7c61d93b42 Disable this test for now, we don't check for super classes when matching yet. 
llvm-svn: 78531
 2009-08-09 07:35:56 +00:00
Daniel Dunbar
15e6a41728 llvm-mc/AsmParser: Implement user defined super classes. 
- We can now discriminate SUB32ri8 from SUB32ri, for example.

llvm-svn: 78530
 2009-08-09 07:20:21 +00:00
Chris Lattner
9e2c3aa666 sink the 'name' and 'isdirective' state out of MCSection into its derived classes. 
This totally optimizes PIC16 sections by not having an 'isdirective' bit anymore!! ;-)

llvm-svn: 78517
 2009-08-08 23:39:42 +00:00
Daniel Dunbar
07d36a8194 llvm-mc/AsmMatcher: Improve match code. 
- This doesn't actually improve the algorithm (its still linear), but the
   generated (match) code is now fairly compact and table driven. Still need a
   generic string matcher.

 - The table still needs to be compressed, this is quite simple to do and should
   shrink it to under 16k.

 - This also simplifies and restructures the code to make the match classes more
   explicit, in anticipation of resolving ambiguities.

llvm-svn: 78461
 2009-08-08 07:50:56 +00:00
Kevin Enderby
dd20299f97 Added Mac OS X assembler style conditional assembly. I may come back and see if 
I can clean this up a bit more and do way with the TheCondState and just use
the top element on the TheCondStack if not empty.  Also may tweak the code
around ParseConditionalAssemblyDirectives() to simplify the AsmParser code.

llvm-svn: 78423
 2009-08-07 22:46:00 +00:00
Daniel Dunbar
b66377bda2 Disable X86 AsmMatcher for now, it is causing gcc-4.0 to run out of memory on 
i386-apple-darwin9. This presumably will get fixed once the generated code
improves.

llvm-svn: 78379
 2009-08-07 08:45:03 +00:00
Daniel Dunbar
88ccb58384 llvm-mc/AsmMatcher: Move to a slightly more sane matching design. 
- Still not very sane, but a least its not 60k lines on X86. :)

 - In terms of correctness, currently some things are hard wired for X86, and we
   still don't properly resolve ambiguities (this is ignoring the instructions
   we don't even match due to funny .td stuff or other corner cases).

The high level changes:
 1. Represent tokens which are significant for matching explicitly as separate
    operands. This uniformly handles not only the instruction mnemonic, but
    also 'signficiant' syntax like the '*' in "call * ...".

 2. Separate the matching of operands to an instruction from the construction of
    the MCInst. In theory this can be done during matching, but since the number
    of variations is small I think it makes sense to decompose the problems.

 3. Improved a few of the mechanisms to at least successfully flatten / tokenize
    the assembly strings for PowerPC and ARM.

 4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm
    moving towards for handling ambiguous instructions. The high-bit is to infer
    a partial ordering of the operand classes (and force the user to specify one
    if we can't) and use that to resolve ambiguities.

llvm-svn: 78378
 2009-08-07 08:26:05 +00:00
Daniel Dunbar
7fd7e31119 llvm-mc: More quoted identifier support. 
llvm-svn: 77761
 2009-08-01 00:48:30 +00:00
Daniel Dunbar
39929d9343 llvm-mc: Add -triple, and fix some typos 
llvm-svn: 77750
 2009-07-31 23:13:12 +00:00
Daniel Dunbar
a848745eb4 llvm-mc: Fix .s output to quote section & symbol names when necessary. 
llvm-svn: 77749
 2009-07-31 23:04:32 +00:00
Daniel Dunbar
99d279978e llvm-mc: A few more parsing / match tweaks. 
- Operands which are just a label should be parsed as immediates, not memory
   operands (from the assembler perspective).

 - Match a few more flavors of immediates.

 - Distinguish match functions for memory operands which don't take a segment
   register.

 - We match the .s for "hello world" now!

llvm-svn: 77745
 2009-07-31 22:22:54 +00:00
Daniel Dunbar
e150b07b71 llvm-mc: Support quoted identifiers. 
- Uses MCAsmToken::getIdentifier which returns the (sub)string representing the
   meaningfull contents a string or identifier token.

 - Directives aren't done yet.

llvm-svn: 77739
 2009-07-31 21:55:09 +00:00
Daniel Dunbar
3c72ed6449 llvm-mc/X86: Sketch match functions for immediates and memory operands. 
Also, change scale value to always be 1 when unspecified to machine MachineInst
encoding.

llvm-svn: 77728
 2009-07-31 20:53:16 +00:00
Daniel Dunbar
813b35a4b7 Add this test back, the check pattern was too strict. 
llvm-svn: 77662
 2009-07-31 03:11:49 +00:00
Daniel Dunbar
ed28c20ca7 Remove this test while I figure out why it is failing. 
llvm-svn: 77659
 2009-07-31 02:46:36 +00:00
Daniel Dunbar
41639473ed llvm-mc: Match a few X86 instructions. 
- This is "experimental" code, I am feeling my way around and working out the
   best way to do things (and learning tblgen in the process). Comments welcome,
   but keep in mind this stuff will change radically.

 - This is enough to match "subb" and friends, but not much else. The next step is to
   automatically generate the matchers for individual operands.

llvm-svn: 77657
 2009-07-31 02:32:59 +00:00
Daniel Dunbar
3edfc4bb16 llvm-mc: Implement .abort fully in the front end 
llvm-svn: 77272
 2009-07-27 23:20:52 +00:00
Kevin Enderby
f1c0daa6a7 Removed the DumpSymbolsandMacros and LoadSymbolsandMacros MCStreamer API as 
the parsing of the .dump and .load should be done in the assembly parser and
not have any need for an MCStreamer API.  Changed the code for now so these
just produce an error saying these specific directives are not yet implemented
since they are likely no longer used and may never need to be implemented.

llvm-svn: 76462
 2009-07-20 20:25:37 +00:00
Daniel Dunbar
ab1316fbaf llvm-mc: Add -triple, and start fetching the target asm printer. 
llvm-svn: 76257
 2009-07-17 22:38:58 +00:00
Chris Lattner
4939bd13ad implement .include in the lexer/parser instead of passing it into the streamer. 
llvm-svn: 75896
 2009-07-16 06:14:39 +00:00
Kevin Enderby
312f8559cb Added llvm-mc support for parsing the .dump and .load directives. 
llvm-svn: 75786
 2009-07-15 15:30:11 +00:00
Kevin Enderby
3e47cf1dda Added llvm-mc support for parsing the .include directive. 
llvm-svn: 75711
 2009-07-14 23:21:55 +00:00
Kevin Enderby
5821cee99b Added llvm-mc support for parsing the .lsym directive. 
llvm-svn: 75685
 2009-07-14 21:35:03 +00:00
Kevin Enderby
0b1331c43b Added llvm-mc support for parsing the .desc directive. 
llvm-svn: 75645
 2009-07-14 18:17:10 +00:00