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3405 Commits

Author SHA1 Message Date
Chris Lattner
26c7c9150a Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emit 
andi instructions instead of rlwinm instructions for zero extend, but they
seem like they would take the same time.

llvm-svn: 21268
 2005-04-13 02:40:26 +00:00
Chris Lattner
f25fefd9cf Z_E_I is gone 
llvm-svn: 21267
 2005-04-13 02:39:05 +00:00
Nate Begeman
a56527ea5f Fold shift by size larger than type size to undef 
Make llvm undef values generate ISD::UNDEF nodes

llvm-svn: 21261
 2005-04-12 23:12:17 +00:00
Nate Begeman
79c8b8fd1c Implement setcc op, -1 sequences 
Remove dead setcc op, 0 sequences
Coming later: generalization of op, imm

llvm-svn: 21260
 2005-04-12 21:22:28 +00:00
Duraid Madina
39fcec1541 * OK, after changing to use liveIn/liveOut instead of IDEFs, 
to avoid redundant mov out3=r44 type instructions, we need to
tell the register allocator the truth about out? registers.

FIXME: unfortunately, since the list of allocatable registers is immutable,
we can't simply 'delete r127' from the allocation order, say, if 'out0' is
used. The only correct thing we can do is have a linear order of regs:

out7, out6 ... out2, out1, out0, r32, r33, r34 ... r126, r127

and slide a 'window' of 96 registers along this line, depending on how many
of the out? regs a function actually uses. The only downside of this is
that the out? registers will be allocated _first_, which makes the
resulting assembly ugly. :( Note this in the README. Hope this gets fixed
soon. :) (note the 3rd person speech there)

llvm-svn: 21252
 2005-04-12 18:42:59 +00:00
Andrew Lenharth
174d44f223 Get rid of idefs for arguments (oops) 
llvm-svn: 21251
 2005-04-12 17:47:57 +00:00
Andrew Lenharth
1b8a8331c9 Get rid of idefs for arguments 
llvm-svn: 21250
 2005-04-12 17:35:16 +00:00
Chris Lattner
be2dceff48 Put out* into the allocation order, allowing the register allocator to 
coallesce moves into outgoing args.

llvm-svn: 21249
 2005-04-12 15:12:51 +00:00
Chris Lattner
37712352c0 Make sure to realize that calls use their argument regs 
llvm-svn: 21248
 2005-04-12 15:12:19 +00:00
Duraid Madina
2821f99f19 stop emitting IDEFs for args - change to using liveIn/liveOut 
llvm-svn: 21247
 2005-04-12 14:54:44 +00:00
Nate Begeman
f96b42f1b6 Initial support for allocation condition registers 
llvm-svn: 21246
 2005-04-12 07:04:16 +00:00
Nate Begeman
a154deaaff Implement bitfield clears 
Implement divide by negative power of two

llvm-svn: 21240
 2005-04-12 00:10:02 +00:00
Nate Begeman
f31b58f145 Update PPC readme. Remove things that are done or aren't ppc specific 
llvm-svn: 21232
 2005-04-11 20:48:57 +00:00
Chris Lattner
55e620f08d IA64 supports this operation. 
llvm-svn: 21228
 2005-04-11 18:55:36 +00:00
Chris Lattner
ee715b2abc ORo sets CR0 
llvm-svn: 21227
 2005-04-11 15:03:48 +00:00
Chris Lattner
7d11f40ee2 Revert the previous patch, which I didn't mean to check in. 
llvm-svn: 21226
 2005-04-11 15:03:41 +00:00
Chris Lattner
d925c74452 Fix a minor bug (ORo didn't mark that it set CR0). 
Refactor how . instructions are handled.  In particular, instead of passing
the RC flag all the way up the inheritance hierarchy, just make a new tblgen
class 'DOT' which can be added to an instruction definition.

For example, instead of this:

-def AND  : XForm_6<31,  28, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
-let Defs = [CR0] in
-def ANDo : XForm_6<31,  28, 1, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
-                   "and. $rA, $rS, $rB">;

We now have this:

+def AND  : XForm_6<31,  28, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
                    "and $rA, $rS, $rB">;

llvm-svn: 21225
 2005-04-11 15:01:39 +00:00
Duraid Madina
01aaf77792 hmm, should probably change addImm() to take 64-bit arguments one day anyway. 
llvm-svn: 21224
 2005-04-11 07:16:39 +00:00
Nate Begeman
783fe2108e Add recording variants of ISD::AND and ISD::OR. This kills almost 1000 
(1.5%) instructions in 186.crafty

llvm-svn: 21222
 2005-04-11 06:34:10 +00:00
Duraid Madina
d2ae9221c7 assorted fixes: 
* clean up immediates (we use 14, 22 and 64 bit immediates now. sane.)
  * fold r0/f0/f1 registers into comparisons against 0/0.0/1.0
  * fix nasty thinko - didn't use two-address form of conditional add
    for extending bools to integers, so occasionally there would be
    garbage in the result. it's amazing how often zeros are just
    sitting around in registers ;) - this should fix a bunch of tests.

llvm-svn: 21221
 2005-04-11 05:55:56 +00:00
Nate Begeman
34aa7ec9cb Fix another fixme: factor out the constant fp generation code. 
llvm-svn: 21207
 2005-04-10 06:06:10 +00:00
Nate Begeman
b6c9b326e3 Fix 64 bit argument loading that straddles the args in regs / args on stack 
boundary.

llvm-svn: 21206
 2005-04-10 05:53:14 +00:00
Nate Begeman
0a43e95718 Remove unnecessary Implicit Defs. Since r0 is not in allocation, we do not 
have to inform the register allocator it might be stepped on.

llvm-svn: 21202
 2005-04-10 03:59:42 +00:00
Nate Begeman
f5cedbc812 Make sure that BRCOND branches can be converted into long branches too. 
llvm-svn: 21198
 2005-04-10 01:48:29 +00:00
Nate Begeman
ab8e705a52 Don't hand ISD::CALL nodes off to SelectExprFP. This fixes siod. 
llvm-svn: 21197
 2005-04-10 01:14:13 +00:00
Chris Lattner
c1bacbff9d rename getPPCOpcodeForSetCCNumber -> getPPCOpcodeForSetCCOpode to be more 
correct.  Remove the EmitComparison retvalue, as it is always the first arg.

Fix a place where we incorrectly passed in the setcc opcode instead of the
setcc number, causing us to miscompile crafty.  Crafty now works!

llvm-svn: 21195
 2005-04-10 01:03:31 +00:00
Nate Begeman
a2374d39df fix ISD::BRCONDTWOWAY codegen to not deference the end() iterator 
llvm-svn: 21193
 2005-04-09 23:35:05 +00:00
Chris Lattner
17c60891c1 Fix CodeGen/Generic/2005-05-09-GlobalInPHI.ll, which was reduced from 254.gap. 
This caused the "use before a def" assertion on some programs.

With this patch, 254.gap now passes with the PPC backend.

llvm-svn: 21191
 2005-04-09 22:05:17 +00:00
Chris Lattner
b630949c2e do not set the root to null if an argument is dead 
llvm-svn: 21188
 2005-04-09 21:23:24 +00:00
Nate Begeman
dda6155d19 Add rlwnm instruction for variable rotate 
Generate rotate left/right immediate
Generate code for brcondtwoway
Use new livein/liveout functionality

llvm-svn: 21187
 2005-04-09 20:09:12 +00:00
Chris Lattner
72b1964108 Fix a crash on 173.applu by asking for a constant bigger than 32-bits. 
llvm-svn: 21185
 2005-04-09 19:47:21 +00:00
Chris Lattner
c97f9f403f Switch this instruction selector over to using liveins and liveouts, eliminating 
implicit defs on entry to the function.  yaay :)

llvm-svn: 21184
 2005-04-09 16:32:30 +00:00
Chris Lattner
fd4d6e0847 Use live out sets for return values instead of imp_defs, which is cleaner and faster. 
llvm-svn: 21181
 2005-04-09 15:23:56 +00:00
Duraid Madina
2d3e52576d ok, the "ia64 has a boatload of registers" joke stopped being funny today ;) 
* fix overallocation of integer (stacked) registers: we can't allocate
  registers for local use if they are required as output registers

this fixes 'toast' in the test suite, and all sorts of larger programs
like bzip2 etc.

llvm-svn: 21178
 2005-04-09 11:53:00 +00:00
Nate Begeman
98bcb13bfa Optimize FSEL a bit for fneg arguments. This fixes the recently added test 
case so that we emit

_test_fneg_sel:
.LBB_test_fneg_sel_0:   ;
        fsel f1, f1, f3, f2
        blr

instead of:

_test_fneg_sel:
.LBB_test_fneg_sel_0:   ;
        fneg f0, f1
        fneg f0, f0
        fsel f1, f0, f3, f2
        blr

llvm-svn: 21177
 2005-04-09 09:33:07 +00:00
Chris Lattner
3fde68ea7a Fix CodeGen/SparcV9/2005-05-09-GEP-Crash.ll a crash on some specfp program 
lets hope this doesn't break other programs with induced entropy

llvm-svn: 21174
 2005-04-09 06:27:14 +00:00
Chris Lattner
39f963f968 This target does not support/want ISD::BRCONDTWOWAY 
llvm-svn: 21164
 2005-04-09 03:22:37 +00:00
Chris Lattner
c80baf5567 This target does not yet support ISD::BRCONDTWOWAY 
llvm-svn: 21163
 2005-04-09 03:22:30 +00:00
Nate Begeman
99fb6814bd 64b: Expand S/UREM 
32b: No longer pattern match fneg(fsub(fmul)) as fnmsub
     Pattern match fsub a, mul(b, c) as fnmsub
     Pattern match fadd a, mul(b, c) as fmadd
Those changes speed up hydro2d by 2.5%, distray by 6%, and scimark by 8%

llvm-svn: 21161
 2005-04-09 03:05:51 +00:00
Nate Begeman
95e1b860a1 Fix 64b shifts 
llvm-svn: 21159
 2005-04-08 23:45:01 +00:00
Nate Begeman
3fca499b8d Match Mac OS X 64 bit calling conventions 
llvm-svn: 21157
 2005-04-08 21:26:05 +00:00
Andrew Lenharth
6eff2083b5 collect a few statistics, factor constants (constant loading and mult), fix logic operation pattern matchs, supress FP div when int dividing by a constant 
llvm-svn: 21156
 2005-04-08 17:28:49 +00:00
Duraid Madina
e7412561bf fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn) 
fix hack in division (clean up frcpa instruction)

llvm-svn: 21153
 2005-04-08 10:01:48 +00:00
Nate Begeman
6875356db1 Optimized code sequences for setcc reg, 0 
Optimized code sequence for (a < 0) ? b : 0

llvm-svn: 21150
 2005-04-07 20:30:01 +00:00
Andrew Lenharth
b1b7ef0979 Alpha zero extends setcc results 
llvm-svn: 21149
 2005-04-07 20:11:32 +00:00
Chris Lattner
352dd3e579 PowerPC zero extends setcc results 
llvm-svn: 21147
 2005-04-07 19:41:49 +00:00
Chris Lattner
583dcc66f2 X86 zero extends setcc results 
llvm-svn: 21146
 2005-04-07 19:41:46 +00:00
Andrew Lenharth
c3e5c42b86 fix a small optimization opertunity and make gcc happy 
llvm-svn: 21143
 2005-04-07 18:15:28 +00:00
Andrew Lenharth
469244a2b4 fixup magic constant making code. tested by thousands of random divisions.... by 10000. ok, so random divisors would be good too, but this at least fixes some things 
llvm-svn: 21140
 2005-04-07 17:19:16 +00:00
Andrew Lenharth
61215a78fb lowercase instructions, makes diff happier 
llvm-svn: 21139
 2005-04-07 17:17:48 +00:00
Andrew Lenharth
3d1228500d It wasn't happy about this either 
llvm-svn: 21133
 2005-04-07 14:18:13 +00:00
Andrew Lenharth
ce0dcea720 Yea, it wasn't happy 
llvm-svn: 21132
 2005-04-07 13:55:53 +00:00
Duraid Madina
ab6e2cfaeb teach asmprinter to print s8/s14 operands 
llvm-svn: 21131
 2005-04-07 12:34:36 +00:00
Duraid Madina
ed8eb83203 codegen immediate forms of add/sub/shift 
llvm-svn: 21130
 2005-04-07 12:33:38 +00:00
Duraid Madina
5c4a7b68b3 add immediate forms of add, sub, shift 
llvm-svn: 21129
 2005-04-07 12:32:24 +00:00
Nate Begeman
b890f32ac9 Pattern match bitfield insert, which helps shift long by immediate, among 
other things.

llvm-svn: 21127
 2005-04-06 23:51:40 +00:00
Nate Begeman
6c5e4c3bb1 Fix some shift bugs 
llvm-svn: 21126
 2005-04-06 22:42:08 +00:00
Alkis Evlogimenos
242fe17bc4 Make these 64 bit constants so that this compiles on x86-32 as well. 
llvm-svn: 21125
 2005-04-06 22:09:40 +00:00
Andrew Lenharth
abf46a4f5e added sdiv by 2^k and works for neg divisors also 
llvm-svn: 21124
 2005-04-06 22:03:13 +00:00
Andrew Lenharth
5c71402202 fix copy/paste errors, and add imm support to SxADDQ and SxSUBQ 
llvm-svn: 21121
 2005-04-06 20:59:59 +00:00
Chris Lattner
40ee8a062b Fix SingleSource/Regression/C/2005-05-06-LongLongSignedShift.c, we were not 
properly sign extending the top of the result of a 64-bit shift right by
a constant > 32.

llvm-svn: 21120
 2005-04-06 20:59:35 +00:00
Andrew Lenharth
9f65102f9b Added Nate's div by constant stuff, also scaled operations! 
llvm-svn: 21116
 2005-04-06 20:25:34 +00:00
Chris Lattner
7c0786dda8 Fix a namespace issue, reported by Vladimir Merzliakov! 
llvm-svn: 21115
 2005-04-06 19:45:39 +00:00
Duraid Madina
5fa854a7fe steal sampo's div-by-constant-power-of-2 stuff 
thanks sampo!!

llvm-svn: 21113
 2005-04-06 09:55:17 +00:00
Duraid Madina
1d156293cb add fms instruction 
llvm-svn: 21112
 2005-04-06 09:54:09 +00:00
Nate Begeman
98251d6a1c Fixed version of optimized integer divide is now fixed. Calculate the 
quotient, not the remainder.  Also, make sure to remove the old div operand
from the ExprMap and let SelectExpr insert the new one.

llvm-svn: 21111
 2005-04-06 06:44:57 +00:00
Duraid Madina
2db29b8016 lie a bit and say that r1/r12 (GP/SP) _aren't_ callee-save, as we take 
care of this ourselves

llvm-svn: 21110
 2005-04-06 06:18:36 +00:00
Duraid Madina
62c4de8d62 make sure 'special' registers don't get allocated 
llvm-svn: 21109
 2005-04-06 06:17:54 +00:00
Chris Lattner
c87ff88efb Add (untested) support for MULHS and MULHU. 
llvm-svn: 21107
 2005-04-06 04:21:07 +00:00
Chris Lattner
ba7cdbebb1 add signed versions of the extra precision multiplies 
llvm-svn: 21106
 2005-04-06 04:19:22 +00:00
Nate Begeman
aee0f81849 Turn off the div -> mul optimization until it works correctly 100% of the 
time.

llvm-svn: 21105
 2005-04-06 03:36:33 +00:00
Nate Begeman
b44597771c Add support for MULHS and MULHU nodes 
Have LegalizeDAG handle SREM and UREM for us
Codegen SDIV and UDIV by constant as a multiply by magic constant instead
of integer divide, which is very slow.

llvm-svn: 21104
 2005-04-06 00:25:27 +00:00
Andrew Lenharth
613a940af8 added lowerargs support for varargs 
llvm-svn: 21101
 2005-04-05 20:51:46 +00:00
Nate Begeman
82ff41c342 Behold, rlwinm with certain immediate arguments is printed as the much more 
readable slwi or srwi (shift left/right word immediate).

llvm-svn: 21099
 2005-04-05 18:19:50 +00:00
Nate Begeman
581553fd21 Fix cut & paste errors (32->64), and codegen float->int more optimally. 
llvm-svn: 21098
 2005-04-05 17:32:30 +00:00
Tanya Lattner
4d8f553a82 Updated to use dep analyzer. 
llvm-svn: 21097
 2005-04-05 16:36:44 +00:00
Nate Begeman
152dbbe856 Remove 64 bit simple ISel, it never worked correctly 
Add initial (buggy) implementation of 64 bit pattern ISel

llvm-svn: 21096
 2005-04-05 08:51:15 +00:00
Nate Begeman
a18a26f47c Back out the previous change to SelectBranchCC, since there are cases it 
could miscompile.  A correct solution will be found in the near future.

llvm-svn: 21095
 2005-04-05 04:32:16 +00:00
Nate Begeman
358dee806e Rename canUseAsImmediateForOpcode to getImmediateForOpcode to better 
indicate that it is not a boolean function.
Properly emit the pseudo instruction for conditional branch, so that we
  can fix up conditional branches whose displacements are too large.
Reserve the right amount of opcode space for said pseudo instructions.

llvm-svn: 21094
 2005-04-05 04:22:58 +00:00
Nate Begeman
ede4abc899 Implement SDIV by power of 2 as srawi/addze rather than load imm, divw 
llvm-svn: 21091
 2005-04-05 00:15:08 +00:00
Nate Begeman
00002553ba Pattern match fp mul-add, mul-sub, neg-mul-add, and neg-mul-sub 
llvm-svn: 21090
 2005-04-04 23:40:36 +00:00
Nate Begeman
682fd51f9c Add support for multiply-add, multiply-sub, and their negated versions 
llvm-svn: 21089
 2005-04-04 23:01:51 +00:00
Nate Begeman
d9af5c4fc5 Make sure that arg regs used by the call instruction are marked as such, so 
that regalloc doesn't cleverly reuse early arg regs loading later arg regs.
This fixes almost all outstanding failures in the pattern isel.

llvm-svn: 21086
 2005-04-04 22:17:48 +00:00
Nate Begeman
ce13bceb2a Remove unnecessary register copy now that regalloc is fixed 
llvm-svn: 21085
 2005-04-04 21:48:13 +00:00
Nate Begeman
bde3612ce3 i1 loads should also be from the low byte of the argument word. 
llvm-svn: 21077
 2005-04-04 09:09:00 +00:00
Nate Begeman
77427b1e77 Fix i64 return, fix CopyFromReg 
llvm-svn: 21076
 2005-04-04 06:52:38 +00:00
Duraid Madina
920aea2fa7 fix SREM/UREM, which gave incorrect results for x%y if x was zero. This is 
an ugly hack, but it seems to work. I should fix this properly and add a test
as well.

fixes multisource/obsequi (maybe others)

llvm-svn: 21075
 2005-04-04 05:05:52 +00:00
Duraid Madina
d896a18d33 add implicit use op 
llvm-svn: 21074
 2005-04-04 04:50:57 +00:00
Nate Begeman
b2e5a962ff Full varargs support. All of UnitTests now passes 
llvm-svn: 21070
 2005-04-03 23:11:17 +00:00
Nate Begeman
1a5aaf6009 Pass the correct value for the chain to the store 
llvm-svn: 21066
 2005-04-03 22:22:56 +00:00
Nate Begeman
82d17d0e70 Fix SHL_PARTS 
Start implementation of integer varargs

llvm-svn: 21065
 2005-04-03 22:13:27 +00:00
Andrew Lenharth
320fff1cbe is this simpler? I think it is simpler. 
llvm-svn: 21064
 2005-04-03 20:35:21 +00:00
Andrew Lenharth
4be5502eb4 fix 101 regressions 
llvm-svn: 21063
 2005-04-03 18:24:50 +00:00
Duraid Madina
bfbfb0e4c7 .bss is no problem here. 
llvm-svn: 21061
 2005-04-03 14:52:01 +00:00
Nate Begeman
127bd62534 Keeping up with the Joneses. 
Implement not, nor, nand, and eqv

llvm-svn: 21060
 2005-04-03 11:20:20 +00:00
Andrew Lenharth
c16ede8779 Select optimization 
llvm-svn: 21051
 2005-04-02 22:32:39 +00:00
Andrew Lenharth
bd19c1d25f Try several things. 1) drop /i from FP ops 2) factor out FP to Int moves and provide 21264 support for those 3) match not 4) match ornot andnot xornot 
llvm-svn: 21046
 2005-04-02 21:06:51 +00:00
Andrew Lenharth
08e5b4f996 FNEG/FABS/UNDEF 
llvm-svn: 21029
 2005-04-02 19:11:07 +00:00
Andrew Lenharth
04fd317736 FNEG/FABS 
llvm-svn: 21028
 2005-04-02 19:04:58 +00:00
Duraid Madina
63f75bdf49 ia64 asmprinter fixes: 
- turn off assembler's autoalignment
  - set FunctionAddrPrefix/Suffix so that .data8 entries pointing to
    functions have their value wrapped in @fptr(), so that a function
    descriptor will be materialized for that function.

llvm-svn: 21025
 2005-04-02 12:30:47 +00:00
Duraid Madina
5367cc3b49 support IDEF, fnegabs (thanks sampo) 
llvm-svn: 21023
 2005-04-02 10:33:53 +00:00
Duraid Madina
81675e4031 add fnegabs op 
llvm-svn: 21022
 2005-04-02 10:06:27 +00:00
Nate Begeman
402c04ff16 Set shift amount to Extend 
Implement ISD::FABS and ISD::FNEG nodes
Implement SHL_PARTS, SRL_PARTS, and SRA_PARTS
Generate PowerPC 'fneg', 'fabs', and 'fnabs' instructions

llvm-svn: 21018
 2005-04-02 05:59:34 +00:00
Chris Lattner
8f30d63c1a add support for FABS and FNEG 
llvm-svn: 21015
 2005-04-02 05:30:17 +00:00
Duraid Madina
333132da85 add support FNEG and FABS 
llvm-svn: 21012
 2005-04-02 05:18:38 +00:00
Chris Lattner
a5d4718875 This target doesn't support fabs/fneg yet. 
llvm-svn: 21010
 2005-04-02 05:03:24 +00:00
Chris Lattner
71434aa2dd add an fabs instr 
llvm-svn: 21006
 2005-04-02 04:31:56 +00:00
Chris Lattner
8ee783d9f0 Add support for 64-bit shifts. 
llvm-svn: 21005
 2005-04-02 04:01:14 +00:00
Nate Begeman
8d60ca616f Fix i64 returns 
Generate PowerPC 'subfic' instruction when appropriate

llvm-svn: 20995
 2005-04-02 00:42:16 +00:00
Chris Lattner
67da3fdb70 Add support for ISD::UNDEF to the X86 be 
llvm-svn: 20990
 2005-04-01 22:46:45 +00:00
Nate Begeman
4034852ba9 Add ISD::UNDEF node 
Teach the SelectionDAG code how to expand and promote it
Have PPC32 LowerCallTo generate ISD::UNDEF for int arg regs used up by fp
  arguments, but not shadowing their value.  This allows us to do the right
  thing with both fixed and vararg floating point arguments.

llvm-svn: 20988
 2005-04-01 22:34:39 +00:00
Chris Lattner
375f5e6ed5 Fix another PATypeHolder error, contributed by Bill Wendling! 
llvm-svn: 20983
 2005-04-01 15:41:30 +00:00
Duraid Madina
48ef32d6d3 repair mindless SELECT waste. 
llvm-svn: 20982
 2005-04-01 10:35:00 +00:00
Nate Begeman
244b36582a Fix Olden/bh, CR0 was being set in the wrong order 
LowerCallTo and ISD::CALL are going to need to be modified, regs are being
set in the wrong order.

llvm-svn: 20981
 2005-04-01 08:57:43 +00:00
Nate Begeman
f3ead25b68 Also apply Chris's fix to FP select and SETCC 
llvm-svn: 20979
 2005-04-01 07:21:30 +00:00
Chris Lattner
0cd0036523 Move the selection of the arms of the select operation up to the conditional 
part to make sure we get the side effects and to avoid confusing the CFG.

llvm-svn: 20977
 2005-04-01 07:10:02 +00:00
Nate Begeman
e82a2d7373 Fix stores to global addresses 
Fix calls with no arguments

llvm-svn: 20975
 2005-04-01 05:57:17 +00:00
Nate Begeman
9d224ae29b Support indexed loads and stores. This drops Shootout/matrix time from 
18.8 to 14.8 seconds.  The Pattern ISel is now often faster than the
Simple ISel, esp. on memory intensive code.

llvm-svn: 20973
 2005-04-01 04:45:11 +00:00
Nate Begeman
af7c6366d7 Implement FP_TO_SINT and FP_TO_UINT 
llvm-svn: 20972
 2005-04-01 02:59:27 +00:00
Nate Begeman
552f6f5f4e Add support for adding 0.0 and -0.0 to the constant pool, since we lie and 
say that we support them, for the purposes of generating fsel instructions.

llvm-svn: 20970
 2005-04-01 01:08:07 +00:00
Nate Begeman
18b3394f4d Factor out common code, support FP comparison in folded SetCC 
llvm-svn: 20969
 2005-04-01 00:32:34 +00:00
Nate Begeman
fc89059914 fsel generation for f32 and f64 select 
generate compare immediate for integer compare with constant
fold setcc into branch
fold setcc into select

Code generation quality for Shootout is now on par with the Simple ISel

llvm-svn: 20968
 2005-03-31 23:55:40 +00:00
Andrew Lenharth
1ba016ab6f make fp div trick dependend on flag 
llvm-svn: 20967
 2005-03-31 22:02:25 +00:00
Andrew Lenharth
7db3834ecf PCMarker support for DAG and Alpha 
llvm-svn: 20965
 2005-03-31 21:24:06 +00:00
Duraid Madina
47fed18416 Assorted fixes: 
* Stop being pessimistic about output register allocation
  * Start to handle function descriptors: compute target GPs and so on
  when doing indirect calls etc. Not there yet, though. For the moment,
  we try to use _indirect_ branches wherever possible, to stress test
  function descriptors.
  * FP divide-by-zero should work now
  * add varargs (it doesn't work, though)

At this point, all of SingleSource passes (modulo C++ tests that are due
to issues with the CFE, see note in the README.) Much of MultiSource also
passes although there's still a ton of bugs around. Something for me to
work on tomorrow, then. :)

llvm-svn: 20960
 2005-03-31 12:31:11 +00:00
Duraid Madina
f2d1865c74 * declare local common symbols as such (.lcomm, not merely .common) 
* begin great adventure into correct function descriptor materialization

llvm-svn: 20956
 2005-03-31 07:40:24 +00:00
Duraid Madina
03efd3bea9 daintyness 
llvm-svn: 20955
 2005-03-31 07:36:43 +00:00
Duraid Madina
11ff0a2a5f add what we need to fudge a 'floating point conditional move', this is 
used to get FP div-by-zero working properly (shunt the right answer
depending on how frcpa sets its predicate output)

llvm-svn: 20954
 2005-03-31 07:32:32 +00:00
Nate Begeman
17ff2b3a87 Pass the correct values to the chain argument for node construction during 
LowerCallTo.
Handle ISD::ADD in SelectAddr, allowing us to have nonzero immediates for
loads and stores, amazing!

llvm-svn: 20946
 2005-03-31 02:05:53 +00:00
Nate Begeman
de4aac1374 Rewrite LowerCallTo and Select(ISD::CALL) to properly handle float varargs 
Tell the SelectionDAG ISel to expand SEXTLOAD of i1 and i8, rather than
  complicate the code in ISD::SEXTLOAD to do it by hand
Combine the FP and Int ISD::LOAD codegen
Generate better code for constant pool loads

As a result, all of Shootout, and likely many other programs are now
working.

llvm-svn: 20945
 2005-03-31 00:15:26 +00:00
Nate Begeman
9c5480beeb Fix calls whose arguments fit entirely in registers to not break the Chain. 
Implement SINT_TO_FP and UINT_TO_FP
Remove some dead code from the simple ISel

llvm-svn: 20944
 2005-03-30 19:38:35 +00:00
Andrew Lenharth
91bd9033c6 yea, fine Duraid 
llvm-svn: 20942
 2005-03-30 18:22:52 +00:00
Nate Begeman
c877844625 Fix frame index code to generate legal PowerPC instructions. About half of 
Shootout now works.

llvm-svn: 20940
 2005-03-30 02:23:08 +00:00
Nate Begeman
ec87399dac Fix external symbol printing in the AsmPrinter. Tell the ISel that we 
don't support things like memcpy directly.  This allows a handful of the
Shootout programs to work, yay!

llvm-svn: 20939
 2005-03-30 01:45:43 +00:00
Chris Lattner
46c4246df1 don't depend on the cfg being set up yet 
llvm-svn: 20936
 2005-03-30 01:10:00 +00:00
Nate Begeman
8eddad3985 Fix BranchCC (it's still dumb), and implement FP select (also dumb) 
llvm-svn: 20935
 2005-03-29 22:48:55 +00:00
Nate Begeman
43b127ca0a Implement integer select and i1 sign extend 
llvm-svn: 20934
 2005-03-29 22:24:51 +00:00
Nate Begeman
d5d90ec76b Implement SetCC, fix ZERO_EXTEND_INREG 
llvm-svn: 20933
 2005-03-29 21:54:38 +00:00
Tanya Lattner
bc14e623e3 Compare dependence analysis with llvm instructions versus machine instrutions. the problem with using machine instructions and alias analysis is that aa does not handle tmp instructions. 
llvm-svn: 20931
 2005-03-29 20:35:10 +00:00
Tanya Lattner
7edde71619 Dependence analyzer that just determines dependences within a loop for loads and stores using alias analysis. 
llvm-svn: 20930
 2005-03-29 20:33:42 +00:00
Andrew Lenharth
21c4590f96 Fix up some types and constants 
llvm-svn: 20928
 2005-03-29 19:24:04 +00:00
Chris Lattner
3759d20b0f fix a warning in the optimized build 
llvm-svn: 20920
 2005-03-29 15:13:27 +00:00
Nate Begeman
62e458272f Implement div, rem, and frameindex 
llvm-svn: 20907
 2005-03-29 00:03:27 +00:00
Nate Begeman
734a61f057 Pattern ISel: fix argument loading for i64s (thanks chris) 
Simple  ISel: fix i64 subtract

llvm-svn: 20903
 2005-03-28 23:08:54 +00:00
Nate Begeman
32d1caae6d Remove fake instruction 'subc' (mnemonic for subfc). 
More pattern isel updates

llvm-svn: 20902
 2005-03-28 22:28:37 +00:00
Nate Begeman
2ab66f55b6 Implement proper loads and zero-extends of all types 
llvm-svn: 20897
 2005-03-28 19:36:43 +00:00
Duraid Madina
7b5f67baf9 Emit .global @function and .global @object entries so the Intel ias 
assembler may be used; identify LLVM output as such.

llvm-svn: 20892
 2005-03-28 15:21:43 +00:00
Nate Begeman
6b0fbf811f Fix that pesky floats in integer regs problem by assigning the f32 type to 
the correct register class.  Also remove the loading of float data into int
regs part of varargs; it will need to be implemented differently later.

llvm-svn: 20857
 2005-03-26 08:25:22 +00:00
Nate Begeman
31d175d1e5 Get closer to having varargs working. There's still something strange 
going on with copies between floating point and integer register files
being generated.  Once that is solved, varargs will be done.

llvm-svn: 20856
 2005-03-26 07:46:36 +00:00
Nate Begeman
69742e6ea1 Make 64bit args and float args work correct with calls. Thanks to Chris 
for explaining EXTRACT_ELEMENT to me.

llvm-svn: 20847
 2005-03-26 02:17:46 +00:00
Nate Begeman
f821401825 Change interface to LowerCallTo to take a boolean isVarArg argument. 
llvm-svn: 20842
 2005-03-26 01:29:23 +00:00
Nate Begeman
d3b5925b38 Next round of pattern isel changes, mostly dealing with calls. 
llvm-svn: 20841
 2005-03-26 01:28:53 +00:00
Nate Begeman
4106e81966 Correct a documention link 
llvm-svn: 20840
 2005-03-26 01:28:05 +00:00
Nate Begeman
ba1cd37734 Support global addresses and fix call returns. Varargs still aren't 
handled correctly for floating point arguments, or more than 8 arguemnts.
This does however, allow hello world to run.

llvm-svn: 20832
 2005-03-25 08:34:25 +00:00
Nate Begeman
6b11098886 Implement next round of Pattern ISel fixes 
1. void returns
2. multiplies
3. calls

llvm-svn: 20822
 2005-03-24 23:35:30 +00:00
Nate Begeman
613e54d5f0 Fix an incorrect argument being passed to BuildMI for indirect calls. 
llvm-svn: 20821
 2005-03-24 23:34:38 +00:00
Nate Begeman
4584ca0554 Commit Gabor Greif's patch to use iterators in lowering intrinsics. 
llvm-svn: 20816
 2005-03-24 20:07:16 +00:00
Chris Lattner
ad07b1bc54 eliminate dead variables, patch contributed by Gabor Greif! 
llvm-svn: 20812
 2005-03-24 17:32:20 +00:00
Nate Begeman
833c1d0994 Implement more of the PPC32 Pattern ISel: 
1) dynamic stack alloc
2) loads
3) shifts
4) subtract
5) immediate form of add, and, or, xor
6) change flag from -pattern-isel to -enable-ppc-pattern-isel

Remove dead arguments from getGlobalBaseReg in the simple ISel

llvm-svn: 20810
 2005-03-24 06:28:42 +00:00
Chris Lattner
a42c4a0874 Fix silly "no newline at end of file" warning 
llvm-svn: 20809
 2005-03-24 06:16:18 +00:00
Chris Lattner
56f3525a1d Fix compilation errors, patch contributed by the fabulous Bill Wendling! 
llvm-svn: 20808
 2005-03-24 05:13:53 +00:00
Chris Lattner
2e2035aa72 fix a compilation error, patch contributed by Bill Wendling! 
llvm-svn: 20807
 2005-03-24 05:12:48 +00:00
Nate Begeman
0e77845b7e Addition of the PPC32 Pattern ISel. While it is far from complete, it will 
be brought up to parity with the current simple ISel in the coming days.
Currently, -pattern-isel is required to trigger it.

llvm-svn: 20805
 2005-03-24 04:41:43 +00:00
Nate Begeman
175a9f1cc6 Remove comments that are now meaningless from the pattern ISels, at Chris's 
request.

llvm-svn: 20804
 2005-03-24 04:39:54 +00:00
Andrew Lenharth
b1bd2e2900 don't lie to the register allocator 
llvm-svn: 20784
 2005-03-23 15:20:01 +00:00
Tanya Lattner
d7b8fb8263 Added alias analysis. 
Fixed many many bugs.
This now works on almost all Singlesource , and most of MultiSource.

llvm-svn: 20780
 2005-03-23 01:47:20 +00:00
Andrew Lenharth
61312ca088 hum, it is good to use real instructions 
llvm-svn: 20769
 2005-03-22 16:42:52 +00:00
Andrew Lenharth
5bd65ee784 two things: 1)evilness reduction patch, reduces the number of instructions hiding in the small jump CC moving code. 2)implement div of small data types by FP DIV (also reduces evilness and should speed things up) 
llvm-svn: 20756
 2005-03-22 00:24:07 +00:00
Misha Brukman
04d6d0666d We may be adding functions to the Module during initialization, so 
conservatively, it's modified

llvm-svn: 20735
 2005-03-21 19:22:14 +00:00
Tanya Lattner
156e5a6897 Make this method non-const. Making it const causes the const version of 
getIGroup to be called instead of the non-const one.  These two methods
have (??) different behavior, so this change fixes bugs.

llvm-svn: 20724
 2005-03-21 06:07:43 +00:00
Chris Lattner
f53c9e2578 Fix the 3 regressions last night, due to my buggy patch from yesterday. 
llvm-svn: 20689
 2005-03-19 17:35:11 +00:00
Alkis Evlogimenos
d8f23f17f0 Stop using deprecated interface. 
llvm-svn: 20679
 2005-03-19 09:22:17 +00:00
Chris Lattner
35084f46a3 remove use of getPrev() and getNext() on ilist nodes. 
llvm-svn: 20673
 2005-03-18 16:12:37 +00:00
Duraid Madina
ad26d89f4a typo/denial 
llvm-svn: 20663
 2005-03-17 20:23:27 +00:00
Duraid Madina
341917d75b clean up warnings when building in release mode 
llvm-svn: 20658
 2005-03-17 19:00:40 +00:00
Duraid Madina
0b84eec44b OK, IA64 is statically linked into llc 
llvm-svn: 20655
 2005-03-17 18:37:05 +00:00
Duraid Madina
08bd58412a build the IA64 target as a .so for now 
llvm-svn: 20654
 2005-03-17 18:29:04 +00:00
Duraid Madina
79022e1b87 and so it begins... 
PHASE 1: write instruction selector
PHASE 2: ???
PHASE 3: profit!

llvm-svn: 20652
 2005-03-17 18:17:03 +00:00
Chris Lattner
79ba9d58fd Don't emit two comparisons when comparing a FP value against zero! 
llvm-svn: 20651
 2005-03-17 16:29:26 +00:00
Chris Lattner
c9a3ea81bf Fix the missing symbols problem Bill was hitting. Patch contributed by 
Bill Wendling!!

llvm-svn: 20649
 2005-03-17 15:38:16 +00:00
Andrew Lenharth
fbcfef1558 sure, I can set a flag, but if I never check it, why bother setting it? Should fix 20 programs :) 
llvm-svn: 20623
 2005-03-15 19:51:19 +00:00
Chris Lattner
7a9186cb47 stop using arg_front 
llvm-svn: 20599
 2005-03-15 05:03:36 +00:00
Chris Lattner
33f53a1f4f stop using arg_back 
llvm-svn: 20598
 2005-03-15 04:59:17 +00:00
Chris Lattner
4b688a1c70 This mega patch converts us from using Function::a{iterator|begin|end} to 
using Function::arg_{iterator|begin|end}.  Likewise Module::g* -> Module::global_*.

This patch is contributed by Gabor Greif, thanks!

llvm-svn: 20597
 2005-03-15 04:54:21 +00:00
Andrew Lenharth
e367587fbb FP 0.0 setcc optimization, and generate short branch sequence for setcc(FP) rather than stack usage 
llvm-svn: 20589
 2005-03-14 19:23:45 +00:00
Chris Lattner
112de16cf5 add a StructLayout::getElementContainingOffset method. 
llvm-svn: 20579
 2005-03-13 19:04:41 +00:00
Andrew Lenharth
abe4fd6c68 Should fix mesa 
llvm-svn: 20577
 2005-03-13 00:43:20 +00:00
Andrew Lenharth
d289be2b54 remove a pseudo instruction and improve inline constant generation 
llvm-svn: 20563
 2005-03-11 17:48:05 +00:00
Andrew Lenharth
1060a5028d some typoes and .bss isn't liked, at all 
llvm-svn: 20542
 2005-03-10 19:02:02 +00:00
Andrew Lenharth
65ef5bced7 minor correction for Register that isn't used 
llvm-svn: 20535
 2005-03-09 20:48:23 +00:00
Chris Lattner
496d623600 Fix a crash handling 'undef bool', fixing an llc crash on 186.crafty 
llvm-svn: 20523
 2005-03-08 22:53:09 +00:00
Reid Spencer
b0ca4aa8cd Patch to make assembly output compatible with mingw compilation (identical 
to cygwin)

llvm-svn: 20520
 2005-03-08 17:02:05 +00:00
Chris Lattner
667186f10f Make sure to remove all dead type names from the symbol table, not just 
struct types.  This fixes Regression/CodeGen/CBackend/2005-03-08-RecursiveTypeCrash.ll,
a crash on Java output that Alkis reported.

llvm-svn: 20519
 2005-03-08 16:19:59 +00:00
Misha Brukman
e29de97ab7 Single characters should be printed out as chars, not strings. 
llvm-svn: 20515
 2005-03-08 00:26:08 +00:00
Chris Lattner
a518cf568a simplify some code. 
llvm-svn: 20471
 2005-03-06 02:28:23 +00:00
Chris Lattner
f70d80d026 don't break the build on 32-bit hosts. 
llvm-svn: 20455
 2005-03-05 17:47:38 +00:00
Andrew Lenharth
ee4072f980 fix data size stuff for architectures with bit challenged data types 
llvm-svn: 20453
 2005-03-05 15:30:33 +00:00
Andrew Lenharth
ad4380f06e fix up stack pointer adjustments 
llvm-svn: 20442
 2005-03-04 21:40:02 +00:00
Andrew Lenharth
458e6bcf28 fix FCMOVxx typo, set rem and div to hardcode target reg to be the same as the one the assembler uese, update ISel to put values in regs used by assembler for rem and div 
llvm-svn: 20434
 2005-03-04 20:09:23 +00:00
Andrew Lenharth
e831777542 turn on IEEE for compares 
llvm-svn: 20425
 2005-03-03 22:12:11 +00:00
Andrew Lenharth
e6dbf989b3 beter Select on FP 
llvm-svn: 20424
 2005-03-03 21:47:53 +00:00
Chris Lattner
4439f1686f Print -X like this: 
double test(double l1_X) {
  return (-l1_X);
}

instead of like this:

double test(double l1_X) {
  return (-0x0p+0 - l1_X);
}

llvm-svn: 20423
 2005-03-03 21:12:04 +00:00
Andrew Lenharth
b5ddbc074d LSR cleanup patch 
llvm-svn: 20422
 2005-03-03 19:03:21 +00:00
Chris Lattner
8074739aa2 Do not lower malloc's to pass "sizeof" expressions like this: 
ltmp_0_7 = malloc(((unsigned )(&(((signed char (*)[784])/*NULL*/0)[1u]))));

Instead, just emit the literal constant, like this:

  ltmp_0_7 = malloc(784u);

This works around a bug in ICC 8.1 compiling the CBE generated code.  :-(

llvm-svn: 20415
 2005-03-03 01:04:50 +00:00
Chris Lattner
b205d87afe cleanup the cfg after lsr 
llvm-svn: 20410
 2005-03-02 21:56:00 +00:00
Andrew Lenharth
1e213c7924 remove 32 sign extend after 32 sextload and handle small negative constant 
llvm-svn: 20408
 2005-03-02 17:23:03 +00:00
Andrew Lenharth
8fc5ba2e06 Added LSR as a beta pass for alpha 
llvm-svn: 20407
 2005-03-02 17:21:38 +00:00
Chris Lattner
798b18474c Add a temporary option for llc-beta: -enable-lsr-for-ppc, which turns on 
Loop Strength Reduction.

llvm-svn: 20399
 2005-03-02 06:19:22 +00:00
Chris Lattner
9d57998cda Remove tabs from file. 
llvm-svn: 20380
 2005-02-28 19:36:15 +00:00
Chris Lattner
b2720f5b57 Add support to the C backend for llvm.prefetch. Patch contributed by 
Justin Wick!

llvm-svn: 20378
 2005-02-28 19:29:46 +00:00
Andrew Lenharth
7dc9ea9509 fix integer division and stuff 
llvm-svn: 20372
 2005-02-28 17:22:18 +00:00
Chris Lattner
a024984017 Fix spelling, patch contributed by Gabor Greif! 
llvm-svn: 20343
 2005-02-27 06:18:25 +00:00
Andrew Lenharth
b5331ffe0f make BB labels be exported for debuging, add fp negation optimization, further pecimise the FP instructions 
llvm-svn: 20332
 2005-02-25 22:55:15 +00:00
Andrew Lenharth
ef5f87784b fix Allocas. Really. I mean it this time. 
llvm-svn: 20306
 2005-02-24 18:36:32 +00:00
Tanya Lattner
b640bb0d88 Only print out machine instructions before modulo scheduling if we are actually doing modulo scheduling! :) 
llvm-svn: 20292
 2005-02-24 02:14:44 +00:00
Andrew Lenharth
69a8320c0d Ah the problems you have to fix when you stray from the One True Way (TM) 
llvm-svn: 20290
 2005-02-23 17:33:42 +00:00
Chris Lattner
9838ab1271 Silence some uninit variable warnings. 
llvm-svn: 20284
 2005-02-23 05:57:21 +00:00
Tanya Lattner
a981a711aa Fixed bug in findAllcircuits. Fixed branch addition to schedule. Added debug information. 
llvm-svn: 20280
 2005-02-23 02:01:42 +00:00
Andrew Lenharth
889efe4fb3 oops 
llvm-svn: 20278
 2005-02-22 23:29:25 +00:00
Andrew Lenharth
d870103306 dynamic stack allocas 
llvm-svn: 20273
 2005-02-22 21:59:48 +00:00
Andrew Lenharth
8ead0f13d3 no longer build as a shared library 
llvm-svn: 20264
 2005-02-22 04:58:26 +00:00
Misha Brukman
ea2c511191 Fix compilation errors with VS 2005, patch contributed by Aaron Gray. 
llvm-svn: 20232
 2005-02-17 21:40:27 +00:00
Tanya Lattner
a35f2f428e Fixed node deletion bug. 
llvm-svn: 20207
 2005-02-16 04:00:59 +00:00
Chris Lattner
5174b9cb60 Fix a problem where the PPC backend lost track of the fact that it had 
to save and restore the LR register on entry and exit of a leaf function
that needed to access globals or the constant pool.  This should hopefully
fix oscar from sending the PPC tester spinning out of control.

llvm-svn: 20197
 2005-02-15 20:26:49 +00:00
Chris Lattner
bf72146607 Fix volatile load/store of pointers. Consider this testcase: 
void %test(int** %P) {
  %A = volatile load int** %P
  ret void
}

void %test2(int*** %Q) {
  %P = load int*** %Q
  volatile store int** %P, int*** %Q
  ret void
}

instead of emitting:

void test(int **l1_P) {
  int *l2_A;

  l2_A = (int **((volatile int **)l1_P));
  return;
}
void test2(int ***l2_Q) {
  int **l1_P;

  l1_P = *l2_Q;
  *((volatile int ***)l2_Q) = l1_P;
  return;
}

... which is loading/storing volatile pointers, not through volatile pointers,
emit this (which is right):

void test(int **l1_P) {
  int *l3_A;

  l3_A = *((int * volatile*)l1_P);
  return;
}
void test2(int ***l2_Q) {
  int **l1_P;

  l1_P = *l2_Q;
  *((int ** volatile*)l2_Q) = l1_P;
  return;
}

llvm-svn: 20191
 2005-02-15 05:52:14 +00:00
Misha Brukman
7b6a863954 Write out single characters as chars, not strings. 
llvm-svn: 20179
 2005-02-14 18:52:35 +00:00
Chris Lattner
ef836a918e Implement CodeGen/CBackend/2005-02-14-VolatileOperations.ll 
Volatile loads and stores need to emit volatile pointer operations in C.

llvm-svn: 20177
 2005-02-14 16:47:52 +00:00
Andrew Lenharth
f023ce8d97 fix setcc on floats, fixes singlesource:pi, perhaps others 
llvm-svn: 20172
 2005-02-14 05:41:43 +00:00
Andrew Lenharth
e398f7797e try to do better match for i32 adds 
llvm-svn: 20143
 2005-02-12 21:11:17 +00:00
Andrew Lenharth
089b56ae58 make FP conversion more conservative (matches gcc) 
llvm-svn: 20142
 2005-02-12 21:10:58 +00:00
Andrew Lenharth
b9c44170a5 oops, I was sure this had already gond though the nightly tester 
llvm-svn: 20141
 2005-02-12 20:42:09 +00:00
Andrew Lenharth
a12e5330bf added sign extend for boolean 
llvm-svn: 20137
 2005-02-12 19:35:12 +00:00
Andrew Lenharth
076faf95a8 fix a bunch of regressions due to call behavior 
llvm-svn: 20110
 2005-02-10 20:10:38 +00:00
Tanya Lattner
04a78e13df Added new circuit finding alogrithm. 
Fixed bug in graph so that phi ite diff edges are added.

llvm-svn: 20108
 2005-02-10 17:02:58 +00:00
Tanya Lattner
cd54968a72 Allow modsched and local scheduling to both be run. 
llvm-svn: 20107
 2005-02-10 17:02:06 +00:00
Andrew Lenharth
56c441caf2 so, if you beat on it, you too can talk emacs into having a sane indenting policy... Also, optimize many function calls with pc-relative calls (partial prologue skipping for that case coming soon), try to fix the random jumps to strange places problem by pesimizing div et. al. register usage and fixing up GP before using, some calling convention tweaks, and make frame pointer unallocatable (not strickly necessary, but let's go for correctness first) 
llvm-svn: 20106
 2005-02-10 06:25:22 +00:00
Andrew Lenharth
6c28128e3e fix fp branch 
llvm-svn: 20105
 2005-02-10 05:17:38 +00:00
Misha Brukman
4bd124492b * Fix spelling of `volatile' 
* Align comments with tablegen elements

llvm-svn: 20103
 2005-02-10 01:52:22 +00:00
Andrew Lenharth
d42ae810cb BranchCC, nifty 
llvm-svn: 20067
 2005-02-08 00:40:03 +00:00
Andrew Lenharth
71fce71669 fix store issue and an FP conversion (segfault) issue 
llvm-svn: 20066
 2005-02-07 23:02:23 +00:00
Andrew Lenharth
cf4f405e55 copytoreg fix 
llvm-svn: 20063
 2005-02-07 06:31:44 +00:00
Andrew Lenharth
d20853f420 copyfromreg fix 
llvm-svn: 20062
 2005-02-07 06:21:37 +00:00
Andrew Lenharth
80cf648100 fix load bug 
llvm-svn: 20061
 2005-02-07 05:55:55 +00:00
Andrew Lenharth
9f5502e40f more FP load store fixes and Load store simplifications 
llvm-svn: 20060
 2005-02-07 05:33:15 +00:00
Andrew Lenharth
bc6ddca09c clean up load and stores alot 
llvm-svn: 20059
 2005-02-07 05:18:02 +00:00
Andrew Lenharth
4416315969 teach all loads and stores about the stack 
llvm-svn: 20058
 2005-02-07 05:07:00 +00:00
Andrew Lenharth
1b8bf311d2 prefer FP scratch registers and more check in LowerArguments 
llvm-svn: 20057
 2005-02-06 21:07:31 +00:00
Andrew Lenharth
23ca0026fa fix oopso 
llvm-svn: 20056
 2005-02-06 16:22:15 +00:00
Andrew Lenharth
baa723abc0 smarter loads and stores. can now handle base+offset. 
llvm-svn: 20055
 2005-02-06 15:40:40 +00:00
Andrew Lenharth
9a2bc47fba fix build 
llvm-svn: 20053
 2005-02-05 19:46:51 +00:00
Andrew Lenharth
6bd554a11e clean up 
llvm-svn: 20051
 2005-02-05 17:41:39 +00:00
Andrew Lenharth
9fd7ce4bca fix f32 setcc, and fp select 
llvm-svn: 20050
 2005-02-05 16:41:03 +00:00
Andrew Lenharth
5447bb6596 added ugly support for fp compares 
llvm-svn: 20049
 2005-02-05 13:19:12 +00:00
Misha Brukman
75da90f127 Make the rest of file header comments consistent in format and style 
llvm-svn: 20048
 2005-02-05 02:24:26 +00:00
Misha Brukman
74be40e1d2 Make file header comment consistent: extend the whole 80 cols to fill the line 
llvm-svn: 20039
 2005-02-04 20:25:52 +00:00
Andrew Lenharth
e081ab1c69 alignment 
llvm-svn: 20028
 2005-02-04 14:09:38 +00:00
Andrew Lenharth
68f8792889 get alignment printing correctly and get rid of __main hack 
llvm-svn: 20027
 2005-02-04 14:01:21 +00:00
Andrew Lenharth
fa74ac60e6 FP fixes 
llvm-svn: 20019
 2005-02-03 21:01:15 +00:00
Andrew Lenharth
d5de7adf26 Store fix 
llvm-svn: 20004
 2005-02-02 17:32:39 +00:00
Andrew Lenharth
fef75b04f1 oops 
llvm-svn: 20003
 2005-02-02 17:01:31 +00:00
Andrew Lenharth
b4bf49a4ae prevent register allocator from using the stack pointer :) 
llvm-svn: 20002
 2005-02-02 17:00:21 +00:00
Andrew Lenharth
c3e3bd1c22 fix loading of floats 
llvm-svn: 19997
 2005-02-02 15:05:33 +00:00
Andrew Lenharth
2482a0ef99 marked mem* as not supported 
llvm-svn: 19992
 2005-02-02 05:49:42 +00:00
Andrew Lenharth
a856b4db61 fix Load bug 
llvm-svn: 19987
 2005-02-02 04:35:44 +00:00
Andrew Lenharth
35ae745650 try to make a bug bugpointable, add yet more constant pool stuff, fixup constant loads for FP 
llvm-svn: 19985
 2005-02-02 03:36:35 +00:00
Andrew Lenharth
5a2bb3de8b better constant handling, should fix many remaining cases 
llvm-svn: 19984
 2005-02-02 00:51:15 +00:00
Andrew Lenharth
172fc4b1fd fix FP arg passing bug, Add unsigned to/from int, fix SELECT, fix Constant pool 
llvm-svn: 19976
 2005-02-01 20:40:27 +00:00
Andrew Lenharth
9086064b72 Print the Constant pool 
llvm-svn: 19975
 2005-02-01 20:38:53 +00:00
Andrew Lenharth
540700124d Make cmov work right and loads for fp from constant pool 
llvm-svn: 19974
 2005-02-01 20:36:44 +00:00
Andrew Lenharth
bf88e70920 Correct stack stuff for FP 
llvm-svn: 19973
 2005-02-01 20:35:57 +00:00
Andrew Lenharth
810fa6d4f1 try to match alpha pattern 
llvm-svn: 19972
 2005-02-01 20:35:11 +00:00
Andrew Lenharth
b8e15cfe9c fix register names 
llvm-svn: 19971
 2005-02-01 20:34:29 +00:00
Andrew Lenharth
fa52a84802 pecimise loads, put indirect call addr in right register. still doesn't fix methcall 
llvm-svn: 19963
 2005-02-01 01:37:24 +00:00
Misha Brukman
1e8e58b829 Fix hyphenation in output comment 
llvm-svn: 19954
 2005-01-31 06:19:57 +00:00
Andrew Lenharth
648e85bb8a indirect call fix 
llvm-svn: 19945
 2005-01-31 03:19:31 +00:00
Andrew Lenharth
401bb5807b fp to int and back conversion sequences 
llvm-svn: 19944
 2005-01-31 01:44:26 +00:00
Andrew Lenharth
43c294ffc3 added fp extend and removed a forgotten assert in more than 6 arg support (should break somewhere else now :) ) and fix an incorrect asm sequence for indirect calls 
llvm-svn: 19938
 2005-01-30 20:42:36 +00:00
Chris Lattner
c952d46d13 This code is really unreachable. 
llvm-svn: 19934
 2005-01-30 16:33:46 +00:00
Chris Lattner
d27e3639ba Fix warnings. 
llvm-svn: 19933
 2005-01-30 16:32:48 +00:00
Andrew Lenharth
60966b9bf0 support for larger calls 
llvm-svn: 19932
 2005-01-30 00:35:27 +00:00
Chris Lattner
fc8d0e9460 Unbreak the build :( 
llvm-svn: 19926
 2005-01-29 19:27:28 +00:00
Andrew Lenharth
f426f1c0c9 first step towards a correct and complete stack. also add some forms for things that were getting stuck in the nightly tester. 
llvm-svn: 19914
 2005-01-29 15:42:07 +00:00
Chris Lattner
774d64469c Finegrainify namespacification. 
Adjust TmpInstruction to work with the new User model.

llvm-svn: 19896
 2005-01-29 00:36:59 +00:00
Chris Lattner
0b2dec0f59 add namespace qualifier 
llvm-svn: 19895
 2005-01-29 00:36:38 +00:00
Andrew Lenharth
8a3a14d343 fix ExprMap, partially teach about add long 
llvm-svn: 19882
 2005-01-28 23:17:54 +00:00
Andrew Lenharth
9db35b0763 fix ExprMap and constant check in setcc 
llvm-svn: 19870
 2005-01-28 14:06:46 +00:00
Andrew Lenharth
4cfda09ee9 move FP into it's own select 
llvm-svn: 19867
 2005-01-28 06:57:18 +00:00
Andrew Lenharth
c0cd77a1a0 stack frame fix and zero FP reg fix 
llvm-svn: 19857
 2005-01-27 08:31:19 +00:00
Andrew Lenharth
55eadc4772 Floating point instructions like Floating point registers 
llvm-svn: 19856
 2005-01-27 07:58:15 +00:00
Andrew Lenharth
67328d7fac int to float conversion and another setcc 
llvm-svn: 19855
 2005-01-27 07:50:35 +00:00
Andrew Lenharth
4283bf1216 teach isel about comparison with constants and zero extending bits 
llvm-svn: 19853
 2005-01-27 03:49:45 +00:00
Andrew Lenharth
b539dd2c83 perhaps this will let me have calls again 
llvm-svn: 19851
 2005-01-27 01:22:48 +00:00
Andrew Lenharth
227bc0e21a minor bug fix 
llvm-svn: 19850
 2005-01-27 00:52:26 +00:00
Andrew Lenharth
ae8ce1856a minor bug fix 
llvm-svn: 19849
 2005-01-27 00:51:05 +00:00
Andrew Lenharth
11fc660a34 added instructions for fp to int to fp moves 
llvm-svn: 19848
 2005-01-26 23:56:48 +00:00
Andrew Lenharth
1f0b710fb6 initial fp support 
llvm-svn: 19847
 2005-01-26 21:54:09 +00:00
Andrew Lenharth
f9f01c190b hum, writing on one machine, testing on another... 
llvm-svn: 19844
 2005-01-26 02:53:56 +00:00
Andrew Lenharth
53ad9ac1db add some operations, fix others. should compile several more tests now 
llvm-svn: 19843
 2005-01-26 01:24:38 +00:00
Chris Lattner
ab92b92bc5 We can fold promoted and non-promoted loads into divs also! 
llvm-svn: 19835
 2005-01-25 20:35:10 +00:00
Chris Lattner
a9a0369879 Fold promoted loads into binary ops for FP, allowing us to generate m32 forms 
of FP ops.

llvm-svn: 19834
 2005-01-25 20:03:11 +00:00
Andrew Lenharth
4e10c17eeb problems with bools, and their work arounds 
llvm-svn: 19833
 2005-01-25 19:58:40 +00:00
Andrew Lenharth
3ae267eb3b more load choices, better add with imm 
llvm-svn: 19821
 2005-01-25 00:35:34 +00:00
Andrew Lenharth
3b44cfa26d Clean ups, and taught the instruction selector about immediate forms 
llvm-svn: 19816
 2005-01-24 19:44:07 +00:00
Andrew Lenharth
3c6e50e63b Alpha JIT prune 
llvm-svn: 19815
 2005-01-24 18:48:22 +00:00
Andrew Lenharth
ae874f0d85 include prune and JIT prune 
llvm-svn: 19814
 2005-01-24 18:45:41 +00:00
Andrew Lenharth
e3991f8256 Pruned includes 
llvm-svn: 19813
 2005-01-24 18:37:48 +00:00
Chris Lattner
88a4c43e67 Fix a spurious warning. 
llvm-svn: 19799
 2005-01-24 01:40:18 +00:00
Chris Lattner
6ff85c3152 Silence a warning. 
llvm-svn: 19798
 2005-01-23 23:20:06 +00:00
Chris Lattner
94952e0947 Allow the FP stackifier to completely ignore functions that do not use FP at 
all.  This should speed up the X86 backend fairly significantly on integer
codes.  Now if only we didn't have to compute livevar still... ;-)

llvm-svn: 19796
 2005-01-23 23:13:59 +00:00
Chris Lattner
680bc75f7f Build Alpha by default. 
llvm-svn: 19777
 2005-01-23 04:34:46 +00:00
Reid Spencer
e48557f583 Fix alloca support for Cygwin. On cygwin its __alloca not __builtin_alloca 
llvm-svn: 19776
 2005-01-23 04:32:47 +00:00
Reid Spencer
5c7b6e83f0 Support Cygwin assembly generation. The cygwin version of Gnu ASsembler 
doesn't support certain directives and symbols on cygwin are prefixed with
an underscore. This patch makes the necessary adjustments to the output.

llvm-svn: 19775
 2005-01-23 03:52:14 +00:00
Andrew Lenharth
f5b9a8fe57 Let me introduce you to the early stages of the llvm backend for the alpha processor 
llvm-svn: 19764
 2005-01-22 23:41:55 +00:00
Chris Lattner
b4cf4ffb04 Speed up folding operations into loads. 
llvm-svn: 19733
 2005-01-21 21:43:02 +00:00
Chris Lattner
fd4d7f71ae The ever-important vanity pass name :) 
llvm-svn: 19731
 2005-01-21 21:35:14 +00:00
Chris Lattner
5f2fbeaa69 Fix a FIXME: realize that argument stores are all independent (don't alias) 
llvm-svn: 19728
 2005-01-21 19:46:38 +00:00
Chris Lattner
febeb380ae Implement ADD_PARTS/SUB_PARTS so that 64-bit integer add/sub work. This 
fixes most of the remaining llc-beta failures.

llvm-svn: 19716
 2005-01-20 18:53:00 +00:00
Chris Lattner
8b0a2a3251 Fix a crash compiling 134.perl. 
llvm-svn: 19711
 2005-01-20 16:50:16 +00:00
Chris Lattner
6534e1ede3 Fix a problem where were were literally selecting for INCREASED register 
pressure, not decreases register pressure.  Fix problem where we accidentally
swapped the operands of SHLD, which caused fourinarow to fail.  This fixes
fourinarow.

llvm-svn: 19697
 2005-01-19 17:24:34 +00:00
Chris Lattner
b75589131d When commuting these instructions, make sure to actually swap the operands too. 
llvm-svn: 19694
 2005-01-19 16:55:52 +00:00
Chris Lattner
fde1a5688b Implement Regression/CodeGen/X86/rotate.ll: emit rotate instructions (which 
typically cost 1 cycle) instead of shld/shrd instruction (which are typically
6 or more cycles).  This also saves code space.

For example, instead of emitting:

rotr:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %CL, BYTE PTR [%ESP + 8]
        shrd %EAX, %EAX, %CL
        ret
rotli:
        mov %EAX, DWORD PTR [%ESP + 4]
        shrd %EAX, %EAX, 27
        ret

Emit:

rotr32:
        mov %CL, BYTE PTR [%ESP + 8]
        mov %EAX, DWORD PTR [%ESP + 4]
        ror %EAX, %CL
        ret
rotli32:
        mov %EAX, DWORD PTR [%ESP + 4]
        ror %EAX, 27
        ret

We also emit byte rotate instructions which do not have a sh[lr]d counterpart
at all.

llvm-svn: 19692
 2005-01-19 08:07:05 +00:00
Chris Lattner
34757ff939 Add rotate instructions. 
llvm-svn: 19690
 2005-01-19 07:50:03 +00:00
Chris Lattner
e539ce8223 Match 16-bit shld/shrd instructions as well, implementing shift-double.llx:test5 
llvm-svn: 19689
 2005-01-19 07:37:26 +00:00
Chris Lattner
9d5ee289d7 Improve coverage of the X86 instruction set by adding 16-bit shift doubles. 
llvm-svn: 19687
 2005-01-19 07:31:24 +00:00
Chris Lattner
c03f360215 Teach the code generator that shrd/shld is commutable if it has an immediate. 
This allows us to generate this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        shld %EDX, %EDX, 2
        shl %EAX, 2
        ret

instead of this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EDX, %EAX
        shrd %EDX, %ECX, 30
        shl %EAX, 2
        ret

Note the magically transmogrifying immediate.

llvm-svn: 19686
 2005-01-19 07:11:01 +00:00
Chris Lattner
33efebcdc8 Finegrainify namespacification 
Add default impl of commuteInstruction
Add notes about ugly V9 code.

llvm-svn: 19684
 2005-01-19 06:53:34 +00:00
Chris Lattner
575e912fcf Codegen long >> 2 to this: 
foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        shrd %EAX, %EDX, 2
        sar %EDX, 2
        ret

instead of this:

test1:
        mov %ECX, DWORD PTR [%ESP + 4]
        shr %ECX, 2
        mov %EDX, DWORD PTR [%ESP + 8]
        mov %EAX, %EDX
        shl %EAX, 30
        or %EAX, %ECX
        sar %EDX, 2
        ret

and long << 2 to this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
***     mov %EDX, %EAX
        shrd %EDX, %ECX, 30
        shl %EAX, 2
        ret

instead of this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        shr %ECX, 30
        mov %EDX, DWORD PTR [%ESP + 8]
        shl %EDX, 2
        or %EDX, %ECX
        shl %EAX, 2
        ret

The extra copy (marked ***) can be eliminated when I teach the code generator
that shrd32rri8 is really commutative.

llvm-svn: 19681
 2005-01-19 06:18:43 +00:00
Chris Lattner
419a5d213b X86 shifts mask the amount. 
llvm-svn: 19678
 2005-01-19 03:36:30 +00:00
Chris Lattner
fbd1f8e4fd Add a hook to find out how the target handles shift amounts that are out of 
range.  Either they are undefined (the default), they mask the shift amount
to the size of the register (X86, Alpha, etc), or they extend the shift (PPC).

This defaults to undefined, which is conservatively correct.

llvm-svn: 19677
 2005-01-19 03:36:14 +00:00
Chris Lattner
6dec8cb829 Code to handle FP_EXTEND is dead now. X86 doesn't support any data types to 
FP_EXTEND from!

llvm-svn: 19674
 2005-01-18 20:05:56 +00:00
Chris Lattner
798e9c85d6 Remove more dead code. 
llvm-svn: 19673
 2005-01-18 19:50:08 +00:00
Chris Lattner
401814508f The selection dag code handles the promotions from F32 to F64 for us, so we 
don't need to even think about F32 in the X86 code anymore.

llvm-svn: 19672
 2005-01-18 19:46:54 +00:00
Chris Lattner
dc09e52b3e Fix 124.m88ksim. 
llvm-svn: 19667
 2005-01-18 17:35:28 +00:00
Chris Lattner
a04b1ee7a8 Do not emit loads multiple times, potentially in the wrong places. 
llvm-svn: 19661
 2005-01-18 04:18:32 +00:00
Tanya Lattner
d3459278f2 Minor changes. 
llvm-svn: 19660
 2005-01-18 04:15:41 +00:00
Chris Lattner
722ddeb86e Eliminate bad assertions. 
llvm-svn: 19659
 2005-01-18 04:00:54 +00:00
Chris Lattner
8f3a8d96e2 * Eliminate the TokenSet and just use the ExprMap for both tokens and values. 
* Insert some really pedantic assertions that will notice when we emit the
  same loads more than one time, exposing bugs.  This turns a miscompilation in
  bzip2 into a compile-fail.  yaay.

llvm-svn: 19658
 2005-01-18 03:51:59 +00:00
Chris Lattner
b3edb09ede Rely on the code in MatchAddress to do this work. Otherwise we fail to 
match (X+Y)+(Z << 1), because we match the X+Y first, consuming the index
register, then there is no place to put the Z.

llvm-svn: 19652
 2005-01-18 02:25:52 +00:00
Chris Lattner
ce2e0125dc Fix a problem where probing for addressing modes caused expressions to be 
emitted too early.  In particular, this fixes
Regression/CodeGen/X86/regpressure.ll:regpressure3.

This also improves the 2nd basic block in 164.gzip:flush_block, which went from

.LBBflush_block_1:      # loopentry.1.i
        movzx %EAX, WORD PTR [dyn_ltree + 20]
        movzx %ECX, WORD PTR [dyn_ltree + 16]
        mov DWORD PTR [%ESP + 32], %ECX
        movzx %ECX, WORD PTR [dyn_ltree + 12]
        movzx %EDX, WORD PTR [dyn_ltree + 8]
        movzx %EBX, WORD PTR [dyn_ltree + 4]
        mov DWORD PTR [%ESP + 36], %EBX
        movzx %EBX, WORD PTR [dyn_ltree]
        add DWORD PTR [%ESP + 36], %EBX
        add %EDX, DWORD PTR [%ESP + 36]
        add %ECX, %EDX
        add DWORD PTR [%ESP + 32], %ECX
        add %EAX, DWORD PTR [%ESP + 32]
        movzx %ECX, WORD PTR [dyn_ltree + 24]
        add %EAX, %ECX
        mov %ECX, 0
        mov %EDX, %ECX

to

.LBBflush_block_1:      # loopentry.1.i
        movzx %EAX, WORD PTR [dyn_ltree]
        movzx %ECX, WORD PTR [dyn_ltree + 4]
        add %ECX, %EAX
        movzx %EAX, WORD PTR [dyn_ltree + 8]
        add %EAX, %ECX
        movzx %ECX, WORD PTR [dyn_ltree + 12]
        add %ECX, %EAX
        movzx %EAX, WORD PTR [dyn_ltree + 16]
        add %EAX, %ECX
        movzx %ECX, WORD PTR [dyn_ltree + 20]
        add %ECX, %EAX
        movzx %EAX, WORD PTR [dyn_ltree + 24]
        add %ECX, %EAX
        mov %EAX, 0
        mov %EDX, %EAX

... which results in less spilling in the function.

This change alone speeds up 164.gzip from 37.23s to 36.24s on apoc.  The
default isel takes 37.31s.

llvm-svn: 19650
 2005-01-18 01:06:26 +00:00
Chris Lattner
a78f9ced61 Fix indentation. 
llvm-svn: 19649
 2005-01-17 23:25:45 +00:00
Chris Lattner
dff1e3e86f Don't bother using max here. 
llvm-svn: 19647
 2005-01-17 23:02:13 +00:00
Chris Lattner
2d86b43318 Do not give token factor nodes outrageous weights 
llvm-svn: 19645
 2005-01-17 22:56:09 +00:00
Chris Lattner
f2878ce8ba Two changes: 
1. Fold  [mem] += (1|-1) into inc [mem]/dec [mem] to save some icache space.
 2. Do not let token factor nodes prevent forming '[mem] op= val' folds.

llvm-svn: 19643
 2005-01-17 22:10:42 +00:00
Chris Lattner
40c0fca632 Refactor load/op/store folding into it's own method, no functionality changes. 
llvm-svn: 19641
 2005-01-17 19:25:26 +00:00
Chris Lattner
2348abc421 Fix a major regression last night that prevented us from producing [mem] op= reg 
operations.

The body of the if is less indented but unmodified in this patch.

llvm-svn: 19638
 2005-01-17 17:49:14 +00:00
Chris Lattner
adb669ab1f Codegen this: 
int %foo(int %X) {
        %T = add int %X, 13
        %S = mul int %T, 3
        ret int %S
}

as this:

        mov %ECX, DWORD PTR [%ESP + 4]
        lea %EAX, DWORD PTR [%ECX + 2*%ECX + 39]
        ret

instead of this:

        mov %ECX, DWORD PTR [%ESP + 4]
        mov %EAX, %ECX
        add %EAX, 13
        imul %EAX, %EAX, 3
        ret

llvm-svn: 19633
 2005-01-17 06:48:02 +00:00
Tanya Lattner
5a10531cf8 Added tmp instructions to preserve ssa. 
llvm-svn: 19632
 2005-01-17 06:47:26 +00:00
Chris Lattner
51590b615c Fix test/Regression/CodeGen/X86/2005-01-17-CycleInDAG.ll and 132.ijpeg. 
Do not fold a load into an operation if it will induce a cycle in the DAG.

Repeat after me: dAg.

llvm-svn: 19631
 2005-01-17 06:26:58 +00:00
Chris Lattner
f1e85bec5a Do not fold a load into a comparison that is used by more than one place. 
The comparison will probably be folded, so this is not ok to do.
This fixed 197.parser.

llvm-svn: 19624
 2005-01-17 01:34:14 +00:00
Chris Lattner
1b8c8fe020 Do not codegen 'xor bool, true' as 'not reg'. not reg inverts the upper bits 
of the bytereg.  This fixes yacr2, 300.twolf and probably others.

llvm-svn: 19622
 2005-01-17 00:23:16 +00:00
Chris Lattner
46dac4394c Set up the shift and setcc types. 
If we emit a load because we followed a token chain to get to it, try to
fold it into its single user if possible.

llvm-svn: 19620
 2005-01-17 00:00:33 +00:00
Chris Lattner
4c88cc95ee Shift and setcc types default to the pointer type. 
llvm-svn: 19619
 2005-01-16 23:59:48 +00:00
Tanya Lattner
fea188af7e Added paramters to a few functions in order to allow me to change the functions to preserve SSA 
llvm-svn: 19615
 2005-01-16 08:51:10 +00:00
Chris Lattner
9ffc59287e * Adjust to changes in TargetLowering interfaces. 
* Remove custom promotion for bool and byte select ops.  Legalize now
  promotes them for us.
* Allow folding ConstantPoolIndexes into EXTLOAD's, useful for float immediates.
* Declare which operations are not supported better.
* Add some hacky code for TRUNCSTORE to pretend that we have truncstore
  for i16 types.  This is useful for testing promotion code because I can
  just remove 16-bit registers all together and verify that programs work.

llvm-svn: 19614
 2005-01-16 07:34:08 +00:00
Chris Lattner
b49d2a7b0f Use enums, move virtual dtor out of line. 
llvm-svn: 19610
 2005-01-16 07:28:11 +00:00
Chris Lattner
be2a427f51 cycles_t -> CycleCount_t 
llvm-svn: 19604
 2005-01-16 04:20:30 +00:00
Reid Spencer
afa1cb9e11 Rename BUILD_* to PROJ_* 
llvm-svn: 19592
 2005-01-16 02:21:29 +00:00
Tanya Lattner
66cf1a6f82 Fixed a couple of instructions that broke SSA. 
llvm-svn: 19587
 2005-01-16 02:14:17 +00:00
Chris Lattner
605b9a23a2 Improve compatiblity with HPUX on Itanium, patch by Duraid Madina 
llvm-svn: 19586
 2005-01-16 01:31:31 +00:00
Chris Lattner
06c297f8ca Set up identity transforms. 
llvm-svn: 19584
 2005-01-16 01:20:18 +00:00
Chris Lattner
1d0e1ffe02 Move some information out of LegalizeDAG into the generic Target interface. 
llvm-svn: 19581
 2005-01-16 01:10:58 +00:00
Chris Lattner
98611ce291 Add a new target-independent code generator flag. 
llvm-svn: 19567
 2005-01-15 06:00:32 +00:00
Chris Lattner
f3d950e816 Add support for truncstore and *extload. 
llvm-svn: 19566
 2005-01-15 05:22:24 +00:00
Chris Lattner
27c91fac94 Adjust to CopyFromREg changes. 
llvm-svn: 19561
 2005-01-14 22:37:41 +00:00
Chris Lattner
c032990335 Fix Regression/CodeGen/PowerPC/2005-01-14-UndefLong.ll 
llvm-svn: 19557
 2005-01-14 20:22:02 +00:00
Chris Lattner
b0b49268c4 Fix: Regression/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll 
llvm-svn: 19555
 2005-01-14 19:31:00 +00:00
Chris Lattner
7a8788c9ac Add new ImplicitDef node, rename CopyRegSDNode class to RegSDNode. 
llvm-svn: 19535
 2005-01-13 20:50:02 +00:00
Chris Lattner
fce6a5439d Codegen factor nodes more intelligently according to perceived register pressure. 
llvm-svn: 19532
 2005-01-13 19:56:00 +00:00
Chris Lattner
cb4359465a Initial trivial (but stupid) codegen for this node. 
llvm-svn: 19529
 2005-01-13 18:01:36 +00:00
Chris Lattner
9a70166615 Add some really pedantic assertions to the load folding code. Fix a bunch 
of cases where we accidentally emitted a load folded once and unfolded
elsewhere.

llvm-svn: 19522
 2005-01-13 05:53:16 +00:00
Chris Lattner
2ab70aafe0 We can only fold a load into an op if there is exactly one use of the value. 
Checking to see if the load has two uses is not equivalent, as the chain
value may have zero uses.

llvm-svn: 19518
 2005-01-12 18:38:26 +00:00
Chris Lattner
4b03f0f99e Try both ways to fold an add together. This allows us to generate this code 
imul %EAX, %EAX, 400
        add %ECX, %EAX
        add %ESI, DWORD PTR [%ECX + 4*%EDX]
        inc %EDX
        cmp %EDX, 100

instead of this:

        imul %EAX, %EAX, 400
        add %ECX, %EAX
        mov %EAX, %EDX
        shl %EAX, 2
        add %ECX, %EAX
        add %ESI, DWORD PTR [%ECX]
        inc %EDX
        cmp %EDX, 100

llvm-svn: 19513
 2005-01-12 18:08:53 +00:00
Chris Lattner
61c572eb7f Fix a major miscompilation where we were overwriting the scale reg. 
llvm-svn: 19511
 2005-01-12 07:33:20 +00:00
Chris Lattner
5816f1a302 Do not use the type of the RHS constant to determine the type of the operation. 
This fails for shifts because the constant is always 8 bits.

llvm-svn: 19508
 2005-01-12 05:22:07 +00:00
Chris Lattner
89d6b21ae6 Do not lose the offset from teh global when peephole optimizing instructions. 
This fixes FreeBench/pcompress

llvm-svn: 19507
 2005-01-12 05:17:28 +00:00
Jeff Cohen
614a5ec22a Fix C++ more compilatiom errors 
llvm-svn: 19504
 2005-01-12 04:29:05 +00:00
Chris Lattner
5ef92f3a40 Fix a compile error with VC++, which things that static const arrays need 
to be dynamically initialized. :(

llvm-svn: 19503
 2005-01-12 04:23:22 +00:00
Chris Lattner
627c64e5e5 Fix a bug that caused us to crash on povray. We weren't emitting an FP_REG_KILL into a block that had a successor with a FP PHI node. 
llvm-svn: 19502
 2005-01-12 04:21:28 +00:00
Chris Lattner
a5f0ba59a0 Print a load of a null pointer (in intel mode) like this: 
mov %AX, WORD PTR [0]

instead of like this:

        mov %AX, WORD PTR []

llvm-svn: 19501
 2005-01-12 04:07:11 +00:00
Chris Lattner
360988bae2 Print a load of a null pointer like this: 
movw 0, %ax

instead of like this:

        movw , %ax

llvm-svn: 19500
 2005-01-12 04:05:19 +00:00
Chris Lattner
3c85c67c97 Fix a crash compiling povray on UINT_TO_FP from i16. 
llvm-svn: 19499
 2005-01-12 04:00:00 +00:00
Chris Lattner
4e72a2a000 There are no [mem] op= reg instructions for FP, so remove their entries. 
llvm-svn: 19496
 2005-01-12 03:16:09 +00:00
Chris Lattner
00cb0ace9b Fix a bug where we didn't insert FP_REG_KILL instructions into MBB's that 
contain FP PHI nodes but no other FP defining instructions.  This fixes
183.equake

llvm-svn: 19495
 2005-01-12 02:57:10 +00:00
Chris Lattner
92166ed1df Fold TRUNCATE (LOAD P) into a smaller load from P. 
llvm-svn: 19494
 2005-01-12 02:19:06 +00:00
Chris Lattner
258b23bd9d Be more careful about order of arg evalution for CopyToReg nodes. This shrinks 
256.bzip2 from 7142 to 7103 lines of .s file.

Second, add initial support for folding loads into compares, though this code
is dynamically dead for now. :(

llvm-svn: 19493
 2005-01-12 02:02:48 +00:00
Chris Lattner
604416e8f4 Fold some more [mem] op= val operators. This allows us to things like this 
several times in 256.bzip2:

        mov %EAX, DWORD PTR [%ESP + 204]
-       mov %EAX, DWORD PTR [%EAX]
-       or %EAX, 2097152
-       mov %ECX, DWORD PTR [%ESP + 204]
-       mov DWORD PTR [%ECX], %EAX
+       or DWORD PTR [%EAX], 2097152

llvm-svn: 19492
 2005-01-12 01:28:00 +00:00
Chris Lattner
e83ae1063f Fold loads into sign/zero extends. instead of: 
mov %AL, BYTE PTR [%EDX + l18_length_code]
  movzx %EAX, %AL

Emit:

  movzx %EAX, BYTE PTR [%EDX + l18_length_code]

llvm-svn: 19489
 2005-01-11 23:33:00 +00:00
Chris Lattner
87a38bd4a8 Comment out debug code :) 
Select [mem] += Val operations.  For constants, we used to get:

  mov %ECX, -32768
  add %ECX, DWORD PTR [l4_match_start]
  mov DWORD PTR [l4_match_start], %ECX

Now we get:

  add DWORD PTR [l4_match_start], -32768

For other values we used to get:

  mov %EBP, %EDI   ;; because the add destroys the value
  add %EBP, DWORD PTR [l4_input_len]
  mov DWORD PTR [l4_input_len], %EBP

now we get:

  add DWORD PTR [l4_input_len], %EDI

Both of these use less registers than the alternative, are faster and smaller.

llvm-svn: 19488
 2005-01-11 23:21:30 +00:00
Chris Lattner
282473a25d Handle the global address case here, not just the offset case. 
llvm-svn: 19487
 2005-01-11 22:58:43 +00:00
Chris Lattner
9eb2cc700b Treat int constants as not requiring a register, since they are almost always 
folded into an instruction.

llvm-svn: 19486
 2005-01-11 22:29:12 +00:00
Chris Lattner
7cb2220907 * Factor a bunch of binary operator cases into shared code. 
* Fold loads into Add, sub, and, or, xor and mul when possible.
* Codegen shl X, 1 as add X, X

llvm-svn: 19483
 2005-01-11 21:19:59 +00:00
Chris Lattner
b1a72cb39a Clear the whole array, always. 
llvm-svn: 19482
 2005-01-11 20:25:26 +00:00
Chris Lattner
b838c9748e Fold multiplies by 3,5,9 into addressing modes when possible. 
llvm-svn: 19480
 2005-01-11 19:37:02 +00:00
Chris Lattner
e7b1130b01 Instead of generating stuff like this: 
mov %ECX, %EAX
        add %ECX, 32768
        mov %SI, WORD PTR [2*%ECX + l13_prev]

Generate this:

        mov %SI, WORD PTR [2*%ECX + l13_prev + 65536]

This occurs when you have a GEP instruction where an index is
"something + imm".

llvm-svn: 19472
 2005-01-11 06:36:20 +00:00
Chris Lattner
bb63a09cd1 Implement MEMCPY natively in terms of rep movs* 
llvm-svn: 19468
 2005-01-11 06:19:26 +00:00
Chris Lattner
b2b08a8bc1 Implement memset -> rep stos* 
llvm-svn: 19467
 2005-01-11 06:14:36 +00:00
Chris Lattner
58816a9e81 Announce that we don't support mem ops yet. 
llvm-svn: 19466
 2005-01-11 05:57:36 +00:00
Chris Lattner
f867443d7e Teach the address selector to make 'reg+reg' addressing modes. 
llvm-svn: 19457
 2005-01-11 04:40:19 +00:00
Chris Lattner
edf06be50e Emit NOT instructions. 
llvm-svn: 19455
 2005-01-11 04:31:30 +00:00
Chris Lattner
4e4bef2d6c Fix a bug emitting branches that broke a lot of programs. 
llvm-svn: 19452
 2005-01-11 04:06:27 +00:00