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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00
llvm-mirror/test/CodeGen/PowerPC
Qiu Chaofan d6e49b7d70 [PowerPC] Pass nofpexcept flag to custom lowered constrained ops
This is a follow-up of D86605. For strict DAG FP node, if its FP
exception behavior metadata is ignore, it should have nofpexcept flag.
But during custom lowering, this flag isn't passed down.

This is also seen on X86 target.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D87390
2020-09-21 10:44:25 +08:00
..
GlobalISel [PPC][GlobalISel] Add initial GlobalIsel infrastructure 2020-09-10 11:58:01 -05:00
2004-11-29-ShrCrash.ll
2004-11-30-shift-crash.ll
2004-11-30-shr-var-crash.ll
2004-12-12-ZeroSizeCommon.ll
2005-01-14-SetSelectCrash.ll
2005-01-14-UndefLong.ll
2005-08-12-rlwimi-crash.ll
2005-09-02-LegalizeDuplicatesCalls.ll
2005-10-08-ArithmeticRotate.ll
2005-11-30-vastart-crash.ll
2006-01-11-darwin-fp-argument.ll
2006-01-20-ShiftPartsCrash.ll
2006-04-01-FloatDoubleExtend.ll
2006-04-05-splat-ish.ll
2006-04-19-vmaddfp-crash.ll
2006-05-12-rlwimi-crash.ll
2006-07-07-ComputeMaskedBits.ll
2006-07-19-stwbrx-crash.ll
2006-08-11-RetVector.ll
2006-08-15-SelectionCrash.ll
2006-09-28-shift_64.ll
2006-10-13-Miscompile.ll
2006-10-17-brcc-miscompile.ll
2006-10-17-ppc64-alloca.ll
2006-11-10-DAGCombineMiscompile.ll
2006-11-29-AltivecFPSplat.ll
2006-12-07-LargeAlloca.ll
2006-12-07-SelectCrash.ll
2007-01-04-ArgExtension.ll
2007-01-15-AsmDialect.ll
2007-01-29-lbrx-asm.ll
2007-01-31-InlineAsmAddrMode.ll
2007-02-16-AlignPacked.ll
2007-02-16-InlineAsmNConstraint.ll
2007-02-23-lr-saved-twice.ll
2007-03-24-cntlzd.ll
2007-03-30-SpillerCrash.ll
2007-04-24-InlineAsm-I-Modifier.ll
2007-04-30-InlineAsmEarlyClobber.ll
2007-05-03-InlineAsm-S-Constraint.ll
2007-05-14-InlineAsmSelectCrash.ll
2007-05-22-tailmerge-3.ll
2007-05-30-dagcombine-miscomp.ll
2007-06-28-BCCISelBug.ll
2007-08-04-CoalescerAssert.ll
2007-09-04-AltivecDST.ll
2007-09-07-LoadStoreIdxForms.ll
2007-09-08-unaligned.ll
2007-09-11-RegCoalescerAssert.ll
2007-09-12-LiveIntervalsAssert.ll
2007-10-16-InlineAsmFrameOffset.ll
2007-10-18-PtrArithmetic.ll
2007-10-21-LocalRegAllocAssert2.ll
2007-10-21-LocalRegAllocAssert.ll
2007-11-04-CoalescerCrash.ll
2007-11-16-landingpad-split.ll
2007-11-19-VectorSplitting.ll
2008-02-05-LiveIntervalsAssert.ll
2008-02-09-LocalRegAllocAssert.ll
2008-03-05-RegScavengerAssert.ll
2008-03-17-RegScavengerCrash.ll
2008-03-18-RegScavengerAssert.ll
2008-03-24-AddressRegImm.ll
2008-03-24-CoalescerBug.ll
2008-03-26-CoalescerBug.ll
2008-04-10-LiveIntervalCrash.ll
2008-04-16-CoalescerBug.ll
2008-04-23-CoalescerCrash.ll
2008-05-01-ppc_fp128.ll
2008-06-19-LegalizerCrash.ll
2008-06-21-F128LoadStore.ll
2008-06-23-LiveVariablesCrash.ll
2008-07-10-SplatMiscompile.ll
2008-07-15-Bswap.ll
2008-07-15-Fabs.ll
2008-07-15-SignExtendInreg.ll
2008-07-17-Fneg.ll
2008-07-24-PPC64-CCBug.ll
2008-09-12-CoalescerBug.ll
2008-10-17-AsmMatchingOperands.ll
2008-10-28-f128-i32.ll
2008-10-28-UnprocessedNode.ll
2008-12-02-LegalizeTypeAssert.ll
2009-01-16-DeclareISelBug.ll
2009-03-17-LSRBug.ll
2009-05-28-LegalizeBRCC.ll
2009-07-16-InlineAsm-M-Operand.ll
2009-08-17-inline-asm-addr-mode-breakage.ll
2009-09-18-carrybit.ll
2009-11-15-ProcImpDefsBug.ll
2009-11-25-ImpDefBug.ll
2010-02-04-EmptyGlobal.ll
2010-02-12-saveCR.ll
2010-03-09-indirect-call.ll
2010-04-01-MachineCSEBug.ll
2010-05-03-retaddr1.ll
2010-10-11-Fast-Varargs.ll
2010-12-18-PPCStackRefs.ll
2011-12-05-NoSpillDupCR.ll
2011-12-06-SpillAndRestoreCR.ll
2011-12-08-DemandedBitsMiscompile.ll
2012-09-16-TOC-entry-check.ll
2012-10-11-dynalloc.ll
2012-10-12-bitcast.ll
2012-11-16-mischedcall.ll
2013-05-15-preinc-fold.ll
2013-07-01-PHIElimBug.mir
2016-01-07-BranchWeightCrash.ll
2016-04-16-ADD8TLS.ll
2016-04-17-combine.ll
2016-04-28-setjmp.ll
2018-09-19-sextinreg-vector-crash.ll
a2-fp-basic.ll
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aantidep-inline-asm-use.ll
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add_cmp.ll
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addc.ll
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addi-licm.ll
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addrfuncstr.ll
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aggressive-anti-dep-breaker-subreg.ll Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
aix32-cc-abi-vaarg.ll
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aix-cc-abi.ll [SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore. 2020-09-14 13:54:50 -07:00
aix-cc-altivec.ll
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aix-internal.ll
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aix-lower-block-address.ll
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aix-lr.ll
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aix-overflow-toc.py Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
aix-print-pc.mir
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alias.ll
align.ll
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alloca-crspill.ll
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altivec-ord.ll
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and_sra.ll
and-branch.ll
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and-imm.ll
and-mask.ll
andc.ll
anon_aggr.ll Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
anyext_srl.ll
arr-fp-arg-no-copy.ll
ashr-neg1.ll
asm-constraints.ll
asm-dialect.ll
asm-printer-topological-order.ll
asm-Zy.ll
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atomic-1.ll
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Atomics-64.ll
atomics-constant.ll
atomics-fences.ll
atomics-indexed.ll [PowerPC] Set setMaxAtomicSizeInBitsSupported appropriately for 32-bit PowerPC in PPCTargetLowering 2020-09-08 21:21:14 -04:00
atomics-regression.ll
atomics.ll [PowerPC] Set setMaxAtomicSizeInBitsSupported appropriately for 32-bit PowerPC in PPCTargetLowering 2020-09-08 21:21:14 -04:00
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bitcast-peephole.mir
bitcasts-direct-move.ll
bitfieldinsert.ll
block-placement-1.mir
block-placement.mir
blockaddress.ll
bool-math.ll
BoolRetToIntTest-2.ll
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botheightreduce.mir
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builtins-ppc-elf2-abi.ll
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builtins-ppc-p10permute.ll
builtins-ppc-p10vsx.ll Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
bv-pres-v8i1.ll
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compare-duplicate.ll
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complex-return.ll
constant-combines.ll
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constants-i64.ll [NFC][PowerPC] Add tests of constants-i64. 2020-09-11 07:16:58 +00:00
constants.ll
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duplicate-returns-for-tailcall.ll
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elf-common.ll Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
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f128-passByValue.ll
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fabs.ll
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fast-isel-pcrel.ll Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
fast-isel-redefinition.ll
fast-isel-ret.ll
fast-isel-rsp.ll
fast-isel-shifter.ll
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float-vector-gather.ll
floatPSA.ll
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fma-combine.ll [DAGCombiner] Propagate FMF flags in FMA folding 2020-09-14 00:19:06 +08:00
fma-ext.ll
fma-mutate-duplicate-vreg.ll
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fma-negate.ll
fma-precision.ll
fma.ll
fmaxnum.ll
fmf-propagation.ll [SelectionDAGBuilder] Pass fast math flags to getNode calls rather than trying to set them after the fact.: 2020-09-08 15:27:21 -07:00
fminnum.ll
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fold-zero.ll
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fp64-to-int16.ll Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
fp128-bitcast-after-operation.ll
fp128-libcalls.ll
fp_to_uint.ll
fp-branch.ll
fp-int128-fp-combine.ll Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
fp-int-conversions-direct-moves.ll
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fp-intrinsics-fptosi-legal.ll
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fp-strict-conv-f128.ll [PowerPC] Pass nofpexcept flag to custom lowered constrained ops 2020-09-21 10:44:25 +08:00
fp-strict-conv-spe.ll
fp-strict-conv.ll [PowerPC] Pass nofpexcept flag to custom lowered constrained ops 2020-09-21 10:44:25 +08:00
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fp-strict-round.ll [PowerPC] Fix STRICT_FRINT/STRICT_FNEARBYINT lowering 2020-09-09 22:40:58 +08:00
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fusion-load-store.ll Reland "[PowerPC] Implement instruction clustering for stores" 2020-09-13 19:51:01 +08:00
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mi-peephole.mir [PowerPC] Fix broken kill flag after MI peephole 2020-09-02 17:07:49 -05:00
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mulhs.ll
mulld.ll
mulli.ll [NFC][PowerPC] Add tests for mul with big constants. 2020-09-07 09:45:47 +00:00
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multi-return.ll
named-reg-alloc-r0.ll
named-reg-alloc-r1-64.ll
named-reg-alloc-r1.ll
named-reg-alloc-r2-64.ll
named-reg-alloc-r2.ll
named-reg-alloc-r13-64.ll
named-reg-alloc-r13.ll
neg.ll
negate-i1.ll
negctr.ll
no-ctr-loop-if-exit-in-nested-loop.ll
no-dead-strip.ll
no-dup-of-bdnz.ll [EarlyCSE] Verify hash code in regression tests 2020-09-04 10:40:35 -04:00
no-dup-spill-fp.ll
no-duplicate.ll
no-ext-with-count-zeros.ll
no-extra-fp-conv-ldst.ll
no-pref-jumps.ll
no-rlwimi-trivial-commute.mir
NoCRFieldRedefWhenSpillingCRBIT.mir
nofpexcept.ll [PowerPC] Set the mayRaiseFPException for FCMPUS/FCMPUD 2020-09-12 02:42:22 +00:00
nomerge.ll
non-simple-args-intrin.ll
noPermuteFormasking.ll
not-fixed-frame-object.ll
novrsave.ll
opt-cmp-inst-cr0-live.ll
opt-li-add-to-addi.ll
opt-sub-inst-cr0-live.mir
optcmp.ll
optimize-andiso.ll
optnone-crbits-i1-ret.ll
or-addressing-mode.ll
ori_imm32.ll
ori_imm64.ll
p8-isel-sched.ll
p8-scalar_vector_conversions.ll
p8altivec-shuffles-pred.ll
p9_copy_fp.ll
p9-dform-load-alignment.ll
p9-vector-compares-and-counts.ll
p9-vinsert-vextract.ll Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
p9-xxinsertw-xxextractuw.ll
p10-bit-manip-ops.ll
p10-splatImm32.ll
p10-splatImm-CPload-pcrel.ll
p10-splatImm.ll
p10-string-ops.ll
p10-vector-divide.ll [PowerPC] Implement __int128 vector divide operations 2020-09-15 15:19:35 -04:00
p10-vector-mask-ops.ll [PowerPC] Implement Move to VSR Mask builtins in LLVM/Clang 2020-09-18 18:16:14 -05:00
p10-vector-modulo.ll
p10-vector-multiply.ll [PowerPC] Implemented Vector Multiply Builtins 2020-09-02 14:16:21 -05:00
p10-vector-shift.ll
p10-vsx-pcv.ll
pcrel-block-address.ll
pcrel-call-linkage-leaf.ll Reland "[PowerPC] Implement instruction clustering for stores" 2020-09-13 19:51:01 +08:00
pcrel-call-linkage-simple.ll
pcrel-call-linkage-with-calls.ll [Power10] Enable the heuristic for Power10 and switch the sched model 2020-09-12 02:49:47 +00:00
pcrel-got-indirect.ll
pcrel-indirect-call.ll
pcrel-jump-table.ll
pcrel-linkeropt-option.ll
pcrel-linkeropt.ll
pcrel-local-caller-toc.ll
pcrel-relocation-plus-offset.ll
pcrel-tail-calls.ll [Power10] Enable the heuristic for Power10 and switch the sched model 2020-09-12 02:49:47 +00:00
pcrel-tls-general-dynamic.ll [PowerPC] Fix missing TLS symbol type. 2020-09-03 05:57:04 -05:00
pcrel-tls-initial-exec.ll [PowerPC] Fix missing TLS symbol type. 2020-09-03 05:57:04 -05:00
pcrel-tls-local-exec.ll [PowerPC] Implement Thread Local Storage Support for Local Exec 2020-09-14 14:16:28 -05:00
pcrel-tls.ll
pcrel.ll
peephole-align.ll
peephole-miscompile-extswsli.mir
phi-eliminate.mir
pie.ll
pip-inner.ll
popcnt-zext.ll
popcnt.ll
popcount.ll Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
post-ra-ec.ll
pow_massv_075_025exp.ll
pow.75.ll
power9-moves-and-splats.ll
powf_massv_075_025exp.ll
ppc32-align-long-double-sf.ll
ppc32-constant-BE-ppcf128.ll
ppc32-cyclecounter.ll
ppc32-i1-stack-arguments-abi-bug.ll
ppc32-i1-vaarg.ll
ppc32-i64-to-float-conv.ll
ppc32-lshrti3.ll
ppc32-nest.ll
ppc32-pic-large.ll
ppc32-pic.ll
ppc32-secure-plt-tls2.ll
ppc32-secure-plt-tls.ll
ppc32-skip-regs.ll
ppc32-vacopy.ll
ppc64-32bit-addic.ll
ppc64-abi-extend.ll
ppc64-align-long-double.ll
ppc64-altivec-abi.ll
ppc64-anyregcc-crash.ll
ppc64-anyregcc.ll
ppc64-blnop.ll
ppc64-byval-align.ll
ppc64-calls.ll
ppc64-crash.ll
ppc64-crsave.mir
ppc64-cyclecounter.ll
ppc64-elf-abi.ll
ppc64-fastcc-fast-isel.ll
ppc64-fastcc.ll
ppc64-func-desc-hoist.ll
ppc64-gep-opt.ll
ppc64-get-cache-line-size.ll
ppc64-i128-abi.ll
ppc64-icbt-pwr7.ll
ppc64-icbt-pwr8.ll
ppc64-linux-func-size.ll
ppc64-nest.ll
ppc64-nonfunc-calls.ll
ppc64-P9-mod.ll
ppc64-P9-setb.ll
ppc64-P9-vabsd.ll
ppc64-patchpoint.ll
ppc64-pre-inc-no-extra-phi.ll
ppc64-prefetch.ll
ppc64-r2-alloc.ll
ppc64-sibcall-shrinkwrap.ll
ppc64-sibcall.ll
ppc64-smallarg.ll
ppc64-stackmap-nops.ll
ppc64-stackmap.ll
ppc64-toc.ll
ppc64-vaarg-int.ll
ppc64-varargs.ll
ppc64-zext.ll
ppc64le-aggregates.ll
ppc64le-calls.ll
ppc64le-crsave.ll
ppc64le-localentry-large.ll
ppc64le-localentry.ll
ppc64le-smallarg.ll
ppc440-fp-basic.ll
ppc440-msync.ll
ppc-crbits-onoff.ll
ppc-ctr-dead-code.ll
ppc-disable-non-volatile-cr.ll
ppc-empty-fs.ll
ppc-label2.ll
ppc-label.ll
ppc-passname-assert.ll
ppc-passname.ll
ppc-prologue.ll
ppc-redzone-alignment-bug.ll
ppc-shrink-wrapping.ll
ppc-vaarg-agg.ll
ppcf128-1-opt.ll
ppcf128-1.ll
ppcf128-2.ll
ppcf128-3.ll
ppcf128-4.ll
ppcf128-constrained-fp-intrinsics.ll [PowerPC] Expand constrained ppc_fp128 to i32 conversion 2020-09-05 13:16:20 +08:00
ppcf128-endian.ll
ppcf128-freeze.mir
ppcf128sf.ll
ppcsoftops.ll
pr3711_widen_bit.ll
pr12757.ll
pr13641.ll
pr13891.ll
pr15031.ll
pr15359.ll
pr15630.ll
pr15632.ll
pr16556-2.ll
pr16556.ll
pr16573.ll
pr17168.ll
pr17354.ll
pr18663-2.ll
pr18663.ll
pr20442.ll
pr22711.ll
pr24216.ll
pr24546.ll
pr24636.ll
pr25080.ll
pr25157-peephole.ll
pr25157.ll
pr26180.ll
pr26193.ll
pr26356.ll
pr26378.ll
pr26381.ll
pr26617.ll
pr26690.ll
pr27078.ll
pr27350.ll
pr28130.ll
pr28630.ll
pr30451.ll
pr30640.ll
pr30663.ll
pr30715.ll
pr31144.ll
pr32063.ll
pr32140.ll
pr33093.ll
pr33547.ll
pr35402.ll
pr35688.ll
pr36068.ll
pr36292.ll
pr38087.ll
pr38899-split-register-at-spill.mir
pr39478.ll
pr39815.ll
pr40922.ll
pr41088.ll
pr41177.ll
pr42492.ll
pr43527.ll
pr43976.ll
pr44183.ll
pr44239.ll
pr45186.ll
pr45297.ll
pr45301.ll
pr45432.ll
pr45448.ll
pr45628.ll
pr45709.ll
pr46759.ll
pr46923.ll
pr47373.ll [PowerPC] Fix broken kill flag after MI peephole 2020-09-02 17:07:49 -05:00
PR3488.ll
PR33636.ll
PR33671.ll
PR35812-neg-cmpxchg.ll
pre-inc-disable.ll
preemption.ll
prefer-dqform.ll
preinc-ld-sel-crash.ll
preincprep-i64-check.ll
preincprep-invoke.ll
preincprep-nontrans-crash.ll
private.ll
prolog_vec_spills.mir
pwr3-6x.ll
pwr7-gt-nop.ll
pzero-fp-xored.ll
quadint-return.ll
r31.ll
read-set-flm.ll
recipest.ll
reduce_cr.ll
reduce_scalarization02.ll
reduce_scalarization.ll
redundant-copy-after-tail-dup.ll
reg-coalesce-simple.ll
reg-names.ll
reg-scavenging.ll
reloc-align.ll
remap-crash.ll
remat-imm.ll
rematerializable-instruction-machine-licm.ll
remove-copy-crunsetcrbit.mir
remove-implicit-use.mir
remove-redundant-li-skip-imp-kill.mir
remove-redundant-load-imm.ll
remove-redundant-load-imm.mir
remove-redundant-moves.ll
remove-redundant-toc-saves.ll
remove-self-copies.mir
repeated-fp-divisors.ll
resolvefi-basereg.ll
resolvefi-disp.ll
restore-r30.ll
retaddr2.ll
retaddr.ll
return-val-i128.ll
rlwimi2.ll
rlwimi3.ll
rlwimi-and-or-bits.ll
rlwimi-and.ll
rlwimi-commute.ll
rlwimi-dyn-and.ll
rlwimi-keep-rsh.ll
rlwimi.ll
rlwinm2.ll
rlwinm_rldicl_to_andi.mir
rlwinm-zero-ext.ll
rlwinm.ll
rm-zext.ll
rotl-2.ll
rotl-64.ll
rotl-rotr-crash.ll
rotl.ll
rounding-ops.ll
rounding-rm-flag.ll
rs-undef-use.ll
s000-alias-misched.ll
sat-add.ll
saturating-intrinsics.ll
save-bp.ll
save-cr-ppc32svr4.ll
save-crbp-ppc32svr4.ll
scalar_cmp.ll
scalar_vector_test_1.ll
scalar_vector_test_2.ll
scalar_vector_test_3.ll
scalar_vector_test_4.ll
scalar-equal.ll
scalar-min-max.ll
scalar-rounding-ops.ll
scavenging.mir
sched-addi.ll
schedule-addi-load.mir
scheduling-mem-dependency.ll
sdag-ppcf128.ll
sdiv-pow2.ll
sections.ll
select_const.ll
select_lt0.ll
select-addrRegRegOnly.ll
select-cc.ll
select-i1-vs-i1.ll
select-to-branch.mir
selectiondag-extload-computeknownbits.ll
selectiondag-sextload.ll
set0-v8i16.ll
setcc_no_zext.ll
setcc-logic.ll
setcc-to-sub.ll
setcc-vector.ll
setcclike-or-comb.ll
setcr_bc2.mir
setcr_bc3.mir
setcr_bc.mir
seteq-0.ll
setrnd.ll
sext-vector-inreg.ll
sh-overflow.mir
shift128.ll
shift_mask.ll
shift-cmp.ll
shl_elim.ll
shl_sext.ll
shrink-wrap.ll
shrink-wrap.mir
sign_ext_inreg1.ll
signbit-shift.ll
simplifyConstCmpToISEL.ll
sink-down-more-instructions-1.mir [MachineSink] add one more mir case - nfc 2020-09-16 22:03:06 -04:00
sink-down-more-instructions.ll [machinesink] add testcase for more sinking - NFC 2020-09-06 21:14:14 -04:00
sj-ctr-loop.ll
sjlj_no0x.ll
sjlj.ll
small-arguments.ll
sms-cpy-1.ll
sms-grp-order.ll
sms-iterator.ll
sms-phi-1.ll
sms-phi-2.ll
sms-phi-3.ll
sms-phi-5.ll
sms-phi.ll
sms-remark.ll
sms-simple.ll
smulfixsat.ll
spe-fastmath.ll
spe.ll
spill_p9_setb.ll
spill-nor0.ll Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
splat-bug.ll
splat-larger-types-as-v16i8.ll
split-index-tc.ll
splitstore-check-volatile.ll
srem-lkk.ll
srem-vector-lkk.ll
srl-mask.ll
stack-clash-dynamic-alloca.ll
stack-clash-prologue-nounwind.ll
stack-clash-prologue.ll
stack-coloring-vararg.mir
stack-guard-reassign.ll Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
stack-no-redzone.ll
stack-protector.ll
stack-realign.ll
stackmap-frame-setup.ll
stacksize.ll
std-unal-fi.ll
stdux-constuse.ll
stfiwx-2.ll
stfiwx.ll
store_fptoi.ll [PowerPC] Fix store-fptoi combine of f128 on Power8 2020-09-17 10:21:35 +08:00
store-combine.ll
store-constant.ll
store-load-fwd.ll
store-update.ll
structsinmem.ll
structsinregs.ll
stubs.ll
stwu8.ll
stwu-gta.ll
stwu-sched.ll
stwux.ll
sub-bv-types.ll
sub-of-not.ll
subc.ll
subreg-postra-2.ll
subreg-postra.ll
subtract_from_imm.ll
svr4-redzone.ll
swaps-le-1.ll
swaps-le-2.ll
swaps-le-3.ll
swaps-le-4.ll
swaps-le-5.ll
swaps-le-6.ll
swaps-le-7.ll
swaps-le-8.ll
tail-dup-analyzable-fallthrough.ll
tail-dup-branch-to-fallthrough.ll
tail-dup-break-cfg.ll
tail-dup-layout.ll
tailcall1-64.ll
tailcall1.ll
tailcall-speculatable-callee.ll
tailcall-string-rvo.ll
tailcallpic1.ll
test_call_aix.ll
test_func_desc.ll
test-and-cmp-folding.ll
testBitReverse.ll
testComparesi32gtu.ll
testComparesi32leu.ll
testComparesi32ltu.ll
testComparesieqsc.ll
testComparesieqsi.ll
testComparesieqsll.ll
testComparesieqss.ll
testComparesiequc.ll
testComparesiequi.ll
testComparesiequll.ll
testComparesiequs.ll
testComparesigesc.ll
testComparesigesi.ll
testComparesigesll.ll
testComparesigess.ll
testComparesigeuc.ll
testComparesigeui.ll
testComparesigeull.ll
testComparesigeus.ll
testComparesigtsc.ll
testComparesigtsi.ll
testComparesigtsll.ll
testComparesigtss.ll
testComparesigtuc.ll
testComparesigtui.ll
testComparesigtus.ll
testComparesilesc.ll
testComparesilesi.ll
testComparesilesll.ll
testComparesiless.ll
testComparesileuc.ll
testComparesileui.ll
testComparesileull.ll
testComparesileus.ll
testComparesiltsc.ll
testComparesiltsi.ll
testComparesiltsll.ll
testComparesiltss.ll
testComparesiltuc.ll
testComparesiltui.ll
testComparesiltus.ll
testComparesinesc.ll
testComparesinesi.ll
testComparesinesll.ll
testComparesiness.ll
testComparesineuc.ll
testComparesineui.ll
testComparesineull.ll
testComparesineus.ll
testCompareslleqsc.ll
testCompareslleqsi.ll
testCompareslleqsll.ll
testCompareslleqss.ll
testComparesllequc.ll
testComparesllequi.ll
testComparesllequll.ll
testComparesllequs.ll
testComparesllgesc.ll
testComparesllgesi.ll
testComparesllgesll.ll
testComparesllgess.ll
testComparesllgeuc.ll
testComparesllgeui.ll
testComparesllgeull.ll
testComparesllgeus.ll
testComparesllgtsll.ll
testComparesllgtuc.ll
testComparesllgtui.ll
testComparesllgtus.ll
testCompareslllesc.ll
testCompareslllesi.ll
testCompareslllesll.ll
testComparesllless.ll
testComparesllleuc.ll
testComparesllleui.ll
testComparesllleull.ll
testComparesllleus.ll
testComparesllltsll.ll
testComparesllltuc.ll
testComparesllltui.ll
testComparesllltus.ll
testComparesllnesll.ll
testComparesllneull.ll
thread-pointer.ll
tls_get_addr_clobbers.ll
tls_get_addr_fence1.mir
tls_get_addr_fence2.mir
tls_get_addr_stackframe.ll
tls-cse.ll
tls-pic.ll
tls-pie-xform.ll
tls-store2.ll
tls.ll
toc-float.ll
toc-load-sched-bug.ll
tocSaveInPrologue.ll
topdepthreduce-postra.mir
trampoline.ll
trunc-srl-load.ll
two-address-crash.mir
uint-to-fp-v4i32.ll
uint-to-ppcfp128-crash.ll
umulfixsat.ll
umulo-128-legalisation-lowering.ll
unal4-std.ll
unal-altivec2.ll
unal-altivec-wint.ll
unal-altivec.ll
unal-vec-ldst.ll
unal-vec-negarith.ll
unaligned-addressing-mode.ll
unaligned-floats.ll
unaligned.ll
unsafe-math.ll
unwind-dw2-g.ll
unwind-dw2.ll
urem-lkk.ll
urem-vector-lkk.ll
use-cr-result-of-dom-icmp-st.ll
uwtables.ll
vaddsplat.ll
varargs-struct-float.ll
varargs.ll
variable_elem_vec_extracts.ll
vavg.ll
vcmp-fold.ll
vec_abs.ll
vec_absd.ll
vec_add_sub_doubleword.ll
vec_add_sub_quadword.ll
vec_auto_constant.ll
vec_br_cmp.ll
vec_buildvector_loadstore.ll
vec_call.ll
vec_clz.ll
vec_cmp.ll
vec_cmpd.ll
vec_constants.ll
vec_conv_fp32_to_i8_elts.ll
vec_conv_fp32_to_i16_elts.ll
vec_conv_fp32_to_i64_elts.ll
vec_conv_fp64_to_i8_elts.ll
vec_conv_fp64_to_i16_elts.ll
vec_conv_fp64_to_i32_elts.ll
vec_conv_fp_to_i_4byte_elts.ll
vec_conv_fp_to_i_8byte_elts.ll
vec_conv_i8_to_fp32_elts.ll
vec_conv_i8_to_fp64_elts.ll
vec_conv_i16_to_fp32_elts.ll
vec_conv_i16_to_fp64_elts.ll
vec_conv_i32_to_fp64_elts.ll
vec_conv_i64_to_fp32_elts.ll
vec_conv_i_to_fp_4byte_elts.ll
vec_conv_i_to_fp_8byte_elts.ll
vec_conv.ll
vec_extload.ll
vec_extract_p9_2.ll
vec_extract_p9.ll
vec_fmuladd.ll
vec_fneg.ll
vec_insert.ll
vec_int_ext.ll
vec_mergeow.ll
vec_minmax.ll
vec_misaligned.ll
vec_mul_even_odd.ll
vec_mul.ll
vec_perf_shuffle.ll
vec_popcnt.ll
vec_revb.ll
vec_rotate_shift.ll
vec_rounding.ll
vec_select.ll
vec_shift.ll
vec_shuffle_le.ll
vec_shuffle_p8vector_le.ll
vec_shuffle_p8vector.ll
vec_shuffle.ll
vec_sldwi.ll
vec_splat_constant.ll
vec_splat.ll
vec_sqrt.ll
vec_urem_const.ll
vec_veqv_vnand_vorc.ll
vec_vrsave.ll
vec_xxpermdi.ll
vec_zero.ll
vec-abi-align.ll
vec-asm-disabled.ll
vec-bswap.ll
vec-itofp.ll
vec-min-max.ll
vec-select.ll
vec-trunc2.ll
vec-trunc.ll
vector-constrained-fp-intrinsics.ll [PowerPC] [FPEnv] Disable strict FP mutation by default 2020-09-10 13:28:09 +08:00
vector-copysign.ll
vector-extend-sign.ll
vector-identity-shuffle.ll
vector-merge-store-fp-constants.ll
vector-rotates.ll
vector-rounding-ops.ll
vector.ll
vmladduhm.ll
vperm-instcombine.ll
vperm-lowering.ll
vrsave-inline-asm.ll
vrspill.ll
vsel-prom.ll
vselect-constants.ll
vsx_builtins.ll
vsx_insert_extract_le.ll
vsx_scalar_ld_st.ll
vsx_shuffle_le.ll
vsx-args.ll Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
VSX-DForm-Scalars.ll
vsx-div.ll
vsx-elementary-arith.ll
vsx-fma-m.ll
vsx-fma-mutate-trivial-copy.ll
vsx-fma-mutate-undef.ll
vsx-fma-sp.ll
vsx-infl-copy1.ll
vsx-infl-copy2.ll
vsx-ldst-builtin-le.ll
vsx-ldst.ll
vsx-minmax.ll
vsx-p8.ll
vsx-p9.ll
vsx-partword-int-loads-and-stores.ll
vsx-recip-est.ll
vsx-self-copy.ll
vsx-spill-norwstore.ll
vsx-spill.ll
vsx-vec-spill.ll
vsx-word-splats.ll
VSX-XForm-Scalars.ll
vsx.ll Temporarily Revert "RegAllocFast: Rewrite and improve" 2020-09-18 18:11:21 -07:00
vsxD-Form-spills.ll
vtable-reloc.ll
weak_def_can_be_hidden.ll
xray-attribute-instrumentation.ll
xray-conditional-return.ll
xray-ret-is-terminator.ll
xray-tail-call-hidden.ll
xray-tail-call-sled.ll
xvcmpeqdp-v2f64.ll
xxleqv_xxlnand_xxlorc.ll
zero-not-run.ll
zext-and-cmp.ll
zext-bitperm.ll
zext-free.ll