1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 23:42:52 +01:00
Commit Graph

777 Commits

Author SHA1 Message Date
Chris Lattner
4b8ce1c80d The lastOp operand is never used
llvm-svn: 9331
2003-10-21 16:06:07 +00:00
John Criswell
4746befea3 Added LLVM copyright notice.
llvm-svn: 9324
2003-10-21 15:29:18 +00:00
John Criswell
de34542f41 Added LLVM copyright header.
llvm-svn: 9321
2003-10-21 15:17:13 +00:00
Chris Lattner
bec3b4ede1 Preselection is _not_ a basicblock pass, because it adds global variables to
the module.  This change converts it from being a basic block pass to being
a simple pass.  This allows elimination of the annotation and simplification
of the logic for moving constants into global variables.

llvm-svn: 9320
2003-10-21 14:49:19 +00:00
Vikram S. Adve
b289dff9a8 When opcodes like ADD were split into reg. and immed. versions (ADDi and ADDr),
this code wasn't fixed correctly so it missed copy operations that used ADDi.

llvm-svn: 9318
2003-10-21 12:29:45 +00:00
Vikram S. Adve
abf40e897c Why does g++ not even generate a warning when you miss a break statement?
llvm-svn: 9317
2003-10-21 12:28:27 +00:00
Vikram S. Adve
062fda7446 Implement the new varargs instructions and intrinsics.
llvm-svn: 9316
2003-10-21 11:25:09 +00:00
John Criswell
71d2894956 Added LLVM copyright notice to Makefiles.
llvm-svn: 9312
2003-10-20 22:26:57 +00:00
Brian Gaeke
f9b97fda86 Goodbye, AddRegNumToValues
llvm-svn: 9309
2003-10-20 20:44:03 +00:00
John Criswell
b402729b30 Added LLVM project notice to the top of every C++ source file.
Header files will be on the way.

llvm-svn: 9298
2003-10-20 19:43:21 +00:00
Brian Gaeke
9501118e3b Minor leftover fixups from replaceMachineCodeForFunction () change.
llvm-svn: 9295
2003-10-20 17:59:09 +00:00
Brian Gaeke
b4ceb43a43 Make replaceMachineCodeForFunction() return void.
llvm-svn: 9289
2003-10-20 15:17:12 +00:00
Brian Gaeke
afbe8787cc Make replaceMachineCodeForFunction return void.
llvm-svn: 9288
2003-10-20 15:15:17 +00:00
Chris Lattner
332429f023 Apparently the dependencies are wrong for this file, so it didn't rebuild it
when changing Instruction.def.  :(

llvm-svn: 9286
2003-10-20 14:12:52 +00:00
Chris Lattner
87843f87b8 Change the Opcode enum for PHI nodes from "Instruction::PHINode" to "Instruction::PHI" to be more consistent with the other instructions.
llvm-svn: 9269
2003-10-19 21:34:28 +00:00
Chris Lattner
080765e65d Update the sparc backend to at least compile correctly with the new varargs stuff even if it's not all implemented yet.
llvm-svn: 9223
2003-10-18 05:55:58 +00:00
Brian Gaeke
e966765990 Refactor jump insertion code from CompilationCallback() into insertJumpAtAddr().
Make insertFarJumpAtAddr() return void, because nothing uses its return value.
Remove some commented-out code.
Implement replaceMachineCodeForFunction() for SPARC.

llvm-svn: 9203
2003-10-17 18:27:37 +00:00
Brian Gaeke
4380148f33 Add prototype for replaceMachineCodeForFunction().
llvm-svn: 9202
2003-10-17 18:27:25 +00:00
Brian Gaeke
7157eed00f Remove extra blank line.
llvm-svn: 9196
2003-10-17 18:09:10 +00:00
Alkis Evlogimenos
5a1f705c88 Eliminate some extraneous code in SlotCalculator::insertVal().
Rename SlotCalculator::getValSlot() to SlotCalculator::getSlot(),
       SlotCalculator::insertValue() to SlotCalculator::getOrCreateSlot(),
       SlotCalculator::insertVal() to SlotCalculator::insertValue(), and
       SlotCalculator::doInsertVal() to SlotCalculator::doInsertValue().

llvm-svn: 9190
2003-10-17 02:02:40 +00:00
Brian Gaeke
add2fc5294 Remove WordsEmitted statistic; there's already a non-backend-specific
jello statistic for this (just divide #-bytes-of-code-emitted by 4).

Rewrite head-of-file comment.

llvm-svn: 9098
2003-10-13 19:51:20 +00:00
Chris Lattner
b6c8569f05 Regularize header file comments
llvm-svn: 9071
2003-10-13 03:32:08 +00:00
Brian Gaeke
acbc37a19e Don't include "Config/stdlib.h".
llvm-svn: 9037
2003-10-10 19:12:22 +00:00
Brian Gaeke
e5249bf429 Include <cstdio> instead of <stdio.h>.
llvm-svn: 9032
2003-10-10 18:46:52 +00:00
Misha Brukman
868eac95dd Fix spelling.
llvm-svn: 9027
2003-10-10 17:57:28 +00:00
Brian Gaeke
f9a4341b54 Add # of printed instructions statistic to both the SPARC and X86 LLC backends.
llvm-svn: 8892
2003-10-06 15:41:21 +00:00
Chris Lattner
e0ae24753d Add support for the Invoke instruction by using the LowerInvoke pass
llvm-svn: 8872
2003-10-05 19:16:09 +00:00
Misha Brukman
15fd4fd90c The comment seems irrelevant as the pass has become a BasicBlock pass.
llvm-svn: 8803
2003-10-01 05:24:50 +00:00
Chris Lattner
bdca1b438d Make sure to get the definition of getRegisterAllocator
llvm-svn: 8801
2003-09-30 22:24:00 +00:00
Chris Lattner
5509b86d74 RegisterAllocation.h is going away
llvm-svn: 8795
2003-09-30 20:15:04 +00:00
Brian Gaeke
ed1c780821 Add statistic for # of emitWord() calls.
llvm-svn: 8772
2003-09-30 17:49:41 +00:00
Misha Brukman
6d1b1553c1 Fixed spelling.
llvm-svn: 8687
2003-09-23 17:28:11 +00:00
Misha Brukman
c52311be4f Fix spelling.
llvm-svn: 8686
2003-09-23 17:27:28 +00:00
Vikram S. Adve
be3b73177f Fix assertion so it doesn't not trip incorrectly.
llvm-svn: 8650
2003-09-21 07:55:27 +00:00
Brian Gaeke
180144d19e Fix a typo in Sparc.cpp.
Update names of some pass creator fns in addPassesToEmitAssembly().
FunctionInfo is gone.

llvm-svn: 8599
2003-09-18 17:37:46 +00:00
Brian Gaeke
425a189248 Rename the pass creator fn to mimic the other creator fn names.
llvm-svn: 8598
2003-09-18 17:37:35 +00:00
Brian Gaeke
b22c819f96 Fix (and properly doxygenify) some comments. Incorporate
functionality of FunctionInfo pass as doFinalization method.
Rename pass to match names of other passes like it.
Rename the pass creator fn to mimic the other creator fn names.
Include StringExtras for utostr().
Make symbol prologue/epilogue stuff redundant with
 EmitBytecodeToAssembly, in preparation for refactoring.

llvm-svn: 8597
2003-09-18 17:37:25 +00:00
Brian Gaeke
bbbb03f96a Make the symbol prologue/epilogue stuff redundant with MappingInfo, in
preparation for refactoring.
Rename the pass creator fn to mimic the other creator fn names.

llvm-svn: 8596
2003-09-18 17:37:14 +00:00
Vikram S. Adve
e92c22c656 Fix longjmp case so that, along with the call to abort(), we also
generate the appropriate CallArgsDescriptor and tmp. virtual regs.

llvm-svn: 8554
2003-09-16 05:56:22 +00:00
John Criswell
29a0f79c05 Don't explicitly use $SourceDir to find the tblgen files. This causes make
some confusion when trying to generate files (it probably couldn't tell that
./file and $(SourceDir)/file may be the same file).
Now, just let VPATH find everything, and list the primary tblgen file first in
the list of dependencies so that we can just use $< to reference it in the make
rule.

This should hopefully fix the nightly tester.

llvm-svn: 8433
2003-09-10 14:10:44 +00:00
John Criswell
e783801878 Updated to find source files using VPATH. This makes writing build rules
much cleaner and easier.
Labeled .td as a suffix for tblgen files in Makefile.rules.
Modified build rules so that source files generated during the build are placed
in the build directory and not the source directory (and not in a Debug
directory).  This makes the system cleaner and allows us to have a read-only
source tree.

llvm-svn: 8424
2003-09-09 20:57:03 +00:00
John Criswell
bd1d21a0b4 Checkin of autoconf-style object root.
Adjusted Makefile to work with new autoconf-style object root.
Specifically, use the new -I option of tblgen to find include files.

llvm-svn: 8379
2003-09-06 14:50:22 +00:00
Misha Brukman
a17b761043 Added some optimizations:
* Generate a single BA instead of 6-instruction JUMP if possible
  (this occurs both in the creation and overwriting of the stub code)
* If possible, rewrite the ORIGINAL call to call the generated function
  directly, thus bypassing the stub entirely

Also added some statistics on how often calls are overwritten and how often the
CompilationCallback is invoked.

llvm-svn: 8376
2003-09-05 22:59:31 +00:00
Chris Lattner
6d92264f5a No longer provide an optinfo, noone uses it
llvm-svn: 8311
2003-09-01 20:40:59 +00:00
Chris Lattner
2eb5de925f Inline simple comparison which is sparc specific anyway
llvm-svn: 8309
2003-09-01 20:38:03 +00:00
Chris Lattner
3d6b7d1b44 Move private interfaces into private .h file
llvm-svn: 8306
2003-09-01 20:33:07 +00:00
Chris Lattner
cd2980ec8c Simplify code a bit
llvm-svn: 8301
2003-09-01 20:24:06 +00:00
Chris Lattner
049f0b8b37 LiveRange.h is now in lib/CodeGen/RegAlloc
llvm-svn: 8299
2003-09-01 20:17:13 +00:00
Chris Lattner
74e93a318b LiveRangeInfo got moved into the lib/CodeGen/RegAlloc directory
llvm-svn: 8297
2003-09-01 20:12:17 +00:00
Chris Lattner
8ebc13b6ca IGNode got moved to lib/CodeGen/RegAlloc
llvm-svn: 8294
2003-09-01 20:00:08 +00:00
Chris Lattner
ee413804c7 This file just needs LiveRange.h not IGNode.h
llvm-svn: 8293
2003-09-01 19:58:02 +00:00
Chris Lattner
a43cd2a9c9 No longer include IGNode.h in the Sparc global header
llvm-svn: 8292
2003-09-01 19:56:48 +00:00
Misha Brukman
6202e8a9ea * Use alloca() to force GCC not to eliminate frame pointer
* Break apart saving and restoring registers into separate functions
* Instead of saving single and double FP registers, just save the double
  registers -- aliasing helps preserve the single FP registers as well.
* Request just as much memory for a stub as we actually use

llvm-svn: 8200
2003-08-29 04:22:54 +00:00
Chris Lattner
f31d84d7c5 Targets should configure themselves based on a Module, not some wierd flags
llvm-svn: 8132
2003-08-24 19:49:48 +00:00
Chris Lattner
ce3c869e38 Change all #include'd files to be :: rules instead of : rules
llvm-svn: 8019
2003-08-21 20:37:17 +00:00
Chris Lattner
f54b131a49 Add support for the sig(set|long)jmp intrinsics
llvm-svn: 7951
2003-08-18 16:06:09 +00:00
Misha Brukman
56f7db4178 Spell `necessary' correctly.
llvm-svn: 7944
2003-08-18 14:43:39 +00:00
Brian Gaeke
705b78146e Rename -emitmaps to -enable-maps
llvm-svn: 7913
2003-08-16 00:23:16 +00:00
Misha Brukman
cddc1c4f9c Now that the JIT memory manager allocates as many bytes as necessary rather than
rounding up to a page, we need to request (num instrs * 4) bytes. However, I
think that 64 bytes is overkill for the stub function.

llvm-svn: 7888
2003-08-15 18:03:06 +00:00
Misha Brukman
16cd96bf4a Fix register and parameter numbers in saving double FP registers.
llvm-svn: 7884
2003-08-15 16:15:28 +00:00
Misha Brukman
a45f4930ed * Must save FP registers when calling CompilationCallback(), because FP
registers are global, are NOT windowed, and hence can be clobbered!
* Removed unused register shorthand notations
* Fixed and cleaned up comments in inline assembly

llvm-svn: 7853
2003-08-15 00:26:50 +00:00
Misha Brukman
fd3dc24fc4 Since we now have TableGen editing modes for VIM and (X)Emacs, we no longer need
to mark TableGen description files with "C++ mode".

llvm-svn: 7841
2003-08-14 15:16:28 +00:00
Chris Lattner
c8890366ee Restore 'nice name' to pass
llvm-svn: 7840
2003-08-14 14:43:24 +00:00
Brian Gaeke
4651096037 Factory methods for function passes now return type FunctionPass *.
llvm-svn: 7839
2003-08-14 06:09:32 +00:00
Brian Gaeke
bff292410d Unbreak SPARC backend: addPassesToJITCompile and
addPassesToEmitMachineCode now both take a FunctionPassManager.

llvm-svn: 7837
2003-08-14 06:04:59 +00:00
Brian Gaeke
af3bc2b895 Factory methods for function passes now return type FunctionPass *.
Get rid of RegisterLLC, which can't handle FunctionPasses anyway.

llvm-svn: 7836
2003-08-14 06:04:49 +00:00
Brian Gaeke
dbdd3c6717 Unbreak SPARC backend: addPassesToJITCompile and
addPassesToEmitMachineCode now both take a FunctionPassManager.
Factory methods for function passes now return type FunctionPass *.

llvm-svn: 7835
2003-08-14 06:04:29 +00:00
Chris Lattner
3ec8f080f0 Adjust files for move of mapping info stuff into the Sparc directory
llvm-svn: 7802
2003-08-13 02:38:16 +00:00
Vikram S. Adve
25a9f3f3ba Disable emitting LLVM-to-MI maps, by default.
Add -emitmaps options to turn this back on.

llvm-svn: 7774
2003-08-12 15:51:02 +00:00
Vikram S. Adve
10053969ca Fix va_arg to generate LDDFi for floating point values, instead of LDXi.
All non-FP cases use LDXi as before.

llvm-svn: 7765
2003-08-12 03:04:05 +00:00
Vikram S. Adve
aab4ebecd9 Register argument to va_start must be marked as defined!
llvm-svn: 7734
2003-08-11 18:42:47 +00:00
Misha Brukman
80ba72fe5c Implement LLVM intrinsics llvm.setjmp' and llvm.longjmp' as follows:
* setjmp() simply returns 0
* longjmp() simply calls abort()

llvm-svn: 7676
2003-08-07 15:43:46 +00:00
Vikram S. Adve
ba6f7167f0 Fix sanity-checking in 'maskUnsigned' code to be more precise:
use or def-and-use operands can be substituted after one def-only
operand has been substituted.

llvm-svn: 7674
2003-08-07 15:01:26 +00:00
Misha Brukman
8eafc8d965 Changing command-line option formats to be more consistent with LLVM style.
llvm-svn: 7658
2003-08-06 23:25:25 +00:00
Misha Brukman
f75a14d5af * Renamed option from nopreselect' to nopreopt' since it disables more than
just PreSelection
* Wrapped code at 80 columns
* Added the DecomposeMultiDimRefs Pass to the JIT compilation path

llvm-svn: 7657
2003-08-06 23:06:21 +00:00
Misha Brukman
ea0aa3f793 Use the registers g1 and g5 as temporaries for making far jumps and far calls,
because saving i1 and i2 to their ``designated'' stack slots corrupts unknown
memory in other functions, standard libraries, and worse.

In addition, this has the benefit of improving JIT performance because we
eliminate writing out 4 instructions in CompilationCallback() and 2 loads and 2
stores.

llvm-svn: 7653
2003-08-06 22:19:18 +00:00
Vikram S. Adve
33b0d331f0 1. Bug fix: was using SLL instead of SLLX for ULongTy. Chump.
2. Handle fp-to-uint conversions directly here instead of relying on
   a pre-transformation to replace them with the 2-step conversion.
3. Use size rather than explicitly checking types when deciding what
   opcodes to use, wherever possible.  This is less error prone (the
   bug fix above was not the first time!).
4. Float-to-pointer casts shd now work though this hasn't been tested.

llvm-svn: 7645
2003-08-06 18:48:40 +00:00
Vikram S. Adve
1d6e2b25c6 Remove conversion of fp-to-uint cast into a multi-step cast:
this is not an optional transformation on SPARC and is now handled
directly by instruction selection.

llvm-svn: 7644
2003-08-06 18:42:49 +00:00
Misha Brukman
2f831da9af SparcV9CodeEmitter.cpp:
* Doxygen-ified comments
* Added capability to make far calls (i.e., beyond 30 bits in CALL instr)
  which implies that we need to delete function references that were added by
  the call to addFunctionReference() because the actual call instruction is 10
  instructions away (thanks to 64-bit address construction)
* Cleaned up code that generates far jumps by using an array+loop

SparcV9CodeEmitter.h:
* Explained more of the side-effects of emitFarCall()

llvm-svn: 7639
2003-08-06 16:20:22 +00:00
Chris Lattner
54c2758e95 This method has now been changed to preserve flags for us!
llvm-svn: 7603
2003-08-05 16:59:24 +00:00
Misha Brukman
8cedc4ffa6 * Removed `using' declaration, now use full namespace qualifier std::string
* Simplified code by using an inline function instead of copy-pasted code

llvm-svn: 7597
2003-08-05 16:01:50 +00:00
Misha Brukman
c666ae831c * Set annul bit to be 0, because the Sparc backend currently does not use it.
* Use the name of the predict field instead of just the const 1 in the
  Instruction.

llvm-svn: 7592
2003-08-05 14:34:38 +00:00
Chris Lattner
94c11ac765 Transition to using 'let X = y' instead of 'set X = y'.
llvm-svn: 7565
2003-08-04 05:03:18 +00:00
Chris Lattner
277bb3482c DEBUG got moved to Debug.h
llvm-svn: 7495
2003-08-01 22:19:03 +00:00
Chris Lattner
1e006b1e92 Remove makefile complexity by always running tablegen with its final output
directory.

llvm-svn: 7485
2003-08-01 20:34:56 +00:00
Vikram S. Adve
eda4d9cb09 Add all arithmetic operators to ConstantExprToString().
Note that some generated operators (like &, | or ^) may
not be supported by the assembler -- but if they've got
this far, it's better to generate them and let the assembler decide.

llvm-svn: 7476
2003-08-01 15:55:53 +00:00
Vikram S. Adve
b68bd55363 *Both* operands of divide need sign-extension before divide (if smaller
than machine register size), not just the second operand.

llvm-svn: 7475
2003-08-01 15:54:38 +00:00
Vikram S. Adve
4576ae1530 Put back the separate pass to decompose multi-dimensional references
since it is *necessary* for correct code generation.  Only optional
transformations belong in the PreOpts pass (which needs to be renamed
from PreSelection to PreOpts).

llvm-svn: 7474
2003-08-01 15:53:24 +00:00
Chris Lattner
51504820c7 We no longer need to preprocess SparcV9.td before sending it through tablegen
llvm-svn: 7437
2003-07-30 21:00:37 +00:00
Vikram S. Adve
d4520885a0 When emitting a constant, check for ConstantExpr before
ordinary (primitive) types since ConstantExprs may be of primitive type!

llvm-svn: 7418
2003-07-30 12:54:47 +00:00
Chris Lattner
9e520e120b Conform to the new interface for describing target registers... even though
it's currently not used.

llvm-svn: 7416
2003-07-30 05:51:34 +00:00
Chris Lattner
24ac5f5339 Only regenerate the .inc file if IT has changed, not just if the .td files
have changed.

llvm-svn: 7414
2003-07-30 05:49:17 +00:00
Chris Lattner
89619f07a3 Do not use 'cpp' directly
llvm-svn: 7404
2003-07-29 23:04:41 +00:00
Misha Brukman
d0aaeba334 * Cleaned up and corrected comments wrt instruction formats
* Enabled STXFSR instructions

llvm-svn: 7400
2003-07-29 21:21:20 +00:00
Misha Brukman
6f2a6a5279 Make emitFarCall() public, and add a few comments to functions.
llvm-svn: 7399
2003-07-29 20:52:56 +00:00
Vikram S. Adve
ae84838162 Unify all constant evaluations that depend on register size
in ConvertConstantToIntType.

llvm-svn: 7395
2003-07-29 19:59:23 +00:00
Vikram S. Adve
c8b8a4088d Rename 'dump-asm' to 'dump-input' and really print it just before code-gen.
llvm-svn: 7394
2003-07-29 19:58:00 +00:00
Vikram S. Adve
0a6bd349c2 Bug fix: don't unnecessarily pretty-print control-characters, some of
which were wrong (particularly, '\a' for '\007').

llvm-svn: 7393
2003-07-29 19:57:34 +00:00
Vikram S. Adve
98618cd85c Add ConvertConstantToIntType() to unify all constant handling
that depends on machine register size.
Moved insertCallerSavingCode() to PhyRegAlloc and
moved isRegVolatile and modifiedByCall to TargetRegInfo: they are all
machine independent.  Remove several dead functions.

llvm-svn: 7392
2003-07-29 19:54:41 +00:00
Vikram S. Adve
97e5e148b8 Add code to support stack spill/temp offsets that don't fit in the
immed. field.  Moved insertCallerSavingCode() to PhyRegAlloc: it is
now machine independent.  Remove all uses of PhyRegAlloc.

llvm-svn: 7391
2003-07-29 19:53:21 +00:00
Misha Brukman
9bcbe0c3bc * Correctly emit a far call if the target address does not fit into 30 bits
instead of assert()ing
* Fixed a nasty bug where '07' was used instead of register 'o7'

llvm-svn: 7382
2003-07-29 19:00:58 +00:00
Chris Lattner
da51c38e57 Specify the value type for the register, not just the size.
llvm-svn: 7357
2003-07-28 04:25:36 +00:00
Chris Lattner
406d31b4c2 This code doesn't modify the LLVM structure, keep stuff const
llvm-svn: 7343
2003-07-26 23:04:00 +00:00
Vikram S. Adve
48144de834 (1) Major fix to the way unused regs. are marked and found for the FP
Single and FP double reg types (which share the same reg class).
    Now all methods marking/finding unused regs consider the regType
    within the reg class, and SparcFloatRegClass specializes this code.
(2) Remove machine-specific regalloc. methods that are no longer needed.
    In particular, arguments and return value from a call do not need
    machine-specific code for allocation.
(3) Rename TargetRegInfo::getRegType variants to avoid unintentional
    overloading when an include file is omitted.

llvm-svn: 7334
2003-07-25 21:12:15 +00:00
Vikram S. Adve
a98599dc3b 1. Fix a case that was marking the invalid reg. num. (-1) as used,
causing a nasty array bound error later.
2. Fix silly typo causing logical shift of unsigned long to use
   SRL instead of SRLX.

llvm-svn: 7330
2003-07-25 21:08:58 +00:00
Chris Lattner
1351c304dc Remove redundant const qualifiers from cast<> expressions
llvm-svn: 7253
2003-07-23 15:30:06 +00:00
Chris Lattner
6ad460b336 Simplify code by using ConstantInt::getRawValue instead of checking to see
whether the constant is signed or unsigned, then casting

llvm-svn: 7252
2003-07-23 15:22:26 +00:00
Chris Lattner
9f501f98c8 Simplify code a bit
llvm-svn: 7217
2003-07-21 19:56:49 +00:00
Anand Shukla
351c0f6342 Added special consideration for instrumentation strategy
llvm-svn: 7208
2003-07-20 15:39:30 +00:00
Misha Brukman
8c9be85d5d Fixed the number translation scheme for the integer condition code registers: it
now works in instructions which require a 2-bit or 3-bit INTcc code.

Incidentally, that means that the representation of INTcc registers is now the
same in both integer and FP instructions. Thus, code became much simpler and
cleaner.

llvm-svn: 7185
2003-07-16 20:30:40 +00:00
Misha Brukman
5a52ebed46 The name should really be `simm11' to follow the naming convention, but this has
no change in functionality.

llvm-svn: 7184
2003-07-16 20:27:44 +00:00
Misha Brukman
10a63e248c No need for a second immediate field if the class already inherits one.
llvm-svn: 7182
2003-07-15 21:27:14 +00:00
Misha Brukman
250280cf79 Encode predict = 1 by default, because the Sparc assembler does this.
llvm-svn: 7181
2003-07-15 21:26:49 +00:00
Misha Brukman
8cd8690ad5 Correctly handle calls to functions which are further away than 2**32 bits will
allow, i.e. make a sequence of instructions to enable an indirect call using
jump-and-link and 2 temporary registers (which we save and ultimately restore).

Warning: if the delay slot of a function call is used to do meaningful work and
not just a NOP, this behavior is incorrect. However, the Sparc backend does not
yet utilize the delay slots effectively, so it is not necessary to make an
overly complicated algorithm for something that's not used.

llvm-svn: 7178
2003-07-15 19:09:43 +00:00
Misha Brukman
d594e21afa * Added support for the %ccr register
* FP double registers are now coded correctly
* Removed function which converted registers based on register types, it was
  broken (because regTypes are broken)

llvm-svn: 7175
2003-07-14 23:26:03 +00:00
Misha Brukman
5de3e14206 The word separate' only has one e'.
llvm-svn: 7173
2003-07-14 17:20:40 +00:00
Vikram S. Adve
83dc6ef841 Several important bug fixes:
(1) Cannot use ANDN(ot), ORN, and XORN for boolean ops, only bitwise ops.

(2) Conditional move instructions must distinguish signed and unsigned
    condition codes, e.g., MOVLE vs. MOVLEU.

(3) Conditional-move-on-register was using the cond-move-on-cc opcodes,
    which produces a valid-looking instruction with bogus registers!

(4) Here's a really cute one: dividing-by-2^k for negative numbers needs to
    add 2^k-1 before shifting, not add 1 after shifting.  Sadly, these
    are the same when k=0 so our poor test case worked fine.

(5) Casting between signed and unsigned values was not correct:
    completely reimplemented.

(6) Zero-extension on unsigned values was bogus: I was only doing the
    SRL and not the SLLX before it.  Don't know WHAT I was thinking!

(7) And the most important class of changes: Sign-extensions on signed values.
    Signed values are not sign-extended after ordinary operations,
    so they must be sign-extended before the following cases:
	-- passing to an external or unknown function
	-- returning from a function
	-- using as operand 2 of DIV or REM
	-- using as either operand of condition-code setting operation
           (currently only SUBCC), with smaller than 32-bit operands


Also, a couple of improvements:

(1) Fold cast-to-bool into Not(bool).  Need to do this for And, Or, XOR also.

(2) Convert SetCC-Const into a conditional-move-on-register (case 41)
    if the constant is 0.  This was only being done for branch-on-SetCC-Const
    when the branch is folded with the SetCC-Const.

llvm-svn: 7159
2003-07-10 20:07:54 +00:00
Vikram S. Adve
87e97308fd Bug fix in creating constants: need 1U << 31, not 1 << 31.
llvm-svn: 7158
2003-07-10 19:48:19 +00:00
Vikram S. Adve
989afdffd6 Fold cast-to-bool into not. Later, this should also be folded into other
boolean operations: AND, OR, XOR.

llvm-svn: 7157
2003-07-10 19:47:42 +00:00
Vikram S. Adve
8d30b76da6 Several fixes to handling of int CC register:
(1) An int CC live range must be spilled if there are any interferences,
    even if no other "neighbour" in the interf. graph has been allocated
    that reg. yet.  This is actually true of any class with only one reg!

(2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must
    be spilled so that the machine-independent spill code doesn't have to
    make the machine-dependent decision of which CC name to use based on
    operand type: %xcc or %icc.  (These are two halves of the same register.)

(3) LR->isMarkedForSpill() is no longer the same as LR->hasColor().
    These should never have been the same, and this is necessary now for #2.

(4) All RDCCR and WRCCR instructions are directly generated with the
    phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to
    deal with this.

llvm-svn: 7151
2003-07-10 19:42:11 +00:00
Misha Brukman
32080d455d Elaborated assembly syntax of instructions in the comments.
llvm-svn: 7120
2003-07-07 22:18:42 +00:00
Misha Brukman
1e37572950 Removed unnecessary assignment (it was taken care by a superclass) and clarified
some comments.

llvm-svn: 7119
2003-07-07 22:18:06 +00:00
Misha Brukman
5fe7702056 Moved RegClassIDs enum to be next to the RegTypes enum.
llvm-svn: 7114
2003-07-07 16:52:39 +00:00
Vikram S. Adve
ee1e9ea019 Correction to last fix: Pointer types do not return true in Type::IsIntegral().
llvm-svn: 7113
2003-07-06 22:50:31 +00:00
Vikram S. Adve
1ddf684f4c Major bug fix though it happened rarely (only on a compare after an
integer overflow):
We need to use %icc and not %xcc for comparisons on 32-bit or smaller
integer values.

llvm-svn: 7111
2003-07-06 20:13:59 +00:00
Vikram S. Adve
0ab951d2ab Make the RegClassID values public -- there is no other way to get them.
llvm-svn: 7109
2003-07-06 19:53:59 +00:00
Misha Brukman
20fcdbc808 Apparently, the "regType" and "regClass" used in the Sparc backend are not both
correct: empirically, "regType" is wrong for a number of registers. Thus, one
can only rely on the "regClass" to figure out what kind of register one is
dealing with.

This change switches to using only "regClass" and adds a few extra DEBUG() print
statements and a few clean-ups in comments and code, mostly minor.

llvm-svn: 7103
2003-07-03 18:36:47 +00:00
Misha Brukman
8dd0e2fb27 * Force all "don't care" bits to 0 so that there are absolutely no unset bits in
the TableGen descriptions; all unset bits are thus errors.
* As a result, found and fixed instructions where some operands were not
  actually assigned into the right portion of the instruction.

llvm-svn: 7074
2003-07-02 19:37:48 +00:00
Misha Brukman
4eeef8986f The classes F4_3 and F4_4 have an `rd' operand that needs to be set.
llvm-svn: 7073
2003-07-02 18:27:47 +00:00
Misha Brukman
e0abbee864 Properly fix instruction syntax in comments, using `imm' for instructions that
use an immediate value instead of a register.

llvm-svn: 7072
2003-07-02 18:15:43 +00:00
Misha Brukman
b53b013355 Fixed instruction syntax in the comments (specifies how instr is used).
llvm-svn: 7071
2003-07-02 18:02:58 +00:00
Vikram S. Adve
84f4ef26b8 Force fixed-size but large alloca objects to the dynamically allocated
area to avoid using up precious stack space within the 4095 offset limit
from %fp.  Such objects that would themselves live at a large offset
were being put there already so this is a simple change.

llvm-svn: 7066
2003-07-02 06:59:22 +00:00
Vikram S. Adve
5ce2683cd2 (1) Major bug fix: DecomposeArrayRef() replaces its argument instr. and
deletes it, but we were merrily trying to fix the operands of that
    instruction anyway!  Instead, fix the replacement instruction.

(2) An Improvement: Check for and extract global values in all operands,
    not just in known pointer operands.  For example, they can occur in
    call arguments, and probably other unforeseeable places as well.
    This also eliminates the special-case handling of Load and Store.

llvm-svn: 7053
2003-07-02 01:23:15 +00:00
Vikram S. Adve
42e2aac9ed Bug/case fixes:
(1) select: Ok to convert a pointer to a float or double.
(2) regalloc: Some MachineInstr* for caller-saving code before a call
    were being inserted before and after the call!
(3) Don't insert the caller-saving instructions in the
    MachineCodeForInstruction for the Call instruction.
    *All* instructions generated by register allocation need to be
    recorded in those maps, but it needs to be done uniformly.

llvm-svn: 7051
2003-07-02 01:13:57 +00:00
John Criswell
258dfc0319 Merged in autoconf branch. This provides configuration via the autoconf
system.

llvm-svn: 7014
2003-06-30 21:59:07 +00:00
Vikram S. Adve
d013d87cc4 Add the padding needed for variable-size alloca's, which should work now.
llvm-svn: 6859
2003-06-23 02:13:57 +00:00
Chris Lattner
4114fb4b01 Some preprocessors doen't support // comments and get confused
llvm-svn: 6821
2003-06-20 23:14:50 +00:00
Vikram S. Adve
872916514d RDCCR defines arg. #1, not arg. #2.
llvm-svn: 6796
2003-06-20 11:32:11 +00:00
Brian Gaeke
19420e8daf lib/Target/Sparc/Sparc.cpp:
Move LowerAllocations, PrintFunction, and SymbolStripping passes, and
  the corresponding -disable-strip and -d options, over here to the SPARC
  target-specific bits of llc. Rename -d to -dump-asm.

tools/llc/Makefile:
 Reindent. Add x86 library so that llc compiles again.

tools/llc/llc.cpp:
 Remove support for running arbitrary optimization passes. Use opt instead.
 Remove LowerAllocations, PrintFunction, and SymbolStripping passes, as noted
  above.
 Allow user to select a backend (x86 or SPARC); default to guessing from
  the endianness/pointer size of the input bytecode file.
 Fix typos.
 Delete empty .s file and exit with error status if target does not support
  static compilation.

llvm-svn: 6776
2003-06-18 21:14:23 +00:00
Chris Lattner
1bcf06834c These instructions really take three operands. This fixes some assertions
llvm-svn: 6765
2003-06-18 15:09:02 +00:00
Chris Lattner
3aba55395a Rename FInfo.cpp to FunctionInfo.cpp, eliminate FInfo.h
llvm-svn: 6712
2003-06-16 15:31:52 +00:00
Chris Lattner
9958a1c5b8 move contents of include/llvm/Reoptimizer/Mapping/FInfo.h into here, it is sparc internal
llvm-svn: 6711
2003-06-16 15:31:09 +00:00
Chris Lattner
713b9542eb Fix invalid number of arguments problem
llvm-svn: 6692
2003-06-16 12:03:00 +00:00
John Criswell
d3ff853628 Updated for the new projects Makefile.
llvm-svn: 6678
2003-06-11 13:49:11 +00:00
Misha Brukman
4f614afd11 Print address out as hex.
llvm-svn: 6657
2003-06-06 09:53:28 +00:00
Misha Brukman
2f76ce01b0 Added 'r' and 'i' versions to WRCCR.
llvm-svn: 6656
2003-06-06 09:52:58 +00:00
Misha Brukman
d61d0211ba * Changed Bcc instructions to behave like BPcc instructions
* BPA and BPN do not take a %cc register as a parameter
* SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions
* Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit
* Added WRCCR{r,i} opcodes

llvm-svn: 6655
2003-06-06 09:52:23 +00:00
Misha Brukman
a8f6be985d * Removed PreSelection pass because that is now done in the JIT
* Removed instruction scheduling as it is too slow to run in a JIT environment
* Removed other passes because they aren't necessary and can slow JIT down

llvm-svn: 6652
2003-06-06 07:11:16 +00:00
Misha Brukman
960a2c69b5 Fixed a bunch of test cases in test/Regression/Jello which could not get the
address of a floating-point (allocated via ConstantPool) correctly.

llvm-svn: 6647
2003-06-06 04:41:22 +00:00
Misha Brukman
4720f1af42 * If a global is not a function, just ask the MachineCodeEmitter for the addr
* Do not block a print statement with a DEBUG() guard if we're going to abort()

llvm-svn: 6645
2003-06-06 03:35:37 +00:00
Misha Brukman
9e8fd867b4 The SUB*i instructions belong to a different class than their SUB*r brethren.
llvm-svn: 6644
2003-06-06 03:34:47 +00:00
Misha Brukman
9136d8dd0d Put all debug print statements under the DEBUG() guard to make output clean so
that tests can automatically diff the output.

llvm-svn: 6642
2003-06-06 00:26:11 +00:00
Misha Brukman
c3b2d93a5c Fixed confusion between register classes and register types.
Now %fcc registers are recognized correctly.

llvm-svn: 6640
2003-06-05 23:51:10 +00:00
Misha Brukman
f0c930a86c Added missing directive to store the instruction name.
llvm-svn: 6639
2003-06-05 23:35:11 +00:00
Misha Brukman
6026ff3361 Moved predict and annul fields to the end of each individual instruction
class, because they are currently unused.

llvm-svn: 6638
2003-06-05 23:33:15 +00:00
Misha Brukman
0c06cc4fb9 Do not preset the cc register, the instructions actually use it.
llvm-svn: 6637
2003-06-05 23:30:27 +00:00
Vikram S. Adve
9dea456cbd Minor tuning -- avoid a non-inlinable function call on every operand.
Also, reorder a couple of functions for inlining.

llvm-svn: 6635
2003-06-05 21:12:56 +00:00
Misha Brukman
26e89721e8 Added lazy function resolution to the JIT.
llvm-svn: 6633
2003-06-05 20:52:06 +00:00
Misha Brukman
33a2ade60f * The textual output of (non-)predicted FP branches is the same.
* Stop mapping FBcc instructions to deprecated opcodes, map to FBPcc instead.
* Fixed opf in FCMPxy instructions.

llvm-svn: 6632
2003-06-05 20:51:37 +00:00
Misha Brukman
e8b6c4d380 All store instructions really want 'rd' in the first field.
Special cases: STFSRx and STXFSRx - they operate on predefined rd=0 or rd=1, and
expect %fsr as the parameter in assembly. They are disabled (since not used)
until an encoding, both for code generation and output, is chosen.

llvm-svn: 6619
2003-06-05 01:06:10 +00:00
Misha Brukman
93b1009318 Added missing 'rs1' field to F3_rdrs1imm13, 'rd' to F3_rdrs1rs2.
llvm-svn: 6618
2003-06-05 00:39:45 +00:00
Brian Gaeke
bc5ddca6a2 lib/CodeGen/Mapping/MappingInfo.cpp:
Update file comment to contain a bunch of the overview mapping-info
  documentation previously buried within the file.
 Remove some unnecessary include/using stmts.
 Rename pass to MappingInfoCollector.
 Rewrite a lot of it so it doesn't use global instance variables and so
  it outputs into MappingInfo objects and then dumps those out, instead of going
  straight to an assembly file.
 Change name of factory to getMappingInfoCollector.
 Fold prologue & epilogue writers into MappingInfo methods.

lib/Target/Sparc/FInfo.cpp:
 Correct file comment to reflect above change

lib/Target/Sparc/Sparc.cpp:
 Change name of factory to getMappingInfoCollector.

llvm-svn: 6617
2003-06-04 22:07:12 +00:00
Brian Gaeke
a7ab370eb9 Add file comment. Include <vector> and <string>. Update include guards
to reflect file's current location.  Add definition of class
MappingInfo.

llvm-svn: 6616
2003-06-04 22:02:47 +00:00
Chris Lattner
947a0974df Revert brians patch to get mapping info working again
sorry dude

llvm-svn: 6615
2003-06-04 21:01:12 +00:00
Tanya Lattner
f08c51ca3b Had to comment out a line in outByte() to get it to compile because Out and tmp were
undeclared. I was not sure what Brian wanted, so I will let him fix this. But now it compiles.

llvm-svn: 6614
2003-06-04 20:53:46 +00:00
Misha Brukman
a8c409ad9b * Instead of re-inventing the MachineConstantPool emitter that's already given
in Emitter.cpp, just convert the Sparc version of the constant pool into
  what's already supported and inter-operate.
* Implemented a first pass at lazy function resolution in the JITResolver. That
  required adding a SparcV9CodeEmitter pointer to simplify generating
  bit-patterns of the instructions.
* SparcV9CodeEmitter now creates and destroys static TheJITResolver, which makes
  sense because the SparcV9CodeEmitter is the only user of TheJITResolver, and
  lives for the entire duration of the JIT (via PassManager which lives in VM).
* Changed all return values in the JITResolver to uint64_t because of the 64-bit
  Sparc architecture.
* Added a new version of getting the value of a GlobalValue in the
  SparcV9CodeEmitter, which now works for already-generated functions (JITted or
  library functions).
* Removed little-used and unused functions, cleaning up the internal view of the
  SparcV9CodeEmitter.

llvm-svn: 6612
2003-06-04 20:01:13 +00:00
Brian Gaeke
abf48764ff Make writeNumber() void. Get ready to decouple it from .byte directive output.
llvm-svn: 6609
2003-06-04 18:17:22 +00:00
Misha Brukman
29b191bbed Added the 4.7 instruction class and all the FMOVcc instructions in them.
llvm-svn: 6601
2003-06-04 04:48:31 +00:00
Misha Brukman
168c089a59 Comment out opcodes currently unused in the Sparc backend.
llvm-svn: 6597
2003-06-04 02:57:55 +00:00
Misha Brukman
ee88ddfc38 Added instruction format class 3.15 and floating-point compare instructions.
llvm-svn: 6594
2003-06-04 02:26:14 +00:00
Chris Lattner
48586849db Avoid generating a getelementptr instruction of a function
llvm-svn: 6591
2003-06-04 01:24:40 +00:00
Brian Gaeke
0caf021e69 Make the write*map methods more self-contained. Document some more.
llvm-svn: 6589
2003-06-03 19:30:15 +00:00
Brian Gaeke
e55a000638 I documented this file, in an attempt to understand it, with a view toward
rewriting it.  I also vacuumed out all the commented-out code and
inaccurate comments, etc.

(We need to put the mapping information in a data structure so that we can
pass it out to the JIT, instead of automagically converting it to .byte
directives.)

llvm-svn: 6574
2003-06-03 07:56:05 +00:00
Chris Lattner
88a500368b Use the new -o tablegen option
llvm-svn: 6572
2003-06-03 05:06:33 +00:00
Misha Brukman
e5c5705c02 Constants are laid out in memory in PC-relative form.
llvm-svn: 6568
2003-06-03 03:24:12 +00:00
Misha Brukman
1b73726832 Added opcode conversion for conditional move of integers.
llvm-svn: 6567
2003-06-03 03:23:35 +00:00
Misha Brukman
28430ecbc6 * Convert load/store opcodes from register to immediate forms.
* Stop code from wrapping to the next line.

llvm-svn: 6566
2003-06-03 03:21:58 +00:00
Misha Brukman
77188166d5 Convert load/store opcodes from register to immediate forms, if necessary.
llvm-svn: 6565
2003-06-03 03:20:57 +00:00
Misha Brukman
4c382415f6 Store instructions are different from other Format 3.1/3.2 instructions in that
they prefer the destination register to be last. Thus, two new classes were made
for them that accomodate for having this layout of operands (F3_1rd, F3_2rd).

llvm-svn: 6564
2003-06-03 03:20:14 +00:00
Misha Brukman
2a257c6d5d * Added section A.34: Move FP register on int reg condition (FMOVr)
* Labeled sections that are not currently used in the Sparc backend as not
  requiring completion at this time.

llvm-svn: 6562
2003-06-03 01:16:27 +00:00
Misha Brukman
7340e85998 * Removed unused classes (rd field is always mentioned last); fixed comments.
* Added instruction classes which start building from rs1, then rs2, and rd.
* Fixed order of operands in classes 4.1 and 4.2; added 4.6 .

llvm-svn: 6561
2003-06-03 01:13:53 +00:00
Misha Brukman
2de19586d6 * Removed unused classes: the rd field is always mentioned as the last reg.
* Added new classes which start building from rs1, adding rs2, and then rd.
* Fixed order of operands in classes 3.11, 3.12, 3.16, and 3.17 .
* Fixed comments to reflect Real Life (tm).
* Removed "don't care" commented out assignments and dead classes (#if 0).

llvm-svn: 6560
2003-06-03 01:11:58 +00:00
Misha Brukman
8866b56ddd The rd field goes after the immediate field in format 2.1 instructions.
llvm-svn: 6559
2003-06-03 01:04:04 +00:00
Misha Brukman
f343fb82d0 Added MOVR (move int reg on register condition), aka comparison with zero.
None of these instructions are actually used in the Sparc backend, so no changes
were required in the instruction selector.

llvm-svn: 6549
2003-06-02 21:16:54 +00:00
Misha Brukman
6f65b13ed3 SparcInstr.def: added 'r' and 'i' versions of MOV(F)cc instructions
SparcInstrSelection.cpp:
* Fixed opcodes to return correct 'i' version since the two functions are each
  only used in one place.
* Changed name of function to have an 'i' in the name to signify that they each
  return an immediate form of the opcode.
* Added a warning if either of the functions is ever used in a context which
  requires a register-version opcode.

SparcV9_F4.td: fixed class F4_3, added F4_4 and notes that F4_{1,2} need fixing
SparcV9.td: added the MOV(F)cc instructions

llvm-svn: 6548
2003-06-02 20:55:14 +00:00
Misha Brukman
a285dbf6fd * Added casts to/from floating-point to integers.
* Changed // comments to #ifdef 0 to maintain syntax highlighting.

llvm-svn: 6546
2003-06-02 19:08:37 +00:00
Misha Brukman
5e6f3a150c Clean up after merging in SparcEmitter.cpp; branches and return work again.
llvm-svn: 6536
2003-06-02 05:24:46 +00:00
Misha Brukman
5f7d301059 Merged in tools/lli/JIT/SparcEmitter.cpp, coupled with the JITResolver taken
from lib/Target/X86/X86CodeEmitter.cpp .

llvm-svn: 6530
2003-06-02 04:12:39 +00:00
Brian Gaeke
1547687d07 Deal with %lo/%lm/%hm/%hh flags in getMachineOpValue().
llvm-svn: 6522
2003-06-02 02:13:26 +00:00
Brian Gaeke
b9ab2b7ba2 Make the .inc file depend on $(TBLGEN), so that changes to TableGen followed
by a re-link of TableGen will notify Make to rebuild the .inc file.

llvm-svn: 6512
2003-06-01 04:52:51 +00:00
Anand Shukla
3f99ba3fc9 Add map info for arguments to call (copies)
llvm-svn: 6503
2003-06-01 02:48:23 +00:00
Vikram S. Adve
83409b0b78 Several bug fixes: globals in call operands were not being pulled out;
globals in some other places may not have been pulled out either;
globals in phi operands were being put just before the phi instead of
in the predecessor basic blocks.

llvm-svn: 6466
2003-05-31 07:34:57 +00:00
Vikram S. Adve
194a5862e0 Extensive changes to the way code generation occurs for function
call arguments and return values:
Now all copy operations before and after a call are generated during
selection instead of during register allocation.
The values are copied to virtual registers (or to the stack), but
in the former case these operands are marked with the correct physical
registers according to the calling convention.
Although this complicates scheduling and does not work well with
live range analysis, it simplifies the machine-dependent part of
register allocation.

llvm-svn: 6465
2003-05-31 07:32:01 +00:00
Vikram S. Adve
884f4c7a97 Reverting previous beautification changes.
llvm-svn: 6464
2003-05-31 07:27:17 +00:00
Misha Brukman
be11d6eed3 Removed useless code -- the byte order of output code is correct as is.
llvm-svn: 6462
2003-05-31 06:26:06 +00:00
Misha Brukman
32fae9b78a The 'rd' register is consistently mentioned last in instruction definitions.
Created new classes from which instructions inherit their ordering of fields.

llvm-svn: 6461
2003-05-31 06:25:19 +00:00
Misha Brukman
ee757debd1 * Put back into action SLL/SRL/SRA{r,i}6 instructions
* Fixed page numbers referring to the Sparc manual

llvm-svn: 6460
2003-05-31 06:24:29 +00:00
Misha Brukman
3fc07ad7b8 Code beautification, no functional changes.
llvm-svn: 6459
2003-05-31 06:22:37 +00:00
Misha Brukman
a49daf449e Enabling some of these passes causes lli to break
llvm-svn: 6457
2003-05-31 04:23:04 +00:00
Misha Brukman
0fae161230 The actual order of parameters in a 2-reg-immediate assembly instructions is
"rs1, imm, rd": most importantly, rd goes last.

llvm-svn: 6456
2003-05-31 04:22:26 +00:00