RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-01 05:01:59 +01:00
Code Issues Projects Releases Wiki Activity
llvm-mirror/test/CodeGen/AMDGPU/GlobalISel
History
Matt Arsenault 815b914730 AMDGPU/GlobalISel: Legalize some 16-bit round instructions
2019-12-24 09:53:01 -05:00
..
amdgpu-irtranslator.ll
AMDGPU/GlobalISel: Remove unnecesssary REQUIREs
2019-05-29 13:14:35 +00:00
artifact-combiner-anyext.mir
GlobalISel: Fix artifact combiner constant legality checks for vectors
2019-02-07 18:58:28 +00:00
artifact-combiner-extract.mir
GlobalISel: Partially implement lower for G_EXTRACT
2019-10-06 01:37:35 +00:00
artifact-combiner-sext.mir
[Legalizer] Making artifact combining order-independent
2019-12-13 15:45:18 -08:00
artifact-combiner-unmerge-values.mir
[GISel][ArtifactCombiner] Relax the constraint to combine unmerge with concat_vectors
2019-11-06 11:27:50 -08:00
artifact-combiner-zext.mir
AMDGPU/GlobalISel: Make 16-bit constants legal
2019-09-04 16:19:45 +00:00
combine-ext-legalizer.mir
[GlobalISel][AArch64][AMDGPU][X86] Teach LegalizationArtifactCombiner to combine trunc(g_constant).
2019-10-24 12:59:26 -07:00
function-returns.ll
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
global-value.ll
AMDGPU/GlobalISel: Legalize G_GLOBAL_VALUE
2019-10-01 01:06:43 +00:00
inst-select-add.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.class.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.class.s16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.cos.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.cos.s16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.cvt.pk.i16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.cvt.pk.u16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.cvt.pknorm.i16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.cvt.pknorm.u16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.cvt.pkrtz.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.exp.mir
Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
2019-09-19 16:26:14 +00:00
inst-select-amdgcn.fmed3.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.fmed3.s16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.fract.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.fract.s16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.ldexp.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.ldexp.s16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.mbcnt.lo.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.rcp.legacy.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.rcp.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.rcp.s16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.rsq.clamp.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.rsq.legacy.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.rsq.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.rsq.s16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.s.barrier.mir
AMDGPU/GlobalISel: Try generated matcher with intrinsics
2019-07-02 14:52:16 +00:00
inst-select-amdgcn.s.sendmsg.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.sffbh.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.sin.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgcn.sin.s16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-amdgpu-atomic-cmpxchg-flat.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-amdgpu-ffbh-u32.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-and.mir
AMDGPU/GlobalISel: Fix missing scc imp-def on scalar and/or/xor
2019-12-21 04:55:36 -05:00
inst-select-anyext.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-ashr.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-ashr.s16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-ashr.v2s16.mir
AMDGPU/GlobalISel: Select G_ASHR
2019-07-16 20:31:25 +00:00
inst-select-atomic-cmpxchg-local.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-atomicrmw-fadd-local.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-atomicrmw-xchg-local.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-bitcast.mir
AMDGPU/GlobalISel: Prepare some tests for store selection
2019-07-09 14:30:57 +00:00
inst-select-bitreverse.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-br.mir
AMDGPU/GlobalISel: Select G_BRCOND for scc conditions
2019-07-01 15:39:27 +00:00
inst-select-brcond.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-build-vector.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-concat-vectors.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-constant.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-copy.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-ctpop.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-extract.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-fabs.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-fadd.mir
AMDGPU/GlobalISel: Prepare some tests for store selection
2019-07-09 14:30:57 +00:00
inst-select-fcanonicalize.mir
AMDGPU: Refactor treatment of denormal mode
2019-11-19 19:55:43 +05:30
inst-select-fceil.mir
AMDGPU/GlobalISel: Legalize some 16-bit round instructions
2019-12-24 09:53:01 -05:00
inst-select-fceil.s16.mir
AMDGPU/GlobalISel: Legalize some 16-bit round instructions
2019-12-24 09:53:01 -05:00
inst-select-fcmp.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-fcmp.s16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-ffloor.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-ffloor.s16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-fmaxnum-ieee.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-fmaxnum-ieee.s16.mir
AMDGPU/GlobalISel: Fix tests without asserts
2019-07-22 12:43:41 +00:00
inst-select-fmaxnum-ieee.v2s16.mir
AMDGPU/GlobalISel: Fix tests without asserts
2019-07-22 12:43:41 +00:00
inst-select-fmaxnum.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-fmaxnum.s16.mir
AMDGPU/GlobalISel: Fix tests without asserts
2019-07-22 12:43:41 +00:00
inst-select-fmaxnum.v2s16.mir
AMDGPU/GlobalISel: Fix tests without asserts
2019-07-22 12:43:41 +00:00
inst-select-fminnum-ieee.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-fminnum-ieee.s16.mir
AMDGPU/GlobalISel: Fix tests without asserts
2019-07-22 12:43:41 +00:00
inst-select-fminnum-ieee.v2s16.mir
AMDGPU/GlobalISel: Fix tests without asserts
2019-07-22 12:43:41 +00:00
inst-select-fminnum.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-fminnum.s16.mir
AMDGPU/GlobalISel: Fix tests without asserts
2019-07-22 12:43:41 +00:00
inst-select-fminnum.v2s16.mir
AMDGPU/GlobalISel: Fix tests without asserts
2019-07-22 12:43:41 +00:00
inst-select-fmul.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-fneg.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-fptosi.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-fptoui.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-frame-index.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-frint.s16.mir
AMDGPU/GlobalISel: Legalize some 16-bit round instructions
2019-12-24 09:53:01 -05:00
inst-select-icmp.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-icmp.s64.mir
AMDGPU/GlobalISel: Improve icmp selection coverage.
2019-07-01 13:34:26 +00:00
inst-select-implicit-def.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-insert.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-intrinsic-trunc.mir
GlobalISel: Define equivalent node for G_INTRINSIC_TRUNC
2019-12-24 09:53:01 -05:00
inst-select-intrinsic-trunc.s16.mir
AMDGPU/GlobalISel: Legalize some 16-bit round instructions
2019-12-24 09:53:01 -05:00
inst-select-inttoptr.mir
AMDGPU/GlobalISel: Prepare some tests for store selection
2019-07-09 14:30:57 +00:00
inst-select-load-atomic-flat.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-load-atomic-global.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-load-atomic-local.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-load-constant.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-load-flat.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-load-global.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-load-local-128.mir
AMDGPU/GlobalISel: First pass at attempting to legalize load/stores
2019-09-10 16:20:14 +00:00
inst-select-load-local.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-load-private.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-load-smrd.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-lshr.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-lshr.s16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-lshr.v2s16.mir
AMDGPU/GlobalISel: Select G_LSHR
2019-07-16 20:25:43 +00:00
inst-select-merge-values.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-mul.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-or.mir
AMDGPU/GlobalISel: Fix missing scc imp-def on scalar and/or/xor
2019-12-21 04:55:36 -05:00
inst-select-phi-invalid.mir
AMDGPU/GlobalISel: Select G_PHI
2019-07-01 16:32:47 +00:00
inst-select-phi.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-ptr-add.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-ptr-mask.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-ptrtoint.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-select.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-sext.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-shl.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-shl.s16.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-shl.v2s16.mir
AMDGPU/GlobalISel: Select G_SHL
2019-07-16 20:15:30 +00:00
inst-select-sitofp.mir
GlobalISel: Lower s1 source G_SITOFP/G_UITOFP
2019-11-15 13:37:20 +05:30
inst-select-smax.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-smin.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-smulh.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-store-flat.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-store-global.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-store-local.mir
AMDGPU: Remove code address space predicates
2019-09-09 16:02:07 +00:00
inst-select-store-private.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
inst-select-sub.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-trunc.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-uaddo.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-uitofp.mir
GlobalISel: Lower s1 source G_SITOFP/G_UITOFP
2019-11-15 13:37:20 +05:30
inst-select-umax.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-umin.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-umulh.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-unmerge-values.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-usubo.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
inst-select-xor.mir
AMDGPU/GlobalISel: Fix missing scc imp-def on scalar and/or/xor
2019-12-21 04:55:36 -05:00
inst-select-zext.mir
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
irtranslator-amdgcn-sendmsg.ll
Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
2019-09-19 16:26:14 +00:00
irtranslator-amdgpu_kernel-system-sgprs.ll
AMDGPU/GlobalISel: Legalize workgroup ID intrinsics
2019-07-01 18:47:22 +00:00
irtranslator-amdgpu_kernel.ll
[AMDGPU] Don't create MachinePointerInfos with an UndefValue pointer
2019-12-23 15:58:19 +00:00
irtranslator-amdgpu_ps.ll
Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
2019-09-19 16:26:14 +00:00
irtranslator-amdgpu_vs.ll
Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
2019-09-19 16:26:14 +00:00
irtranslator-atomicrmw.ll
GlobalISel: Add G_ATOMICRMW_{FADD|FSUB}
2019-07-30 23:56:30 +00:00
irtranslator-fast-math-flags.ll
AMDGPU/GlobalISel: Legalize workitem ID intrinsics
2019-07-01 18:45:36 +00:00
irtranslator-fence.ll
GlobalISel: Add G_FENCE
2019-07-02 14:16:39 +00:00
irtranslator-function-args.ll
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
irtranslator-readnone-intrinsic-callsite.ll
GlobalISel: Ignore callsite attributes when picking intrinsic type
2019-06-17 17:01:35 +00:00
irtranslator-struct-return-intrinsics.ll
Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
2019-09-19 16:26:14 +00:00
lds-global-non-entry-func.ll
AMDGPU/GlobalISel: Implement LDS G_GLOBAL_VALUE
2019-09-09 17:13:44 +00:00
lds-global-value.ll
AMDGPU/GlobalISel: Implement LDS G_GLOBAL_VALUE
2019-09-09 17:13:44 +00:00
lds-size.ll
AMDGPU/GlobalISel: Implement LDS G_GLOBAL_VALUE
2019-09-09 17:13:44 +00:00
lds-zero-initializer.ll
AMDGPU/GlobalISel: Implement LDS G_GLOBAL_VALUE
2019-09-09 17:13:44 +00:00
legalize-add.mir
GlobalISel: Don't create G_UADDE with constant false carry in
2019-08-22 17:29:17 +00:00
legalize-addrspacecast.mir
[AMDGPU] Don't create MachinePointerInfos with an UndefValue pointer
2019-12-23 15:58:19 +00:00
legalize-amdgcn.if-invalid.mir
AMDGPU/GlobalISel: Custom lower control flow intrinsics
2019-07-01 18:40:23 +00:00
legalize-amdgcn.wavefrontsize.mir
AMDGPU/GlobalISel: Legalize wavefrontsize intrinsic
2019-09-09 15:20:49 +00:00
legalize-and.mir
AMDGPU/GlobalISel: Fix mutationIsSane assert v8s8 and
2019-10-03 17:50:29 +00:00
legalize-anyext.mir
GlobalISel: Implement moreElementsVector for G_UNMERGE_VALUES sources
2019-08-21 16:59:10 +00:00
legalize-ashr.mir
GlobalISel: Implement fewerElementsVector for G_BUILD_VECTOR
2019-10-09 22:44:43 +00:00
legalize-atomic-cmpxchg-with-success.mir
AMDGPU/GlobalISel: Handle flat/global G_ATOMIC_CMPXCHG
2019-10-25 13:11:09 -07:00
legalize-atomic-cmpxchg.mir
AMDGPU/GlobalISel: Handle flat/global G_ATOMIC_CMPXCHG
2019-10-25 13:11:09 -07:00
legalize-atomicrmw-add.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
legalize-atomicrmw-and.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
legalize-atomicrmw-fadd.mir
AMDGPU/GlobalISel: Handle G_ATOMICRMW_FADD
2019-08-01 03:33:15 +00:00
legalize-atomicrmw-max.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
legalize-atomicrmw-min.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
legalize-atomicrmw-nand.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
legalize-atomicrmw-or.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
legalize-atomicrmw-sub.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
legalize-atomicrmw-umax.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
legalize-atomicrmw-umin.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
legalize-atomicrmw-xchg-flat.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
legalize-atomicrmw-xchg.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
legalize-atomicrmw-xor.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
legalize-bitcast.mir
AMDGPU/GlobalISel: Expand G_BITCAST legality
2019-10-03 05:46:08 +00:00
legalize-bitreverse.mir
GlobalISel: Add basic legalization for G_BITREVERSE
2019-09-04 20:46:15 +00:00
legalize-block-addr.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
legalize-brcond.mir
AMDGPU/GlobalISel: Lower llvm.amdgcn.else
2019-12-24 09:53:01 -05:00
legalize-bswap.mir
GlobalISel: Lower scalarizing unmerge of a vector to shifts
2019-08-01 19:10:05 +00:00
legalize-build-vector-trunc.mir
AMDGPU/GlobalISel: Legalize G_BUILD_VECTOR_TRUNC
2019-09-09 17:04:18 +00:00
legalize-build-vector.mir
GlobalISel: Implement fewerElementsVector for G_BUILD_VECTOR
2019-10-09 22:44:43 +00:00
legalize-concat-vectors.mir
AMDGPU/GlobalISel: Legalize more concat_vectors
2019-07-09 14:17:31 +00:00
legalize-constant.mir
AMDGPU/GlobalISel: Make 16-bit constants legal
2019-09-04 16:19:45 +00:00
legalize-ctlz-zero-undef.mir
GlobalISel: Lower scalarizing unmerge of a vector to shifts
2019-08-01 19:10:05 +00:00
legalize-ctlz.mir
GlobalISel: Lower scalarizing unmerge of a vector to shifts
2019-08-01 19:10:05 +00:00
legalize-ctpop.mir
GlobalISel: Lower scalarizing unmerge of a vector to shifts
2019-08-01 19:10:05 +00:00
legalize-cttz-zero-undef.mir
GlobalISel: Lower scalarizing unmerge of a vector to shifts
2019-08-01 19:10:05 +00:00
legalize-cttz.mir
GlobalISel: Lower scalarizing unmerge of a vector to shifts
2019-08-01 19:10:05 +00:00
legalize-extract-vector-elt.mir
GlobalISel: Partially implement lower for G_EXTRACT
2019-10-06 01:37:35 +00:00
legalize-extract.mir
[GlobalISel][AArch64][AMDGPU][X86] Teach LegalizationArtifactCombiner to combine trunc(g_constant).
2019-10-24 12:59:26 -07:00
legalize-fabs.mir
AMDGPU/GlobalISel: Select G_FABS/G_FNEG
2019-09-10 17:19:46 +00:00
legalize-fadd.mir
[update_mir_test_checks] Handle MI flags properly
2019-10-14 22:01:58 +00:00
legalize-fcanonicalize.mir
GlobalISel: Implement fewerElementsVector for G_BUILD_VECTOR
2019-10-09 22:44:43 +00:00
legalize-fceil.mir
AMDGPU/GlobalISel: Legalize some 16-bit round instructions
2019-12-24 09:53:01 -05:00
legalize-fcmp.mir
[update_mir_test_checks] Handle MI flags properly
2019-10-14 22:01:58 +00:00
legalize-fconstant.mir
AMDGPU/GlobalISel: Make 16-bit constants legal
2019-09-04 16:19:45 +00:00
legalize-fcopysign.mir
[Legalizer] Making artifact combining order-independent
2019-12-13 15:45:18 -08:00
legalize-fcos.mir
[update_mir_test_checks] Handle MI flags properly
2019-10-14 22:01:58 +00:00
legalize-fdiv.mir
AMDGPU/GlobalISel: Fix misuse of div_scale intrinsics
2019-12-21 04:55:36 -05:00
legalize-fexp2.mir
GlobalISel: fewerElementsVector for a few more trivial ops
2019-01-25 04:03:38 +00:00
legalize-fexp.mir
GlobalISel: fewerElementsVector for a few more trivial ops
2019-01-25 04:03:38 +00:00
legalize-ffloor.mir
GlobalISel: Implement fewerElementsVector for G_BUILD_VECTOR
2019-10-09 22:44:43 +00:00
legalize-flog2.mir
GlobalISel: fewerElementsVector for a few more trivial ops
2019-01-25 04:03:38 +00:00
legalize-flog10.mir
GlobalISel: fewerElementsVector for a few more trivial ops
2019-01-25 04:03:38 +00:00
legalize-flog.mir
GlobalISel: fewerElementsVector for a few more trivial ops
2019-01-25 04:03:38 +00:00
legalize-fma.mir
GlobalISel: Implement fewerElementsVector for G_BUILD_VECTOR
2019-10-09 22:44:43 +00:00
legalize-fmad.s16.mir
AMDGPU: Be explicit about denormal mode in MIR tests
2019-11-19 19:55:43 +05:30
legalize-fmad.s32.mir
AMDGPU: Be explicit about denormal mode in MIR tests
2019-11-19 19:55:43 +05:30
legalize-fmad.s64.mir
AMDGPU: Be explicit about denormal mode in MIR tests
2019-11-19 19:55:43 +05:30
legalize-fmaxnum.mir
[update_mir_test_checks] Handle MI flags properly
2019-10-14 22:01:58 +00:00
legalize-fminnum.mir
[update_mir_test_checks] Handle MI flags properly
2019-10-14 22:01:58 +00:00
legalize-fmul.mir
[update_mir_test_checks] Handle MI flags properly
2019-10-14 22:01:58 +00:00
legalize-fneg.mir
AMDGPU/GlobalISel: Select G_FABS/G_FNEG
2019-09-10 17:19:46 +00:00
legalize-fpext.mir
[update_mir_test_checks] Handle MI flags properly
2019-10-14 22:01:58 +00:00
legalize-fpow.mir
GlobalISel: fewerElementsVector for a few more trivial ops
2019-01-25 04:03:38 +00:00
legalize-fptosi.mir
GlobalISel: Implement widenScalar for G_SITOFP/G_UITOFP sources
2019-10-01 01:06:48 +00:00
legalize-fptoui.mir
GlobalISel: Implement widenScalar for G_SITOFP/G_UITOFP sources
2019-10-01 01:06:48 +00:00
legalize-fptrunc.mir
GlobalISel: fewerElementsVector for more cast types
2019-01-25 04:37:33 +00:00
legalize-frint.mir
[GISel] Allow getConstantVRegVal() to return G_FCONSTANT values.
2019-10-10 21:46:26 +00:00
legalize-fsin.mir
[update_mir_test_checks] Handle MI flags properly
2019-10-14 22:01:58 +00:00
legalize-fsqrt.mir
GlobalISel: Implement fewerElementsVector for G_BUILD_VECTOR
2019-10-09 22:44:43 +00:00
legalize-fsub.mir
[update_mir_test_checks] Handle MI flags properly
2019-10-14 22:01:58 +00:00
legalize-icmp.mir
[GlobalISel][AArch64][AMDGPU][X86] Teach LegalizationArtifactCombiner to combine trunc(g_constant).
2019-10-24 12:59:26 -07:00
legalize-implicit-def.mir
AMDGPU/GlobalISel: Increase max legal size to 1024
2019-10-01 16:35:06 +00:00
legalize-insert-vector-elt.mir
GlobalISel: Implement widenScalar for G_INSERT_VECTOR_ELT
2019-10-25 13:55:07 -07:00
legalize-insert.mir
GlobalISel: Partially implement lower for G_INSERT
2019-10-07 19:13:27 +00:00
legalize-intrinsic-amdgcn-fdiv-fast.mir
[update_mir_test_checks] Handle MI flags properly
2019-10-14 22:01:58 +00:00
legalize-intrinsic-round.mir
GlobalISel: fewerElementsVector for intrinsic_trunc/intrinsic_round
2019-01-27 00:12:21 +00:00
legalize-intrinsic-trunc.mir
AMDGPU/GlobalISel: Legalize some 16-bit round instructions
2019-12-24 09:53:01 -05:00
legalize-inttoptr.mir
GlobalISel: Legalization for inttoptr/ptrtoint
2019-02-02 23:29:55 +00:00
legalize-load-constant-32bit.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
legalize-load-constant.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
legalize-load-flat.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
legalize-load-global.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
legalize-load-local.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
legalize-load-private.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
legalize-lshr.mir
GlobalISel: Implement fewerElementsVector for G_BUILD_VECTOR
2019-10-09 22:44:43 +00:00
legalize-merge-values-build-vector.mir
[GlobalISel] Restrict G_MERGE_VALUES capability and replace with new opcodes.
2018-12-10 18:44:58 +00:00
legalize-merge-values.mir
[GlobalISel][AArch64][AMDGPU][X86] Teach LegalizationArtifactCombiner to combine trunc(g_constant).
2019-10-24 12:59:26 -07:00
legalize-mul.mir
GlobalISel: Lower scalarizing unmerge of a vector to shifts
2019-08-01 19:10:05 +00:00
legalize-or.mir
[GlobalISel] Legalizer: Retry combining illegal artifacts as long as there new artifacts
2019-08-23 20:30:35 +00:00
legalize-phi.mir
[GISel][ArtifactCombiner] Relax the constraint to combine unmerge with concat_vectors
2019-11-06 11:27:50 -08:00
legalize-ptr-add.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
legalize-ptrtoint.mir
GlobalISel: Legalization for inttoptr/ptrtoint
2019-02-02 23:29:55 +00:00
legalize-saddo.mir
GlobalISel: Implement lower for G_SADDO/G_SSUBO
2019-10-16 20:46:32 +00:00
legalize-select.mir
[GlobalISel][AArch64][AMDGPU][X86] Teach LegalizationArtifactCombiner to combine trunc(g_constant).
2019-10-24 12:59:26 -07:00
legalize-sext.mir
[GlobalISel][AArch64][AMDGPU][X86] Teach LegalizationArtifactCombiner to combine trunc(g_constant).
2019-10-24 12:59:26 -07:00
legalize-sextload-flat.mir
[globalisel] Add G_SEXT_INREG
2019-08-09 21:11:20 +00:00
legalize-sextload-global.mir
GlobalISel: Support narrowing zextload/sextload
2019-01-22 19:02:10 +00:00
legalize-sextload-local.mir
GlobalISel: Support narrowing zextload/sextload
2019-01-22 19:02:10 +00:00
legalize-sextload-private.mir
GlobalISel: Support narrowing zextload/sextload
2019-01-22 19:02:10 +00:00
legalize-shl.mir
GlobalISel: Implement fewerElementsVector for G_BUILD_VECTOR
2019-10-09 22:44:43 +00:00
legalize-shuffle-vector.mir
GlobalISel: Implement fewerElementsVector for G_BUILD_VECTOR
2019-10-09 22:44:43 +00:00
legalize-sitofp.mir
GlobalISel: Lower s1 source G_SITOFP/G_UITOFP
2019-11-15 13:37:20 +05:30
legalize-smax.mir
GlobalISel: Implement fewerElementsVector for G_BUILD_VECTOR
2019-10-09 22:44:43 +00:00
legalize-smin.mir
GlobalISel: Implement fewerElementsVector for G_BUILD_VECTOR
2019-10-09 22:44:43 +00:00
legalize-smulh.mir
AMDGPU/GlobalISel: Legalize smulh/umulh and scalarize mul
2019-01-25 03:23:04 +00:00
legalize-ssubo.mir
GlobalISel: Implement lower for G_SADDO/G_SSUBO
2019-10-16 20:46:32 +00:00
legalize-store.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
legalize-sub.mir
GlobalISel: Lower scalarizing unmerge of a vector to shifts
2019-08-01 19:10:05 +00:00
legalize-uaddo.mir
[GlobalISel] Enable CSE in the IRTranslator & legalizer for -O0 with constants only.
2019-04-15 05:04:20 +00:00
legalize-uitofp.mir
GlobalISel: Lower s1 source G_SITOFP/G_UITOFP
2019-11-15 13:37:20 +05:30
legalize-umax.mir
GlobalISel: Implement fewerElementsVector for G_BUILD_VECTOR
2019-10-09 22:44:43 +00:00
legalize-umin.mir
GlobalISel: Implement fewerElementsVector for G_BUILD_VECTOR
2019-10-09 22:44:43 +00:00
legalize-umulh.mir
AMDGPU/GlobalISel: Legalize smulh/umulh and scalarize mul
2019-01-25 03:23:04 +00:00
legalize-unmerge-values-xfail.mir
AMDGPU/GlobalISel: Fix some crashs in g_unmerge_values/g_merge_values
2019-01-20 18:40:36 +00:00
legalize-unmerge-values.mir
[GlobalISel][AArch64][AMDGPU][X86] Teach LegalizationArtifactCombiner to combine trunc(g_constant).
2019-10-24 12:59:26 -07:00
legalize-usubo.mir
[GlobalISel] Enable CSE in the IRTranslator & legalizer for -O0 with constants only.
2019-04-15 05:04:20 +00:00
legalize-xor.mir
[GlobalISel] Legalizer: Retry combining illegal artifacts as long as there new artifacts
2019-08-23 20:30:35 +00:00
legalize-zext.mir
GlobalISel: Implement moreElementsVector for G_UNMERGE_VALUES sources
2019-08-21 16:59:10 +00:00
legalize-zextload-flat.mir
[MIPS GlobalISel] Select any extending load and truncating store
2019-02-08 14:27:23 +00:00
legalize-zextload-global.mir
GlobalISel: Support narrowing zextload/sextload
2019-01-22 19:02:10 +00:00
legalize-zextload-local.mir
GlobalISel: Support narrowing zextload/sextload
2019-01-22 19:02:10 +00:00
legalize-zextload-private.mir
GlobalISel: Support narrowing zextload/sextload
2019-01-22 19:02:10 +00:00
lit.local.cfg
…
llvm.amdgcn.dispatch.id.ll
AMDGPU/GlobalISel: Handle more input argument intrinsics
2019-07-01 18:50:50 +00:00
llvm.amdgcn.dispatch.ptr.ll
AMDGPU/GlobalISel: Handle more input argument intrinsics
2019-07-01 18:50:50 +00:00
llvm.amdgcn.end.cf.i32.ll
AMDGPU/GFX10: Apply the VMEM-to-scalar-write hazard also to writes to EXEC
2019-07-17 11:22:57 +00:00
llvm.amdgcn.end.cf.i64.ll
AMDGPU/GlobalISel: Select flat stores
2019-07-16 18:42:53 +00:00
llvm.amdgcn.if.break.i32.ll
AMDGPU: Change boolean content type to 0 or 1
2019-11-15 13:43:47 +05:30
llvm.amdgcn.if.break.i64.ll
AMDGPU: Change boolean content type to 0 or 1
2019-11-15 13:43:47 +05:30
llvm.amdgcn.implicit.buffer.ptr.ll
AMDGPU/GlobalISel: Handle more input argument intrinsics
2019-07-01 18:50:50 +00:00
llvm.amdgcn.init.exec.ll
AMDGPU/GlobalISel: Add support for init.exec intrinsics
2019-10-01 02:07:25 +00:00
llvm.amdgcn.init.exec.wave32.ll
AMDGPU/GlobalISel: Add support for init.exec intrinsics
2019-10-01 02:07:25 +00:00
llvm.amdgcn.is.private.ll
AMDGPU: Add intrinsics for address space identification
2019-09-05 02:20:39 +00:00
llvm.amdgcn.is.shared.ll
AMDGPU: Add intrinsics for address space identification
2019-09-05 02:20:39 +00:00
llvm.amdgcn.kernarg.segment.ptr.ll
AMDGPU/GlobalISel: Remove manual store select code
2019-08-01 03:52:40 +00:00
llvm.amdgcn.queue.ptr.ll
AMDGPU/GlobalISel: Handle more input argument intrinsics
2019-07-01 18:50:50 +00:00
llvm.amdgcn.raw.buffer.store.format.f16.ll
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
llvm.amdgcn.raw.buffer.store.format.f32.ll
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
llvm.amdgcn.raw.buffer.store.ll
AMDGPU: Relax 32-bit SGPR register class
2019-10-18 18:26:37 +00:00
llvm.amdgcn.s.sleep.ll
Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
2019-09-19 16:26:14 +00:00
llvm.amdgcn.workgroup.id.ll
AMDGPU/GlobalISel: Remove manual store select code
2019-08-01 03:52:40 +00:00
llvm.amdgcn.workitem.id.ll
AMDGPU/GlobalISel: Avoid creating shift of 0 in arg lowering
2019-10-01 01:44:46 +00:00
memory-legalizer-atomic-fence.ll
AMDGPU/GlobalISel: Select G_FENCE
2019-07-02 14:17:38 +00:00
no-legalize-atomic.mir
GlobalISel: Don't reduce elements for atomic load/store
2019-01-27 22:36:24 +00:00
regbankselect-add.mir
[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC
2018-05-05 21:19:59 +00:00
regbankselect-amdgcn-buffer-load.mir
AMDGPU/GlobalISel: Support wave32 waterfall loops
2019-10-04 08:35:35 +00:00
regbankselect-amdgcn-exp-compr.mir
[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC
2018-05-05 21:19:59 +00:00
regbankselect-amdgcn-exp.mir
Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
2019-09-19 16:26:14 +00:00
regbankselect-amdgcn-s-buffer-load.mir
AMDGPU/GlobalISel: Support wave32 waterfall loops
2019-10-04 08:35:35 +00:00
regbankselect-amdgcn.atomic.dec.mir
AMDGPU/GlobalISel: RegBankSelect for atomic.inc/atomic.dec
2019-06-29 00:39:20 +00:00
regbankselect-amdgcn.atomic.inc.mir
AMDGPU/GlobalISel: RegBankSelect for atomic.inc/atomic.dec
2019-06-29 00:39:20 +00:00
regbankselect-amdgcn.class.mir
AMDGPU/GlobalISel: Fix regbankselect for amdgcn.class
2019-06-25 01:07:22 +00:00
regbankselect-amdgcn.cvt.pkrtz.mir
[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC
2018-05-05 21:19:59 +00:00
regbankselect-amdgcn.div.fmas.mir
AMDGPU/GlobalISel: RegBankSelect for amdgcn.div.fmas
2019-06-29 00:25:53 +00:00
regbankselect-amdgcn.div.scale.mir
AMDGPU/GlobalISel: RegBankSelect for amdgcn.div.scale
2019-06-18 12:23:42 +00:00
regbankselect-amdgcn.ds.append.mir
AMDGPU/GlobalISel: RegBankSelect for some DS intrinsics
2019-06-29 00:33:13 +00:00
regbankselect-amdgcn.ds.bpermute.mir
AMDGPU/GlobalISel: RegBankSelect for some DS intrinsics
2019-06-29 00:33:13 +00:00
regbankselect-amdgcn.ds.consume.mir
AMDGPU/GlobalISel: RegBankSelect for some DS intrinsics
2019-06-29 00:33:13 +00:00
regbankselect-amdgcn.ds.fmax.mir
AMDGPU/GlobalISel: RegBankSelect for some DS intrinsics
2019-06-29 00:33:13 +00:00
regbankselect-amdgcn.ds.fmin.mir
AMDGPU/GlobalISel: RegBankSelect for some DS intrinsics
2019-06-29 00:33:13 +00:00
regbankselect-amdgcn.ds.gws.init.mir
AMDGPU/GlobalISel: RegBankSelect DS GWS intrinsics
2019-10-06 01:37:38 +00:00
regbankselect-amdgcn.ds.gws.sema.v.mir
AMDGPU/GlobalISel: RegBankSelect DS GWS intrinsics
2019-10-06 01:37:38 +00:00
regbankselect-amdgcn.ds.ordered.add.mir
AMDGPU/GlobalISel: RegBankSelect for DS ordered add/swap
2019-07-01 17:04:57 +00:00
regbankselect-amdgcn.ds.ordered.swap.mir
AMDGPU/GlobalISel: RegBankSelect for DS ordered add/swap
2019-07-01 17:04:57 +00:00
regbankselect-amdgcn.ds.permute.mir
AMDGPU/GlobalISel: RegBankSelect for some DS intrinsics
2019-06-29 00:33:13 +00:00
regbankselect-amdgcn.ds.swizzle.mir
Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
2019-09-19 16:26:14 +00:00
regbankselect-amdgcn.else.32.mir
AMDGPU/GlobalISel: Fix RegBankSelect for amdgcn.else
2019-09-13 03:55:49 +00:00
regbankselect-amdgcn.else.64.mir
AMDGPU/GlobalISel: Fix RegBankSelect for amdgcn.else
2019-09-13 03:55:49 +00:00
regbankselect-amdgcn.fcmp.mir
AMDGPU/GlobalISel: RegBankSelect for icmp/fcmp intrinsics
2019-06-29 00:28:52 +00:00
regbankselect-amdgcn.groupstaticsize.mir
AMDGPU/GlobalISel: RegBankSelect for some simple leaf intrinsics
2019-06-29 00:22:28 +00:00
regbankselect-amdgcn.icmp.mir
AMDGPU/GlobalISel: RegBankSelect for icmp/fcmp intrinsics
2019-06-29 00:28:52 +00:00
regbankselect-amdgcn.image.load.1d.ll
AMDGPU/GlobalISel: Support wave32 waterfall loops
2019-10-04 08:35:35 +00:00
regbankselect-amdgcn.image.sample.1d.ll
AMDGPU/GlobalISel: Support wave32 waterfall loops
2019-10-04 08:35:35 +00:00
regbankselect-amdgcn.kernarg.segment.ptr.mir
AMDGPU/GlobalISel: Add support for llvm.amdgcn.kernarg.segment.ptr
2018-06-25 16:17:48 +00:00
regbankselect-amdgcn.kill.mir
AMDGPU/GlobalISel: RegBankSelect for kill
2019-09-16 00:48:37 +00:00
regbankselect-amdgcn.mfma.mir
AMDGPU/GlobalISel: Add AGPR bank and RegBankSelect mfma intrinsics
2019-12-01 22:15:48 -08:00
regbankselect-amdgcn.raw.buffer.load.ll
AMDGPU/GlobalISel: Support wave32 waterfall loops
2019-10-04 08:35:35 +00:00
regbankselect-amdgcn.readfirstlane.mir
AMDGPU/GlobalISel: RegBankSelect for readlane/readfirstlane
2019-07-01 16:19:39 +00:00
regbankselect-amdgcn.readlane.mir
AMDGPU/GlobalISel: RegBankSelect for readlane/readfirstlane
2019-07-01 16:19:39 +00:00
regbankselect-amdgcn.s.get.waveid.in.workgroup.mir
AMDGPU/GlobalISel: RegBankSelect for some simple leaf intrinsics
2019-06-29 00:22:28 +00:00
regbankselect-amdgcn.s.getpc.mir
AMDGPU/GlobalISel: RegBankSelect for some simple leaf intrinsics
2019-06-29 00:22:28 +00:00
regbankselect-amdgcn.s.getreg.mir
AMDGPU/GlobalISel: RegBankSelect for some simple leaf intrinsics
2019-06-29 00:22:28 +00:00
regbankselect-amdgcn.s.memrealtime.mir
AMDGPU/GlobalISel: RegBankSelect for some simple leaf intrinsics
2019-06-29 00:22:28 +00:00
regbankselect-amdgcn.s.memtime.mir
AMDGPU/GlobalISel: RegBankSelect for some simple leaf intrinsics
2019-06-29 00:22:28 +00:00
regbankselect-amdgcn.s.sendmsg.mir
AMDGPU/GlobalISel: Fix RegBankSelect for sendmsg intrinsics
2019-10-06 01:37:34 +00:00
regbankselect-amdgcn.s.sendmsghalt.mir
AMDGPU/GlobalISel: Fix RegBankSelect for sendmsg intrinsics
2019-10-06 01:37:34 +00:00
regbankselect-amdgcn.struct.buffer.load.ll
AMDGPU/GlobalISel: Support wave32 waterfall loops
2019-10-04 08:35:35 +00:00
regbankselect-amdgcn.struct.buffer.store.ll
AMDGPU/GlobalISel: Support wave32 waterfall loops
2019-10-04 08:35:35 +00:00
regbankselect-amdgcn.update.dpp.mir
AMDGPU/GlobalISel: RegBankSelect for update.dpp
2019-06-29 00:44:36 +00:00
regbankselect-amdgcn.wqm.mir
AMDGPU/GlobalISel: RegBankSelect for WWM/WQM
2019-07-01 13:30:12 +00:00
regbankselect-amdgcn.wqm.vote.mir
AMDGPU/GlobalISel: Use vcc reg bank for amdgcn.wqm.vote
2019-07-01 13:30:09 +00:00
regbankselect-amdgcn.writelane.mir
AMDGPU/GlobalISel: RegBankSelect for amdgcn.writelane
2019-07-01 16:41:36 +00:00
regbankselect-amdgcn.wwm.mir
AMDGPU/GlobalISel: RegBankSelect for WWM/WQM
2019-07-01 13:30:12 +00:00
regbankselect-amdgpu-ffbh-u32.mir
GlobalISel: Add target pre-isel instructions
2019-10-07 18:43:29 +00:00
regbankselect-and-s1.mir
AMDGPU/GlobalISel: Allow scalar s1 and/or/xor
2019-07-15 20:20:18 +00:00
regbankselect-and.mir
AMDGPU/GlobalISel: Allow scalar s1 and/or/xor
2019-07-15 20:20:18 +00:00
regbankselect-anyext.mir
AMDGPU/GlobalISel: Fix RegBankSelect for s1 sext/zext/anyext
2019-06-24 14:53:58 +00:00
regbankselect-ashr.mir
AMDGPU/GlobalISel: Handle legality/regbanks for 32/64-bit shifts
2019-01-22 21:51:38 +00:00
regbankselect-atomic-cmpxchg.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
regbankselect-atomicrmw-add.mir
AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/atomic_cmpxchg
2018-12-20 00:33:49 +00:00
regbankselect-atomicrmw-and.mir
AMDGPU/GlobalISel: Fix broken tests
2019-07-22 13:33:11 +00:00
regbankselect-atomicrmw-fadd.mir
AMDGPU/GlobalISel: Handle G_ATOMICRMW_FADD
2019-08-01 03:33:15 +00:00
regbankselect-atomicrmw-max.mir
AMDGPU/GlobalISel: Fix broken tests
2019-07-22 13:33:11 +00:00
regbankselect-atomicrmw-min.mir
AMDGPU/GlobalISel: Fix broken tests
2019-07-22 13:33:11 +00:00
regbankselect-atomicrmw-or.mir
AMDGPU/GlobalISel: Fix broken tests
2019-07-22 13:33:11 +00:00
regbankselect-atomicrmw-sub.mir
AMDGPU/GlobalISel: Fix broken tests
2019-07-22 13:33:11 +00:00
regbankselect-atomicrmw-umax.mir
AMDGPU/GlobalISel: Fix broken tests
2019-07-22 13:33:11 +00:00
regbankselect-atomicrmw-umin.mir
AMDGPU/GlobalISel: Fix broken tests
2019-07-22 13:33:11 +00:00
regbankselect-atomicrmw-xchg.mir
AMDGPU/GlobalISel: Fix broken tests
2019-07-22 13:33:11 +00:00
regbankselect-atomicrmw-xor.mir
AMDGPU/GlobalISel: Fix broken tests
2019-07-22 13:33:11 +00:00
regbankselect-bitcast.mir
[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC
2018-05-05 21:19:59 +00:00
regbankselect-bitreverse.mir
AMDGPU/GlobalISel: Select G_BITREVERSE
2019-09-04 20:46:31 +00:00
regbankselect-block-addr.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
regbankselect-brcond.mir
AMDGPU/GlobalISel: Introduce vcc reg bank
2019-01-08 06:30:53 +00:00
regbankselect-bswap.mir
AMDGPU/GlobalISel: RegBankSelect some simple operations
2018-12-13 08:23:51 +00:00
regbankselect-build-vector-trunc.mir
AMDGPU/GlobalISel: Legalize G_BUILD_VECTOR_TRUNC
2019-09-09 17:04:18 +00:00
regbankselect-build-vector.mir
AMDGPU/GlobalISel: Fix RegBankSelect for G_BUILD_VECTOR
2019-07-01 13:40:17 +00:00
regbankselect-build-vector.v2s16.mir
AMDGPU/GlobalISel: Legalize G_BUILD_VECTOR v2s16
2019-09-09 18:57:51 +00:00
regbankselect-concat-vector.mir
AMDGPU/GlobalISel: RegBankSelect for G_CONCAT_VECTORS
2019-07-15 17:20:40 +00:00
regbankselect-constant.mir
AMDGPU/GlobalISel: Fix RegBankSelect for sendmsg intrinsics
2019-10-06 01:37:34 +00:00
regbankselect-ctlz-zero-undef.mir
AMDGPU/GlobalISel: RegBankSelect some simple operations
2018-12-13 08:23:51 +00:00
regbankselect-ctlz.mir
AMDGPU/GlobalISel: RegBankSelect some simple operations
2018-12-13 08:23:51 +00:00
regbankselect-ctpop.mir
AMDGPU/GlobalISel: RegBankSelect some simple operations
2018-12-13 08:23:51 +00:00
regbankselect-cttz-zero-undef.mir
AMDGPU/GlobalISel: RegBankSelect some simple operations
2018-12-13 08:23:51 +00:00
regbankselect-cttz.mir
AMDGPU/GlobalISel: RegBankSelect some simple operations
2018-12-13 08:23:51 +00:00
regbankselect-default.mir
GlobalISel: Enforce operand types for constants
2019-02-04 23:29:31 +00:00
regbankselect-extract-vector-elt.mir
AMDGPU/GlobalISel: Support wave32 waterfall loops
2019-10-04 08:35:35 +00:00
regbankselect-extract.mir
AMDGPU/GlobalISel: Fix RegBankSelect for 1024-bit values
2019-10-02 01:02:14 +00:00
regbankselect-fabs.mir
AMDGPU/GlobalISel: Legalize/regbankselect fneg/fabs/fsub
2018-12-18 09:19:03 +00:00
regbankselect-fadd.mir
[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC
2018-05-05 21:19:59 +00:00
regbankselect-fcanonicalize.mir
AMDGPU/GlobalISel: Fix RegBankSelect for G_FCANONICALIZE
2019-07-01 13:40:18 +00:00
regbankselect-fceil.mir
AMDGPU/GlobalISel: Fix RegBankSelect for G_FRINT and G_FCEIL
2019-09-16 14:14:37 +00:00
regbankselect-fcmp.mir
AMDGPU/GlobalISel: Introduce vcc reg bank
2019-01-08 06:30:53 +00:00
regbankselect-fexp2.mir
AMDGPU/GlobalISel: RegBankSelect for some fp ops
2018-12-21 03:14:45 +00:00
regbankselect-flog2.mir
AMDGPU/GlobalISel: RegBankSelect for some fp ops
2018-12-21 03:14:45 +00:00
regbankselect-fma.mir
AMDGPU: Legalize/regbankselect fma
2018-12-18 09:39:56 +00:00
regbankselect-fmul.mir
[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC
2018-05-05 21:19:59 +00:00
regbankselect-fneg.mir
AMDGPU/GlobalISel: Legalize/regbankselect fneg/fabs/fsub
2018-12-18 09:19:03 +00:00
regbankselect-fpext.mir
AMDGPU/GlobalISel: Regbank select for fpext
2019-01-20 18:35:41 +00:00
regbankselect-fptosi.mir
[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC
2018-05-05 21:19:59 +00:00
regbankselect-fptoui.mir
[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC
2018-05-05 21:19:59 +00:00
regbankselect-fptrunc.mir
AMDGPU/GlobalISel: RegBankSelect for fp conversions
2018-12-20 00:37:02 +00:00
regbankselect-frame-index.mir
AMDGPU/GlobalISel: Assume VGPR for G_FRAME_INDEX
2019-10-02 01:02:24 +00:00
regbankselect-frint.mir
AMDGPU/GlobalISel: Fix RegBankSelect for G_FRINT and G_FCEIL
2019-09-16 14:14:37 +00:00
regbankselect-fsqrt.mir
AMDGPU/GlobalISel: Legalize fsqrt
2019-02-07 18:14:39 +00:00
regbankselect-fsub.mir
AMDGPU/GlobalISel: Regbankselect for fsub
2018-12-19 09:07:58 +00:00
regbankselect-icmp.mir
AMDGPU/GlobalISel: Improve regbankselect for icmp s16
2019-07-09 14:13:09 +00:00
regbankselect-icmp.s16.mir
AMDGPU/GlobalISel: Improve regbankselect for icmp s16
2019-07-09 14:13:09 +00:00
regbankselect-illegal-copy.mir
Reapply "GlobalISel: Avoid producing Illegal copies in RegBankSelect"
2019-06-15 00:33:26 +00:00
regbankselect-insert-vector-elt.mir
AMDGPU/GlobalISel: Support wave32 waterfall loops
2019-10-04 08:35:35 +00:00
regbankselect-insert.mir
AMDGPU/GlobalISel: Define instruction mapping for G_INSERT
2018-08-11 00:51:54 +00:00
regbankselect-intrinsic-round.mir
AMDGPU/GlobalISel: RegBankSelect for some fp ops
2018-12-21 03:14:45 +00:00
regbankselect-intrinsic-trunc.mir
AMDGPU/GlobalISel: RegBankSelect for some fp ops
2018-12-21 03:14:45 +00:00
regbankselect-inttoptr.mir
AMDGPU/GlobalISel: Add support for G_INTTOPTR
2018-10-05 04:34:09 +00:00
regbankselect-load.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
regbankselect-lshr.mir
AMDGPU/GlobalISel: Handle legality/regbanks for 32/64-bit shifts
2019-01-22 21:51:38 +00:00
regbankselect-merge-values.mir
[AMDGPU] Add support for immediate operand for S_ENDPGM
2019-03-12 09:52:58 +00:00
regbankselect-mul.mir
[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC
2018-05-05 21:19:59 +00:00
regbankselect-or.mir
AMDGPU/GlobalISel: Allow scalar s1 and/or/xor
2019-07-15 20:20:18 +00:00
regbankselect-phi-s1.mir
AMDGPU/GlobalISel: Allow scalar s1 and/or/xor
2019-07-15 20:20:18 +00:00
regbankselect-phi.mir
AMDGPU/GlobalISel: Fix allowing non-boolean conditions for G_SELECT
2019-07-01 18:13:12 +00:00
regbankselect-ptr-add.mir
[globalisel] Rename G_GEP to G_PTR_ADD
2019-11-05 10:31:17 -08:00
regbankselect-ptrtoint.mir
GlobalISel: Verify pointer casts
2019-01-29 23:29:00 +00:00
regbankselect-reg-sequence.mir
Reapply "GlobalISel: Avoid producing Illegal copies in RegBankSelect"
2019-06-15 00:33:26 +00:00
regbankselect-sadde.mir
GlobalISel: Enforce operand types for constants
2019-02-04 23:29:31 +00:00
regbankselect-select.mir
AMDGPU/GlobalISel: Fix allowing non-boolean conditions for G_SELECT
2019-07-01 18:13:12 +00:00
regbankselect-sext.mir
AMDGPU/GlobalISel: Split VALU s64 G_ZEXT/G_SEXT in RegBankSelect
2019-06-24 17:54:12 +00:00
regbankselect-sextload.mir
AMDGPU/GlobalISel: RegBankSelect for G_ZEXTLOAD/G_SEXTLOAD
2019-09-10 16:42:37 +00:00
regbankselect-shl.mir
[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC
2018-05-05 21:19:59 +00:00
regbankselect-sitofp.mir
GlobalISel: Lower s1 source G_SITOFP/G_UITOFP
2019-11-15 13:37:20 +05:30
regbankselect-smax.mir
AMDGPU/GlobalISel: Handle 16-bit SALU min/max
2019-07-01 18:33:37 +00:00
regbankselect-smin.mir
AMDGPU/GlobalISel: Handle 16-bit SALU min/max
2019-07-01 18:33:37 +00:00
regbankselect-smulh.mir
Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
2019-09-19 16:26:14 +00:00
regbankselect-ssube.mir
GlobalISel: Enforce operand types for constants
2019-02-04 23:29:31 +00:00
regbankselect-sub.mir
[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC
2018-05-05 21:19:59 +00:00
regbankselect-trunc.mir
AMDGPU/GlobalISel: Fix ValueMapping tables for i1
2018-12-20 01:33:43 +00:00
regbankselect-uadde.mir
GlobalISel: Enforce operand types for constants
2019-02-04 23:29:31 +00:00
regbankselect-uaddo.mir
AMDGPU/GlobalISel: Introduce vcc reg bank
2019-01-08 06:30:53 +00:00
regbankselect-uitofp.mir
GlobalISel: Lower s1 source G_SITOFP/G_UITOFP
2019-11-15 13:37:20 +05:30
regbankselect-umax.mir
AMDGPU/GlobalISel: Handle 16-bit SALU min/max
2019-07-01 18:33:37 +00:00
regbankselect-umin.mir
AMDGPU/GlobalISel: Handle 16-bit SALU min/max
2019-07-01 18:33:37 +00:00
regbankselect-umulh.mir
Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
2019-09-19 16:26:14 +00:00
regbankselect-unmerge-values.mir
AMDGPU/GlobalISel: InstrMapping for G_UNMERGE_VALUES
2019-01-08 00:46:19 +00:00
regbankselect-usube.mir
GlobalISel: Enforce operand types for constants
2019-02-04 23:29:31 +00:00
regbankselect-usubo.mir
AMDGPU/GlobalISel: Introduce vcc reg bank
2019-01-08 06:30:53 +00:00
regbankselect-xor.mir
AMDGPU/GlobalISel: Allow scalar s1 and/or/xor
2019-07-15 20:20:18 +00:00
regbankselect-zext.mir
AMDGPU/GlobalISel: Split VALU s64 G_ZEXT/G_SEXT in RegBankSelect
2019-06-24 17:54:12 +00:00
regbankselect-zextload.mir
AMDGPU/GlobalISel: RegBankSelect for G_ZEXTLOAD/G_SEXTLOAD
2019-09-10 16:42:37 +00:00
regbankselect.mir
AMDGPU/GlobalISel: Remove unnecesssary REQUIREs
2019-05-29 13:14:35 +00:00
ret.ll
AMDGPU/GlobalISel: Handle most function return types
2019-07-26 02:36:05 +00:00
shader-epilogs.ll
AMDGPU/GlobalISel: Remove unnecesssary REQUIREs
2019-05-29 13:14:35 +00:00
smrd.ll
AMDGPU/GlobalISel: Remove unnecesssary REQUIREs
2019-05-29 13:14:35 +00:00