.. |
GlobalISel
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[PowerPC] [GlobalISel] Implementation of formal arguments lowering in the IRTranslator for the PPC backend
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2021-06-02 16:46:39 -06:00 |
2004-11-29-ShrCrash.ll
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2004-11-30-shift-crash.ll
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2004-11-30-shr-var-crash.ll
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2004-12-12-ZeroSizeCommon.ll
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2005-01-14-SetSelectCrash.ll
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2005-01-14-UndefLong.ll
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2005-08-12-rlwimi-crash.ll
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2005-09-02-LegalizeDuplicatesCalls.ll
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2005-10-08-ArithmeticRotate.ll
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2005-11-30-vastart-crash.ll
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2006-01-11-darwin-fp-argument.ll
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2006-01-20-ShiftPartsCrash.ll
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2006-04-01-FloatDoubleExtend.ll
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2006-04-05-splat-ish.ll
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2006-04-19-vmaddfp-crash.ll
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2006-05-12-rlwimi-crash.ll
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2006-07-07-ComputeMaskedBits.ll
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2006-07-19-stwbrx-crash.ll
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2006-08-11-RetVector.ll
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2006-08-15-SelectionCrash.ll
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2006-09-28-shift_64.ll
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2006-10-13-Miscompile.ll
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2006-10-17-brcc-miscompile.ll
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2006-10-17-ppc64-alloca.ll
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2006-11-10-DAGCombineMiscompile.ll
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2006-11-29-AltivecFPSplat.ll
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2006-12-07-LargeAlloca.ll
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2006-12-07-SelectCrash.ll
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2007-01-04-ArgExtension.ll
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2007-01-15-AsmDialect.ll
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2007-01-29-lbrx-asm.ll
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2007-01-31-InlineAsmAddrMode.ll
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2007-02-16-AlignPacked.ll
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2007-02-16-InlineAsmNConstraint.ll
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2007-02-23-lr-saved-twice.ll
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2007-03-24-cntlzd.ll
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2007-03-30-SpillerCrash.ll
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2007-04-24-InlineAsm-I-Modifier.ll
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2007-04-30-InlineAsmEarlyClobber.ll
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2007-05-03-InlineAsm-S-Constraint.ll
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2007-05-14-InlineAsmSelectCrash.ll
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2007-05-22-tailmerge-3.ll
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2007-05-30-dagcombine-miscomp.ll
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2007-06-28-BCCISelBug.ll
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2007-08-04-CoalescerAssert.ll
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2007-09-04-AltivecDST.ll
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2007-09-07-LoadStoreIdxForms.ll
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2007-09-08-unaligned.ll
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2007-09-11-RegCoalescerAssert.ll
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2007-09-12-LiveIntervalsAssert.ll
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2007-10-16-InlineAsmFrameOffset.ll
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2007-10-18-PtrArithmetic.ll
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2007-10-21-LocalRegAllocAssert2.ll
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2007-10-21-LocalRegAllocAssert.ll
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2007-11-04-CoalescerCrash.ll
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2007-11-16-landingpad-split.ll
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[SimplifyCFG] simplifyUnreachable(): erase instructions iff they are guaranteed to transfer execution to unreachable
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2021-07-03 10:45:44 +03:00 |
2007-11-19-VectorSplitting.ll
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2008-02-05-LiveIntervalsAssert.ll
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2008-02-09-LocalRegAllocAssert.ll
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2008-03-05-RegScavengerAssert.ll
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2008-03-17-RegScavengerCrash.ll
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2008-03-18-RegScavengerAssert.ll
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2008-03-24-AddressRegImm.ll
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2008-03-24-CoalescerBug.ll
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2008-03-26-CoalescerBug.ll
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2008-04-10-LiveIntervalCrash.ll
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2008-04-16-CoalescerBug.ll
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2008-04-23-CoalescerCrash.ll
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2008-05-01-ppc_fp128.ll
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2008-06-19-LegalizerCrash.ll
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2008-06-21-F128LoadStore.ll
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2008-06-23-LiveVariablesCrash.ll
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2008-07-10-SplatMiscompile.ll
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2008-07-15-Bswap.ll
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2008-07-15-Fabs.ll
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2008-07-15-SignExtendInreg.ll
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2008-07-17-Fneg.ll
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2008-07-24-PPC64-CCBug.ll
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2008-09-12-CoalescerBug.ll
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2008-10-17-AsmMatchingOperands.ll
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2008-10-28-f128-i32.ll
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2008-10-28-UnprocessedNode.ll
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2008-12-02-LegalizeTypeAssert.ll
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2009-01-16-DeclareISelBug.ll
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2009-03-17-LSRBug.ll
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2009-05-28-LegalizeBRCC.ll
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2009-07-16-InlineAsm-M-Operand.ll
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2009-08-17-inline-asm-addr-mode-breakage.ll
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2009-09-18-carrybit.ll
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2009-11-15-ProcImpDefsBug.ll
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2009-11-25-ImpDefBug.ll
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2010-02-04-EmptyGlobal.ll
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2010-02-12-saveCR.ll
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2010-03-09-indirect-call.ll
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2010-04-01-MachineCSEBug.ll
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2010-05-03-retaddr1.ll
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2010-10-11-Fast-Varargs.ll
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2010-12-18-PPCStackRefs.ll
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2011-12-05-NoSpillDupCR.ll
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2011-12-06-SpillAndRestoreCR.ll
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2011-12-08-DemandedBitsMiscompile.ll
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2012-09-16-TOC-entry-check.ll
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2012-10-11-dynalloc.ll
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2012-10-12-bitcast.ll
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2012-11-16-mischedcall.ll
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2013-05-15-preinc-fold.ll
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2013-07-01-PHIElimBug.mir
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
2016-01-07-BranchWeightCrash.ll
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2016-04-16-ADD8TLS.ll
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2016-04-17-combine.ll
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2016-04-28-setjmp.ll
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2018-09-19-sextinreg-vector-crash.ll
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a2-fp-basic.ll
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aa-tbaa.ll
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aantidep-def-ec.mir
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aantidep-inline-asm-use.ll
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Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
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2021-05-24 19:43:40 +02:00 |
absol-jump-table-enabled.ll
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add_cmp.ll
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add-fi.ll
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addc.ll
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adde_return_type.ll
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addegluecrash.ll
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addi-licm.ll
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addi-offset-fold.ll
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addi-reassoc.ll
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addisdtprelha-nonr3.mir
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
addrfuncstr.ll
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Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
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2021-05-24 19:43:40 +02:00 |
addrspacecast.ll
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addze.ll
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aggressive-anti-dep-breaker-subreg.ll
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aix32-cc-abi-vaarg.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix32-crsave.mir
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix32-p8-scalar_vector_conversions.ll
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[PowerPC] Canonicalize shuffles on big endian targets as well
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2021-04-20 07:29:47 -05:00 |
aix32-vector-vararg-callee-split.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix32-vector-vararg-callee.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix32-vector-vararg-caller-split.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix32-vector-vararg-fixed-callee.ll
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[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
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2021-07-16 09:28:48 -05:00 |
aix64-cc-abi-vaarg.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix64-cc-byval.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix64-vector-vararg-callee.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix64-vector-vararg-fixed-callee.ll
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[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
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2021-07-16 09:28:48 -05:00 |
aix-alias-unsupported.ll
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aix-alias.ll
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aix-AppendingLinkage.ll
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aix-available-externally-linkage.ll
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aix-base-pointer.ll
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aix-bytestring.ll
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aix-calleesavedregs.ll
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aix-cc-abi.ll
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[AIX] Adjust CSR order to avoid breaking ABI regarding traceback
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2021-07-03 04:45:26 +00:00 |
aix-cc-altivec.ll
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aix-cc-byval-limitation3.ll
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aix-cc-byval-mem.ll
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[AIX] Adjust CSR order to avoid breaking ABI regarding traceback
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2021-07-03 04:45:26 +00:00 |
aix-cc-byval-split.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix-cc-byval.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix-cc-ext-vec-abi.ll
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aix-complex.ll
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aix-crspill.ll
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aix-csr-alloc.ll
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[AIX] Adjust CSR order to avoid breaking ABI regarding traceback
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2021-07-03 04:45:26 +00:00 |
aix-csr-vector-extabi.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix-csr-vector.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix-csr.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix-dfltabi-rsrvd-reg.ll
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[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
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2021-07-16 09:28:48 -05:00 |
aix-emit-tracebacktable-clobber-register.ll
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[AIX][XCOFF] Use bit order of has_vec and longtbtable bits as defined in AIX header debug.h
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2021-07-09 11:06:46 -04:00 |
aix-emit-tracebacktable-ssp.ll
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[AIX] Add traceback ssp canary bit support
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2021-06-10 02:40:02 +00:00 |
aix-emit-tracebacktable-vectorinfo_hasvarg.ll
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[AIX][XCOFF] Use bit order of has_vec and longtbtable bits as defined in AIX header debug.h
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2021-07-09 11:06:46 -04:00 |
aix-emit-tracebacktable-vectorinfo.ll
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[AIX][XCOFF] Use bit order of has_vec and longtbtable bits as defined in AIX header debug.h
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2021-07-09 11:06:46 -04:00 |
aix-emit-tracebacktable.ll
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[AIX][XCOFF][Bug-Fixed] parse the parameter type of the traceback table
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2021-07-15 16:54:22 -04:00 |
aix-exception.ll
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[AIX][XCOFF] Use bit order of has_vec and longtbtable bits as defined in AIX header debug.h
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2021-07-09 11:06:46 -04:00 |
aix-extern-weak.ll
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[XCOFF] add C_FILE symbol at index 0 of symbol table.
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2021-02-23 22:21:56 -05:00 |
aix-extern.ll
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[XCOFF] add C_FILE symbol at index 0 of symbol table.
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2021-02-23 22:21:56 -05:00 |
aix-external-sym-sdnode-lowering.ll
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aix-filename-absolute-path.ll
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[AIX] Emit version string in .file directive
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2021-07-12 17:03:52 +00:00 |
aix-filename-relative-path.ll
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[AIX] Emit version string in .file directive
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2021-07-12 17:03:52 +00:00 |
aix-filename-special-character-double-quotation.ll
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[AIX] Emit version string in .file directive
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2021-07-12 17:03:52 +00:00 |
aix-filename-special-character-single-quotation.ll
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[AIX] Emit version string in .file directive
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2021-07-12 17:03:52 +00:00 |
aix-framepointer-save-restore.ll
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[PowerPC][AIX] Re-generate test aix-framepointer-save-restore.ll. NFC.
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2021-06-30 05:37:49 +00:00 |
aix-func-align.ll
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aix-func-dsc-gen.ll
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[XCOFF] add C_FILE symbol at index 0 of symbol table.
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2021-02-23 22:21:56 -05:00 |
aix-ignore-xcoff-visibility.ll
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aix-indirect-call.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix-inlineasm-reserved-reg-dflt-warn.ll
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[PowerPC][AIX] Enable the default AltiVec ABI on AIX
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2021-03-05 12:46:27 -05:00 |
aix-insert-extract.ll
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[AIX] Allow safe for 32bit P9 VSX extract and insert pattern matches
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2021-04-27 07:27:43 -04:00 |
aix-internal.ll
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aix-LinkOnceAnyLinkage.ll
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aix-LinkOnceODRLinkage.ll
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aix-llvm-intrinsic.ll
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[XCOFF] add C_FILE symbol at index 0 of symbol table.
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2021-02-23 22:21:56 -05:00 |
aix-lower-block-address.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix-lower-constant-pool-index.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix-lower-jump-table.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix-lr.ll
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aix-nest-param.ll
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aix-nonzero-zerofill.ll
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aix-overflow-toc.py
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[AIX][AsmPrinter] Print Symbol in comments for TOC load
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2021-05-25 16:37:40 +00:00 |
aix-p8vector-liveins.ll
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[AIX] Use VSSRC/VSFRC Register classes for f32/f64 callee arguments on P8 and above
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2021-07-07 09:18:20 -04:00 |
aix-p9-insert-extract.ll
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[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
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2021-07-16 09:28:48 -05:00 |
aix-p9-xxinsertw-xxextractuw.ll
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[PowerPC] Relax register superclasses for paired memops
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2021-06-11 14:54:03 +08:00 |
aix-personality-alias.ll
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[XCOFF] Handle the case when personality routine is an alias
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2021-04-29 22:03:30 +00:00 |
aix-prefixed-instruction-boundary.mir
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[AIX][Power10] Restrict prefixed instructions from crossing the 64byte boundary
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2021-04-27 11:55:18 -05:00 |
aix-print-pc.mir
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aix-readonly-with-relocation.ll
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aix-reference-func-addr-const.ll
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aix-return55.ll
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[test] Avoid llvm-readelf/llvm-readobj one-dash long options and deprecated aliases (e.g. --file-headers)
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2021-07-15 10:26:21 -07:00 |
aix-space.ll
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aix-sret-param.ll
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aix-static-init-default-priority.ll
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aix-static-init-key-object.ll
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aix-static-init-no-unique-module-id.ll
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aix-static-init-non-default-priority.ll
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aix-tls-gd-double.ll
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Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
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2021-05-24 19:43:40 +02:00 |
aix-tls-gd-int.ll
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Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
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2021-05-24 19:43:40 +02:00 |
aix-tls-gd-longlong.ll
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Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
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2021-05-24 19:43:40 +02:00 |
aix-tls-variables-ppc32.ll
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[AIX][TLS] Generate TLS variables in assembly files
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2021-03-02 18:22:48 -06:00 |
aix-tls-variables-ppc64.ll
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[AIX][TLS] Generate TLS variables in assembly files
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2021-03-02 18:22:48 -06:00 |
aix-tls-xcoff-reloc-large.ll
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[test] Change -t to --syms and -s to -S for llvm-readobj RUN lines
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2021-06-29 11:50:31 -07:00 |
aix-tls-xcoff-reloc.ll
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[test] Change -t to --syms and -s to -S for llvm-readobj RUN lines
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2021-06-29 11:50:31 -07:00 |
aix-tls-xcoff-variables.ll
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[AIX][TLS] Add support for TLS variables to XCOFF object writer
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2021-04-06 10:46:07 -05:00 |
aix-tracetable-csr.ll
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[AIX][XCOFF] Use bit order of has_vec and longtbtable bits as defined in AIX header debug.h
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2021-07-09 11:06:46 -04:00 |
aix-trampoline.ll
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aix-undef-func-call.ll
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aix-user-defined-memcpy.ll
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[XCOFF] add C_FILE symbol at index 0 of symbol table.
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2021-02-23 22:21:56 -05:00 |
aix-vec_extract_p9_2.ll
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[AIX] Allow safe for 32bit P9 VSX extract and insert pattern matches
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2021-04-27 07:27:43 -04:00 |
aix-vec_extract_p9.ll
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[AIX] Allow safe for 32bit P9 VSX extract and insert pattern matches
|
2021-04-27 07:27:43 -04:00 |
aix-vec_insert_elt.ll
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[PowerPC] Improve f32 to i32 bitcast code gen
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2021-05-31 16:00:58 -05:00 |
aix-vec-arg-spills-callee.ll
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[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
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2021-07-16 09:28:48 -05:00 |
aix-vec-arg-spills-mir.ll
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[PowerPC] Custom Lowering BUILD_VECTOR for v2i64 for P7 as well
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2021-07-12 17:56:10 +00:00 |
aix-vec-arg-spills.ll
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[PowerPC] Custom Lowering BUILD_VECTOR for v2i64 for P7 as well
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2021-07-12 17:56:10 +00:00 |
aix-vector-stack-caller.ll
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[PowerPC][AIX] Add support for vector arg passing on the stack.
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2021-02-18 13:32:40 -05:00 |
aix-vector-stack.ll
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[PowerPC][AIX] Add support for vector arg passing on the stack.
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2021-02-18 13:32:40 -05:00 |
aix-vector-vararg-caller.ll
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CodeGen: Print/parse LLTs in MachineMemOperands
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2021-06-30 16:54:13 -04:00 |
aix-vector-vararg-fixed-caller.ll
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[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
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2021-07-16 09:28:48 -05:00 |
aix-vsx-splatimm.ll
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[PowerPC] Fix the splat immediate in PPCMIPeephole depending on if we have an Altivec and VSX splat instruction.
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2021-07-12 16:20:11 -05:00 |
aix-weak-undef-func-call.ll
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aix-weak.ll
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[XCOFF] add C_FILE symbol at index 0 of symbol table.
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2021-02-23 22:21:56 -05:00 |
aix-WeakODRLinkage.ll
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aix-xcoff-data-only-notoc.ll
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aix-xcoff-data-sections.ll
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[test] Avoid llvm-readelf/llvm-readobj one-dash long options and deprecated aliases (e.g. --file-headers)
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2021-07-15 10:26:21 -07:00 |
aix-xcoff-data.ll
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[AIX] Print printable byte list as quoted string
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2021-05-21 02:37:55 +00:00 |
aix-xcoff-endian-error.ll
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aix-xcoff-error-explicit-data-section.ll
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aix-xcoff-explicit-section.ll
|
[test] Avoid llvm-readelf/llvm-readobj one-dash long options and deprecated aliases (e.g. --file-headers)
|
2021-07-15 10:26:21 -07:00 |
aix-xcoff-externL.ll
|
|
|
aix-xcoff-funcsect.ll
|
|
|
aix-xcoff-huge-relocs.ll
|
[test] Put aix-xcoff-huge-relocs.ll under expensive checks
|
2021-05-10 13:44:29 -07:00 |
aix-xcoff-lcomm.ll
|
[XCOFF] add C_FILE symbol at index 0 of symbol table.
|
2021-02-23 22:21:56 -05:00 |
aix-xcoff-lower-comm.ll
|
[test] Change -t to --syms and -s to -S for llvm-readobj RUN lines
|
2021-06-29 11:50:31 -07:00 |
aix-xcoff-mergeable-const.ll
|
[test] Avoid llvm-readelf/llvm-readobj one-dash long options and deprecated aliases (e.g. --file-headers)
|
2021-07-15 10:26:21 -07:00 |
aix-xcoff-mergeable-str.ll
|
[AIX] Print printable byte list as quoted string
|
2021-05-21 02:37:55 +00:00 |
aix-xcoff-reloc-large.ll
|
|
|
aix-xcoff-reloc-symb.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
aix-xcoff-reloc.ll
|
[test] Change -t to --syms and -s to -S for llvm-readobj RUN lines
|
2021-06-29 11:50:31 -07:00 |
aix-xcoff-rodata.ll
|
[AIX] Print printable byte list as quoted string
|
2021-05-21 02:37:55 +00:00 |
aix-xcoff-symbol-rename.ll
|
[XCOFF] add C_FILE symbol at index 0 of symbol table.
|
2021-02-23 22:21:56 -05:00 |
aix-xcoff-textdisassembly.ll
|
|
|
aix-xcoff-toc.ll
|
|
|
aix-xcoff-used.ll
|
|
|
aix-xcoff-visibility.ll
|
|
|
alias.ll
|
|
|
align.ll
|
|
|
alignlongjumptest.mir
|
|
|
alloca-crspill.ll
|
|
|
allocate-r0.ll
|
|
|
altivec-ord.ll
|
|
|
and_add.ll
|
|
|
and_sext.ll
|
|
|
and_sra.ll
|
|
|
and-branch.ll
|
|
|
and-elim.ll
|
|
|
and-imm.ll
|
|
|
and-mask.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
andc.ll
|
|
|
anon_aggr.ll
|
|
|
anyext_srl.ll
|
|
|
arg_promotion.ll
|
[PowerPC] Prevent argument promotion of types with size greater than 128 bits
|
2021-05-04 12:09:25 -05:00 |
arr-fp-arg-no-copy.ll
|
|
|
ashr-neg1.ll
|
|
|
asm-constraints.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
asm-dialect.ll
|
|
|
asm-printer-topological-order.ll
|
|
|
asm-template-I.ll
|
[llvm][PPC] Add missing case for 'I' asm memory operands
|
2021-06-10 12:52:50 +02:00 |
asm-Zy.ll
|
|
|
asym-regclass-copy.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
atomic-1.ll
|
|
|
atomic-2.ll
|
|
|
atomic-float.ll
|
[PowerPC] Fallback to base's implementation of shouldExpandAtomicCmpXchgInIR and shouldExpandAtomicCmpXchgInIR
|
2021-07-20 06:14:24 +00:00 |
atomic-minmax.ll
|
|
|
Atomics-64.ll
|
|
|
atomics-constant.ll
|
|
|
atomics-fences.ll
|
|
|
atomics-i8-ldst.ll
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
|
2021-05-20 20:34:23 +01:00 |
atomics-i16-ldst.ll
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
|
2021-05-20 20:34:23 +01:00 |
atomics-i32-ldst.ll
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
|
2021-05-20 20:34:23 +01:00 |
atomics-i64-ldst.ll
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
|
2021-05-20 20:34:23 +01:00 |
atomics-i128.ll
|
[PowerPC] Generate inlined quadword lock free atomic operations via AtomicExpand
|
2021-07-15 01:12:09 +00:00 |
atomics-indexed.ll
|
|
|
atomics-regression.ll
|
[AtomicExpand] Merge cmpxchg success and failure ordering when appropriate.
|
2021-06-03 11:34:35 -07:00 |
atomics.ll
|
[PowerPC] Add fix to partword atomic operations
|
2021-05-20 12:36:37 -05:00 |
available-externally.ll
|
|
|
basic-toc-data-def.ll
|
[XCOFF][AIX] Add Global Variables Directly to TOC for 32 bit AIX
|
2021-04-30 14:48:02 +00:00 |
basic-toc-data-extern.ll
|
[XCOFF][AIX] Add Global Variables Directly to TOC for 32 bit AIX
|
2021-04-30 14:48:02 +00:00 |
basic-toc-data-local-linkage.ll
|
[XCOFF][AIX] Add Global Variables Directly to TOC for 32 bit AIX
|
2021-04-30 14:48:02 +00:00 |
bdzlr.ll
|
|
|
bfloat16-outer-product.ll
|
|
|
big-endian-actual-args.ll
|
|
|
big-endian-call-result.ll
|
|
|
big-endian-formal-args.ll
|
|
|
big-endian-store-forward.ll
|
|
|
bitcast-peephole.mir
|
|
|
bitcasts-direct-move.ll
|
[PowerPC] Improve f32 to i32 bitcast code gen
|
2021-05-31 16:00:58 -05:00 |
bitfieldinsert.ll
|
|
|
block-placement-1.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
block-placement.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
blockaddress.ll
|
|
|
bool-math.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
BoolRetToIntTest-2.ll
|
|
|
BoolRetToIntTest.ll
|
|
|
botheightreduce.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
bperm.ll
|
|
|
branch_coalesce.ll
|
|
|
branch_selector.ll
|
|
|
branch-hint.ll
|
|
|
branch-opt.ll
|
|
|
brcond.ll
|
|
|
BreakableToken-reduced.ll
|
|
|
bswap64.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
bswap-load-store.ll
|
[PowerPC] Re-enable combine for i64 BSWAP on targets without LDBRX
|
2021-07-06 20:42:01 -05:00 |
build-vector-allones.ll
|
[PowerPC] Custom Lowering BUILD_VECTOR for v2i64 for P7 as well
|
2021-07-12 17:56:10 +00:00 |
build-vector-tests.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
buildvec_canonicalize.ll
|
[NFC] [PowerPC] Remove unsafe-fp-math in some tests
|
2021-03-10 17:27:21 +08:00 |
builtins-ppc-elf2-abi.ll
|
[PowerPC] Add vec_ctsl and vec_ctul to altivec.h
|
2021-04-23 11:03:38 -05:00 |
builtins-ppc-p8vector.ll
|
|
|
builtins-ppc-p9-darn.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
builtins-ppc-p9-f128.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
builtins-ppc-p10permute.ll
|
|
|
builtins-ppc-p10vsx.ll
|
|
|
builtins-ppc-xlcompat-check-ldarx-opt.ll
|
[PowerPC] Extra test case for LDARX
|
2021-07-20 14:15:15 -05:00 |
builtins-ppc-xlcompat-cmpb-32.ll
|
[PowerPC] Add PowerPC cmpb builtin and emit target indepedent code for XL compatibility
|
2021-07-20 13:06:22 -05:00 |
builtins-ppc-xlcompat-cmpb-64.ll
|
[PowerPC] Add PowerPC cmpb builtin and emit target indepedent code for XL compatibility
|
2021-07-20 13:06:22 -05:00 |
builtins-ppc-xlcompat-compare-64bit-only.ll
|
[PowerPC] Add PowerPC compare and multiply related builtins and instrinsics for XL compatibility
|
2021-07-13 16:55:09 -05:00 |
builtins-ppc-xlcompat-compare.ll
|
[PowerPC] Add PowerPC compare and multiply related builtins and instrinsics for XL compatibility
|
2021-07-13 16:55:09 -05:00 |
builtins-ppc-xlcompat-conversionfunc.ll
|
[PowerPC] Implement trap and conversion builtins for XL compatibility
|
2021-07-12 11:04:17 -05:00 |
builtins-ppc-xlcompat-fp.ll
|
[PowerPC] Removing a REQUIRES line from llvm test
|
2021-07-21 10:52:23 -05:00 |
builtins-ppc-xlcompat-load-store-reversed-64bit-only.ll
|
[PowerPC] Add PowerPC population count, reversed load and store related builtins and instrinsics for XL compatibility
|
2021-07-15 17:23:56 -05:00 |
builtins-ppc-xlcompat-load-store-reversed.ll
|
[PowerPC] Add PowerPC population count, reversed load and store related builtins and instrinsics for XL compatibility
|
2021-07-15 17:23:56 -05:00 |
builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
|
[PowerPC] Fix L[D|W]ARX Implementation
|
2021-07-13 11:02:07 -05:00 |
builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
|
[PowerPC] Add PowerPC "__stbcx" builtin and intrinsic for XL compatibility
|
2021-07-22 10:48:46 -05:00 |
builtins-ppc-xlcompat-math.ll
|
[PowerPC] Implement intrinsics for mtfsf[i]
|
2021-07-16 16:26:11 -05:00 |
builtins-ppc-xlcompat-mfspr-mtspr-64bit-only.ll
|
[PowerPC] Implemented mtmsr, mfspr, mtspr Builtins
|
2021-07-20 17:51:00 -05:00 |
builtins-ppc-xlcompat-mfspr-mtspr-aix32.ll
|
[PowerPC] Implemented mtmsr, mfspr, mtspr Builtins
|
2021-07-20 17:51:00 -05:00 |
builtins-ppc-xlcompat-move-tofrom-regs.ll
|
[PowerPC] Implemented mtmsr, mfspr, mtspr Builtins
|
2021-07-20 17:51:00 -05:00 |
builtins-ppc-xlcompat-msync.ll
|
[PowerPC] Fix popcntb XL Compat Builtin for 32bit
|
2021-07-15 13:19:47 -05:00 |
builtins-ppc-xlcompat-multiply-64bit-only.ll
|
[PowerPC] Add PowerPC compare and multiply related builtins and instrinsics for XL compatibility
|
2021-07-13 16:55:09 -05:00 |
builtins-ppc-xlcompat-multiply.ll
|
[PowerPC] Add PowerPC compare and multiply related builtins and instrinsics for XL compatibility
|
2021-07-13 16:55:09 -05:00 |
builtins-ppc-xlcompat-popcnt.ll
|
[PowerPC] Add PowerPC population count, reversed load and store related builtins and instrinsics for XL compatibility
|
2021-07-15 17:23:56 -05:00 |
builtins-ppc-xlcompat-prefetch.ll
|
[tests] Move new tests into the PowerPC folder
|
2021-07-20 15:37:56 -07:00 |
builtins-ppc-xlcompat-pwr9-64bit.ll
|
[PowerPC] Implement XL compact math builtins
|
2021-07-16 13:21:13 -05:00 |
builtins-ppc-xlcompat-pwr9.ll
|
[PowerPC] Implement XL compact math builtins
|
2021-07-16 13:21:13 -05:00 |
builtins-ppc-xlcompat-stfiw.ll
|
[PowerPC] Store, load, move from and to registers related builtins
|
2021-07-20 15:46:14 -05:00 |
builtins-ppc-xlcompat-sync-32.ll
|
[PowerPC] Semachecking for XL compat builtin icbt
|
2021-07-20 11:05:22 -05:00 |
builtins-ppc-xlcompat-sync-64.ll
|
[PowerPC] Semachecking for XL compat builtin icbt
|
2021-07-20 11:05:22 -05:00 |
builtins-ppc-xlcompat-trap-64bit-only.ll
|
[PowerPC] Implement trap and conversion builtins for XL compatibility
|
2021-07-12 11:04:17 -05:00 |
builtins-ppc-xlcompat-trap.ll
|
[PowerPC] Implement trap and conversion builtins for XL compatibility
|
2021-07-12 11:04:17 -05:00 |
bv-pres-v8i1.ll
|
|
|
bv-widen-undef.ll
|
|
|
byval-agg-info.ll
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
byval-aliased.ll
|
|
|
byval.ll
|
[PowerPC] add a testcase for byval parameter; NFC
|
2021-07-01 09:42:12 +00:00 |
calls.ll
|
|
|
can-lower-ret.ll
|
|
|
cannonicalize-vector-shifts.ll
|
[AIX] Allow safe for 32bit P8 VSX pattern matching
|
2021-04-14 08:12:48 -04:00 |
canonical-merge-shuffles.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
cc.ll
|
|
|
change-no-infs.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
check-cpu.ll
|
|
|
cmp_elimination.ll
|
|
|
cmp-cmp.ll
|
|
|
cmpb-ppc32.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
cmpb.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
coalesce-ext.ll
|
|
|
code-align.ll
|
|
|
codemodel.ll
|
|
|
coldcc2.ll
|
|
|
coldcc.ll
|
|
|
collapse-rotates.mir
|
|
|
combine_ext_trunc.ll
|
|
|
combine-fneg.ll
|
[DAGCombine] reassoc flag shouldn't enable contract
|
2021-06-21 21:15:43 +00:00 |
combine-setcc.ll
|
|
|
combine-sext-and-shl-after-isel.ll
|
|
|
combine-to-mulh-shift-amount.ll
|
|
|
combine-to-pre-index-store-crash.ll
|
|
|
compare-duplicate.ll
|
|
|
compare-simm.ll
|
|
|
CompareEliminationSpillIssue.ll
|
|
|
complex-return.ll
|
|
|
compute-regpressure.ll
|
|
|
constant-combines.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
constant-pool.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
constants-i64.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
constants.ll
|
|
|
convert-ri-addi-to-ri.mir
|
[PowerPC] fixup killed flags for ri + addi to ri transformation
|
2021-04-07 22:04:08 -04:00 |
convert-rr-to-ri-instr-add.mir
|
|
|
convert-rr-to-ri-instrs-kill-flag.mir
|
|
|
convert-rr-to-ri-instrs-out-of-range.mir
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
convert-rr-to-ri-instrs-R0-special-handling.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
convert-rr-to-ri-instrs.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
convert-rr-to-ri-p9-vector.mir
|
|
|
copysignl.ll
|
|
|
cr1eq-no-extra-moves.ll
|
|
|
cr1eq.ll
|
|
|
cr_spilling.ll
|
|
|
cr-spills.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
crash.ll
|
|
|
crbit-asm-disabled.ll
|
|
|
crbit-asm.ll
|
|
|
crbits.ll
|
|
|
crsave.ll
|
|
|
crypto_bifs.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
CSR-fit.ll
|
|
|
csr-save-restore-order.ll
|
|
|
csr-split.ll
|
|
|
ctr-cleanup.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
ctr-loop-tls-const.ll
|
|
|
ctr-minmaxnum.ll
|
|
|
ctrloop-asm.ll
|
|
|
ctrloop-constrained-fp.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
ctrloop-cpsgn.ll
|
|
|
ctrloop-fp64.ll
|
|
|
ctrloop-fp128.ll
|
|
|
ctrloop-i64.ll
|
|
|
ctrloop-i128.ll
|
|
|
ctrloop-intrin.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
ctrloop-large-ec.ll
|
|
|
ctrloop-le.ll
|
|
|
ctrloop-lt.ll
|
|
|
ctrloop-ne.ll
|
|
|
ctrloop-reg.ll
|
|
|
ctrloop-s000.ll
|
|
|
ctrloop-sh.ll
|
|
|
ctrloop-shortLoops.ll
|
|
|
ctrloop-sums.ll
|
|
|
ctrloop-udivti3.ll
|
|
|
ctrloops-hot-exit.ll
|
|
|
ctrloops-softfloat.ll
|
[PowerPC, test] Fix use of undef FileCheck var
|
2021-04-09 12:55:02 +01:00 |
ctrloops.ll
|
|
|
cttz.ll
|
|
|
cvt_i64_to_fp.ll
|
|
|
cxx_tlscc64.ll
|
|
|
darwin-labels.ll
|
|
|
dbg.ll
|
|
|
DbgValueOtherTargets.test
|
|
|
dcbf-p10.ll
|
|
|
dcbf.ll
|
|
|
dcbt-sched.ll
|
|
|
dcbt.ll
|
|
|
debuginfo-split-int.ll
|
|
|
debuginfo-stackarg.ll
|
|
|
delete-node.ll
|
|
|
dform-adjust.ll
|
|
|
dform-pair-load-store.ll
|
[PowerPC] Change VSRpRC allocation order
|
2021-06-25 16:04:41 +08:00 |
direct-move-profit.ll
|
|
|
DisableHoistingDueToBlockHotnessNoProfileData.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
DisableHoistingDueToBlockHotnessProfileData.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
div-2.ll
|
|
|
div-e-32.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
div-e-all.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
dsolocal-pic.ll
|
|
|
dsolocal-static.ll
|
|
|
dssall.ll
|
[PowerPC] Do not emit dssall on AIX
|
2021-05-17 06:08:06 -05:00 |
duplicate-returns-for-tailcall.ll
|
|
|
dyn-alloca-aligned.ll
|
|
|
dyn-alloca-offset.ll
|
|
|
e500-1.ll
|
|
|
early-ret2.ll
|
|
|
early-ret-verify.mir
|
|
|
early-ret.ll
|
|
|
early-ret.mir
|
|
|
ec-input.ll
|
|
|
eh-dwarf-cfa.ll
|
|
|
eieio.ll
|
[PowerPC] Added multiple PowerPC builtins
|
2021-05-27 16:23:03 -05:00 |
elf-common.ll
|
[FastISel] Flush local value map on every instruction
|
2021-01-11 08:32:36 -08:00 |
eliminate-compare-of-copy.ll
|
|
|
empty-functions.ll
|
|
|
emptystruct.ll
|
|
|
emutls_generic.ll
|
|
|
eqv-andc-orc-nor.ll
|
|
|
expand-contiguous-isel.ll
|
|
|
expand-foldable-isel.ll
|
[EarlyIfConversion] Avoid producing selects with identical operands
|
2021-04-30 15:51:14 -07:00 |
expand-isel-1.mir
|
|
|
expand-isel-2.mir
|
|
|
expand-isel-3.mir
|
|
|
expand-isel-4.mir
|
|
|
expand-isel-5.mir
|
|
|
expand-isel-6.mir
|
|
|
expand-isel-7.mir
|
|
|
expand-isel-8.mir
|
|
|
expand-isel-9.mir
|
|
|
expand-isel-10.mir
|
|
|
expand-isel-liveness.mir
|
|
|
expand-isel.ll
|
|
|
ext-bool-trunc-repl.ll
|
|
|
extra-toc-reg-deps.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
extract-and-store.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
extsh.ll
|
|
|
extswsli.ll
|
|
|
f32-to-i64.ll
|
|
|
f128_ldst.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
f128-aggregates.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
f128-arith.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
f128-bitcast.ll
|
[PowerPC] Support f128 under VSX
|
2021-04-20 15:49:52 +08:00 |
f128-compare.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
f128-conv.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
f128-fma.ll
|
[PowerPC] Support f128 under VSX
|
2021-04-20 15:49:52 +08:00 |
f128-passByValue.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
f128-rounding.ll
|
[PowerPC] Support f128 under VSX
|
2021-04-20 15:49:52 +08:00 |
f128-truncateNconv.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
f128-vecExtractNconv.ll
|
|
|
fabs.ll
|
|
|
fast-isel-binary.ll
|
|
|
fast-isel-br-const.ll
|
|
|
fast-isel-call.ll
|
|
|
fast-isel-cmp-imm.ll
|
|
|
fast-isel-const.ll
|
|
|
fast-isel-conversion-p5.ll
|
|
|
fast-isel-conversion.ll
|
|
|
fast-isel-crash.ll
|
|
|
fast-isel-ext.ll
|
|
|
fast-isel-fcmp-nan.ll
|
|
|
fast-isel-fold.ll
|
|
|
fast-isel-fpconv.ll
|
|
|
fast-isel-GEP-coalesce.ll
|
|
|
fast-isel-i64offset.ll
|
|
|
fast-isel-icmp-split.ll
|
|
|
fast-isel-indirectbr.ll
|
|
|
fast-isel-load-store-vsx.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
fast-isel-load-store.ll
|
[FastISel] Flush local value map on every instruction
|
2021-01-11 08:32:36 -08:00 |
fast-isel-pcrel.ll
|
[PowerPC] Exploit paddi instruction on Power 10 for constant materialization
|
2021-03-11 08:37:49 -06:00 |
fast-isel-redefinition.ll
|
|
|
fast-isel-ret.ll
|
|
|
fast-isel-rsp.ll
|
|
|
fast-isel-shifter.ll
|
|
|
fastcc_stacksize.ll
|
|
|
fastisel-gep-promote-before-add.ll
|
|
|
fcpsgn.ll
|
|
|
fdiv-combine.ll
|
[NFC] [PowerPC] Remove unsafe-fp-math in some tests
|
2021-03-10 17:27:21 +08:00 |
fdiv.ll
|
[DAGCombine] reassoc flag shouldn't enable contract
|
2021-06-21 21:15:43 +00:00 |
fixup-kill-dead-flag-crash.mir
|
|
|
float-asmprint.ll
|
|
|
float-load-store-pair.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
float-logic-ops.ll
|
|
|
float-to-int.ll
|
|
|
float-vector-gather.ll
|
|
|
floatPSA.ll
|
|
|
flt-preinc.ll
|
|
|
fma-aggr-FMF.ll
|
[DAGCombine] reassoc flag shouldn't enable contract
|
2021-06-21 21:15:43 +00:00 |
fma-assoc.ll
|
[DAGCombine] Check reassoc flags in aggressive fsub fusion
|
2021-06-23 13:59:40 +00:00 |
fma-combine.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
fma-ext.ll
|
|
|
fma-mutate-duplicate-vreg.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
fma-mutate-register-constraint.ll
|
[NFC] [PowerPC] Remove unsafe-fp-math in some tests
|
2021-03-10 17:27:21 +08:00 |
fma-mutate.ll
|
[DAGCombine] reassoc flag shouldn't enable contract
|
2021-06-21 21:15:43 +00:00 |
fma-negate.ll
|
[DAGCombine] reassoc flag shouldn't enable contract
|
2021-06-21 21:15:43 +00:00 |
fma-precision.ll
|
[DAGCombine] reassoc flag shouldn't enable contract
|
2021-06-21 21:15:43 +00:00 |
fma.ll
|
|
|
fmaxnum.ll
|
|
|
fmf-propagation.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
fminnum.ll
|
|
|
fnabs.ll
|
|
|
fneg.ll
|
|
|
fold_swtest_br.ll
|
[PowerPC] Try to fold sqrt/sdiv test results with the branch.
|
2021-01-14 02:15:19 +00:00 |
fold-frame-offset-using-rr.mir
|
|
|
fold-li.ll
|
|
|
fold-remove-li.ll
|
|
|
fold-rlwinm-1.ll
|
|
|
fold-rlwinm.mir
|
|
|
fold-zero.ll
|
|
|
fp2int2fp-ppcfp128.ll
|
|
|
fp64-to-int16.ll
|
|
|
fp128-bitcast-after-operation.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
fp128-libcalls.ll
|
|
|
fp_to_uint.ll
|
|
|
fp-branch.ll
|
|
|
fp-int128-fp-combine.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
fp-int-conversions-direct-moves.ll
|
|
|
fp-int-fp.ll
|
|
|
fp-intrinsics-fptosi-legal.ll
|
|
|
fp-splat.ll
|
|
|
fp-strict-conv-f128.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
fp-strict-conv-spe.ll
|
|
|
fp-strict-conv.ll
|
|
|
fp-strict-f128.ll
|
[PowerPC] Support f128 under VSX
|
2021-04-20 15:49:52 +08:00 |
fp-strict-fcmp-noopt.ll
|
|
|
fp-strict-fcmp-spe.ll
|
[SPE] Support constrained float operations on SPE
|
2021-04-29 16:34:10 +08:00 |
fp-strict-fcmp.ll
|
[PowerPC] Support f128 under VSX
|
2021-04-20 15:49:52 +08:00 |
fp-strict-minmax.ll
|
|
|
fp-strict-round.ll
|
[PowerPC] Canonicalize shuffles on big endian targets as well
|
2021-04-20 07:29:47 -05:00 |
fp-strict.ll
|
[SPE] Support constrained float operations on SPE
|
2021-04-29 16:34:10 +08:00 |
fp-to-int-ext.ll
|
|
|
fp-to-int-to-fp.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
fpcopy.ll
|
|
|
fpscr-intrinsics.ll
|
[PowerPC] Implement intrinsics for mtfsf[i]
|
2021-07-16 16:26:11 -05:00 |
frame_index_scavenging.mir
|
[PowerPC] Spilling to registers does not require frame index scavenging
|
2021-05-10 14:42:39 -05:00 |
frame-size.ll
|
|
|
frameaddr.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
Frames-dyn-alloca-with-func-call.ll
|
|
|
Frames-dyn-alloca.ll
|
|
|
Frames-large.ll
|
|
|
Frames-leaf.ll
|
|
|
Frames-small.ll
|
|
|
Frames-stack-floor.ll
|
|
|
frounds.ll
|
|
|
fsel.ll
|
|
|
fsl-e500mc.ll
|
|
|
fsl-e5500.ll
|
|
|
fsqrt.ll
|
|
|
fsub-fneg.ll
|
|
|
ftrunc-legalize.ll
|
|
|
ftrunc-vec.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
func-addr-consts.ll
|
ELF: Create unique SHF_GNU_RETAIN sections for llvm.used global objects
|
2021-02-26 16:38:44 -08:00 |
func-addr.ll
|
|
|
func-alias.ll
|
|
|
funnel-shift-rot.ll
|
|
|
funnel-shift.ll
|
|
|
fusion-load-store.ll
|
|
|
future-check-features.ll
|
[PowerPC] Add mprivileged option
|
2021-03-24 08:33:22 -05:00 |
glob-comp-aa-crash.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
global-address-non-got-indirect-access.ll
|
|
|
gpr-vsr-spill.ll
|
[PowerPC] Allow spilling GPR to VSR on AIX
|
2021-03-03 13:32:39 +08:00 |
handle-f16-storage-type.ll
|
[PowerPC] Use correct node to get a super register from a subreg
|
2021-04-13 19:52:21 -05:00 |
hardware-loops-crash.ll
|
|
|
hello.ll
|
|
|
hidden-vis-2.ll
|
|
|
hidden-vis.ll
|
|
|
hoist-logic.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
htm-ttest.ll
|
|
|
htm.ll
|
|
|
i1-ext-fold.ll
|
|
|
i1-to-double.ll
|
|
|
i32-to-float.ll
|
|
|
i64_fp_round.ll
|
|
|
i64_fp.ll
|
|
|
i64-to-float.ll
|
|
|
i128-and-beyond.ll
|
|
|
ia-mem-r0.ll
|
|
|
ia-neg-const.ll
|
|
|
iabs.ll
|
|
|
ifcvt-diamond-ret.mir
|
|
|
ifcvt-forked-bug-2016-08-08.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
ifcvt.ll
|
|
|
ifcvt.mir
|
|
|
ifunc.ll
|
|
|
illegal-element-type.ll
|
|
|
in-asm-f64-reg.ll
|
|
|
inc-of-add.ll
|
[AIX] Adjust CSR order to avoid breaking ABI regarding traceback
|
2021-07-03 04:45:26 +00:00 |
indexed-load.ll
|
|
|
indirect-hidden.ll
|
|
|
indirectbr.ll
|
|
|
inline-asm-dollarpc.ll
|
[AIX] Enable dollar sign as PC in inlineasm
|
2021-07-14 13:37:52 +00:00 |
inline-asm-i-constraint-i1.ll
|
|
|
inline-asm-label.ll
|
[AIX] Use AsmParser to do inline asm parsing
|
2021-07-02 16:12:21 +00:00 |
inline-asm-multilevel-gep.ll
|
|
|
inline-asm-physical-fpr-spe.ll
|
[PowerPC] Handle FP physical register in inline asm constraint.
|
2021-02-17 09:27:03 -05:00 |
inline-asm-physical-fpr.ll
|
[AIX] Use AsmParser to do inline asm parsing
|
2021-07-02 16:12:21 +00:00 |
inline-asm-s-modifier.ll
|
|
|
inline-asm-scalar-to-vector-error.ll
|
|
|
inline-asm-vsx-clobbers.ll
|
|
|
inlineasm-copy.ll
|
|
|
inlineasm-extendedmne.ll
|
|
|
inlineasm-i64-reg.ll
|
|
|
inlineasm-output-template.ll
|
|
|
inlineasm-vsx-reg.ll
|
|
|
instr-properties.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
int128_ldst.ll
|
[NFC][PowerPC] Add additional load/store test cases
|
2021-03-15 08:54:38 -05:00 |
int-fp-conv-0.ll
|
|
|
int-fp-conv-1.ll
|
|
|
inverted-bool-compares.ll
|
|
|
isel-rc-nox0.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
isel.ll
|
|
|
ispositive.ll
|
|
|
isync.ll
|
|
|
itofp128.ll
|
|
|
jaggedstructs.ll
|
|
|
jump-tables-collapse-rotate-remove-SrcMI.mir
|
|
|
jump-tables-collapse-rotate.ll
|
|
|
kernel-fp-round.ll
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
knowCRBitSpill.ll
|
|
|
LargeAbsoluteAddr.ll
|
|
|
larger-than-red-zone.ll
|
|
|
lbz-from-ld-shift.ll
|
|
|
lbzux.ll
|
|
|
ld-bswap64-no-ldbrx.ll
|
[PowerPC] Re-enable combine for i64 BSWAP on targets without LDBRX
|
2021-07-06 20:42:01 -05:00 |
ld-st-upd.ll
|
|
|
ldst-16-byte-asm.mir
|
[PowerPC] Export 16 byte load-store instructions
|
2021-06-15 01:56:10 +00:00 |
ldst-16-byte.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
ldst-align.ll
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
ldtoc-inv.ll
|
|
|
legalize-invert-br_cc.ll
|
[LegalizeDAG] Handle NeedInvert when expanding BR_CC
|
2021-01-16 14:33:19 +01:00 |
legalize-vaarg.ll
|
|
|
lha.ll
|
|
|
licm-remat.ll
|
|
|
licm-tocReg.ll
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
lit.local.cfg
|
[NFC] Disallow unused prefixes under llvm/test/CodeGen
|
2021-01-11 12:32:18 -08:00 |
livephysregs.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
livevars-crash1.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
livevars-crash2.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
llrint-conv.ll
|
|
|
llround-conv.ll
|
|
|
load-and-splat.ll
|
[PowerPC][NFC] add more cases for lfiwzx/lfiwax
|
2021-07-20 10:29:56 +00:00 |
load-constant-addr.ll
|
|
|
load-rightmost-vector-elt.ll
|
[P10] [Power PC] Exploiting new load rightmost vector element instructions.
|
2021-03-09 16:08:17 -05:00 |
load-shift-combine.ll
|
|
|
load-shuffle-and-shuffle-store.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
load-two-flts.ll
|
|
|
load-v4i8-improved.ll
|
[PowerPC] Canonicalize shuffles on big endian targets as well
|
2021-04-20 07:29:47 -05:00 |
logic-ops-on-compares.ll
|
|
|
long-compare.ll
|
|
|
longcall.ll
|
|
|
longdbl-truncate.ll
|
|
|
loop-align.ll
|
|
|
loop-comment.ll
|
|
|
loop-data-prefetch-inner.ll
|
|
|
loop-data-prefetch.ll
|
|
|
loop-hoist-toc-save.ll
|
|
|
loop-instr-form-prepare.ll
|
[TargetLowering][RISCV][AArch64][PowerPC] Enable BuildUDIV/BuildSDIV on illegal types before type legalization if we can find a larger legal type that supports MUL.
|
2021-02-11 09:43:13 -08:00 |
loop-instr-prep-non-const-increasement.ll
|
[PowerPC][NFC] add testcase for update-form preparation with non-const increment
|
2021-07-15 02:46:24 +00:00 |
loop-p10-pair-prepare.ll
|
[PowerPC] Change VSRpRC allocation order
|
2021-06-25 16:04:41 +08:00 |
loop-prep-all.ll
|
|
|
lower-globaladdr32-aix-asm.ll
|
|
|
lower-globaladdr32-aix.ll
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
lower-globaladdr64-aix-asm.ll
|
|
|
lower-globaladdr64-aix.ll
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
lower-massv-attr.ll
|
[PowerPC] Removing _massv place holder
|
2021-03-08 21:43:24 +00:00 |
lower-massv.ll
|
[PowerPC] Removing _massv place holder
|
2021-03-08 21:43:24 +00:00 |
lrint-conv.ll
|
|
|
lround-conv.ll
|
|
|
lsa.ll
|
|
|
lsr-ctrloop.ll
|
[PowerPC] Duplicate inherited heuristic from base scheduler
|
2021-01-22 10:11:03 +08:00 |
lsr-insns-cost.ll
|
|
|
lsr-postinc-pos.ll
|
|
|
lsr-profitable-chain.ll
|
|
|
lxv-aligned-stack-slots.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
lxvw4x-bug.ll
|
|
|
machine-backward-cp.mir
|
|
|
machine-combiner.ll
|
[DAGCombine] reassoc flag shouldn't enable contract
|
2021-06-21 21:15:43 +00:00 |
machine-pre.ll
|
|
|
machinelicm-cse-dead-flag.mir
|
|
|
macro-fusion.ll
|
|
|
maddld.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
mask64.ll
|
|
|
mature-mc-support.ll
|
|
|
mc-instrlat.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
mcm-1.ll
|
[FastISel] Flush local value map on every instruction
|
2021-01-11 08:32:36 -08:00 |
mcm-2.ll
|
[FastISel] Flush local value map on every instruction
|
2021-01-11 08:32:36 -08:00 |
mcm-3.ll
|
[FastISel] Flush local value map on every instruction
|
2021-01-11 08:32:36 -08:00 |
mcm-4.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
mcm-5.ll
|
|
|
mcm-6.ll
|
[FastISel] Flush local value map on every instruction
|
2021-01-11 08:32:36 -08:00 |
mcm-7.ll
|
|
|
mcm-8.ll
|
|
|
mcm-9.ll
|
[FastISel] Flush local value map on every instruction
|
2021-01-11 08:32:36 -08:00 |
mcm-10.ll
|
|
|
mcm-11.ll
|
|
|
mcm-12.ll
|
|
|
mcm-13.ll
|
[FastISel] Flush local value map on every instruction
|
2021-01-11 08:32:36 -08:00 |
mcm-default.ll
|
[FastISel] Flush local value map on every instruction
|
2021-01-11 08:32:36 -08:00 |
mcm-obj-2.ll
|
|
|
mcm-obj.ll
|
|
|
mcount-insertion.ll
|
Move EntryExitInstrumentation pass location
|
2021-03-01 10:08:10 -08:00 |
MCSE-caller-preserved-reg.ll
|
|
|
mem_update.ll
|
|
|
mem-rr-addr-mode.ll
|
|
|
memcmp-mergeexpand.ll
|
|
|
memcmp.ll
|
|
|
memcmpIR.ll
|
|
|
memCmpUsedInZeroEqualityComparison.ll
|
|
|
memcpy_dereferenceable.ll
|
|
|
memcpy-vec.ll
|
|
|
memset-nc-le.ll
|
|
|
merge_stores_dereferenceable.ll
|
|
|
merge-st-chain-op.ll
|
|
|
MergeConsecutiveStores.ll
|
|
|
mftb.ll
|
|
|
mi-peephole-splat.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
mi-peephole.mir
|
|
|
mi-scheduling-lhs.ll
|
|
|
mi-simplify-code.mir
|
|
|
misched-inorder-latency.ll
|
|
|
misched.ll
|
|
|
mma-acc-memops.ll
|
[PowerPC] Change VSRpRC allocation order
|
2021-06-25 16:04:41 +08:00 |
mma-acc-spill.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
mma-integer-based-outer-product.ll
|
|
|
mma-intrinsics.ll
|
[PowerPC] Change VSRpRC allocation order
|
2021-06-25 16:04:41 +08:00 |
mma-outer-product.ll
|
[PowerPC] Inefficient register allocation of ACC registers results in many copies.
|
2021-07-20 10:53:40 -05:00 |
mma-phi-accs.ll
|
[PowerPC] Change VSRpRC allocation order
|
2021-06-25 16:04:41 +08:00 |
MMO-flags-assertion.ll
|
|
|
more-dq-form-prepare.ll
|
[PowerPC] Inefficient register allocation of ACC registers results in many copies.
|
2021-07-20 10:53:40 -05:00 |
mtvsrdd.ll
|
|
|
mul-const-i64.ll
|
|
|
mul-const-vector.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
mul-const.ll
|
|
|
mul-high.ll
|
|
|
mul-with-overflow.ll
|
|
|
mulhs.ll
|
|
|
mulld.ll
|
|
|
mulli.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
mult-alt-generic-powerpc64.ll
|
|
|
mult-alt-generic-powerpc.ll
|
|
|
multi-return.ll
|
|
|
named-reg-alloc-r0.ll
|
|
|
named-reg-alloc-r1-64.ll
|
|
|
named-reg-alloc-r1.ll
|
|
|
named-reg-alloc-r2-64.ll
|
|
|
named-reg-alloc-r2.ll
|
|
|
named-reg-alloc-r13-64.ll
|
|
|
named-reg-alloc-r13.ll
|
|
|
neg-abs.ll
|
|
|
neg.ll
|
|
|
negate-i1.ll
|
|
|
negctr.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
no-ctr-loop-if-exit-in-nested-loop.ll
|
|
|
no-dead-strip.ll
|
ELF: Create unique SHF_GNU_RETAIN sections for llvm.used global objects
|
2021-02-26 16:38:44 -08:00 |
no-dup-of-bdnz.ll
|
|
|
no-dup-spill-fp.ll
|
|
|
no-duplicate.ll
|
|
|
no-ext-with-count-zeros.ll
|
|
|
no-extra-fp-conv-ldst.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
no-pref-jumps.ll
|
|
|
no-rlwimi-trivial-commute.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
NoCRFieldRedefWhenSpillingCRBIT.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
nofpexcept.ll
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
nomerge.ll
|
|
|
non-debug-mi-search-frspxsrsp.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
non-simple-args-intrin.ll
|
|
|
noPermuteFormasking.ll
|
|
|
not-fixed-frame-object.ll
|
|
|
novrsave.ll
|
|
|
O3-pipeline.ll
|
[PowerPC] Generate inlined quadword lock free atomic operations via AtomicExpand
|
2021-07-15 01:12:09 +00:00 |
opt-builtins-ppc-xlcompat-cas.ll
|
[PowerPC] Implement XL compatible behavior of __compare_and_swap
|
2021-07-23 01:16:02 +00:00 |
opt-cmp-inst-cr0-live.ll
|
|
|
opt-li-add-to-addi.ll
|
|
|
opt-sub-inst-cr0-live.mir
|
|
|
optcmp.ll
|
|
|
optimize-andiso.ll
|
|
|
optnone-crbits-i1-ret.ll
|
|
|
or-addressing-mode.ll
|
|
|
ori_imm32.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
ori_imm64.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
out-of-range-dform.ll
|
[PowerPC] Fix the check for 16-bit signed field in peephole
|
2021-03-19 07:15:53 -05:00 |
p8-isel-sched.ll
|
|
|
p8-scalar_vector_conversions.ll
|
[PowerPC] Fix i64 to vector lowering on big endian
|
2021-07-08 11:05:09 +08:00 |
p8altivec-shuffles-pred.ll
|
|
|
p9_copy_fp.ll
|
|
|
p9-dform-load-alignment.ll
|
[PowerPC] Add new infrastructure to select load/store instructions, update P8/P9 load/store patterns.
|
2021-04-30 09:53:19 -05:00 |
p9-vector-compares-and-counts.ll
|
|
|
p9-vector-sign-extend.ll
|
|
|
p9-vinsert-vextract.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
p9-xxinsertw-xxextractuw.ll
|
[PowerPC] Relax register superclasses for paired memops
|
2021-06-11 14:54:03 +08:00 |
p10-bit-manip-ops.ll
|
|
|
p10-constants.ll
|
[PowerPC] Materialize 34-bit constants with pli directly
|
2021-04-06 13:38:11 -05:00 |
p10-setbc-ri.ll
|
|
|
p10-setbc-rr.ll
|
|
|
p10-setbcr-ri.ll
|
|
|
p10-setbcr-rr.ll
|
|
|
p10-setboolean-ext-fp.ll
|
|
|
p10-setnbc-ri.ll
|
|
|
p10-setnbc-rr.ll
|
|
|
p10-setnbcr-ri.ll
|
|
|
p10-setnbcr-rr.ll
|
|
|
p10-spill-creq.ll
|
|
|
p10-spill-crgt.ll
|
|
|
p10-spill-crlt.ll
|
|
|
p10-spill-crun.ll
|
|
|
p10-splatImm32.ll
|
[PowerPC][Power10] Fix XXSPLI32DX not correctly exploiting specific cases
|
2021-01-28 15:17:32 -05:00 |
p10-splatImm-CPload-pcrel.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
p10-splatImm.ll
|
|
|
p10-string-ops.ll
|
|
|
p10-vector-divide.ll
|
|
|
p10-vector-mask-ops.ll
|
|
|
p10-vector-modulo.ll
|
|
|
p10-vector-multiply.ll
|
|
|
p10-vector-rotate.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
p10-vector-shift.ll
|
|
|
p10-vector-sign-extend.ll
|
|
|
p10-vsx-pcv.ll
|
|
|
P10-stack-alignment.ll
|
[PowerPC] Change target data layout for 16-byte stack alignment
|
2021-03-08 08:13:08 -06:00 |
paired-vector-intrinsics.ll
|
[PowerPC] Change VSRpRC allocation order
|
2021-06-25 16:04:41 +08:00 |
pcrel_ldst.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
pcrel-block-address.ll
|
|
|
pcrel-byte-loads.ll
|
[PowerPC] Implement patterns for PC-Rel zextload/extload byte loads
|
2021-03-10 12:18:13 -06:00 |
pcrel-call-linkage-leaf.ll
|
[PowerPC] Exploit xxsplti32dx (constant materialization) for scalars
|
2021-03-24 15:59:59 -04:00 |
pcrel-call-linkage-simple.ll
|
|
|
pcrel-call-linkage-with-calls.ll
|
|
|
pcrel-got-indirect.ll
|
|
|
pcrel-indirect-call.ll
|
|
|
pcrel-jump-table.ll
|
|
|
pcrel-linkeropt-option.ll
|
|
|
pcrel-linkeropt.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
pcrel-local-caller-toc.ll
|
|
|
pcrel-relocation-plus-offset.ll
|
|
|
pcrel-tail-calls.ll
|
|
|
pcrel-tls_get_addr_clobbers.ll
|
|
|
pcrel-tls-general-dynamic.ll
|
[test] Make ELF tests less reliant on the lexicographical order of non-local symbols
|
2021-02-13 01:01:06 -08:00 |
pcrel-tls-initial-exec.ll
|
[test] Make ELF tests less reliant on the lexicographical order of non-local symbols
|
2021-02-13 01:01:06 -08:00 |
pcrel-tls-local-dynamic.ll
|
|
|
pcrel-tls-local-exec.ll
|
|
|
pcrel.ll
|
[PowerPC] Exploit xxsplti32dx (constant materialization) for scalars
|
2021-03-24 15:59:59 -04:00 |
peephole-align.ll
|
|
|
peephole-cmp-eq.mir
|
|
|
peephole-miscompile-extswsli.mir
|
|
|
peephole-phi-acc.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
peephole-subreg-def.mir
|
Teach peephole optimizer to not emit sub-register defs
|
2021-06-28 09:24:07 -05:00 |
phi-eliminate.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
pie.ll
|
|
|
pip-inner.ll
|
|
|
popcnt-zext.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
popcnt.ll
|
|
|
popcount.ll
|
|
|
post-ra-ec.ll
|
|
|
pow_massv_075_025exp.ll
|
[PowerPC] Removing _massv place holder
|
2021-03-08 21:43:24 +00:00 |
pow.75.ll
|
|
|
power9-moves-and-splats.ll
|
[PowerPC] Canonicalize shuffles on big endian targets as well
|
2021-04-20 07:29:47 -05:00 |
powf_massv_075_025exp.ll
|
[PowerPC] Removing _massv place holder
|
2021-03-08 21:43:24 +00:00 |
ppc32-align-long-double-sf.ll
|
|
|
ppc32-constant-BE-ppcf128.ll
|
|
|
ppc32-cyclecounter.ll
|
|
|
ppc32-i1-stack-arguments-abi-bug.ll
|
|
|
ppc32-i1-vaarg.ll
|
|
|
ppc32-i64-to-float-conv.ll
|
|
|
ppc32-lshrti3.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
ppc32-nest.ll
|
|
|
ppc32-pic-large.ll
|
|
|
ppc32-pic.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
ppc32-secure-plt-tls2.ll
|
|
|
ppc32-secure-plt-tls.ll
|
|
|
ppc32-selectcc-i64.ll
|
[PowerPC] Fix SELECT_CC with i64 operand on PPC32
|
2021-04-28 17:48:33 +08:00 |
ppc32-skip-regs.ll
|
|
|
ppc32-vacopy.ll
|
|
|
ppc64-32bit-addic.ll
|
|
|
ppc64-abi-extend.ll
|
|
|
ppc64-acc-regalloc.ll
|
[PowerPC] Inefficient register allocation of ACC registers results in many copies.
|
2021-07-20 10:53:40 -05:00 |
ppc64-align-long-double.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
ppc64-altivec-abi.ll
|
|
|
ppc64-anyregcc-crash.ll
|
|
|
ppc64-anyregcc.ll
|
|
|
ppc64-blnop.ll
|
|
|
ppc64-byval-align.ll
|
|
|
ppc64-calls.ll
|
|
|
ppc64-crash.ll
|
|
|
ppc64-crsave.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
ppc64-cyclecounter.ll
|
|
|
ppc64-elf-abi.ll
|
|
|
ppc64-fastcc-fast-isel.ll
|
|
|
ppc64-fastcc.ll
|
|
|
ppc64-func-desc-hoist.ll
|
|
|
ppc64-gep-opt.ll
|
|
|
ppc64-get-cache-line-size.ll
|
|
|
ppc64-i128-abi.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
ppc64-icbt-pwr7.ll
|
|
|
ppc64-icbt-pwr8.ll
|
|
|
ppc64-inlineasm-clobber.ll
|
[PowerPC] Handle inline assembly clobber of link regsiter
|
2021-05-13 07:43:37 -05:00 |
ppc64-linux-func-size.ll
|
|
|
ppc64-nest.ll
|
|
|
ppc64-nonfunc-calls.ll
|
|
|
ppc64-P9-mod.ll
|
|
|
ppc64-P9-setb.ll
|
[PowerPC] Support f128 under VSX
|
2021-04-20 15:49:52 +08:00 |
ppc64-P9-vabsd.ll
|
|
|
ppc64-patchpoint.ll
|
|
|
ppc64-pre-inc-no-extra-phi.ll
|
|
|
ppc64-prefetch.ll
|
|
|
ppc64-r2-alloc.ll
|
|
|
ppc64-rop-protection.ll
|
[PowerPC] Add ROP Protection to prologue and epilogue
|
2021-05-13 12:54:44 -05:00 |
ppc64-sibcall-shrinkwrap.ll
|
[PowerPC][AIX] Enable Shrinkwrapping on 32 and 64 bit AIX.
|
2021-02-17 14:54:57 +00:00 |
ppc64-sibcall.ll
|
|
|
ppc64-smallarg.ll
|
|
|
ppc64-stackmap-nops.ll
|
|
|
ppc64-stackmap.ll
|
|
|
ppc64-toc.ll
|
|
|
ppc64-vaarg-int.ll
|
|
|
ppc64-varargs.ll
|
|
|
ppc64-xxsplti32dx-pattern-check.ll
|
Add correct types to the xxsplti32dx pattern.
|
2021-04-09 14:11:34 -05:00 |
ppc64-zext.ll
|
|
|
ppc64le-aggregates.ll
|
|
|
ppc64le-calls.ll
|
|
|
ppc64le-crsave.ll
|
|
|
ppc64le-localentry-large.ll
|
|
|
ppc64le-localentry.ll
|
|
|
ppc64le-smallarg.ll
|
|
|
ppc440-fp-basic.ll
|
|
|
ppc440-msync.ll
|
|
|
ppc_fp128-bcwriter.ll
|
[Constants][PowerPC] Check exactlyValue for ppc_fp128 in isNullValue
|
2021-06-03 20:31:01 +00:00 |
ppc-32bit-build-vector.ll
|
|
|
ppc-32bit-shift.ll
|
|
|
ppc-crbits-onoff.ll
|
|
|
ppc-ctr-dead-code.ll
|
|
|
ppc-disable-non-volatile-cr.ll
|
[PowerPC, test] Fix use of undef FileCheck var
|
2021-04-07 09:45:21 +01:00 |
ppc-empty-fs.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
ppc-label2.ll
|
|
|
ppc-label.ll
|
|
|
ppc-partword-atomic.ll
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
|
2021-05-20 20:34:23 +01:00 |
ppc-passname-assert.ll
|
|
|
ppc-passname.ll
|
|
|
ppc-prologue.ll
|
|
|
ppc-redzone-alignment-bug.ll
|
|
|
ppc-shrink-wrapping.ll
|
[PowerPC, test] Fix use of undef FileCheck var
|
2021-04-09 12:54:35 +01:00 |
ppc-vaarg-agg.ll
|
|
|
ppcf128-1-opt.ll
|
|
|
ppcf128-1.ll
|
|
|
ppcf128-2.ll
|
|
|
ppcf128-3.ll
|
|
|
ppcf128-4.ll
|
|
|
ppcf128-constrained-fp-intrinsics.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
ppcf128-endian.ll
|
|
|
ppcf128-freeze.mir
|
|
|
ppcf128sf.ll
|
|
|
ppcsoftops.ll
|
|
|
pr3711_widen_bit.ll
|
|
|
pr12757.ll
|
|
|
pr13641.ll
|
|
|
pr13891.ll
|
|
|
pr15031.ll
|
|
|
pr15359.ll
|
|
|
pr15630.ll
|
|
|
pr15632.ll
|
|
|
pr16556-2.ll
|
|
|
pr16556.ll
|
|
|
pr16573.ll
|
|
|
pr17168.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
pr17354.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
pr18663-2.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
pr18663.ll
|
|
|
pr20442.ll
|
|
|
pr22711.ll
|
|
|
pr24216.ll
|
|
|
pr24546.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
pr24636.ll
|
|
|
pr25080.ll
|
[PowerPC] Canonicalize shuffles on big endian targets as well
|
2021-04-20 07:29:47 -05:00 |
pr25157-peephole.ll
|
|
|
pr25157.ll
|
|
|
pr26180.ll
|
|
|
pr26193.ll
|
|
|
pr26356.ll
|
|
|
pr26378.ll
|
|
|
pr26381.ll
|
|
|
pr26617.ll
|
|
|
pr26690.ll
|
|
|
pr27078.ll
|
[PPC] Regenerate PR27078 test checks
|
2021-04-01 18:11:46 +01:00 |
pr27350.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
pr28130.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
pr28630.ll
|
|
|
pr30451.ll
|
|
|
pr30640.ll
|
|
|
pr30663.ll
|
|
|
pr30715.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
pr31144.ll
|
|
|
pr32063.ll
|
|
|
pr32140.ll
|
|
|
pr33093.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
pr33547.ll
|
|
|
pr35402.ll
|
|
|
pr35688.ll
|
|
|
pr36068.ll
|
|
|
pr36292.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
pr38087.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
pr38899-split-register-at-spill.mir
|
|
|
pr39478.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
pr39815.ll
|
|
|
pr40922.ll
|
|
|
pr41088.ll
|
|
|
pr41177.ll
|
|
|
pr42492.ll
|
Recommit [ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers.
|
2021-07-06 12:16:05 -07:00 |
pr43527.ll
|
Reland [SCEV] Improve modelling for (null) pointer constants
|
2021-03-13 16:05:34 +03:00 |
pr43976.ll
|
|
|
pr44183.ll
|
|
|
pr44239.ll
|
|
|
pr45186.ll
|
|
|
pr45297.ll
|
|
|
pr45301.ll
|
|
|
pr45432.ll
|
|
|
pr45448.ll
|
[LegalizeTypes] Improve ExpandIntRes_XMULO codegen.
|
2021-03-01 09:54:32 -08:00 |
pr45628.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
pr45709.ll
|
|
|
pr46759.ll
|
[PowerPC] Make sure the first probe is full size or is the last probe when stack is realigned
|
2021-06-09 06:35:35 +00:00 |
pr46923.ll
|
[ConstantFold] allow folding icmp of null and constexpr
|
2021-03-08 08:53:59 -05:00 |
pr47373.ll
|
|
|
pr47660.ll
|
|
|
pr47707.ll
|
|
|
pr47830.ll
|
|
|
pr47891.ll
|
|
|
pr47916.ll
|
[PowerPC] Disable permuted SCALAR_TO_VECTOR on LE without direct moves
|
2021-07-07 13:50:49 -05:00 |
pr48388.ll
|
|
|
pr48519.ll
|
Reland [SCEV] Improve modelling for (null) pointer constants
|
2021-03-13 16:05:34 +03:00 |
pr48527.ll
|
|
|
pr49092.ll
|
[DAGCombine] Do not remove masking argument to FP16_TO_FP for some targets
|
2021-02-09 06:33:48 -06:00 |
pr49509.ll
|
[PowerPC] Fix infinite loop in peephole CR optimization (PR49509)
|
2021-03-11 14:25:22 +01:00 |
PR3488.ll
|
|
|
PR33636.ll
|
|
|
PR33671.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
PR35812-neg-cmpxchg.ll
|
|
|
pre-inc-disable.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
prefer-dqform.ll
|
|
|
preinc-ld-sel-crash.ll
|
|
|
preincprep-i64-check.ll
|
|
|
preincprep-invoke.ll
|
|
|
preincprep-nontrans-crash.ll
|
|
|
private.ll
|
|
|
prolog_vec_spills.mir
|
[PowerPC] Use mtvsrdd to put callee-saved GPR into VSR
|
2021-04-20 16:43:24 +08:00 |
pwr3-6x.ll
|
|
|
pwr7-gt-nop.ll
|
|
|
pzero-fp-xored.ll
|
|
|
quadint-return.ll
|
|
|
r31.ll
|
|
|
read-set-flm.ll
|
|
|
recipest.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
reduce_cr.ll
|
|
|
reduce_scalarization02.ll
|
|
|
reduce_scalarization.ll
|
|
|
redundant-copy-after-tail-dup.ll
|
|
|
reg_copy.mir
|
|
|
reg-coalesce-simple.ll
|
|
|
reg-names.ll
|
|
|
reg-scavenging.ll
|
|
|
register-pressure-reduction.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
reloc-align.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
remap-crash.ll
|
|
|
remat-imm.ll
|
|
|
rematerializable-instruction-machine-licm.ll
|
[PowerPC] Duplicate inherited heuristic from base scheduler
|
2021-01-22 10:11:03 +08:00 |
remove-copy-crunsetcrbit.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
remove-implicit-use.mir
|
|
|
remove-redundant-li-implicit-reg.mir
|
[PowerPC] Remove implicit use register after transformToImmFormFedByLI()
|
2021-07-09 04:42:54 +00:00 |
remove-redundant-li-skip-imp-kill.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
remove-redundant-load-imm.ll
|
|
|
remove-redundant-load-imm.mir
|
|
|
remove-redundant-moves.ll
|
[PowerPC] Relax register superclasses for paired memops
|
2021-06-11 14:54:03 +08:00 |
remove-redundant-toc-saves.ll
|
[PowerPC] Enable redundant TOC save removal on AIX
|
2021-03-22 14:29:22 +08:00 |
remove-self-copies.mir
|
|
|
repeated-fp-divisors.ll
|
[DAGCombine] reassoc flag shouldn't enable contract
|
2021-06-21 21:15:43 +00:00 |
resolvefi-basereg.ll
|
|
|
resolvefi-disp.ll
|
|
|
restore-r30.ll
|
|
|
retaddr2.ll
|
|
|
retaddr.ll
|
|
|
return-val-i128.ll
|
|
|
rlwimi2.ll
|
|
|
rlwimi3.ll
|
|
|
rlwimi-and-or-bits.ll
|
|
|
rlwimi-and.ll
|
|
|
rlwimi-commute.ll
|
|
|
rlwimi-dyn-and.ll
|
|
|
rlwimi-keep-rsh.ll
|
|
|
rlwimi.ll
|
|
|
rlwinm2.ll
|
|
|
rlwinm_rldicl_to_andi.mir
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
rlwinm-zero-ext.ll
|
|
|
rlwinm.ll
|
|
|
rm-zext.ll
|
|
|
rotl-2.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
rotl-64.ll
|
|
|
rotl-rotr-crash.ll
|
|
|
rotl.ll
|
|
|
rounding-ops.ll
|
|
|
rounding-rm-flag.ll
|
|
|
rs-undef-use.ll
|
|
|
s000-alias-misched.ll
|
|
|
sat-add.ll
|
[SelectionDAG] Check use before combining into USUBSAT
|
2021-07-13 14:50:26 +08:00 |
sat-register-clobber.ll
|
|
|
saturating-intrinsics.ll
|
|
|
save-bp.ll
|
|
|
save-cr-ppc32svr4.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
save-crbp-ppc32svr4.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
scalar_cmp.ll
|
|
|
scalar_vector_test_1.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
scalar_vector_test_2.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
scalar_vector_test_3.ll
|
|
|
scalar_vector_test_4.ll
|
[PowerPC] Improve f32 to i32 bitcast code gen
|
2021-05-31 16:00:58 -05:00 |
scalar-double-ldst.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
scalar-equal.ll
|
|
|
scalar-float-ldst.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
scalar-i8-ldst.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
scalar-i16-ldst.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
scalar-i32-ldst.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
scalar-i64-ldst.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
scalar-min-max.ll
|
|
|
scalar-rounding-ops.ll
|
|
|
scavenging.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
sched-addi.ll
|
[PowerPC] Duplicate inherited heuristic from base scheduler
|
2021-01-22 10:11:03 +08:00 |
schedule-addi-load.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
scheduling-mem-dependency.ll
|
|
|
sdag-ppcf128.ll
|
|
|
sdiv-pow2.ll
|
|
|
sections.ll
|
|
|
select_const.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
select_lt0.ll
|
|
|
select-addrRegRegOnly.ll
|
|
|
select-cc.ll
|
|
|
select-i1-vs-i1.ll
|
|
|
select-to-branch.mir
|
|
|
select.ll
|
|
|
selectiondag-extload-computeknownbits.ll
|
|
|
selectiondag-sextload.ll
|
|
|
set0-v8i16.ll
|
|
|
setcc_no_zext.ll
|
|
|
setcc-logic.ll
|
|
|
setcc-sub-flag.ll
|
|
|
setcc-to-sub.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
setcc-vector.ll
|
|
|
setcclike-or-comb.ll
|
|
|
setcr_bc2.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
setcr_bc3.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
setcr_bc.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
seteq-0.ll
|
|
|
setrnd.ll
|
|
|
sext-vector-inreg.ll
|
|
|
sh-overflow.mir
|
|
|
shift128.ll
|
|
|
shift_mask.ll
|
|
|
shift-cmp.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
shl_elim.ll
|
|
|
shl_sext.ll
|
|
|
shrink-wrap.ll
|
[PowerPC][AIX] Enable Shrinkwrapping on 32 and 64 bit AIX.
|
2021-02-17 14:54:57 +00:00 |
shrink-wrap.mir
|
[PowerPC][AIX] Enable Shrinkwrapping on 32 and 64 bit AIX.
|
2021-02-17 14:54:57 +00:00 |
sign_ext_inreg1.ll
|
|
|
sign-ext-atomics.ll
|
[PowerPC] Sign extend comparison operand for signed atomic comparisons
|
2021-01-18 21:19:25 -06:00 |
signbit-shift.ll
|
|
|
simplifyConstCmpToISEL.ll
|
|
|
sink-down-more-instructions-1.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
sink-down-more-instructions-regpressure-high.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
sj-ctr-loop.ll
|
|
|
sjlj_no0x.ll
|
|
|
sjlj.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
small-arguments.ll
|
|
|
sms-cpy-1.ll
|
[PowerPC] Duplicate inherited heuristic from base scheduler
|
2021-01-22 10:11:03 +08:00 |
sms-grp-order.ll
|
|
|
sms-iterator.ll
|
|
|
sms-phi-1.ll
|
[PowerPC] Duplicate inherited heuristic from base scheduler
|
2021-01-22 10:11:03 +08:00 |
sms-phi-2.ll
|
|
|
sms-phi-3.ll
|
|
|
sms-phi-5.ll
|
|
|
sms-phi.ll
|
Reland [SCEV] Improve modelling for (null) pointer constants
|
2021-03-13 16:05:34 +03:00 |
sms-remark.ll
|
|
|
sms-simple.ll
|
[PowerPC] Duplicate inherited heuristic from base scheduler
|
2021-01-22 10:11:03 +08:00 |
smulfixsat.ll
|
|
|
spe-fastmath.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
spe.ll
|
[LegalizeDAG][RISCV][PowerPC][AMDGPU][WebAssembly] Improve expansion of SETONE/SETUEQ on targets without SETO/SETUO.
|
2021-01-12 10:45:03 -08:00 |
spill_p9_setb.ll
|
|
|
spill-nor0.ll
|
|
|
spill-nor0.mir
|
|
|
spill-vec-pair.ll
|
[PowerPC] Change VSRpRC allocation order
|
2021-06-25 16:04:41 +08:00 |
splat-bug.ll
|
|
|
splat-larger-types-as-v16i8.ll
|
|
|
split-index-tc.ll
|
|
|
splitstore-check-volatile.ll
|
|
|
srem-lkk.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
srem-seteq-illegal-types.ll
|
Support {S,U}REMEqFold before legalization
|
2021-04-01 01:35:41 +03:00 |
srem-vector-lkk.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
srl-mask.ll
|
|
|
stack_pointer_vec_spills.mir
|
[PowerPC][Bug] Fix Bug in Stack Frame Update Code
|
2021-05-11 05:54:07 -05:00 |
stack-clash-dynamic-alloca.ll
|
[PowerPC] Duplicate inherited heuristic from base scheduler
|
2021-01-22 10:11:03 +08:00 |
stack-clash-prologue-nounwind.ll
|
[PowerPC] Make sure the first probe is full size or is the last probe when stack is realigned
|
2021-06-09 06:35:35 +00:00 |
stack-clash-prologue.ll
|
[PowerPC] Make sure the first probe is full size or is the last probe when stack is realigned
|
2021-06-09 06:35:35 +00:00 |
stack-coloring-vararg.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
stack-guard-oob.ll
|
[AIX] Enable stackprotect feature
|
2021-05-28 02:18:15 +00:00 |
stack-guard-reassign.ll
|
|
|
stack-no-redzone.ll
|
|
|
stack-protector.ll
|
[AIX] Enable stackprotect feature
|
2021-05-28 02:18:15 +00:00 |
stack-realign.ll
|
|
|
stack-restore-with-setjmp.ll
|
|
|
stackmap-frame-setup.ll
|
|
|
stacksize.ll
|
|
|
std-unal-fi.ll
|
|
|
stdux-constuse.ll
|
|
|
stfiwx-2.ll
|
|
|
stfiwx.ll
|
|
|
store_fptoi.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
store-combine.ll
|
|
|
store-constant.ll
|
|
|
store-load-fwd.ll
|
|
|
store-rightmost-vector-elt.ll
|
|
|
store-update.ll
|
|
|
structsinmem.ll
|
|
|
structsinregs.ll
|
|
|
stubs.ll
|
|
|
stwu8.ll
|
|
|
stwu-gta.ll
|
|
|
stwu-sched.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
stwux.ll
|
|
|
sub-bv-types.ll
|
|
|
sub-of-not.ll
|
|
|
subc.ll
|
|
|
subreg-killed.mir
|
[VirtRegRewriter] Insert missing killed flags when tracking subregister liveness
|
2021-03-03 12:02:04 -05:00 |
subreg-postra-2.ll
|
|
|
subreg-postra.ll
|
|
|
subtract_from_imm.ll
|
|
|
svr4-redzone.ll
|
|
|
swap-reduction.ll
|
[PowerPC] Fix use check of swap-reduction
|
2021-04-07 15:55:52 +08:00 |
swaps-le-1.ll
|
|
|
swaps-le-2.ll
|
|
|
swaps-le-3.ll
|
|
|
swaps-le-4.ll
|
|
|
swaps-le-5.ll
|
|
|
swaps-le-6.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
swaps-le-7.ll
|
|
|
swaps-le-8.ll
|
|
|
tail-dup-analyzable-fallthrough.ll
|
|
|
tail-dup-branch-to-fallthrough.ll
|
|
|
tail-dup-break-cfg.ll
|
|
|
tail-dup-layout.ll
|
|
|
tailcall1-64.ll
|
|
|
tailcall1.ll
|
|
|
tailcall-speculatable-callee.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
tailcall-string-rvo.ll
|
|
|
tailcallpic1.ll
|
|
|
test_call_aix.ll
|
|
|
test_func_desc.ll
|
|
|
test-and-cmp-folding.ll
|
|
|
testBitReverse.ll
|
|
|
testComparesi32gtu.ll
|
|
|
testComparesi32leu.ll
|
|
|
testComparesi32ltu.ll
|
|
|
testComparesieqsc.ll
|
|
|
testComparesieqsi.ll
|
|
|
testComparesieqsll.ll
|
|
|
testComparesieqss.ll
|
|
|
testComparesiequc.ll
|
|
|
testComparesiequi.ll
|
|
|
testComparesiequll.ll
|
|
|
testComparesiequs.ll
|
|
|
testComparesigesc.ll
|
|
|
testComparesigesi.ll
|
|
|
testComparesigesll.ll
|
|
|
testComparesigess.ll
|
|
|
testComparesigeuc.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesigeui.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesigeull.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesigeus.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesigtsc.ll
|
|
|
testComparesigtsi.ll
|
|
|
testComparesigtsll.ll
|
|
|
testComparesigtss.ll
|
|
|
testComparesigtuc.ll
|
|
|
testComparesigtui.ll
|
|
|
testComparesigtus.ll
|
|
|
testComparesilesc.ll
|
|
|
testComparesilesi.ll
|
|
|
testComparesilesll.ll
|
|
|
testComparesiless.ll
|
|
|
testComparesileuc.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesileui.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesileull.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesileus.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesiltsc.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesiltsi.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesiltsll.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesiltss.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesiltuc.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesiltui.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesiltus.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesinesc.ll
|
|
|
testComparesinesi.ll
|
|
|
testComparesinesll.ll
|
|
|
testComparesiness.ll
|
|
|
testComparesineuc.ll
|
|
|
testComparesineui.ll
|
|
|
testComparesineull.ll
|
|
|
testComparesineus.ll
|
|
|
testCompareslleqsc.ll
|
|
|
testCompareslleqsi.ll
|
|
|
testCompareslleqsll.ll
|
|
|
testCompareslleqss.ll
|
|
|
testComparesllequc.ll
|
|
|
testComparesllequi.ll
|
|
|
testComparesllequll.ll
|
|
|
testComparesllequs.ll
|
|
|
testComparesllgesc.ll
|
|
|
testComparesllgesi.ll
|
|
|
testComparesllgesll.ll
|
|
|
testComparesllgess.ll
|
|
|
testComparesllgeuc.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesllgeui.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesllgeull.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesllgeus.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesllgtsll.ll
|
|
|
testComparesllgtuc.ll
|
|
|
testComparesllgtui.ll
|
|
|
testComparesllgtus.ll
|
|
|
testCompareslllesc.ll
|
|
|
testCompareslllesi.ll
|
|
|
testCompareslllesll.ll
|
|
|
testComparesllless.ll
|
|
|
testComparesllleuc.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesllleui.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesllleull.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesllleus.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesllltsll.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesllltuc.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesllltui.ll
|
|
|
testComparesllltus.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
testComparesllnesll.ll
|
|
|
testComparesllneull.ll
|
|
|
thread-pointer.ll
|
|
|
tls_get_addr_clobbers.ll
|
|
|
tls_get_addr_fence1.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
tls_get_addr_fence2.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
tls_get_addr_stackframe.ll
|
|
|
tls-cse.ll
|
|
|
tls-pic.ll
|
|
|
tls-pie-xform.ll
|
|
|
tls-store2.ll
|
|
|
tls.ll
|
|
|
toc-data.ll
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
toc-float.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
toc-load-sched-bug.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
tocSaveInPrologue.ll
|
|
|
topdepthreduce-postra.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
trampoline.ll
|
|
|
trunc-srl-load.ll
|
|
|
two-address-crash.mir
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
uint-to-fp-v4i32.ll
|
[PowerPC] Improve codegen for int-to-fp conversion of subword vector extract
|
2021-05-11 15:00:11 -05:00 |
uint-to-ppcfp128-crash.ll
|
|
|
umulfixsat.ll
|
|
|
umulo-128-legalisation-lowering.ll
|
[LegalizeTypes] Improve ExpandIntRes_XMULO codegen.
|
2021-03-01 09:54:32 -08:00 |
unal4-std.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
unal-altivec2.ll
|
|
|
unal-altivec-wint.ll
|
|
|
unal-altivec.ll
|
|
|
unal-vec-ldst.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
unal-vec-negarith.ll
|
CodeGen: Print/parse LLTs in MachineMemOperands
|
2021-06-30 16:54:13 -04:00 |
unaligned-addressing-mode.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
unaligned-dqform-ld.ll
|
[PowerPC] Add FI alignment check if the addressing mode is DS/DQ-Form, emit X-Form if necessary.
|
2021-07-13 12:31:52 -05:00 |
unaligned-floats.ll
|
|
|
unaligned.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
unreachable-mbb-jtreference-elimination.ll
|
|
|
unsafe-math.ll
|
[NFC] [PowerPC] Remove unsafe-fp-math in some tests
|
2021-03-10 17:27:21 +08:00 |
unwind-dw2-g.ll
|
|
|
unwind-dw2.ll
|
|
|
urem-lkk.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
urem-seteq-illegal-types.ll
|
Support {S,U}REMEqFold before legalization
|
2021-04-01 01:35:41 +03:00 |
urem-vector-lkk.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
use-cr-result-of-dom-icmp-st.ll
|
|
|
uwtables.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
vaddsplat.ll
|
|
|
varargs-struct-float.ll
|
|
|
varargs.ll
|
|
|
variable_elem_vec_extracts.ll
|
|
|
vavg.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vcmp-fold.ll
|
|
|
vec_abs.ll
|
|
|
vec_absd.ll
|
|
|
vec_add_sub_doubleword.ll
|
|
|
vec_add_sub_quadword.ll
|
|
|
vec_auto_constant.ll
|
|
|
vec_br_cmp.ll
|
|
|
vec_buildvector_loadstore.ll
|
|
|
vec_call.ll
|
|
|
vec_clz.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
vec_cmp.ll
|
|
|
vec_cmpd_p7.ll
|
[PowerPC] Provide doubleword vector predicate form comparisons on Power7
|
2021-05-13 04:56:56 -05:00 |
vec_cmpd.ll
|
|
|
vec_cmpq.ll
|
|
|
vec_constants.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
vec_conv_fp32_to_i8_elts.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vec_conv_fp32_to_i16_elts.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vec_conv_fp32_to_i64_elts.ll
|
|
|
vec_conv_fp64_to_i8_elts.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vec_conv_fp64_to_i16_elts.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vec_conv_fp64_to_i32_elts.ll
|
[PowerPC] Canonicalize shuffles on big endian targets as well
|
2021-04-20 07:29:47 -05:00 |
vec_conv_fp_to_i_4byte_elts.ll
|
|
|
vec_conv_fp_to_i_8byte_elts.ll
|
|
|
vec_conv_i8_to_fp32_elts.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vec_conv_i8_to_fp64_elts.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vec_conv_i16_to_fp32_elts.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vec_conv_i16_to_fp64_elts.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vec_conv_i32_to_fp64_elts.ll
|
|
|
vec_conv_i64_to_fp32_elts.ll
|
[PowerPC] Relax register superclasses for paired memops
|
2021-06-11 14:54:03 +08:00 |
vec_conv_i_to_fp_4byte_elts.ll
|
|
|
vec_conv_i_to_fp_8byte_elts.ll
|
|
|
vec_conv.ll
|
|
|
vec_extload.ll
|
|
|
vec_extract_p9_2.ll
|
Pre-commit test for PPC vector extraction test
|
2021-04-30 12:02:37 +08:00 |
vec_extract_p9.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vec_fmuladd.ll
|
|
|
vec_fneg.ll
|
|
|
vec_insert_elt.ll
|
[PowerPC] Improve f32 to i32 bitcast code gen
|
2021-05-31 16:00:58 -05:00 |
vec_insert.ll
|
|
|
vec_int_ext.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vec_mergeow.ll
|
|
|
vec_minmax.ll
|
|
|
vec_misaligned.ll
|
|
|
vec_mul_even_odd.ll
|
|
|
vec_mul.ll
|
|
|
vec_perf_shuffle.ll
|
|
|
vec_popcnt.ll
|
|
|
vec_revb.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
vec_rotate_shift.ll
|
|
|
vec_rounding.ll
|
|
|
vec_select.ll
|
|
|
vec_shift.ll
|
|
|
vec_shuffle_le.ll
|
|
|
vec_shuffle_p8vector_le.ll
|
|
|
vec_shuffle_p8vector.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
vec_shuffle.ll
|
|
|
vec_sldwi.ll
|
|
|
vec_splat_constant.ll
|
|
|
vec_splat.ll
|
[NFC] Disallow unused prefixes in CodeGen/PowerPC tests.
|
2021-01-11 09:24:52 -08:00 |
vec_sqrt.ll
|
|
|
vec_urem_const.ll
|
|
|
vec_veqv_vnand_vorc.ll
|
|
|
vec_vrsave.ll
|
|
|
vec_xxpermdi.ll
|
|
|
vec_zero.ll
|
|
|
vec-abi-align.ll
|
|
|
vec-asm-disabled.ll
|
|
|
vec-bswap.ll
|
[AIX] Allow safe for 32bit P9 VSX extract and insert pattern matches
|
2021-04-27 07:27:43 -04:00 |
vec-extract-itofp.ll
|
[PowerPC] Improve codegen for int-to-fp conversion of subword vector extract
|
2021-05-11 15:00:11 -05:00 |
vec-itofp.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vec-min-max.ll
|
|
|
vec-select.ll
|
|
|
vec-trunc2.ll
|
|
|
vec-trunc.ll
|
|
|
vector-constrained-fp-intrinsics.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vector-copysign.ll
|
|
|
vector-extend-sign.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vector-identity-shuffle.ll
|
|
|
vector-ldst.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vector-merge-store-fp-constants.ll
|
|
|
vector-popcnt-128-ult-ugt.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vector-rotates.ll
|
|
|
vector-rounding-ops.ll
|
[NFC] [PowerPC] Remove unsafe-fp-math in some tests
|
2021-03-10 17:27:21 +08:00 |
vector.ll
|
|
|
vmladduhm.ll
|
[PowerPC] [NFC] Add AIX triple to some regression tests
|
2021-01-18 11:44:00 +08:00 |
vperm-instcombine.ll
|
|
|
vperm-lowering.ll
|
|
|
vrsave-inline-asm.ll
|
|
|
vrspill.ll
|
|
|
vsel-prom.ll
|
|
|
vselect-constants.ll
|
|
|
vsx_builtins.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vsx_insert_extract_le.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vsx_scalar_ld_st.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vsx_shuffle_le.ll
|
|
|
vsx-args.ll
|
|
|
VSX-DForm-Scalars.ll
|
|
|
vsx-div.ll
|
|
|
vsx-elementary-arith.ll
|
|
|
vsx-fma-m.ll
|
|
|
vsx-fma-mutate-trivial-copy.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
vsx-fma-mutate-undef.ll
|
|
|
vsx-fma-sp.ll
|
|
|
vsx-infl-copy1.ll
|
|
|
vsx-infl-copy2.ll
|
|
|
vsx-ldst-builtin-le.ll
|
|
|
vsx-ldst.ll
|
|
|
vsx-minmax.ll
|
|
|
vsx-p8.ll
|
|
|
vsx-p9.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vsx-partword-int-loads-and-stores.ll
|
|
|
vsx-recip-est.ll
|
[NFC] [PowerPC] Remove unsafe-fp-math in some tests
|
2021-03-10 17:27:21 +08:00 |
vsx-self-copy.ll
|
|
|
vsx-shuffle-le-load.ll
|
[PowerPC] only check the load instruction result number 0.
|
2021-05-18 00:49:37 -04:00 |
vsx-shuffle-le-multiple-uses.ll
|
[PowerPC] stop reverse mem op generation for some cases.
|
2021-04-12 22:41:28 -04:00 |
vsx-spill-norwstore.ll
|
|
|
vsx-spill.ll
|
|
|
vsx-vec-spill.ll
|
|
|
vsx-word-splats.ll
|
|
|
VSX-XForm-Scalars.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vsx.ll
|
[PowerPC] Update Refactored Load/Store Implementation, XForm VSX Patterns, and Tests
|
2021-07-16 09:28:48 -05:00 |
vsxD-Form-spills.ll
|
|
|
vtable-reloc.ll
|
|
|
wa-asm-fpr.ll
|
[PowerPC] Allow wa inline asm to also accept floating point arguments
|
2021-06-11 07:19:10 -04:00 |
weak_def_can_be_hidden.ll
|
|
|
xray-attribute-instrumentation.ll
|
|
|
xray-conditional-return.ll
|
|
|
xray-ret-is-terminator.ll
|
|
|
xray-tail-call-hidden.ll
|
|
|
xray-tail-call-sled.ll
|
|
|
xvcmpeqdp-v2f64.ll
|
|
|
xxeval-and-nand.ll
|
|
|
xxleqv_xxlnand_xxlorc.ll
|
|
|
xxpermdi_mnemonics.s
|
[PowerPC][AIX]Do not emit xxspltd mnemonic on AIX.
|
2021-01-18 09:25:31 -05:00 |
zero-not-run.ll
|
Revert "[NFC] remove explicit default value for strboolattr attribute in tests"
|
2021-05-24 19:43:40 +02:00 |
zext-and-cmp.ll
|
|
|
zext-bitperm.ll
|
|
|
zext-free.ll
|
|
|