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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00
llvm-mirror/test/CodeGen/PowerPC
2020-11-18 02:12:01 +00:00
..
GlobalISel [PPC][GlobalISel] Add initial GlobalIsel infrastructure 2020-09-10 11:58:01 -05:00
2004-11-29-ShrCrash.ll
2004-11-30-shift-crash.ll
2004-11-30-shr-var-crash.ll
2004-12-12-ZeroSizeCommon.ll
2005-01-14-SetSelectCrash.ll
2005-01-14-UndefLong.ll
2005-08-12-rlwimi-crash.ll
2005-09-02-LegalizeDuplicatesCalls.ll
2005-10-08-ArithmeticRotate.ll
2005-11-30-vastart-crash.ll
2006-01-11-darwin-fp-argument.ll
2006-01-20-ShiftPartsCrash.ll
2006-04-01-FloatDoubleExtend.ll
2006-04-05-splat-ish.ll
2006-04-19-vmaddfp-crash.ll
2006-05-12-rlwimi-crash.ll
2006-07-07-ComputeMaskedBits.ll
2006-07-19-stwbrx-crash.ll
2006-08-11-RetVector.ll
2006-08-15-SelectionCrash.ll
2006-09-28-shift_64.ll
2006-10-13-Miscompile.ll
2006-10-17-brcc-miscompile.ll
2006-10-17-ppc64-alloca.ll
2006-11-10-DAGCombineMiscompile.ll
2006-11-29-AltivecFPSplat.ll
2006-12-07-LargeAlloca.ll
2006-12-07-SelectCrash.ll
2007-01-04-ArgExtension.ll
2007-01-15-AsmDialect.ll
2007-01-29-lbrx-asm.ll
2007-01-31-InlineAsmAddrMode.ll
2007-02-16-AlignPacked.ll
2007-02-16-InlineAsmNConstraint.ll
2007-02-23-lr-saved-twice.ll
2007-03-24-cntlzd.ll
2007-03-30-SpillerCrash.ll
2007-04-24-InlineAsm-I-Modifier.ll
2007-04-30-InlineAsmEarlyClobber.ll
2007-05-03-InlineAsm-S-Constraint.ll
2007-05-14-InlineAsmSelectCrash.ll
2007-05-22-tailmerge-3.ll
2007-05-30-dagcombine-miscomp.ll
2007-06-28-BCCISelBug.ll
2007-08-04-CoalescerAssert.ll
2007-09-04-AltivecDST.ll
2007-09-07-LoadStoreIdxForms.ll
2007-09-08-unaligned.ll
2007-09-11-RegCoalescerAssert.ll
2007-09-12-LiveIntervalsAssert.ll
2007-10-16-InlineAsmFrameOffset.ll
2007-10-18-PtrArithmetic.ll
2007-10-21-LocalRegAllocAssert2.ll
2007-10-21-LocalRegAllocAssert.ll
2007-11-04-CoalescerCrash.ll
2007-11-16-landingpad-split.ll
2007-11-19-VectorSplitting.ll
2008-02-05-LiveIntervalsAssert.ll
2008-02-09-LocalRegAllocAssert.ll
2008-03-05-RegScavengerAssert.ll
2008-03-17-RegScavengerCrash.ll
2008-03-18-RegScavengerAssert.ll
2008-03-24-AddressRegImm.ll
2008-03-24-CoalescerBug.ll
2008-03-26-CoalescerBug.ll
2008-04-10-LiveIntervalCrash.ll
2008-04-16-CoalescerBug.ll
2008-04-23-CoalescerCrash.ll
2008-05-01-ppc_fp128.ll
2008-06-19-LegalizerCrash.ll
2008-06-21-F128LoadStore.ll
2008-06-23-LiveVariablesCrash.ll
2008-07-10-SplatMiscompile.ll
2008-07-15-Bswap.ll
2008-07-15-Fabs.ll
2008-07-15-SignExtendInreg.ll
2008-07-17-Fneg.ll
2008-07-24-PPC64-CCBug.ll
2008-09-12-CoalescerBug.ll
2008-10-17-AsmMatchingOperands.ll
2008-10-28-f128-i32.ll
2008-10-28-UnprocessedNode.ll
2008-12-02-LegalizeTypeAssert.ll
2009-01-16-DeclareISelBug.ll
2009-03-17-LSRBug.ll
2009-05-28-LegalizeBRCC.ll
2009-07-16-InlineAsm-M-Operand.ll
2009-08-17-inline-asm-addr-mode-breakage.ll
2009-09-18-carrybit.ll
2009-11-15-ProcImpDefsBug.ll
2009-11-25-ImpDefBug.ll
2010-02-04-EmptyGlobal.ll
2010-02-12-saveCR.ll
2010-03-09-indirect-call.ll
2010-04-01-MachineCSEBug.ll
2010-05-03-retaddr1.ll
2010-10-11-Fast-Varargs.ll
2010-12-18-PPCStackRefs.ll
2011-12-05-NoSpillDupCR.ll
2011-12-06-SpillAndRestoreCR.ll
2011-12-08-DemandedBitsMiscompile.ll
2012-09-16-TOC-entry-check.ll
2012-10-11-dynalloc.ll
2012-10-12-bitcast.ll
2012-11-16-mischedcall.ll
2013-05-15-preinc-fold.ll
2013-07-01-PHIElimBug.mir
2016-01-07-BranchWeightCrash.ll
2016-04-16-ADD8TLS.ll
2016-04-17-combine.ll
2016-04-28-setjmp.ll
2018-09-19-sextinreg-vector-crash.ll
a2-fp-basic.ll
aa-tbaa.ll
aantidep-def-ec.mir
aantidep-inline-asm-use.ll
absol-jump-table-enabled.ll
add_cmp.ll
add-fi.ll
addc.ll
adde_return_type.ll
addegluecrash.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
addi-licm.ll
addi-offset-fold.ll
addi-reassoc.ll
addisdtprelha-nonr3.mir
addrfuncstr.ll
addrspacecast.ll
addze.ll
aggressive-anti-dep-breaker-subreg.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
aix32-cc-abi-vaarg.ll
aix32-crsave.mir
aix64-cc-abi-vaarg.ll
aix64-cc-byval.ll
aix-alias-unsupported.ll
aix-alias.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-AppendingLinkage.ll
aix-available-externally-linkage.ll
aix-base-pointer.ll
aix-bytestring.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-calleesavedregs.ll
aix-cc-abi.ll [SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore. 2020-09-14 13:54:50 -07:00
aix-cc-altivec.ll
aix-cc-byval-limitation3.ll
aix-cc-byval-mem.ll
aix-cc-byval-split.ll
aix-cc-byval.ll
aix-complex.ll
aix-crspill.ll
aix-csr.ll
aix-extern-weak.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-extern.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-external-sym-sdnode-lowering.ll
aix-framepointer-save-restore.ll
aix-func-align.ll
aix-func-dsc-gen.ll
aix-ignore-xcoff-visibility.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-indirect-call.ll
aix-internal.ll
aix-LinkOnceAnyLinkage.ll
aix-LinkOnceODRLinkage.ll
aix-llvm-intrinsic.ll
aix-lower-block-address.ll
aix-lower-constant-pool-index.ll
aix-lower-jump-table.ll
aix-lr.ll
aix-nest-param.ll
aix-nonzero-zerofill.ll
aix-overflow-toc.py [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-print-pc.mir
aix-readonly-with-relocation.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-reference-func-addr-const.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-return55.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-space.ll
aix-sret-param.ll
aix-static-init-default-priority.ll
aix-static-init-key-object.ll
aix-static-init-no-unique-module-id.ll
aix-static-init-non-default-priority.ll
aix-trampoline.ll
aix-undef-func-call.ll
aix-user-defined-memcpy.ll
aix-vector-return.ll [PowerPC] Remove support for VRSAVE save/restore/update. 2020-09-30 10:05:53 -04:00
aix-weak-undef-func-call.ll
aix-weak.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-WeakODRLinkage.ll
aix-xcoff-data-only-notoc.ll
aix-xcoff-data-sections.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-xcoff-data.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-xcoff-endian-error.ll
aix-xcoff-error-explicit-data-section.ll [XCOFF] Enable explicit sections on AIX 2020-11-09 16:27:38 +00:00
aix-xcoff-explicit-section.ll [XCOFF] Enable explicit sections on AIX 2020-11-09 16:27:38 +00:00
aix-xcoff-externL.ll
aix-xcoff-funcsect.ll
aix-xcoff-huge-relocs.ll
aix-xcoff-lcomm.ll
aix-xcoff-lower-comm.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-xcoff-mergeable-const.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-xcoff-mergeable-str.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-xcoff-reloc-large.ll
aix-xcoff-reloc-symb.mir
aix-xcoff-reloc.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-xcoff-rodata.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-xcoff-symbol-rename.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-xcoff-textdisassembly.ll
aix-xcoff-toc.ll
aix-xcoff-used.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
aix-xcoff-visibility.ll [AIX] Turn -fdata-sections on by default in Clang 2020-10-14 15:58:31 +00:00
alias.ll
align.ll
alignlongjumptest.mir
alloca-crspill.ll
allocate-r0.ll
altivec-ord.ll
and_add.ll
and_sext.ll
and_sra.ll
and-branch.ll
and-elim.ll
and-imm.ll
and-mask.ll
andc.ll
anon_aggr.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
anyext_srl.ll
arr-fp-arg-no-copy.ll
ashr-neg1.ll
asm-constraints.ll
asm-dialect.ll
asm-printer-topological-order.ll
asm-Zy.ll
asym-regclass-copy.ll
atomic-1.ll
atomic-2.ll
atomic-minmax.ll
Atomics-64.ll
atomics-constant.ll
atomics-fences.ll
atomics-indexed.ll [PowerPC] Set setMaxAtomicSizeInBitsSupported appropriately for 32-bit PowerPC in PPCTargetLowering 2020-09-08 21:21:14 -04:00
atomics-regression.ll
atomics.ll [PowerPC] Set setMaxAtomicSizeInBitsSupported appropriately for 32-bit PowerPC in PPCTargetLowering 2020-09-08 21:21:14 -04:00
available-externally.ll
bdzlr.ll
bfloat16-outer-product.ll [PowerPC] Add intrinsics for MMA 2020-10-23 13:16:02 -05:00
big-endian-actual-args.ll
big-endian-call-result.ll
big-endian-formal-args.ll
big-endian-store-forward.ll
bitcast-peephole.mir
bitcasts-direct-move.ll
bitfieldinsert.ll
block-placement-1.mir
block-placement.mir
blockaddress.ll
bool-math.ll
BoolRetToIntTest-2.ll
BoolRetToIntTest.ll
botheightreduce.mir
bperm.ll
branch_coalesce.ll [NFC][Test] Update the test with update_llc_test_checks.py 2020-10-09 02:26:03 +00:00
branch_selector.ll
branch-hint.ll
branch-opt.ll
brcond.ll
BreakableToken-reduced.ll
bswap64.ll
bswap-load-store.ll
build-vector-allones.ll
build-vector-tests.ll
buildvec_canonicalize.ll
builtins-ppc-elf2-abi.ll
builtins-ppc-p8vector.ll
builtins-ppc-p9-f128.ll
builtins-ppc-p10permute.ll
builtins-ppc-p10vsx.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
bv-pres-v8i1.ll
bv-widen-undef.ll
byval-agg-info.ll
byval-aliased.ll
calls.ll
can-lower-ret.ll
cannonicalize-vector-shifts.ll
canonical-merge-shuffles.ll
cc.ll
change-no-infs.ll
check-cpu.ll
cmp_elimination.ll
cmp-cmp.ll
cmpb-ppc32.ll
cmpb.ll
coalesce-ext.ll
code-align.ll
codemodel.ll
coldcc2.ll
coldcc.ll
collapse-rotates.mir
combine_ext_trunc.ll
combine-fneg.ll
combine-setcc.ll
combine-sext-and-shl-after-isel.ll
combine-to-mulh-shift-amount.ll
combine-to-pre-index-store-crash.ll
compare-duplicate.ll
compare-simm.ll
CompareEliminationSpillIssue.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
complex-return.ll
constant-combines.ll
constant-pool.ll [NFC][Test] Add tests for constant pool on PowerPC 2020-11-09 09:17:28 +00:00
constants-i64.ll [NFC][PowerPC] Add testcase of constant-i64. 2020-11-17 04:49:19 +00:00
constants.ll
convert-ri-addi-to-ri.mir
convert-rr-to-ri-instr-add.mir
convert-rr-to-ri-instrs-kill-flag.mir
convert-rr-to-ri-instrs-out-of-range.mir
convert-rr-to-ri-instrs-R0-special-handling.mir
convert-rr-to-ri-instrs.mir
convert-rr-to-ri-p9-vector.mir
copysignl.ll
cr1eq-no-extra-moves.ll
cr1eq.ll
cr_spilling.ll
cr-spills.ll
crash.ll
crbit-asm-disabled.ll
crbit-asm.ll
crbits.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
crsave.ll
crypto_bifs.ll
CSR-fit.ll
csr-save-restore-order.ll
csr-split.ll
ctr-cleanup.ll
ctr-loop-tls-const.ll
ctr-minmaxnum.ll
ctrloop-asm.ll
ctrloop-constrained-fp.ll
ctrloop-cpsgn.ll
ctrloop-fp64.ll
ctrloop-fp128.ll
ctrloop-i64.ll
ctrloop-i128.ll
ctrloop-intrin.ll
ctrloop-large-ec.ll
ctrloop-le.ll
ctrloop-lt.ll
ctrloop-ne.ll
ctrloop-reg.ll
ctrloop-s000.ll
ctrloop-sh.ll
ctrloop-shortLoops.ll
ctrloop-sums.ll
ctrloop-udivti3.ll
ctrloops-hot-exit.ll
ctrloops-softfloat.ll
ctrloops.ll
cttz.ll
cxx_tlscc64.ll
darwin-labels.ll
dbg.ll
DbgValueOtherTargets.test
dcbf.ll
dcbt-sched.ll
dcbt.ll
debuginfo-split-int.ll
debuginfo-stackarg.ll
delete-node.ll
dform-adjust.ll
dform-pair-load-store.ll [PowerPC] Add paired vector load and store builtins and intrinsics 2020-11-13 12:35:10 -06:00
direct-move-profit.ll
DisableHoistingDueToBlockHotnessNoProfileData.mir
DisableHoistingDueToBlockHotnessProfileData.mir
div-2.ll
div-e-32.ll
div-e-all.ll
duplicate-returns-for-tailcall.ll
dyn-alloca-aligned.ll
dyn-alloca-offset.ll
e500-1.ll
early-ret2.ll
early-ret-verify.mir
early-ret.ll
early-ret.mir
ec-input.ll
eh-dwarf-cfa.ll
eieio.ll
elf-common.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
eliminate-compare-of-copy.ll
empty-functions.ll
emptystruct.ll
emutls_generic.ll
eqv-andc-orc-nor.ll
expand-contiguous-isel.ll
expand-foldable-isel.ll
expand-isel-1.mir
expand-isel-2.mir
expand-isel-3.mir
expand-isel-4.mir
expand-isel-5.mir
expand-isel-6.mir
expand-isel-7.mir
expand-isel-8.mir
expand-isel-9.mir
expand-isel-10.mir
expand-isel-liveness.mir
expand-isel.ll
ext-bool-trunc-repl.ll
extra-toc-reg-deps.ll
extract-and-store.ll
extsh.ll
extswsli.ll
f32-to-i64.ll
f128-aggregates.ll [NFC][Test] Add test coverage for IEEE Long Double on Power8 2020-11-16 03:45:51 +00:00
f128-arith.ll [NFC][Test] Add more tests for IEEE Longdouble for PowerPC 2020-11-18 02:12:01 +00:00
f128-bitcast.ll [NFC][Test] Add test coverage for IEEE Long Double on Power8 2020-11-16 03:45:51 +00:00
f128-compare.ll [NFC][Test] Add test coverage for IEEE Long Double on Power8 2020-11-16 03:45:51 +00:00
f128-conv.ll [NFC][Test] Add more tests for IEEE Longdouble for PowerPC 2020-11-18 02:12:01 +00:00
f128-fma.ll [NFC][Test] Add test coverage for IEEE Long Double on Power8 2020-11-16 03:45:51 +00:00
f128-passByValue.ll [NFC][Test] Add test coverage for IEEE Long Double on Power8 2020-11-16 03:45:51 +00:00
f128-rounding.ll [NFC][Test] Add test coverage for IEEE Long Double on Power8 2020-11-16 03:45:51 +00:00
f128-truncateNconv.ll [NFC][Test] Add test coverage for IEEE Long Double on Power8 2020-11-16 03:45:51 +00:00
f128-vecExtractNconv.ll
fabs.ll
fast-isel-binary.ll
fast-isel-br-const.ll
fast-isel-call.ll
fast-isel-cmp-imm.ll
fast-isel-const.ll
fast-isel-conversion-p5.ll
fast-isel-conversion.ll
fast-isel-crash.ll
fast-isel-ext.ll
fast-isel-fcmp-nan.ll
fast-isel-fold.ll
fast-isel-fpconv.ll
fast-isel-GEP-coalesce.ll
fast-isel-i64offset.ll
fast-isel-icmp-split.ll
fast-isel-indirectbr.ll
fast-isel-load-store-vsx.ll
fast-isel-load-store.ll
fast-isel-pcrel.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
fast-isel-redefinition.ll
fast-isel-ret.ll
fast-isel-rsp.ll
fast-isel-shifter.ll
fastcc_stacksize.ll
fastisel-gep-promote-before-add.ll
fcpsgn.ll
fdiv-combine.ll
fdiv.ll
fixup-kill-dead-flag-crash.mir
float-asmprint.ll
float-load-store-pair.ll
float-logic-ops.ll
float-to-int.ll
float-vector-gather.ll
floatPSA.ll
flt-preinc.ll
fma-aggr-FMF.ll
fma-assoc.ll
fma-combine.ll [DAGCombiner] Tighten reasscociation of visitFMA 2020-10-20 10:13:01 +08:00
fma-ext.ll
fma-mutate-duplicate-vreg.ll
fma-mutate-register-constraint.ll
fma-mutate.ll
fma-negate.ll
fma-precision.ll
fma.ll
fmaxnum.ll
fmf-propagation.ll [SelectionDAGBuilder] Pass fast math flags to getNode calls rather than trying to set them after the fact.: 2020-09-08 15:27:21 -07:00
fminnum.ll [SelectionDAG] fminnum should be a binary operator 2020-11-11 03:41:40 -05:00
fnabs.ll
fneg.ll
fold-frame-offset-using-rr.mir
fold-li.ll
fold-remove-li.ll
fold-rlwinm-1.ll
fold-rlwinm.mir [NFC][PowerPC]Add tests for folding RLWINM before and after RA. 2020-10-21 06:38:22 +00:00
fold-zero.ll
fp2int2fp-ppcfp128.ll
fp64-to-int16.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
fp128-bitcast-after-operation.ll
fp128-libcalls.ll
fp_to_uint.ll
fp-branch.ll
fp-int128-fp-combine.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
fp-int-conversions-direct-moves.ll
fp-int-fp.ll
fp-intrinsics-fptosi-legal.ll
fp-splat.ll
fp-strict-conv-f128.ll [NFC] Move PPC strict-fp MIR test to dedicated file 2020-10-12 10:40:19 +08:00
fp-strict-conv-spe.ll
fp-strict-conv.ll [PowerPC] Pass nofpexcept flag to custom lowered constrained ops 2020-09-21 10:44:25 +08:00
fp-strict-f128.ll
fp-strict-fcmp-noopt.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
fp-strict-fcmp.ll
fp-strict-minmax.ll
fp-strict-round.ll [PowerPC] Fix STRICT_FRINT/STRICT_FNEARBYINT lowering 2020-09-09 22:40:58 +08:00
fp-strict.ll
fp-to-int-ext.ll
fp-to-int-to-fp.ll
fpcopy.ll
frame-size.ll
frameaddr.ll
Frames-dyn-alloca-with-func-call.ll
Frames-dyn-alloca.ll
Frames-large.ll
Frames-leaf.ll
Frames-small.ll
Frames-stack-floor.ll
frounds.ll
fsel.ll
fsl-e500mc.ll
fsl-e5500.ll
fsqrt.ll
fsub-fneg.ll
ftrunc-legalize.ll
ftrunc-vec.ll
func-addr-consts.ll
func-addr.ll
func-alias.ll
funnel-shift-rot.ll [PowerPC] ReplaceNodeResults - bail on funnel shifts and let generic legalizers deal with it 2020-10-10 19:13:16 +01:00
funnel-shift.ll [PowerPC] ReplaceNodeResults - bail on funnel shifts and let generic legalizers deal with it 2020-10-10 19:13:16 +01:00
fusion-load-store.ll Reland "[PowerPC] Implement instruction clustering for stores" 2020-09-13 19:51:01 +08:00
future-check-features.ll
glob-comp-aa-crash.ll
global-address-non-got-indirect-access.ll
gpr-vsr-spill.ll
handle-f16-storage-type.ll
hardware-loops-crash.ll
hello.ll
hidden-vis-2.ll
hidden-vis.ll
hoist-logic.ll
htm-ttest.ll [PowerPC] Put the CR field in low bits of GRC during copying CRRC to GRC. 2020-10-02 01:26:18 +00:00
htm.ll
i1-ext-fold.ll
i1-to-double.ll
i32-to-float.ll
i64_fp_round.ll
i64_fp.ll
i64-to-float.ll
i128-and-beyond.ll
ia-mem-r0.ll
ia-neg-const.ll
iabs.ll
ifcvt-diamond-ret.mir
ifcvt-forked-bug-2016-08-08.ll
ifcvt.ll
ifcvt.mir
ifunc.ll
illegal-element-type.ll
in-asm-f64-reg.ll
inc-of-add.ll
indexed-load.ll
indirect-hidden.ll
indirectbr.ll
inline-asm-i-constraint-i1.ll
inline-asm-multilevel-gep.ll
inline-asm-s-modifier.ll
inline-asm-scalar-to-vector-error.ll
inline-asm-vsx-clobbers.ll
inlineasm-copy.ll
inlineasm-extendedmne.ll
inlineasm-i64-reg.ll
inlineasm-output-template.ll
inlineasm-vsx-reg.ll
instr-properties.ll
int-fp-conv-0.ll
int-fp-conv-1.ll
inverted-bool-compares.ll
isel-rc-nox0.ll
isel.ll
ispositive.ll
isync.ll
itofp128.ll
jaggedstructs.ll
jump-tables-collapse-rotate-remove-SrcMI.mir
jump-tables-collapse-rotate.ll
kernel-fp-round.ll
knowCRBitSpill.ll
LargeAbsoluteAddr.ll
larger-than-red-zone.ll
lbz-from-ld-shift.ll
lbzux.ll
ld-st-upd.ll
ldtoc-inv.ll
legalize-vaarg.ll
lha.ll
licm-remat.ll
licm-tocReg.ll
lit.local.cfg [XCOFF][AIX] Handle TOC entries that could not be reached by positive range in small code model 2020-09-14 13:41:34 +00:00
livephysregs.mir
livevars-crash1.mir
livevars-crash2.mir
llrint-conv.ll
llround-conv.ll
load-and-splat.ll
load-constant-addr.ll
load-shift-combine.ll
load-shuffle-and-shuffle-store.ll
load-two-flts.ll
load-v4i8-improved.ll
logic-ops-on-compares.ll
long-compare.ll
longcall.ll
longdbl-truncate.ll
loop-align.ll
loop-comment.ll
loop-data-prefetch-inner.ll
loop-data-prefetch.ll
loop-hoist-toc-save.ll
loop-instr-form-prepare.ll
loop-p10-pair-prepare.ll [PowerPC] Add paired vector load and store builtins and intrinsics 2020-11-13 12:35:10 -06:00
loop-prep-all.ll
lower-globaladdr32-aix-asm.ll
lower-globaladdr32-aix.ll
lower-globaladdr64-aix-asm.ll
lower-globaladdr64-aix.ll
lower-massv-attr.ll
lower-massv.ll
lrint-conv.ll
lround-conv.ll
lsa.ll
lsr-ctrloop.ll
lsr-insns-cost.ll
lsr-postinc-pos.ll
lsr-profitable-chain.ll [LSR] ignore profitable chain when reg num is not major cost. 2020-10-23 09:35:48 -04:00
lxv-aligned-stack-slots.ll
lxvw4x-bug.ll
machine-backward-cp.mir
machine-combiner.ll
machine-pre.ll
macro-fusion.ll
maddld.ll
mask64.ll
mature-mc-support.ll
mc-instrlat.ll
mcm-1.ll
mcm-2.ll
mcm-3.ll
mcm-4.ll
mcm-5.ll
mcm-6.ll
mcm-7.ll
mcm-8.ll
mcm-9.ll
mcm-10.ll
mcm-11.ll
mcm-12.ll
mcm-13.ll
mcm-default.ll
mcm-obj-2.ll
mcm-obj.ll
mcount-insertion.ll
MCSE-caller-preserved-reg.ll
mem_update.ll
mem-rr-addr-mode.ll
memcmp-mergeexpand.ll
memcmp.ll
memcmpIR.ll
memCmpUsedInZeroEqualityComparison.ll
memcpy_dereferenceable.ll
memcpy-vec.ll
memset-nc-le.ll
merge_stores_dereferenceable.ll
merge-st-chain-op.ll
MergeConsecutiveStores.ll
mftb.ll
mi-peephole-splat.ll
mi-peephole.mir
mi-scheduling-lhs.ll
mi-simplify-code.mir
misched-inorder-latency.ll
misched.ll
mma-acc-memops.ll [PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types 2020-09-28 14:39:37 -05:00
mma-acc-spill.ll [PowerPC] Accumulator/Unprimed Accumulator register copy, spill and restore 2020-11-11 16:23:45 -06:00
mma-integer-based-outer-product.ll [PowerPC] Add intrinsics for MMA 2020-10-23 13:16:02 -05:00
mma-intrinsics.ll [PowerPC] Add paired vector load and store builtins and intrinsics 2020-11-13 12:35:10 -06:00
mma-outer-product.ll [PowerPC] Add intrinsics for MMA 2020-10-23 13:16:02 -05:00
MMO-flags-assertion.ll
mtvsrdd.ll
mul-const-i64.ll
mul-const-vector.ll
mul-const.ll
mul-high.ll
mul-with-overflow.ll
mulhs.ll
mulld.ll
mulli.ll [PowerPC] Add an ISEL pattern for Mul with Imm. 2020-11-10 06:52:39 +00:00
mult-alt-generic-powerpc64.ll
mult-alt-generic-powerpc.ll
multi-return.ll
named-reg-alloc-r0.ll
named-reg-alloc-r1-64.ll
named-reg-alloc-r1.ll
named-reg-alloc-r2-64.ll
named-reg-alloc-r2.ll
named-reg-alloc-r13-64.ll
named-reg-alloc-r13.ll
neg-abs.ll [PowerPC] Add negated abs test using llvm.abs intrinsic. NFC. 2020-11-17 09:28:56 +00:00
neg.ll
negate-i1.ll
negctr.ll
no-ctr-loop-if-exit-in-nested-loop.ll
no-dead-strip.ll
no-dup-of-bdnz.ll [EarlyCSE] Verify hash code in regression tests 2020-09-04 10:40:35 -04:00
no-dup-spill-fp.ll
no-duplicate.ll
no-ext-with-count-zeros.ll
no-extra-fp-conv-ldst.ll
no-pref-jumps.ll
no-rlwimi-trivial-commute.mir
NoCRFieldRedefWhenSpillingCRBIT.mir
nofpexcept.ll [NFC] Move PPC strict-fp MIR test to dedicated file 2020-10-12 10:40:19 +08:00
nomerge.ll
non-simple-args-intrin.ll
noPermuteFormasking.ll
not-fixed-frame-object.ll
novrsave.ll
opt-cmp-inst-cr0-live.ll
opt-li-add-to-addi.ll
opt-sub-inst-cr0-live.mir
optcmp.ll
optimize-andiso.ll
optnone-crbits-i1-ret.ll
or-addressing-mode.ll
ori_imm32.ll
ori_imm64.ll
p8-isel-sched.ll
p8-scalar_vector_conversions.ll
p8altivec-shuffles-pred.ll
p9_copy_fp.ll
p9-dform-load-alignment.ll
p9-vector-compares-and-counts.ll
p9-vector-sign-extend.ll [PowerPC] Implementation of 128-bit Binary Vector Mod and Sign Extend builtins 2020-09-23 01:18:14 -05:00
p9-vinsert-vextract.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
p9-xxinsertw-xxextractuw.ll
p10-bit-manip-ops.ll
p10-setbc-ri.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
p10-setbc-rr.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
p10-setbcr-ri.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
p10-setbcr-rr.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
p10-setboolean-ext-fp.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
p10-setnbc-ri.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
p10-setnbc-rr.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
p10-setnbcr-ri.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
p10-setnbcr-rr.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
p10-spill-creq.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
p10-spill-crgt.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
p10-spill-crlt.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
p10-spill-crun.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
p10-splatImm32.ll
p10-splatImm-CPload-pcrel.ll [PowerPC] Fix the Predicates for enabling pcrelative-memops and PLXVP/PSTXVP definitions 2020-10-23 11:33:20 -05:00
p10-splatImm.ll
p10-string-ops.ll [PowerPC] Implement Vector String Isolate Builtins in Clang/LLVM 2020-09-22 11:31:44 -05:00
p10-vector-divide.ll [PowerPC] Implement the 128-bit Vector Divide Extended Builtins in Clang/LLVM 2020-09-22 11:31:44 -05:00
p10-vector-mask-ops.ll [PowerPC] Implement Move to VSR Mask builtins in LLVM/Clang 2020-09-18 18:16:14 -05:00
p10-vector-modulo.ll [PowerPC] Implementation of 128-bit Binary Vector Mod and Sign Extend builtins 2020-09-23 01:18:14 -05:00
p10-vector-multiply.ll
p10-vector-rotate.ll [PowerPC] Implementation of 128-bit Binary Vector Rotate builtins 2020-10-16 18:03:22 -04:00
p10-vector-shift.ll
p10-vector-sign-extend.ll [PowerPC] Implementation of 128-bit Binary Vector Mod and Sign Extend builtins 2020-09-23 01:18:14 -05:00
p10-vsx-pcv.ll
pcrel-block-address.ll
pcrel-call-linkage-leaf.ll Reland "[PowerPC] Implement instruction clustering for stores" 2020-09-13 19:51:01 +08:00
pcrel-call-linkage-simple.ll
pcrel-call-linkage-with-calls.ll [Power10] Enable the heuristic for Power10 and switch the sched model 2020-09-12 02:49:47 +00:00
pcrel-got-indirect.ll
pcrel-indirect-call.ll
pcrel-jump-table.ll
pcrel-linkeropt-option.ll
pcrel-linkeropt.ll
pcrel-local-caller-toc.ll
pcrel-relocation-plus-offset.ll
pcrel-tail-calls.ll [Power10] Enable the heuristic for Power10 and switch the sched model 2020-09-12 02:49:47 +00:00
pcrel-tls-general-dynamic.ll [PowerPC][PCRelative] Turn on TLS support for PCRel by default 2020-10-27 13:58:44 -05:00
pcrel-tls-initial-exec.ll [PowerPC][PCRelative] Turn on TLS support for PCRel by default 2020-10-27 13:58:44 -05:00
pcrel-tls-local-dynamic.ll [PowerPC][PCRelative] Turn on TLS support for PCRel by default 2020-10-27 13:58:44 -05:00
pcrel-tls-local-exec.ll [PowerPC][PCRelative] Turn on TLS support for PCRel by default 2020-10-27 13:58:44 -05:00
pcrel.ll
peephole-align.ll
peephole-miscompile-extswsli.mir
phi-eliminate.mir
pie.ll
pip-inner.ll
popcnt-zext.ll
popcnt.ll
popcount.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
post-ra-ec.ll
pow_massv_075_025exp.ll
pow.75.ll
power9-moves-and-splats.ll
powf_massv_075_025exp.ll
ppc32-align-long-double-sf.ll
ppc32-constant-BE-ppcf128.ll
ppc32-cyclecounter.ll
ppc32-i1-stack-arguments-abi-bug.ll
ppc32-i1-vaarg.ll
ppc32-i64-to-float-conv.ll
ppc32-lshrti3.ll
ppc32-nest.ll
ppc32-pic-large.ll
ppc32-pic.ll
ppc32-secure-plt-tls2.ll
ppc32-secure-plt-tls.ll
ppc32-skip-regs.ll
ppc32-vacopy.ll
ppc64-32bit-addic.ll
ppc64-abi-extend.ll
ppc64-align-long-double.ll
ppc64-altivec-abi.ll
ppc64-anyregcc-crash.ll
ppc64-anyregcc.ll
ppc64-blnop.ll
ppc64-byval-align.ll
ppc64-calls.ll
ppc64-crash.ll
ppc64-crsave.mir
ppc64-cyclecounter.ll
ppc64-elf-abi.ll
ppc64-fastcc-fast-isel.ll
ppc64-fastcc.ll
ppc64-func-desc-hoist.ll
ppc64-gep-opt.ll
ppc64-get-cache-line-size.ll
ppc64-i128-abi.ll
ppc64-icbt-pwr7.ll
ppc64-icbt-pwr8.ll
ppc64-linux-func-size.ll
ppc64-nest.ll
ppc64-nonfunc-calls.ll
ppc64-P9-mod.ll
ppc64-P9-setb.ll [PowerPC] Fix a crash in POWER 9 setb peephole 2020-11-02 14:29:43 +08:00
ppc64-P9-vabsd.ll
ppc64-patchpoint.ll
ppc64-pre-inc-no-extra-phi.ll
ppc64-prefetch.ll
ppc64-r2-alloc.ll
ppc64-sibcall-shrinkwrap.ll
ppc64-sibcall.ll
ppc64-smallarg.ll
ppc64-stackmap-nops.ll
ppc64-stackmap.ll
ppc64-toc.ll
ppc64-vaarg-int.ll
ppc64-varargs.ll
ppc64-zext.ll
ppc64le-aggregates.ll
ppc64le-calls.ll
ppc64le-crsave.ll
ppc64le-localentry-large.ll
ppc64le-localentry.ll
ppc64le-smallarg.ll
ppc440-fp-basic.ll
ppc440-msync.ll
ppc-32bit-shift.ll [PPC] Do not emit extswsli in 32BIT mode when using -mcpu=pwr9 2020-09-30 11:06:20 -04:00
ppc-crbits-onoff.ll
ppc-ctr-dead-code.ll
ppc-disable-non-volatile-cr.ll
ppc-empty-fs.ll
ppc-label2.ll
ppc-label.ll
ppc-passname-assert.ll
ppc-passname.ll
ppc-prologue.ll
ppc-redzone-alignment-bug.ll
ppc-shrink-wrapping.ll
ppc-vaarg-agg.ll
ppcf128-1-opt.ll
ppcf128-1.ll
ppcf128-2.ll
ppcf128-3.ll
ppcf128-4.ll
ppcf128-constrained-fp-intrinsics.ll [PowerPC] Avoid unnecessary fadd for unsigned to ppcf128 2020-11-01 23:22:47 +08:00
ppcf128-endian.ll [NFC][Test] Update the test with update_llc_test_checks.py 2020-10-09 02:26:03 +00:00
ppcf128-freeze.mir
ppcf128sf.ll
ppcsoftops.ll
pr3711_widen_bit.ll
pr12757.ll
pr13641.ll
pr13891.ll
pr15031.ll
pr15359.ll
pr15630.ll
pr15632.ll
pr16556-2.ll
pr16556.ll
pr16573.ll
pr17168.ll
pr17354.ll
pr18663-2.ll
pr18663.ll
pr20442.ll
pr22711.ll
pr24216.ll
pr24546.ll
pr24636.ll
pr25080.ll
pr25157-peephole.ll
pr25157.ll
pr26180.ll
pr26193.ll
pr26356.ll
pr26378.ll
pr26381.ll
pr26617.ll
pr26690.ll
pr27078.ll
pr27350.ll
pr28130.ll
pr28630.ll
pr30451.ll
pr30640.ll
pr30663.ll
pr30715.ll
pr31144.ll
pr32063.ll
pr32140.ll
pr33093.ll
pr33547.ll
pr35402.ll
pr35688.ll
pr36068.ll
pr36292.ll
pr38087.ll
pr38899-split-register-at-spill.mir
pr39478.ll
pr39815.ll
pr40922.ll
pr41088.ll
pr41177.ll
pr42492.ll
pr43527.ll
pr43976.ll
pr44183.ll [DAG] computeKnownBits - Move (most) ISD::SHL handling into KnownBits::shl 2020-11-03 14:22:28 +00:00
pr44239.ll
pr45186.ll
pr45297.ll
pr45301.ll
pr45432.ll
pr45448.ll
pr45628.ll
pr45709.ll
pr46759.ll
pr46923.ll
pr47373.ll
pr47660.ll [PowerPC] Skip combining (uint_to_fp x) if x is not simple type 2020-10-19 05:23:46 +00:00
pr47707.ll [TwoAddressInstruction][PowerPC] Call regOverlapsSet to find out real clobbers and uses 2020-10-09 02:34:54 +00:00
pr47830.ll [PowerPC] Add test case for pr47830. NFC. 2020-10-26 09:11:33 +00:00
pr47891.ll [PowerPC] Fix single-use check and update chain users for ld-splat 2020-10-27 16:49:38 -05:00
PR3488.ll
PR33636.ll
PR33671.ll
PR35812-neg-cmpxchg.ll
pre-inc-disable.ll
preemption.ll
prefer-dqform.ll
preinc-ld-sel-crash.ll
preincprep-i64-check.ll
preincprep-invoke.ll
preincprep-nontrans-crash.ll
private.ll
prolog_vec_spills.mir [PrologEpilogInserter][test] Improve SpilledToReg test 2020-10-17 20:36:22 -07:00
pwr3-6x.ll
pwr7-gt-nop.ll
pzero-fp-xored.ll
quadint-return.ll
r31.ll
read-set-flm.ll
recipest.ll
reduce_cr.ll
reduce_scalarization02.ll
reduce_scalarization.ll
redundant-copy-after-tail-dup.ll
reg_copy.mir [NFC][PowerPC] Supplement test cases for D88274. 2020-10-09 02:32:05 +00:00
reg-coalesce-simple.ll
reg-names.ll
reg-scavenging.ll
reloc-align.ll
remap-crash.ll
remat-imm.ll
rematerializable-instruction-machine-licm.ll
remove-copy-crunsetcrbit.mir
remove-implicit-use.mir
remove-redundant-li-skip-imp-kill.mir
remove-redundant-load-imm.ll
remove-redundant-load-imm.mir
remove-redundant-moves.ll
remove-redundant-toc-saves.ll
remove-self-copies.mir
repeated-fp-divisors.ll
resolvefi-basereg.ll
resolvefi-disp.ll
restore-r30.ll
retaddr2.ll
retaddr.ll
return-val-i128.ll
rlwimi2.ll
rlwimi3.ll
rlwimi-and-or-bits.ll
rlwimi-and.ll
rlwimi-commute.ll
rlwimi-dyn-and.ll
rlwimi-keep-rsh.ll
rlwimi.ll
rlwinm2.ll
rlwinm_rldicl_to_andi.mir
rlwinm-zero-ext.ll
rlwinm.ll
rm-zext.ll
rotl-2.ll
rotl-64.ll
rotl-rotr-crash.ll
rotl.ll
rounding-ops.ll
rounding-rm-flag.ll
rs-undef-use.ll
s000-alias-misched.ll
sat-add.ll
saturating-intrinsics.ll
save-bp.ll
save-cr-ppc32svr4.ll
save-crbp-ppc32svr4.ll
scalar_cmp.ll
scalar_vector_test_1.ll
scalar_vector_test_2.ll
scalar_vector_test_3.ll
scalar_vector_test_4.ll [NFC][Test] Update the test with update_llc_test_checks.py 2020-10-09 02:26:03 +00:00
scalar-equal.ll
scalar-min-max.ll
scalar-rounding-ops.ll
scavenging.mir
sched-addi.ll
schedule-addi-load.mir
scheduling-mem-dependency.ll
sdag-ppcf128.ll
sdiv-pow2.ll
sections.ll
select_const.ll
select_lt0.ll
select-addrRegRegOnly.ll
select-cc.ll
select-i1-vs-i1.ll
select-to-branch.mir
select.ll [PowerPC] Add test case for negated abs. NFC. 2020-11-13 08:06:31 +00:00
selectiondag-extload-computeknownbits.ll
selectiondag-sextload.ll
set0-v8i16.ll
setcc_no_zext.ll
setcc-logic.ll
setcc-sub-flag.ll [PowerPC] Add test case for missing nsw flag. NFC. 2020-10-20 03:47:49 +00:00
setcc-to-sub.ll
setcc-vector.ll
setcclike-or-comb.ll
setcr_bc2.mir
setcr_bc3.mir
setcr_bc.mir
seteq-0.ll
setrnd.ll
sext-vector-inreg.ll
sh-overflow.mir
shift128.ll
shift_mask.ll
shift-cmp.ll
shl_elim.ll
shl_sext.ll
shrink-wrap.ll
shrink-wrap.mir
sign_ext_inreg1.ll
signbit-shift.ll
simplifyConstCmpToISEL.ll
sink-down-more-instructions-1.mir [MachineSink] add more profitable pattern. 2020-11-04 23:11:22 -05:00
sink-down-more-instructions-regpressure-high.mir [MachineSink] add more profitable pattern. 2020-11-04 23:11:22 -05:00
sj-ctr-loop.ll
sjlj_no0x.ll
sjlj.ll
small-arguments.ll
sms-cpy-1.ll
sms-grp-order.ll
sms-iterator.ll
sms-phi-1.ll
sms-phi-2.ll
sms-phi-3.ll
sms-phi-5.ll Revert "[PowerPC] Extend folding RLWINM + RLWINM to post-RA." 2020-11-03 16:34:02 +00:00
sms-phi.ll
sms-remark.ll
sms-simple.ll
smulfixsat.ll
spe-fastmath.ll
spe.ll
spill_p9_setb.ll
spill-nor0.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
spill-nor0.mir Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
splat-bug.ll
splat-larger-types-as-v16i8.ll
split-index-tc.ll
splitstore-check-volatile.ll
srem-lkk.ll
srem-vector-lkk.ll
srl-mask.ll
stack-clash-dynamic-alloca.ll
stack-clash-prologue-nounwind.ll
stack-clash-prologue.ll
stack-coloring-vararg.mir
stack-guard-reassign.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
stack-no-redzone.ll
stack-protector.ll
stack-realign.ll
stackmap-frame-setup.ll
stacksize.ll
std-unal-fi.ll
stdux-constuse.ll
stfiwx-2.ll
stfiwx.ll
store_fptoi.ll [PowerPC] Fix store-fptoi combine of f128 on Power8 2020-09-17 10:21:35 +08:00
store-combine.ll
store-constant.ll
store-load-fwd.ll
store-update.ll
structsinmem.ll
structsinregs.ll
stubs.ll
stwu8.ll
stwu-gta.ll
stwu-sched.ll
stwux.ll
sub-bv-types.ll
sub-of-not.ll
subc.ll
subreg-postra-2.ll
subreg-postra.ll
subtract_from_imm.ll
svr4-redzone.ll
swaps-le-1.ll
swaps-le-2.ll
swaps-le-3.ll
swaps-le-4.ll
swaps-le-5.ll
swaps-le-6.ll
swaps-le-7.ll
swaps-le-8.ll
tail-dup-analyzable-fallthrough.ll
tail-dup-branch-to-fallthrough.ll
tail-dup-break-cfg.ll
tail-dup-layout.ll
tailcall1-64.ll
tailcall1.ll
tailcall-speculatable-callee.ll
tailcall-string-rvo.ll
tailcallpic1.ll
test_call_aix.ll
test_func_desc.ll
test-and-cmp-folding.ll
testBitReverse.ll
testComparesi32gtu.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
testComparesi32leu.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
testComparesi32ltu.ll [PowerPC] Implement Set Boolean Condition Instructions 2020-10-26 18:42:51 -05:00
testComparesieqsc.ll
testComparesieqsi.ll
testComparesieqsll.ll
testComparesieqss.ll
testComparesiequc.ll
testComparesiequi.ll
testComparesiequll.ll
testComparesiequs.ll
testComparesigesc.ll
testComparesigesi.ll
testComparesigesll.ll
testComparesigess.ll
testComparesigeuc.ll
testComparesigeui.ll
testComparesigeull.ll
testComparesigeus.ll
testComparesigtsc.ll
testComparesigtsi.ll
testComparesigtsll.ll
testComparesigtss.ll
testComparesigtuc.ll
testComparesigtui.ll
testComparesigtus.ll
testComparesilesc.ll
testComparesilesi.ll
testComparesilesll.ll
testComparesiless.ll
testComparesileuc.ll
testComparesileui.ll
testComparesileull.ll
testComparesileus.ll
testComparesiltsc.ll
testComparesiltsi.ll
testComparesiltsll.ll
testComparesiltss.ll
testComparesiltuc.ll
testComparesiltui.ll
testComparesiltus.ll
testComparesinesc.ll
testComparesinesi.ll
testComparesinesll.ll
testComparesiness.ll
testComparesineuc.ll
testComparesineui.ll
testComparesineull.ll
testComparesineus.ll
testCompareslleqsc.ll
testCompareslleqsi.ll
testCompareslleqsll.ll
testCompareslleqss.ll
testComparesllequc.ll
testComparesllequi.ll
testComparesllequll.ll
testComparesllequs.ll
testComparesllgesc.ll
testComparesllgesi.ll
testComparesllgesll.ll
testComparesllgess.ll
testComparesllgeuc.ll
testComparesllgeui.ll
testComparesllgeull.ll
testComparesllgeus.ll
testComparesllgtsll.ll
testComparesllgtuc.ll
testComparesllgtui.ll
testComparesllgtus.ll
testCompareslllesc.ll
testCompareslllesi.ll
testCompareslllesll.ll
testComparesllless.ll
testComparesllleuc.ll
testComparesllleui.ll
testComparesllleull.ll
testComparesllleus.ll
testComparesllltsll.ll
testComparesllltuc.ll
testComparesllltui.ll
testComparesllltus.ll
testComparesllnesll.ll
testComparesllneull.ll
thread-pointer.ll
tls_get_addr_clobbers.ll
tls_get_addr_fence1.mir
tls_get_addr_fence2.mir
tls_get_addr_stackframe.ll
tls-cse.ll
tls-pic.ll
tls-pie-xform.ll
tls-store2.ll
tls.ll
toc-float.ll [NFC][Test] Update the test with update_llc_test_checks.py 2020-10-09 02:26:03 +00:00
toc-load-sched-bug.ll
tocSaveInPrologue.ll
topdepthreduce-postra.mir
trampoline.ll
trunc-srl-load.ll
two-address-crash.mir
uint-to-fp-v4i32.ll
uint-to-ppcfp128-crash.ll [PowerPC] Avoid unnecessary fadd for unsigned to ppcf128 2020-11-01 23:22:47 +08:00
umulfixsat.ll
umulo-128-legalisation-lowering.ll
unal4-std.ll
unal-altivec2.ll
unal-altivec-wint.ll
unal-altivec.ll
unal-vec-ldst.ll
unal-vec-negarith.ll
unaligned-addressing-mode.ll
unaligned-floats.ll
unaligned.ll
unreachable-mbb-jtreference-elimination.ll Fix the compilation assertion due to unreachable BB pruning not deleting the associated BB from the jump tables 2020-11-16 10:35:31 -06:00
unsafe-math.ll
unwind-dw2-g.ll
unwind-dw2.ll
urem-lkk.ll
urem-vector-lkk.ll
use-cr-result-of-dom-icmp-st.ll
uwtables.ll
vaddsplat.ll
varargs-struct-float.ll
varargs.ll
variable_elem_vec_extracts.ll
vavg.ll
vcmp-fold.ll
vec_abs.ll
vec_absd.ll
vec_add_sub_doubleword.ll
vec_add_sub_quadword.ll
vec_auto_constant.ll
vec_br_cmp.ll
vec_buildvector_loadstore.ll
vec_call.ll
vec_clz.ll
vec_cmp.ll
vec_cmpd.ll
vec_cmpq.ll [PowerPC] Implement the 128-bit vec_[all|any]_[eq | ne | lt | gt | le | ge] builtins in Clang/LLVM 2020-09-23 16:49:40 -04:00
vec_constants.ll
vec_conv_fp32_to_i8_elts.ll
vec_conv_fp32_to_i16_elts.ll
vec_conv_fp32_to_i64_elts.ll
vec_conv_fp64_to_i8_elts.ll
vec_conv_fp64_to_i16_elts.ll
vec_conv_fp64_to_i32_elts.ll
vec_conv_fp_to_i_4byte_elts.ll
vec_conv_fp_to_i_8byte_elts.ll
vec_conv_i8_to_fp32_elts.ll
vec_conv_i8_to_fp64_elts.ll
vec_conv_i16_to_fp32_elts.ll
vec_conv_i16_to_fp64_elts.ll
vec_conv_i32_to_fp64_elts.ll
vec_conv_i64_to_fp32_elts.ll
vec_conv_i_to_fp_4byte_elts.ll
vec_conv_i_to_fp_8byte_elts.ll
vec_conv.ll
vec_extload.ll
vec_extract_p9_2.ll
vec_extract_p9.ll
vec_fmuladd.ll
vec_fneg.ll
vec_insert.ll
vec_int_ext.ll
vec_mergeow.ll
vec_minmax.ll
vec_misaligned.ll
vec_mul_even_odd.ll
vec_mul.ll
vec_perf_shuffle.ll
vec_popcnt.ll
vec_revb.ll
vec_rotate_shift.ll
vec_rounding.ll
vec_select.ll
vec_shift.ll
vec_shuffle_le.ll
vec_shuffle_p8vector_le.ll
vec_shuffle_p8vector.ll
vec_shuffle.ll
vec_sldwi.ll
vec_splat_constant.ll
vec_splat.ll
vec_sqrt.ll
vec_urem_const.ll
vec_veqv_vnand_vorc.ll
vec_vrsave.ll
vec_xxpermdi.ll
vec_zero.ll
vec-abi-align.ll
vec-asm-disabled.ll
vec-bswap.ll
vec-itofp.ll [NFC][Test] Update the test with update_llc_test_checks.py 2020-10-09 02:26:03 +00:00
vec-min-max.ll
vec-select.ll
vec-trunc2.ll [NFC][Test] Update the test with update_llc_test_checks.py 2020-10-09 02:26:03 +00:00
vec-trunc.ll
vector-constrained-fp-intrinsics.ll [PowerPC] [FPEnv] Disable strict FP mutation by default 2020-09-10 13:28:09 +08:00
vector-copysign.ll
vector-extend-sign.ll
vector-identity-shuffle.ll
vector-merge-store-fp-constants.ll
vector-popcnt-128-ult-ugt.ll [testing] Add exhaustive ULT/UGT vector CTPOP to AArch64 and PPC 2020-11-09 10:34:01 -05:00
vector-rotates.ll
vector-rounding-ops.ll
vector.ll
vmladduhm.ll
vperm-instcombine.ll
vperm-lowering.ll
vrsave-inline-asm.ll
vrspill.ll
vsel-prom.ll
vselect-constants.ll
vsx_builtins.ll Revert "[PowerPC] Extend folding RLWINM + RLWINM to post-RA." 2020-11-03 16:34:02 +00:00
vsx_insert_extract_le.ll
vsx_scalar_ld_st.ll
vsx_shuffle_le.ll
vsx-args.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
VSX-DForm-Scalars.ll
vsx-div.ll
vsx-elementary-arith.ll
vsx-fma-m.ll
vsx-fma-mutate-trivial-copy.ll
vsx-fma-mutate-undef.ll
vsx-fma-sp.ll
vsx-infl-copy1.ll
vsx-infl-copy2.ll
vsx-ldst-builtin-le.ll
vsx-ldst.ll
vsx-minmax.ll
vsx-p8.ll
vsx-p9.ll
vsx-partword-int-loads-and-stores.ll
vsx-recip-est.ll
vsx-self-copy.ll
vsx-spill-norwstore.ll
vsx-spill.ll
vsx-vec-spill.ll
vsx-word-splats.ll
VSX-XForm-Scalars.ll
vsx.ll Reapply "RegAllocFast: Rewrite and improve" 2020-09-30 10:35:25 -04:00
vsxD-Form-spills.ll
vtable-reloc.ll
weak_def_can_be_hidden.ll
xray-attribute-instrumentation.ll
xray-conditional-return.ll
xray-ret-is-terminator.ll
xray-tail-call-hidden.ll
xray-tail-call-sled.ll
xvcmpeqdp-v2f64.ll
xxleqv_xxlnand_xxlorc.ll
zero-not-run.ll
zext-and-cmp.ll
zext-bitperm.ll
zext-free.ll