.. |
2004-11-29-ShrCrash.ll
|
|
|
2004-11-30-shift-crash.ll
|
|
|
2004-11-30-shr-var-crash.ll
|
|
|
2004-12-12-ZeroSizeCommon.ll
|
|
|
2005-01-14-SetSelectCrash.ll
|
|
|
2005-01-14-UndefLong.ll
|
|
|
2005-08-12-rlwimi-crash.ll
|
|
|
2005-09-02-LegalizeDuplicatesCalls.ll
|
|
|
2005-10-08-ArithmeticRotate.ll
|
|
|
2005-11-30-vastart-crash.ll
|
|
|
2006-01-11-darwin-fp-argument.ll
|
|
|
2006-01-20-ShiftPartsCrash.ll
|
|
|
2006-04-01-FloatDoubleExtend.ll
|
|
|
2006-04-05-splat-ish.ll
|
|
|
2006-04-19-vmaddfp-crash.ll
|
|
|
2006-05-12-rlwimi-crash.ll
|
|
|
2006-07-07-ComputeMaskedBits.ll
|
|
|
2006-07-19-stwbrx-crash.ll
|
|
|
2006-08-11-RetVector.ll
|
|
|
2006-08-15-SelectionCrash.ll
|
|
|
2006-09-28-shift_64.ll
|
|
|
2006-10-13-Miscompile.ll
|
|
|
2006-10-17-brcc-miscompile.ll
|
|
|
2006-10-17-ppc64-alloca.ll
|
|
|
2006-11-10-DAGCombineMiscompile.ll
|
|
|
2006-11-29-AltivecFPSplat.ll
|
|
|
2006-12-07-LargeAlloca.ll
|
|
|
2006-12-07-SelectCrash.ll
|
|
|
2007-01-04-ArgExtension.ll
|
|
|
2007-01-15-AsmDialect.ll
|
|
|
2007-01-29-lbrx-asm.ll
|
|
|
2007-01-31-InlineAsmAddrMode.ll
|
|
|
2007-02-16-AlignPacked.ll
|
|
|
2007-02-16-InlineAsmNConstraint.ll
|
|
|
2007-02-23-lr-saved-twice.ll
|
|
|
2007-03-24-cntlzd.ll
|
|
|
2007-03-30-SpillerCrash.ll
|
|
|
2007-04-24-InlineAsm-I-Modifier.ll
|
|
|
2007-04-30-InlineAsmEarlyClobber.ll
|
|
|
2007-05-03-InlineAsm-S-Constraint.ll
|
|
|
2007-05-14-InlineAsmSelectCrash.ll
|
|
|
2007-05-22-tailmerge-3.ll
|
|
|
2007-05-30-dagcombine-miscomp.ll
|
|
|
2007-06-28-BCCISelBug.ll
|
|
|
2007-08-04-CoalescerAssert.ll
|
|
|
2007-09-04-AltivecDST.ll
|
|
|
2007-09-07-LoadStoreIdxForms.ll
|
|
|
2007-09-08-unaligned.ll
|
|
|
2007-09-11-RegCoalescerAssert.ll
|
|
|
2007-09-12-LiveIntervalsAssert.ll
|
|
|
2007-10-16-InlineAsmFrameOffset.ll
|
|
|
2007-10-18-PtrArithmetic.ll
|
|
|
2007-10-21-LocalRegAllocAssert2.ll
|
|
|
2007-10-21-LocalRegAllocAssert.ll
|
|
|
2007-11-04-CoalescerCrash.ll
|
|
|
2007-11-16-landingpad-split.ll
|
|
|
2007-11-19-VectorSplitting.ll
|
|
|
2008-02-05-LiveIntervalsAssert.ll
|
|
|
2008-02-09-LocalRegAllocAssert.ll
|
|
|
2008-03-05-RegScavengerAssert.ll
|
|
|
2008-03-17-RegScavengerCrash.ll
|
|
|
2008-03-18-RegScavengerAssert.ll
|
|
|
2008-03-24-AddressRegImm.ll
|
|
|
2008-03-24-CoalescerBug.ll
|
|
|
2008-03-26-CoalescerBug.ll
|
|
|
2008-04-10-LiveIntervalCrash.ll
|
|
|
2008-04-16-CoalescerBug.ll
|
|
|
2008-04-23-CoalescerCrash.ll
|
|
|
2008-05-01-ppc_fp128.ll
|
|
|
2008-06-19-LegalizerCrash.ll
|
|
|
2008-06-21-F128LoadStore.ll
|
|
|
2008-06-23-LiveVariablesCrash.ll
|
|
|
2008-07-10-SplatMiscompile.ll
|
|
|
2008-07-15-Bswap.ll
|
|
|
2008-07-15-Fabs.ll
|
|
|
2008-07-15-SignExtendInreg.ll
|
|
|
2008-07-17-Fneg.ll
|
|
|
2008-07-24-PPC64-CCBug.ll
|
|
|
2008-09-12-CoalescerBug.ll
|
|
|
2008-10-17-AsmMatchingOperands.ll
|
|
|
2008-10-28-f128-i32.ll
|
[PowerPC] Implement the areMemAccessesTriviallyDisjoint hook
|
2019-07-02 03:28:52 +00:00 |
2008-10-28-UnprocessedNode.ll
|
|
|
2008-10-31-PPCF128Libcalls.ll
|
|
|
2008-12-02-LegalizeTypeAssert.ll
|
|
|
2009-01-16-DeclareISelBug.ll
|
|
|
2009-03-17-LSRBug.ll
|
|
|
2009-05-28-LegalizeBRCC.ll
|
|
|
2009-07-16-InlineAsm-M-Operand.ll
|
|
|
2009-08-17-inline-asm-addr-mode-breakage.ll
|
|
|
2009-09-18-carrybit.ll
|
|
|
2009-11-15-ProcImpDefsBug.ll
|
|
|
2009-11-25-ImpDefBug.ll
|
|
|
2010-02-04-EmptyGlobal.ll
|
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
|
2019-01-14 10:55:55 +00:00 |
2010-02-12-saveCR.ll
|
|
|
2010-03-09-indirect-call.ll
|
|
|
2010-04-01-MachineCSEBug.ll
|
|
|
2010-05-03-retaddr1.ll
|
|
|
2010-10-11-Fast-Varargs.ll
|
|
|
2010-12-18-PPCStackRefs.ll
|
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
|
2019-01-14 10:55:55 +00:00 |
2011-12-05-NoSpillDupCR.ll
|
|
|
2011-12-06-SpillAndRestoreCR.ll
|
|
|
2011-12-08-DemandedBitsMiscompile.ll
|
|
|
2012-09-16-TOC-entry-check.ll
|
|
|
2012-10-11-dynalloc.ll
|
|
|
2012-10-12-bitcast.ll
|
|
|
2012-11-16-mischedcall.ll
|
|
|
2013-05-15-preinc-fold.ll
|
|
|
2013-07-01-PHIElimBug.mir
|
[NFC][PowerPC]Change ADDIStocHA to ADDIStocHA8 to follow 64-bit naming convention
|
2019-07-22 19:55:33 +00:00 |
2016-01-07-BranchWeightCrash.ll
|
|
|
2016-04-16-ADD8TLS.ll
|
|
|
2016-04-17-combine.ll
|
|
|
2016-04-28-setjmp.ll
|
|
|
2018-09-19-sextinreg-vector-crash.ll
|
|
|
a2-fp-basic.ll
|
|
|
a2q-stackalign.ll
|
|
|
a2q.ll
|
|
|
aa-tbaa.ll
|
|
|
aantidep-def-ec.mir
|
[NFC][PowerPC]Change ADDIStocHA to ADDIStocHA8 to follow 64-bit naming convention
|
2019-07-22 19:55:33 +00:00 |
aantidep-inline-asm-use.ll
|
|
|
add_cmp.ll
|
[NFC][PowerPC] Modify the test case add_cmp.ll
|
2019-07-19 02:23:26 +00:00 |
add-fi.ll
|
|
|
addc.ll
|
|
|
adde_return_type.ll
|
|
|
addegluecrash.ll
|
Reapply r359906, "RegAllocFast: Add heuristic to detect values not live-out of a block"
|
2019-05-03 19:06:57 +00:00 |
addi-licm.ll
|
[PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop.
|
2019-07-03 01:49:03 +00:00 |
addi-offset-fold.ll
|
|
|
addi-reassoc.ll
|
|
|
addisdtprelha-nonr3.mir
|
|
|
addrfuncstr.ll
|
|
|
addrspacecast.ll
|
|
|
addze.ll
|
|
|
aggressive-anti-dep-breaker-subreg.ll
|
|
|
aix_gpr_param.ll
|
[AIX] Implement function descriptor on SDAG
|
2019-06-06 19:13:36 +00:00 |
aix-xcoff-basic.ll
|
Boilerplate for producing XCOFF object files from the PowerPC backend.
|
2019-07-09 19:21:01 +00:00 |
aix-xcoff-common.ll
|
Address post commit review comments on revision 366727.
|
2019-07-30 15:37:01 +00:00 |
aix-xcoff-lcomm.ll
|
Enable assembly output of local commons for AIX
|
2019-08-08 15:40:35 +00:00 |
alias.ll
|
|
|
align.ll
|
|
|
allocate-r0.ll
|
|
|
altivec-ord.ll
|
|
|
and_add.ll
|
|
|
and_sext.ll
|
|
|
and_sra.ll
|
|
|
and-branch.ll
|
|
|
and-elim.ll
|
|
|
and-imm.ll
|
|
|
andc.ll
|
|
|
anon_aggr.ll
|
RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs
|
2019-03-19 19:01:34 +00:00 |
anyext_srl.ll
|
|
|
arr-fp-arg-no-copy.ll
|
|
|
ashr-neg1.ll
|
|
|
asm-constraints.ll
|
|
|
asm-dialect.ll
|
|
|
asm-printer-topological-order.ll
|
|
|
asm-Zy.ll
|
|
|
asym-regclass-copy.ll
|
|
|
atomic-1.ll
|
|
|
atomic-2.ll
|
|
|
atomic-minmax.ll
|
|
|
Atomics-64.ll
|
|
|
atomics-constant.ll
|
|
|
atomics-fences.ll
|
|
|
atomics-indexed.ll
|
|
|
atomics-regression.ll
|
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
|
2019-08-12 14:23:13 +00:00 |
atomics.ll
|
|
|
available-externally.ll
|
|
|
bdzlr.ll
|
|
|
big-endian-actual-args.ll
|
|
|
big-endian-call-result.ll
|
|
|
big-endian-formal-args.ll
|
|
|
big-endian-store-forward.ll
|
|
|
bitcasts-direct-move.ll
|
|
|
bitfieldinsert.ll
|
|
|
block-placement-1.mir
|
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
|
2019-08-12 14:23:13 +00:00 |
block-placement.mir
|
Revert r368565: [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks
|
2019-08-12 14:00:31 +00:00 |
blockaddress.ll
|
|
|
bool-math.ll
|
Teach the DAGCombine to fold this pattern(c1 and c2 is constant).
|
2019-06-26 05:12:53 +00:00 |
BoolRetToIntTest-2.ll
|
|
|
BoolRetToIntTest.ll
|
|
|
bperm.ll
|
|
|
branch_coalesce.ll
|
|
|
branch_selector.ll
|
[PPC] Adjust the computed branch offset for the possible shorter distance
|
2019-03-06 18:22:22 +00:00 |
branch-hint.ll
|
|
|
branch-opt.ll
|
|
|
brcond.ll
|
|
|
BreakableToken-reduced.ll
|
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
|
2019-06-13 13:56:19 +00:00 |
bswap64.ll
|
[PowerPC][NFC] Fix typos in triples
|
2019-05-14 03:11:24 +00:00 |
bswap-load-store.ll
|
|
|
build-vector-tests.ll
|
recommit:[PowerPC] Eliminate loads/swap feeding swap/store for vector type by using big-endian load/store
|
2019-08-01 05:26:02 +00:00 |
buildvec_canonicalize.ll
|
|
|
builtins-ppc-elf2-abi.ll
|
|
|
builtins-ppc-p8vector.ll
|
|
|
builtins-ppc-p9-f128.ll
|
|
|
bv-pres-v8i1.ll
|
|
|
bv-widen-undef.ll
|
|
|
byval-agg-info.ll
|
|
|
byval-aliased.ll
|
|
|
calls.ll
|
|
|
can-lower-ret.ll
|
|
|
cannonicalize-vector-shifts.ll
|
|
|
cc.ll
|
|
|
change-no-infs.ll
|
|
|
cmp_elimination.ll
|
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
|
2019-08-12 14:23:13 +00:00 |
cmp-cmp.ll
|
|
|
cmpb-ppc32.ll
|
|
|
cmpb.ll
|
|
|
coalesce-ext.ll
|
|
|
code-align.ll
|
[NFC][PowerPC] Use -check-prefixes to simplify the check in code-align.ll
|
2019-04-30 03:39:05 +00:00 |
codemodel.ll
|
|
|
coldcc2.ll
|
|
|
coldcc.ll
|
|
|
collapse-rotates.mir
|
[PowerPC] Collapse RLDICL/RLDICR into RLDIC when possible
|
2019-06-05 02:36:40 +00:00 |
combine-fneg.ll
|
[DAGCombine] combineRepeatedFPDivisors - recognize -1.0 / X as a reciprocal
|
2019-06-25 16:00:16 +00:00 |
combine-setcc.ll
|
|
|
combine-sext-and-shl-after-isel.ll
|
[PowerPC][Peephole] Combine extsw and sldi after instruction selection
|
2019-07-09 02:55:08 +00:00 |
combine-to-pre-index-store-crash.ll
|
|
|
compare-duplicate.ll
|
|
|
compare-simm.ll
|
|
|
CompareEliminationSpillIssue.ll
|
|
|
complex-return.ll
|
|
|
constant-combines.ll
|
Disable big-endian constant store merges from rL354676.
|
2019-02-22 16:20:34 +00:00 |
constants-i64.ll
|
|
|
constants.ll
|
|
|
convert-rr-to-ri-instr-add.mir
|
[PowerPC] fix killed/dead flag after convert x-form to d-form tranformation.
|
2019-03-05 04:56:54 +00:00 |
convert-rr-to-ri-instrs-kill-flag.mir
|
[PowerPC] fix killed/dead flag after convert x-form to d-form tranformation.
|
2019-03-05 04:56:54 +00:00 |
convert-rr-to-ri-instrs-out-of-range.mir
|
|
|
convert-rr-to-ri-instrs-R0-special-handling.mir
|
|
|
convert-rr-to-ri-instrs.mir
|
Describe stack-id as an enum
|
2019-06-17 09:13:29 +00:00 |
convert-rr-to-ri-p9-vector.mir
|
|
|
copysignl.ll
|
|
|
cr1eq-no-extra-moves.ll
|
|
|
cr1eq.ll
|
|
|
cr_spilling.ll
|
|
|
cr-spills.ll
|
|
|
crash.ll
|
|
|
crbit-asm-disabled.ll
|
|
|
crbit-asm.ll
|
|
|
crbits.ll
|
|
|
crsave.ll
|
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
|
2019-01-14 10:55:55 +00:00 |
crypto_bifs.ll
|
|
|
CSR-fit.ll
|
[PowerPC] Move the stack pointer update instruction later in the prologue and earlier in the epilogue.
|
2019-02-28 12:23:28 +00:00 |
csr-save-restore-order.ll
|
[MachineScheduler] checkResourceLimit boundary condition update
|
2019-06-07 14:54:47 +00:00 |
ctr-cleanup.ll
|
|
|
ctr-loop-tls-const.ll
|
|
|
ctr-minmaxnum.ll
|
[PowerPC] Exploit the vector min/max instructions
|
2019-06-06 23:49:01 +00:00 |
ctrloop-asm.ll
|
|
|
ctrloop-cpsgn.ll
|
|
|
ctrloop-fp64.ll
|
|
|
ctrloop-i64.ll
|
|
|
ctrloop-i128.ll
|
|
|
ctrloop-intrin.ll
|
[CodeGen] Generic Hardware Loop Support
|
2019-06-07 07:35:30 +00:00 |
ctrloop-large-ec.ll
|
|
|
ctrloop-le.ll
|
[PowerPC] exclude more icmps in LSR which is converted in later hardware loop pass
|
2019-07-25 01:22:08 +00:00 |
ctrloop-lt.ll
|
[PowerPC] exclude more icmps in LSR which is converted in later hardware loop pass
|
2019-07-25 01:22:08 +00:00 |
ctrloop-ne.ll
|
[PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop.
|
2019-07-03 01:49:03 +00:00 |
ctrloop-reg.ll
|
|
|
ctrloop-s000.ll
|
|
|
ctrloop-sh.ll
|
|
|
ctrloop-shortLoops.ll
|
[PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop.
|
2019-07-03 01:49:03 +00:00 |
ctrloop-sums.ll
|
|
|
ctrloop-udivti3.ll
|
|
|
ctrloops-hot-exit.ll
|
|
|
ctrloops-softfloat.ll
|
|
|
ctrloops.ll
|
|
|
cttz.ll
|
|
|
cxx_tlscc64.ll
|
|
|
darwin-labels.ll
|
|
|
dbg.ll
|
|
|
DbgValueOtherTargets.test
|
|
|
dcbf.ll
|
Add __builtin_dcbf support for PPC
|
2019-04-29 23:25:33 +00:00 |
dcbt-sched.ll
|
|
|
debuginfo-split-int.ll
|
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
|
2019-06-19 00:25:39 +00:00 |
debuginfo-stackarg.ll
|
|
|
delete-node.ll
|
|
|
dform-adjust.ll
|
[PowerPC][NFC] Precomit test case for upcoming patch
|
2019-07-21 21:03:45 +00:00 |
direct-move-profit.ll
|
Remove irrelevant references to legacy git repositories from
|
2019-01-15 16:18:52 +00:00 |
div-2.ll
|
|
|
div-e-32.ll
|
|
|
div-e-all.ll
|
|
|
duplicate-returns-for-tailcall.ll
|
|
|
dyn-alloca-aligned.ll
|
|
|
dyn-alloca-offset.ll
|
|
|
e500-1.ll
|
|
|
early-ret2.ll
|
|
|
early-ret.ll
|
|
|
ec-input.ll
|
|
|
eh-dwarf-cfa.ll
|
|
|
eliminate-compare-of-copy.ll
|
[PowerPC] Look through copies for compare elimination
|
2019-06-03 19:09:15 +00:00 |
empty-functions.ll
|
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
|
2019-01-14 10:55:55 +00:00 |
emptystruct.ll
|
|
|
emutls_generic.ll
|
|
|
eqv-andc-orc-nor.ll
|
|
|
expand-contiguous-isel.ll
|
|
|
expand-foldable-isel.ll
|
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
|
2019-06-14 23:08:59 +00:00 |
expand-isel-1.mir
|
|
|
expand-isel-2.mir
|
|
|
expand-isel-3.mir
|
|
|
expand-isel-4.mir
|
|
|
expand-isel-5.mir
|
|
|
expand-isel-6.mir
|
|
|
expand-isel-7.mir
|
|
|
expand-isel-8.mir
|
|
|
expand-isel-9.mir
|
|
|
expand-isel-10.mir
|
|
|
expand-isel.ll
|
|
|
ext-bool-trunc-repl.ll
|
|
|
extra-toc-reg-deps.ll
|
|
|
extract-and-store.ll
|
[PowerPC] Implement the areMemAccessesTriviallyDisjoint hook
|
2019-07-02 03:28:52 +00:00 |
extsh.ll
|
|
|
extswsli.ll
|
|
|
f32-to-i64.ll
|
|
|
f128-aggregates.ll
|
[PowerPC] Implement the areMemAccessesTriviallyDisjoint hook
|
2019-07-02 03:28:52 +00:00 |
f128-arith.ll
|
|
|
f128-bitcast.ll
|
|
|
f128-compare.ll
|
|
|
f128-conv.ll
|
|
|
f128-fma.ll
|
|
|
f128-passByValue.ll
|
[MachineScheduler] checkResourceLimit boundary condition update
|
2019-06-07 14:54:47 +00:00 |
f128-rounding.ll
|
|
|
f128-truncateNconv.ll
|
|
|
f128-vecExtractNconv.ll
|
|
|
fabs.ll
|
|
|
fast-isel-binary.ll
|
|
|
fast-isel-br-const.ll
|
|
|
fast-isel-call.ll
|
|
|
fast-isel-cmp-imm.ll
|
[PowerPC] Enhance the fast selection of cmp instruction and clean up related asserts
|
2019-01-25 07:24:59 +00:00 |
fast-isel-const.ll
|
|
|
fast-isel-conversion-p5.ll
|
|
|
fast-isel-conversion.ll
|
|
|
fast-isel-crash.ll
|
|
|
fast-isel-ext.ll
|
|
|
fast-isel-fcmp-nan.ll
|
|
|
fast-isel-fold.ll
|
|
|
fast-isel-fpconv.ll
|
|
|
fast-isel-GEP-coalesce.ll
|
|
|
fast-isel-i64offset.ll
|
|
|
fast-isel-icmp-split.ll
|
|
|
fast-isel-indirectbr.ll
|
|
|
fast-isel-load-store-vsx.ll
|
|
|
fast-isel-load-store.ll
|
|
|
fast-isel-redefinition.ll
|
|
|
fast-isel-ret.ll
|
|
|
fast-isel-rsp.ll
|
[PowerPC] [PowerPC] Enhance the fast selection of fptoi & fptrunc instruction and clean up related asserts
|
2019-02-25 02:46:16 +00:00 |
fast-isel-shifter.ll
|
|
|
fastcc_stacksize.ll
|
|
|
fastisel-gep-promote-before-add.ll
|
|
|
fcpsgn.ll
|
|
|
fdiv-combine.ll
|
|
|
float-asmprint.ll
|
|
|
float-load-store-pair.ll
|
[PowerPC] Replace float load/store pair with integer load/store pair when it's only used in load/store
|
2019-07-23 03:34:40 +00:00 |
float-logic-ops.ll
|
[PowerPC][NFC] Fix typos in triples
|
2019-05-14 03:11:24 +00:00 |
float-to-int.ll
|
|
|
floatPSA.ll
|
|
|
flt-preinc.ll
|
|
|
fma-aggr-FMF.ll
|
|
|
fma-assoc.ll
|
|
|
fma-ext.ll
|
|
|
fma-mutate-duplicate-vreg.ll
|
|
|
fma-mutate-register-constraint.ll
|
|
|
fma-mutate.ll
|
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control
|
2019-07-31 21:57:28 +00:00 |
fma.ll
|
|
|
fmaxnum.ll
|
|
|
fmf-propagation.ll
|
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control
|
2019-07-31 21:57:28 +00:00 |
fminnum.ll
|
|
|
fnabs.ll
|
|
|
fneg.ll
|
|
|
fold-li.ll
|
|
|
fold-zero.ll
|
|
|
fp2int2fp-ppcfp128.ll
|
|
|
fp64-to-int16.ll
|
RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs
|
2019-03-19 19:01:34 +00:00 |
fp128-bitcast-after-operation.ll
|
|
|
fp128-libcalls.ll
|
[PowerPC] Support fp128 libcalls
|
2019-07-15 05:02:32 +00:00 |
fp_to_uint.ll
|
|
|
fp-branch.ll
|
|
|
fp-int128-fp-combine.ll
|
RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs
|
2019-03-19 19:01:34 +00:00 |
fp-int-conversions-direct-moves.ll
|
|
|
fp-int-fp.ll
|
|
|
fp-splat.ll
|
|
|
fp-to-int-ext.ll
|
|
|
fp-to-int-to-fp.ll
|
|
|
fpcopy.ll
|
|
|
frame-size.ll
|
|
|
frameaddr.ll
|
|
|
Frames-alloca.ll
|
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
|
2019-01-14 10:55:55 +00:00 |
Frames-large.ll
|
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
|
2019-01-14 10:55:55 +00:00 |
Frames-leaf.ll
|
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
|
2019-01-14 10:55:55 +00:00 |
Frames-small.ll
|
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
|
2019-01-14 10:55:55 +00:00 |
frounds.ll
|
|
|
fsel.ll
|
|
|
fsl-e500mc.ll
|
|
|
fsl-e5500.ll
|
|
|
fsqrt.ll
|
|
|
fsub-fneg.ll
|
|
|
ftrunc-legalize.ll
|
[SelectionDAG] soften assertion when legalizing narrow vector FP ops
|
2019-05-25 13:48:07 +00:00 |
ftrunc-vec.ll
|
|
|
func-addr-consts.ll
|
|
|
func-addr.ll
|
|
|
funnel-shift-rot.ll
|
|
|
funnel-shift.ll
|
|
|
glob-comp-aa-crash.ll
|
|
|
gpr-vsr-spill.ll
|
|
|
hello-reloc.s
|
|
|
hello.ll
|
|
|
hidden-vis-2.ll
|
|
|
hidden-vis.ll
|
|
|
hoist-logic.ll
|
|
|
htm-ttest.ll
|
[PowerPC][HTM] Fix impossible reg-to-reg copy assert with ttest builtin
|
2019-07-16 20:24:33 +00:00 |
htm.ll
|
[PowerPC][HTM] Fix disassembling buffer overflow for tabortdc and others
|
2019-06-27 14:11:31 +00:00 |
i1-ext-fold.ll
|
|
|
i1-to-double.ll
|
|
|
i32-to-float.ll
|
|
|
i64_fp_round.ll
|
|
|
i64_fp.ll
|
|
|
i64-to-float.ll
|
|
|
i128-and-beyond.ll
|
|
|
ia-mem-r0.ll
|
|
|
ia-neg-const.ll
|
|
|
iabs.ll
|
|
|
ifcvt-forked-bug-2016-08-08.ll
|
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
|
2019-06-13 13:56:19 +00:00 |
ifcvt.ll
|
|
|
illegal-element-type.ll
|
|
|
in-asm-f64-reg.ll
|
|
|
inc-of-add.ll
|
[Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)
|
2019-07-03 09:41:35 +00:00 |
indexed-load.ll
|
|
|
indirect-hidden.ll
|
|
|
indirectbr.ll
|
|
|
inline-asm-i-constraint-i1.ll
|
[TargetLowering] Extend bool args to inline-asm according to getBooleanType
|
2019-05-22 16:16:15 +00:00 |
inline-asm-multilevel-gep.ll
|
[TargetLowering] Handle multi depth GEPs w/ inline asm constraints
|
2019-05-13 17:27:44 +00:00 |
inline-asm-s-modifier.ll
|
|
|
inline-asm-scalar-to-vector-error.ll
|
|
|
inlineasm-copy.ll
|
|
|
inlineasm-i64-reg.ll
|
|
|
inlineasm-output-template.ll
|
[AsmPrinter] refactor to support %c w/ GlobalAddress'
|
2019-04-26 18:45:04 +00:00 |
inlineasm-vsx-reg.ll
|
[PowerPC] Support constraint code "ww"
|
2019-07-04 04:44:42 +00:00 |
int-fp-conv-0.ll
|
|
|
int-fp-conv-1.ll
|
|
|
inverted-bool-compares.ll
|
|
|
isel-rc-nox0.ll
|
|
|
isel.ll
|
|
|
ispositive.ll
|
|
|
itofp128.ll
|
|
|
jaggedstructs.ll
|
|
|
jump-tables-collapse-rotate.ll
|
[PowerPC] Collapse RLDICL/RLDICR into RLDIC when possible
|
2019-06-05 02:36:40 +00:00 |
knowCRBitSpill.ll
|
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
|
2019-06-14 23:08:59 +00:00 |
LargeAbsoluteAddr.ll
|
|
|
larger-than-red-zone.ll
|
[PowerPC][NFC] Added tests for prologue and epilogue code gen.
|
2019-02-13 23:37:23 +00:00 |
lbz-from-ld-shift.ll
|
|
|
lbzux.ll
|
|
|
ld-st-upd.ll
|
|
|
ldtoc-inv.ll
|
|
|
legalize-vaarg.ll
|
[PowerPC] Implement the areMemAccessesTriviallyDisjoint hook
|
2019-07-02 03:28:52 +00:00 |
lha.ll
|
|
|
licm-remat.ll
|
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
|
2019-08-12 14:23:13 +00:00 |
licm-tocReg.ll
|
[NFC][PowerPC]Change ADDIStocHA to ADDIStocHA8 to follow 64-bit naming convention
|
2019-07-22 19:55:33 +00:00 |
lit.local.cfg
|
[lit] Delete empty lines at the end of lit.local.cfg NFC
|
2019-06-17 09:51:07 +00:00 |
livephysregs.mir
|
|
|
llrint-conv.ll
|
[CodeGen] Add lrint/llrint builtins
|
2019-05-28 20:47:44 +00:00 |
llround-conv.ll
|
[CodeGen] Add lround/llround builtins
|
2019-05-16 13:15:27 +00:00 |
load-constant-addr.ll
|
|
|
load-shift-combine.ll
|
|
|
load-shuffle-and-shuffle-store.ll
|
recommit:[PowerPC] Eliminate loads/swap feeding swap/store for vector type by using big-endian load/store
|
2019-08-01 05:26:02 +00:00 |
load-two-flts.ll
|
|
|
load-v4i8-improved.ll
|
|
|
logic-ops-on-compares.ll
|
|
|
long-compare.ll
|
|
|
longcall.ll
|
|
|
longdbl-truncate.ll
|
|
|
loop-align.ll
|
[PowerPC] Set the innermost hot loop to align 32 bytes
|
2019-06-15 15:10:24 +00:00 |
loop-data-prefetch-inner.ll
|
|
|
loop-data-prefetch.ll
|
|
|
loop-hoist-toc-save.ll
|
|
|
loop-prep-all.ll
|
|
|
lrint-conv.ll
|
[CodeGen] Add lrint/llrint builtins
|
2019-05-28 20:47:44 +00:00 |
lround-conv.ll
|
[CodeGen] Add lround/llround builtins
|
2019-05-16 13:15:27 +00:00 |
lsa.ll
|
|
|
lsr-ctrloop.ll
|
[PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop.
|
2019-07-03 01:49:03 +00:00 |
lsr-postinc-pos.ll
|
|
|
lxv-aligned-stack-slots.ll
|
|
|
lxvw4x-bug.ll
|
|
|
machine-combiner.ll
|
|
|
machine-pre.ll
|
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
|
2019-08-12 14:23:13 +00:00 |
maddld.ll
|
[PowerPC] More precise exploitation of P9 maddld instruction when operands are constant
|
2019-04-12 05:21:31 +00:00 |
mask64.ll
|
|
|
mature-mc-support.ll
|
|
|
mc-instrlat.ll
|
|
|
mcm-1.ll
|
|
|
mcm-2.ll
|
|
|
mcm-3.ll
|
|
|
mcm-4.ll
|
|
|
mcm-5.ll
|
|
|
mcm-6.ll
|
|
|
mcm-7.ll
|
|
|
mcm-8.ll
|
|
|
mcm-9.ll
|
|
|
mcm-10.ll
|
|
|
mcm-11.ll
|
|
|
mcm-12.ll
|
|
|
mcm-13.ll
|
|
|
mcm-default.ll
|
|
|
mcm-obj-2.ll
|
|
|
mcm-obj.ll
|
|
|
mcount-insertion.ll
|
|
|
MCSE-caller-preserved-reg.ll
|
[PowerPC] Move TOC save to prologue when profitable
|
2019-07-05 18:38:09 +00:00 |
mem_update.ll
|
|
|
mem-rr-addr-mode.ll
|
|
|
memcmp-mergeexpand.ll
|
Revert "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."
|
2019-06-26 12:13:13 +00:00 |
memcmp.ll
|
Revert "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."
|
2019-06-26 12:13:13 +00:00 |
memcmpIR.ll
|
Revert "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."
|
2019-06-26 12:13:13 +00:00 |
memCmpUsedInZeroEqualityComparison.ll
|
Revert "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."
|
2019-06-26 12:13:13 +00:00 |
memcpy_dereferenceable.ll
|
|
|
memcpy-vec.ll
|
|
|
memset-nc-le.ll
|
|
|
memset-nc.ll
|
|
|
merge_stores_dereferenceable.ll
|
|
|
merge-st-chain-op.ll
|
|
|
MergeConsecutiveStores.ll
|
|
|
mftb.ll
|
|
|
mi-scheduling-lhs.ll
|
|
|
misched-inorder-latency.ll
|
|
|
misched.ll
|
|
|
MMO-flags-assertion.ll
|
|
|
mtvsrdd.ll
|
|
|
mul-const-i64.ll
|
[PowerPC] Strength reduction of multiply by a constant by shift and add/sub in place
|
2019-03-29 03:08:39 +00:00 |
mul-const-vector.ll
|
[PowerPC] Strength reduction of multiply by a constant by shift and add/sub in place
|
2019-03-29 03:08:39 +00:00 |
mul-const.ll
|
[PowerPC] Strength reduction of multiply by a constant by shift and add/sub in place
|
2019-03-29 03:08:39 +00:00 |
mul-with-overflow.ll
|
|
|
mulhs.ll
|
|
|
mulld.ll
|
|
|
mult-alt-generic-powerpc64.ll
|
|
|
mult-alt-generic-powerpc.ll
|
|
|
multi-return.ll
|
|
|
named-reg-alloc-r0.ll
|
|
|
named-reg-alloc-r1-64.ll
|
|
|
named-reg-alloc-r1.ll
|
|
|
named-reg-alloc-r2-64.ll
|
|
|
named-reg-alloc-r2.ll
|
|
|
named-reg-alloc-r13-64.ll
|
|
|
named-reg-alloc-r13.ll
|
|
|
neg.ll
|
|
|
negate-i1.ll
|
|
|
negctr.ll
|
[PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop.
|
2019-07-03 01:49:03 +00:00 |
no-ctr-loop-if-exit-in-nested-loop.ll
|
|
|
no-dead-strip.ll
|
|
|
no-dup-of-bdnz.ll
|
|
|
no-dup-spill-fp.ll
|
|
|
no-ext-with-count-zeros.ll
|
|
|
no-extra-fp-conv-ldst.ll
|
|
|
no-pref-jumps.ll
|
|
|
no-rlwimi-trivial-commute.mir
|
[NFC][PowerPC]Change ADDIStocHA to ADDIStocHA8 to follow 64-bit naming convention
|
2019-07-22 19:55:33 +00:00 |
NoCRFieldRedefWhenSpillingCRBIT.mir
|
Describe stack-id as an enum
|
2019-06-17 09:13:29 +00:00 |
non-simple-args-intrin.ll
|
|
|
noPermuteFormasking.ll
|
[PowerPC][NFC] Fix typos in triples
|
2019-05-14 03:11:24 +00:00 |
not-fixed-frame-object.ll
|
[PowerPC] Move the stack pointer update instruction later in the prologue and earlier in the epilogue.
|
2019-02-28 12:23:28 +00:00 |
novrsave.ll
|
|
|
opt-cmp-inst-cr0-live.ll
|
|
|
opt-li-add-to-addi.ll
|
|
|
opt-sub-inst-cr0-live.mir
|
|
|
optcmp.ll
|
|
|
optimize-andiso.ll
|
Set useful flags for vector imm setting instructions
|
2019-03-12 18:27:09 +00:00 |
optnone-crbits-i1-ret.ll
|
|
|
or-addressing-mode.ll
|
|
|
ori_imm32.ll
|
|
|
p8-isel-sched.ll
|
|
|
p8-scalar_vector_conversions.ll
|
|
|
p8altivec-shuffles-pred.ll
|
|
|
p9_copy_fp.ll
|
|
|
p9-dform-load-alignment.ll
|
|
|
p9-vector-compares-and-counts.ll
|
|
|
p9-vinsert-vextract.ll
|
|
|
p9-xxinsertw-xxextractuw.ll
|
|
|
peephole-align.ll
|
|
|
pie.ll
|
|
|
pip-inner.ll
|
|
|
popcnt.ll
|
|
|
post-ra-ec.ll
|
|
|
pow.75.ll
|
[DAGCombine] Optimize pow(X, 0.75) to sqrt(X) * sqrt(sqrt(X))
|
2019-02-08 19:50:58 +00:00 |
power9-moves-and-splats.ll
|
[PowerPC][NFC]Update testcases using script.
|
2019-07-08 15:24:32 +00:00 |
ppc32-align-long-double-sf.ll
|
|
|
ppc32-constant-BE-ppcf128.ll
|
|
|
ppc32-cyclecounter.ll
|
|
|
ppc32-i1-stack-arguments-abi-bug.ll
|
|
|
ppc32-i1-vaarg.ll
|
|
|
ppc32-lshrti3.ll
|
|
|
ppc32-nest.ll
|
|
|
ppc32-pic-large.ll
|
Default to Secure PLT on PPC for musl libc.
|
2019-06-28 19:48:31 +00:00 |
ppc32-pic.ll
|
[PPC32] Support PLT calls for -msecure-plt -fpic
|
2019-06-25 15:56:32 +00:00 |
ppc32-secure-plt-tls2.ll
|
[PPC32] Support PLT calls for -msecure-plt -fpic
|
2019-06-25 15:56:32 +00:00 |
ppc32-secure-plt-tls.ll
|
[PowerPC] Add secure plt support for TLS symbols
|
2019-03-06 15:00:10 +00:00 |
ppc32-skip-regs.ll
|
[PowerPC] Implement the areMemAccessesTriviallyDisjoint hook
|
2019-07-02 03:28:52 +00:00 |
ppc32-vacopy.ll
|
|
|
ppc64-32bit-addic.ll
|
|
|
ppc64-abi-extend.ll
|
|
|
ppc64-align-long-double.ll
|
|
|
ppc64-altivec-abi.ll
|
|
|
ppc64-anyregcc-crash.ll
|
RegAlloc: try to fail more gracefully when out of registers
|
2019-05-15 17:29:58 +00:00 |
ppc64-anyregcc.ll
|
|
|
ppc64-blnop.ll
|
|
|
ppc64-byval-align.ll
|
[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.
|
2019-03-13 17:07:09 +00:00 |
ppc64-calls.ll
|
|
|
ppc64-crash.ll
|
|
|
ppc64-cyclecounter.ll
|
|
|
ppc64-elf-abi.ll
|
[PPC64] Parse -elfv1 -elfv2 when specified on target triple
|
2019-05-22 07:29:59 +00:00 |
ppc64-fastcc-fast-isel.ll
|
|
|
ppc64-fastcc.ll
|
|
|
ppc64-func-desc-hoist.ll
|
|
|
ppc64-gep-opt.ll
|
|
|
ppc64-get-cache-line-size.ll
|
|
|
ppc64-i128-abi.ll
|
|
|
ppc64-icbt-pwr7.ll
|
|
|
ppc64-icbt-pwr8.ll
|
|
|
ppc64-linux-func-size.ll
|
|
|
ppc64-nest.ll
|
|
|
ppc64-nonfunc-calls.ll
|
|
|
ppc64-P9-mod.ll
|
|
|
ppc64-P9-setb.ll
|
|
|
ppc64-P9-vabsd.ll
|
|
|
ppc64-patchpoint.ll
|
|
|
ppc64-pre-inc-no-extra-phi.ll
|
|
|
ppc64-prefetch.ll
|
|
|
ppc64-r2-alloc.ll
|
|
|
ppc64-sibcall-shrinkwrap.ll
|
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
|
2019-06-13 13:56:19 +00:00 |
ppc64-sibcall.ll
|
|
|
ppc64-smallarg.ll
|
[PowerPC] Replace float load/store pair with integer load/store pair when it's only used in load/store
|
2019-07-23 03:34:40 +00:00 |
ppc64-stackmap-nops.ll
|
|
|
ppc64-stackmap.ll
|
|
|
ppc64-toc.ll
|
|
|
ppc64-vaarg-int.ll
|
|
|
ppc64-zext.ll
|
|
|
ppc64le-aggregates.ll
|
|
|
ppc64le-calls.ll
|
|
|
ppc64le-crsave.ll
|
|
|
ppc64le-localentry-large.ll
|
|
|
ppc64le-localentry.ll
|
|
|
ppc64le-smallarg.ll
|
[PowerPC] Replace float load/store pair with integer load/store pair when it's only used in load/store
|
2019-07-23 03:34:40 +00:00 |
ppc440-fp-basic.ll
|
|
|
ppc440-msync.ll
|
|
|
ppc-crbits-onoff.ll
|
|
|
ppc-ctr-dead-code.ll
|
|
|
ppc-empty-fs.ll
|
|
|
ppc-label2.ll
|
|
|
ppc-label.ll
|
|
|
ppc-passname-assert.ll
|
[PowerPC] Add initialization for some ppc passes
|
2019-04-12 09:59:40 +00:00 |
ppc-passname.ll
|
[CodeGen] Generic Hardware Loop Support
|
2019-06-07 07:35:30 +00:00 |
ppc-prologue.ll
|
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
|
2019-01-14 10:55:55 +00:00 |
ppc-redzone-alignment-bug.ll
|
|
|
ppc-shrink-wrapping.ll
|
[PowerPC] Move the stack pointer update instruction later in the prologue and earlier in the epilogue.
|
2019-02-28 12:23:28 +00:00 |
ppc-vaarg-agg.ll
|
|
|
ppcf128-1-opt.ll
|
|
|
ppcf128-1.ll
|
|
|
ppcf128-2.ll
|
|
|
ppcf128-3.ll
|
|
|
ppcf128-4.ll
|
|
|
ppcf128-endian.ll
|
|
|
ppcf128sf.ll
|
|
|
ppcsoftops.ll
|
|
|
pr3711_widen_bit.ll
|
|
|
pr12757.ll
|
|
|
pr13641.ll
|
|
|
pr13891.ll
|
|
|
pr15031.ll
|
|
|
pr15359.ll
|
[llvm-readobj] Change -t to --symbols in tests. NFC
|
2019-05-01 09:28:24 +00:00 |
pr15630.ll
|
|
|
pr15632.ll
|
|
|
pr16556-2.ll
|
|
|
pr16556.ll
|
|
|
pr16573.ll
|
|
|
pr17168.ll
|
|
|
pr17354.ll
|
[IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in textual format
|
2019-05-15 02:35:32 +00:00 |
pr18663-2.ll
|
|
|
pr18663.ll
|
|
|
pr20442.ll
|
|
|
pr22711.ll
|
|
|
pr24216.ll
|
|
|
pr24546.ll
|
Adjust documentation for git migration.
|
2019-01-29 16:37:27 +00:00 |
pr24636.ll
|
|
|
pr25157-peephole.ll
|
|
|
pr25157.ll
|
|
|
pr26180.ll
|
[PowerPC] [PowerPC] Enhance the fast selection of fptoi & fptrunc instruction and clean up related asserts
|
2019-02-25 02:46:16 +00:00 |
pr26193.ll
|
|
|
pr26356.ll
|
|
|
pr26378.ll
|
|
|
pr26381.ll
|
|
|
pr26617.ll
|
|
|
pr26690.ll
|
|
|
pr27078.ll
|
|
|
pr27350.ll
|
|
|
pr28130.ll
|
|
|
pr28630.ll
|
|
|
pr30451.ll
|
|
|
pr30640.ll
|
|
|
pr30663.ll
|
|
|
pr30715.ll
|
|
|
pr31144.ll
|
|
|
pr32063.ll
|
|
|
pr32140.ll
|
|
|
pr33093.ll
|
|
|
pr33547.ll
|
|
|
pr35402.ll
|
|
|
pr35688.ll
|
Revert rL357745: [SelectionDAG] Compute known bits of CopyFromReg
|
2019-04-10 18:00:41 +00:00 |
pr36068.ll
|
|
|
pr36292.ll
|
Set useful flags for vector imm setting instructions
|
2019-03-12 18:27:09 +00:00 |
pr38087.ll
|
|
|
pr39478.ll
|
[DAGCombine] Prune unnused nodes.
|
2019-03-29 17:35:56 +00:00 |
pr39815.ll
|
[DAGCombiner] Do not generate ISD::ADDE node if adde is not legal for the target when combine ISD::TRUNC node
|
2019-04-30 03:01:14 +00:00 |
pr40922.ll
|
[DAGCombiner] Do not generate ISD::ADDE node if adde is not legal for the target when combine ISD::TRUNC node
|
2019-04-30 03:01:14 +00:00 |
pr41177.ll
|
[PowerPC] Fix wrong ElemSIze when calling isConsecutiveLS()
|
2019-04-18 07:24:15 +00:00 |
pr42492.ll
|
[PowerPC] Hardware Loop branch instruction's condition may not be icmp.
|
2019-07-04 01:51:47 +00:00 |
PR3488.ll
|
|
|
PR33636.ll
|
|
|
PR33671.ll
|
|
|
PR35812-neg-cmpxchg.ll
|
[UpdateTestChecks][PowerPC] Avoid empty string when scrubbing loop comments
|
2019-07-01 14:37:48 +00:00 |
pre-inc-disable.ll
|
[PowerPC][NFC] Regenerate test using script
|
2019-07-21 18:42:29 +00:00 |
preemption.ll
|
|
|
preinc-ld-sel-crash.ll
|
|
|
preincprep-i64-check.ll
|
|
|
preincprep-invoke.ll
|
|
|
preincprep-nontrans-crash.ll
|
|
|
private.ll
|
|
|
pwr3-6x.ll
|
|
|
pwr7-gt-nop.ll
|
[PowerPC] Replace float load/store pair with integer load/store pair when it's only used in load/store
|
2019-07-23 03:34:40 +00:00 |
pzero-fp-xored.ll
|
|
|
qpx-bv-sint.ll
|
|
|
qpx-bv.ll
|
|
|
qpx-func-clobber.ll
|
|
|
qpx-load-splat.ll
|
|
|
qpx-load.ll
|
|
|
qpx-recipest.ll
|
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control
|
2019-07-31 21:57:28 +00:00 |
qpx-rounding-ops.ll
|
|
|
qpx-s-load.ll
|
|
|
qpx-s-sel.ll
|
|
|
qpx-s-store.ll
|
|
|
qpx-sel.ll
|
|
|
qpx-split-vsetcc.ll
|
|
|
qpx-store.ll
|
|
|
qpx-unal-cons-lds.ll
|
|
|
qpx-unalperm.ll
|
|
|
quadint-return.ll
|
|
|
r31.ll
|
|
|
recipest.ll
|
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control
|
2019-07-31 21:57:28 +00:00 |
reduce_cr.ll
|
[PPC] Correctly adjust branch probability in PPCReduceCRLogicals
|
2019-05-31 16:11:17 +00:00 |
reduce_scalarization.ll
|
[PowerPC] custom lower v2f64 fpext v2f32
|
2019-05-10 14:04:06 +00:00 |
redundant-copy-after-tail-dup.ll
|
[NFC][PowerPC] Added test to track current behaviour of TailDup
|
2019-07-11 09:43:03 +00:00 |
reg-coalesce-simple.ll
|
|
|
reg-names.ll
|
|
|
reg-scavenging.ll
|
[PowerPC][NFC] Added tests for prologue and epilogue code gen.
|
2019-02-13 23:37:23 +00:00 |
reloc-align.ll
|
|
|
remap-crash.ll
|
|
|
remat-imm.ll
|
|
|
remove-copy-crunsetcrbit.mir
|
[NFC][PowerPC]Change ADDIStocHA to ADDIStocHA8 to follow 64-bit naming convention
|
2019-07-22 19:55:33 +00:00 |
remove-implicit-use.mir
|
|
|
remove-redundant-load-imm.ll
|
[PowerPC] Remove redundant load immediate instructions
|
2019-07-23 19:11:07 +00:00 |
remove-redundant-load-imm.mir
|
[PowerPC] Remove redundant load immediate instructions
|
2019-07-23 19:11:07 +00:00 |
remove-redundant-moves.ll
|
|
|
remove-redundant-toc-saves.ll
|
[PowerPC] Move TOC save to prologue when profitable
|
2019-07-05 18:38:09 +00:00 |
remove-self-copies.mir
|
|
|
repeated-fp-divisors.ll
|
[PowerPC] add test that could infinite loop with reordered transforms; NFC
|
2019-05-01 17:34:30 +00:00 |
resolvefi-basereg.ll
|
|
|
resolvefi-disp.ll
|
|
|
restore-r30.ll
|
|
|
retaddr2.ll
|
|
|
retaddr.ll
|
|
|
return-val-i128.ll
|
|
|
rlwimi2.ll
|
|
|
rlwimi3.ll
|
|
|
rlwimi-and-or-bits.ll
|
|
|
rlwimi-and.ll
|
|
|
rlwimi-commute.ll
|
|
|
rlwimi-dyn-and.ll
|
|
|
rlwimi-keep-rsh.ll
|
|
|
rlwimi.ll
|
|
|
rlwinm2.ll
|
|
|
rlwinm_rldicl_to_andi.mir
|
|
|
rlwinm-zero-ext.ll
|
|
|
rlwinm.ll
|
|
|
rm-zext.ll
|
|
|
rotl-2.ll
|
|
|
rotl-64.ll
|
|
|
rotl-rotr-crash.ll
|
|
|
rotl.ll
|
|
|
rounding-ops.ll
|
|
|
rs-undef-use.ll
|
|
|
s000-alias-misched.ll
|
|
|
sat-add.ll
|
[PowerPC] Exploit the vector min/max instructions
|
2019-06-06 23:49:01 +00:00 |
save-bp.ll
|
|
|
save-cr-ppc32svr4.ll
|
|
|
save-crbp-ppc32svr4.ll
|
|
|
scalar_vector_test_1.ll
|
|
|
scalar_vector_test_2.ll
|
[PowerPC] Exploit store instructions that store a single vector element
|
2019-01-24 23:44:28 +00:00 |
scalar_vector_test_3.ll
|
|
|
scalar_vector_test_4.ll
|
|
|
scavenging.mir
|
Fixed typos in tests: s/CHEKC/CHECK/
|
2019-02-25 13:41:59 +00:00 |
schedule-addi-load.mir
|
[Power9] Add a specific heuristic to schedule the addi before the load
|
2019-05-24 05:30:09 +00:00 |
scheduling-mem-dependency.ll
|
[PowerPC] Implement the areMemAccessesTriviallyDisjoint hook
|
2019-07-02 03:28:52 +00:00 |
sdag-ppcf128.ll
|
|
|
sdiv-pow2.ll
|
|
|
sections.ll
|
|
|
select_const.ll
|
Teach the DAGCombine to fold this pattern(c1 and c2 is constant).
|
2019-06-26 05:12:53 +00:00 |
select_lt0.ll
|
|
|
select-addrRegRegOnly.ll
|
|
|
select-cc.ll
|
|
|
select-i1-vs-i1.ll
|
[PPC] Correctly adjust branch probability in PPCReduceCRLogicals
|
2019-05-31 16:11:17 +00:00 |
selectiondag-extload-computeknownbits.ll
|
|
|
selectiondag-sextload.ll
|
|
|
set0-v8i16.ll
|
|
|
setcc_no_zext.ll
|
|
|
setcc-logic.ll
|
[DAGCombiner] convert logic-of-setcc into bit magic (PR40611)
|
2019-02-12 17:07:47 +00:00 |
setcc-to-sub.ll
|
|
|
setcclike-or-comb.ll
|
|
|
setcr_bc2.mir
|
Describe stack-id as an enum
|
2019-06-17 09:13:29 +00:00 |
setcr_bc3.mir
|
Describe stack-id as an enum
|
2019-06-17 09:13:29 +00:00 |
setcr_bc.mir
|
Describe stack-id as an enum
|
2019-06-17 09:13:29 +00:00 |
seteq-0.ll
|
|
|
setrnd.ll
|
[PowerPC] Add the support for __builtin_setrnd()
|
2019-03-29 08:45:24 +00:00 |
shift128.ll
|
|
|
shift_mask.ll
|
|
|
shift-cmp.ll
|
[Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold
|
2019-07-24 22:57:22 +00:00 |
shl_elim.ll
|
|
|
shl_sext.ll
|
|
|
shrink-wrap.ll
|
[NFC][PowerPC] Add the test case shrink-wrap.mir and shrink-wrap.ll for PPC
|
2019-08-12 17:50:01 +00:00 |
shrink-wrap.mir
|
[NFC][PowerPC] Add the test case shrink-wrap.mir and shrink-wrap.ll for PPC
|
2019-08-12 17:50:01 +00:00 |
sign_ext_inreg1.ll
|
|
|
signbit-shift.ll
|
[DAGCombiner] fold add/sub with bool operand based on target's boolean contents
|
2019-02-07 17:43:34 +00:00 |
simplifyConstCmpToISEL.ll
|
|
|
sj-ctr-loop.ll
|
|
|
sjlj_no0x.ll
|
|
|
sjlj.ll
|
|
|
small-arguments.ll
|
|
|
sms-cpy-1.ll
|
[MachinePipeliner] Avoid indeterminate order in FuncUnitSorter
|
2019-08-09 14:10:57 +00:00 |
sms-grp-order.ll
|
[MachinePipeliner] Fix order for nodes with Anti dependence in same cycle
|
2019-07-12 01:59:42 +00:00 |
sms-iterator.ll
|
[PowerPC][NFC] Update testcase to avoid dead code
|
2019-07-11 19:16:33 +00:00 |
sms-phi-1.ll
|
Re-commit "[PowerPC][NFC][MachinePipeliner] Add some regression testcases""
|
2019-08-08 17:37:58 +00:00 |
sms-phi-2.ll
|
Re-commit "[PowerPC][NFC][MachinePipeliner] Add some regression testcases""
|
2019-08-08 17:37:58 +00:00 |
sms-phi-3.ll
|
Re-commit "[PowerPC][NFC][MachinePipeliner] Add some regression testcases""
|
2019-08-08 17:37:58 +00:00 |
sms-phi-5.ll
|
Re-commit "[PowerPC][NFC][MachinePipeliner] Add some regression testcases""
|
2019-08-08 17:37:58 +00:00 |
sms-phi.ll
|
[MachinePipeliner] Fix Phi refers to Phi in same stage in 1st epilogue
|
2019-07-09 02:27:35 +00:00 |
sms-simple.ll
|
[MachinePiepliner] Don't check boundary node in checkValidNodeOrder
|
2019-06-13 21:51:12 +00:00 |
spe.ll
|
PowerPC/SPE: Fix load/store handling for SPE
|
2019-07-17 12:30:04 +00:00 |
spill-nor0.ll
|
|
|
splat-bug.ll
|
|
|
splat-larger-types-as-v16i8.ll
|
|
|
split-index-tc.ll
|
|
|
splitstore-check-volatile.ll
|
[CodeGenPrepare] Don't split the store if it is volatile
|
2019-05-08 07:32:12 +00:00 |
srl-mask.ll
|
|
|
stack-guard-reassign.ll
|
[CodeGen] Don't resolve the stack protector frame accesses until PEI
|
2019-07-25 22:23:48 +00:00 |
stack-no-redzone.ll
|
|
|
stack-protector.ll
|
|
|
stack-realign.ll
|
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
|
2019-01-14 10:55:55 +00:00 |
stackmap-frame-setup.ll
|
|
|
stacksize.ll
|
|
|
std-unal-fi.ll
|
|
|
stdux-constuse.ll
|
|
|
stfiwx-2.ll
|
|
|
stfiwx.ll
|
|
|
store_fptoi.ll
|
|
|
store-combine.ll
|
[DAGCombine] Match a pattern where a wide type scalar value is stored by several narrow stores
|
2019-06-10 05:40:21 +00:00 |
store-constant.ll
|
|
|
store-load-fwd.ll
|
|
|
store-update.ll
|
|
|
structsinmem.ll
|
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
|
2019-01-14 10:55:55 +00:00 |
structsinregs.ll
|
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
|
2019-01-14 10:55:55 +00:00 |
stubs.ll
|
|
|
stwu8.ll
|
|
|
stwu-gta.ll
|
|
|
stwu-sched.ll
|
[PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop.
|
2019-07-03 01:49:03 +00:00 |
stwux.ll
|
|
|
sub-bv-types.ll
|
|
|
sub-of-not.ll
|
[Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)
|
2019-07-03 09:41:35 +00:00 |
subc.ll
|
|
|
subreg-postra-2.ll
|
|
|
subreg-postra.ll
|
|
|
subtract_from_imm.ll
|
|
|
svr4-redzone.ll
|
|
|
swaps-le-1.ll
|
|
|
swaps-le-2.ll
|
|
|
swaps-le-3.ll
|
|
|
swaps-le-4.ll
|
|
|
swaps-le-5.ll
|
|
|
swaps-le-6.ll
|
|
|
swaps-le-7.ll
|
|
|
tail-dup-analyzable-fallthrough.ll
|
|
|
tail-dup-branch-to-fallthrough.ll
|
|
|
tail-dup-break-cfg.ll
|
|
|
tail-dup-layout.ll
|
|
|
tailcall1-64.ll
|
|
|
tailcall1.ll
|
|
|
tailcall-string-rvo.ll
|
|
|
tailcallpic1.ll
|
|
|
test_call_aix.ll
|
[PowerPC][AIX]Add lowering of MCSymbol MachineOperand.
|
2019-07-26 17:25:27 +00:00 |
test-and-cmp-folding.ll
|
|
|
testBitReverse.ll
|
|
|
testComparesi32gtu.ll
|
|
|
testComparesi32leu.ll
|
|
|
testComparesi32ltu.ll
|
|
|
testComparesieqsc.ll
|
|
|
testComparesieqsi.ll
|
|
|
testComparesieqsll.ll
|
|
|
testComparesieqss.ll
|
|
|
testComparesiequc.ll
|
|
|
testComparesiequi.ll
|
|
|
testComparesiequll.ll
|
|
|
testComparesiequs.ll
|
|
|
testComparesigesc.ll
|
|
|
testComparesigesi.ll
|
|
|
testComparesigesll.ll
|
[DAGCombine] Prune unnused nodes.
|
2019-03-29 17:35:56 +00:00 |
testComparesigess.ll
|
|
|
testComparesigeuc.ll
|
|
|
testComparesigeui.ll
|
|
|
testComparesigeull.ll
|
|
|
testComparesigeus.ll
|
|
|
testComparesigtsc.ll
|
|
|
testComparesigtsi.ll
|
|
|
testComparesigtsll.ll
|
|
|
testComparesigtss.ll
|
|
|
testComparesigtuc.ll
|
|
|
testComparesigtui.ll
|
|
|
testComparesigtus.ll
|
|
|
testComparesilesc.ll
|
|
|
testComparesilesi.ll
|
|
|
testComparesilesll.ll
|
|
|
testComparesiless.ll
|
|
|
testComparesileuc.ll
|
|
|
testComparesileui.ll
|
|
|
testComparesileull.ll
|
|
|
testComparesileus.ll
|
|
|
testComparesiltsc.ll
|
|
|
testComparesiltsi.ll
|
|
|
testComparesiltsll.ll
|
|
|
testComparesiltss.ll
|
|
|
testComparesiltuc.ll
|
|
|
testComparesiltui.ll
|
|
|
testComparesiltus.ll
|
|
|
testComparesinesc.ll
|
|
|
testComparesinesi.ll
|
|
|
testComparesinesll.ll
|
|
|
testComparesiness.ll
|
|
|
testComparesineuc.ll
|
|
|
testComparesineui.ll
|
|
|
testComparesineull.ll
|
|
|
testComparesineus.ll
|
|
|
testCompareslleqsc.ll
|
|
|
testCompareslleqsi.ll
|
|
|
testCompareslleqsll.ll
|
|
|
testCompareslleqss.ll
|
|
|
testComparesllequc.ll
|
|
|
testComparesllequi.ll
|
|
|
testComparesllequll.ll
|
|
|
testComparesllequs.ll
|
|
|
testComparesllgesc.ll
|
|
|
testComparesllgesi.ll
|
|
|
testComparesllgesll.ll
|
|
|
testComparesllgess.ll
|
|
|
testComparesllgeuc.ll
|
|
|
testComparesllgeui.ll
|
|
|
testComparesllgeull.ll
|
|
|
testComparesllgeus.ll
|
|
|
testComparesllgtsll.ll
|
|
|
testComparesllgtuc.ll
|
|
|
testComparesllgtui.ll
|
|
|
testComparesllgtus.ll
|
|
|
testCompareslllesc.ll
|
|
|
testCompareslllesi.ll
|
|
|
testCompareslllesll.ll
|
|
|
testComparesllless.ll
|
|
|
testComparesllleuc.ll
|
|
|
testComparesllleui.ll
|
|
|
testComparesllleull.ll
|
|
|
testComparesllleus.ll
|
|
|
testComparesllltsll.ll
|
|
|
testComparesllltuc.ll
|
|
|
testComparesllltui.ll
|
|
|
testComparesllltus.ll
|
|
|
testComparesllnesll.ll
|
|
|
testComparesllneull.ll
|
|
|
thread-pointer.ll
|
|
|
tls_get_addr_clobbers.ll
|
[PowerPC] Move the stack pointer update instruction later in the prologue and earlier in the epilogue.
|
2019-02-28 12:23:28 +00:00 |
tls_get_addr_fence1.mir
|
|
|
tls_get_addr_fence2.mir
|
|
|
tls_get_addr_stackframe.ll
|
|
|
tls-cse.ll
|
|
|
tls-pic.ll
|
|
|
tls-pie-xform.ll
|
|
|
tls-store2.ll
|
|
|
tls.ll
|
[PowerPC] Allow using initial-exec TLS with PIC
|
2019-04-24 22:12:22 +00:00 |
toc-float.ll
|
|
|
toc-load-sched-bug.ll
|
|
|
tocSaveInPrologue.ll
|
[PowerPC] Move TOC save to prologue when profitable
|
2019-07-05 18:38:09 +00:00 |
trampoline.ll
|
|
|
trunc-srl-load.ll
|
|
|
uint-to-fp-v4i32.ll
|
[PowerPC] Fix erroneous condition for converting uint-to-fp vector conversion
|
2019-05-06 13:35:49 +00:00 |
uint-to-ppcfp128-crash.ll
|
|
|
umulo-128-legalisation-lowering.ll
|
|
|
unal4-std.ll
|
|
|
unal-altivec2.ll
|
|
|
unal-altivec-wint.ll
|
|
|
unal-altivec.ll
|
[PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop.
|
2019-07-03 01:49:03 +00:00 |
unal-vec-ldst.ll
|
|
|
unal-vec-negarith.ll
|
|
|
unaligned-addressing-mode.ll
|
[PowerPC] [ISEL] select x-form instruction for unaligned offset
|
2019-05-22 02:57:31 +00:00 |
unaligned.ll
|
|
|
unsafe-math.ll
|
|
|
unwind-dw2-g.ll
|
|
|
unwind-dw2.ll
|
|
|
use-cr-result-of-dom-icmp-st.ll
|
[PowerPC][NFC] Add test for D60506 to show differences in code-gen
|
2019-05-09 12:26:39 +00:00 |
uwtables.ll
|
|
|
vaddsplat.ll
|
|
|
varargs-struct-float.ll
|
|
|
varargs.ll
|
[PowerPC] Implement the areMemAccessesTriviallyDisjoint hook
|
2019-07-02 03:28:52 +00:00 |
variable_elem_vec_extracts.ll
|
|
|
vcmp-fold.ll
|
|
|
vec_abs.ll
|
|
|
vec_absd.ll
|
|
|
vec_add_sub_doubleword.ll
|
[NFC][PPC] Autogenerate vec_add_sub_doubleword.ll test
|
2019-05-23 18:08:21 +00:00 |
vec_add_sub_quadword.ll
|
[NFC][PPC] Autogenerate vec_add_sub_quadword.ll test
|
2019-05-23 18:08:26 +00:00 |
vec_auto_constant.ll
|
|
|
vec_br_cmp.ll
|
|
|
vec_buildvector_loadstore.ll
|
|
|
vec_call.ll
|
|
|
vec_clz.ll
|
[CodeGen] Add missing vector type legalization for ctlz_zero_undef
|
2019-06-24 19:27:07 +00:00 |
vec_cmp.ll
|
|
|
vec_cmpd.ll
|
|
|
vec_constants.ll
|
|
|
vec_conv_fp32_to_i8_elts.ll
|
[PowerPC] P9 Scheduling Model: dispatching rule fixes
|
2019-06-04 15:22:23 +00:00 |
vec_conv_fp32_to_i16_elts.ll
|
|
|
vec_conv_fp32_to_i64_elts.ll
|
|
|
vec_conv_fp64_to_i8_elts.ll
|
|
|
vec_conv_fp64_to_i16_elts.ll
|
|
|
vec_conv_fp64_to_i32_elts.ll
|
|
|
vec_conv_fp_to_i_4byte_elts.ll
|
|
|
vec_conv_fp_to_i_8byte_elts.ll
|
[MachineScheduler] checkResourceLimit boundary condition update
|
2019-06-07 14:54:47 +00:00 |
vec_conv_i8_to_fp32_elts.ll
|
Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes."
|
2019-03-27 19:54:41 +00:00 |
vec_conv_i8_to_fp64_elts.ll
|
Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes."
|
2019-03-27 19:54:41 +00:00 |
vec_conv_i16_to_fp32_elts.ll
|
|
|
vec_conv_i16_to_fp64_elts.ll
|
Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes."
|
2019-03-27 19:54:41 +00:00 |
vec_conv_i32_to_fp64_elts.ll
|
|
|
vec_conv_i64_to_fp32_elts.ll
|
|
|
vec_conv_i_to_fp_4byte_elts.ll
|
|
|
vec_conv_i_to_fp_8byte_elts.ll
|
[MachineScheduler] checkResourceLimit boundary condition update
|
2019-06-07 14:54:47 +00:00 |
vec_conv.ll
|
|
|
vec_extload.ll
|
|
|
vec_extract_p9_2.ll
|
|
|
vec_extract_p9.ll
|
|
|
vec_fmuladd.ll
|
|
|
vec_fneg.ll
|
|
|
vec_insert.ll
|
|
|
vec_int_ext.ll
|
|
|
vec_mergeow.ll
|
|
|
vec_minmax.ll
|
|
|
vec_misaligned.ll
|
|
|
vec_mul_even_odd.ll
|
|
|
vec_mul.ll
|
|
|
vec_perf_shuffle.ll
|
|
|
vec_popcnt.ll
|
|
|
vec_revb.ll
|
|
|
vec_rotate_shift.ll
|
|
|
vec_rounding.ll
|
|
|
vec_select.ll
|
|
|
vec_shift.ll
|
|
|
vec_shuffle_le.ll
|
|
|
vec_shuffle_p8vector_le.ll
|
|
|
vec_shuffle_p8vector.ll
|
|
|
vec_shuffle.ll
|
|
|
vec_sldwi.ll
|
|
|
vec_splat_constant.ll
|
|
|
vec_splat.ll
|
UpdateTestChecks: ppc32 triple support
|
2019-05-23 19:54:41 +00:00 |
vec_sqrt.ll
|
|
|
vec_urem_const.ll
|
|
|
vec_veqv_vnand_vorc.ll
|
|
|
vec_vrsave.ll
|
|
|
vec_xxpermdi.ll
|
|
|
vec_zero.ll
|
|
|
vec-abi-align.ll
|
|
|
vec-asm-disabled.ll
|
[PowerPC] Support constraint code "ww"
|
2019-07-04 04:44:42 +00:00 |
vec-itofp.ll
|
|
|
vec-min-max.ll
|
[PowerPC] Implement the areMemAccessesTriviallyDisjoint hook
|
2019-07-02 03:28:52 +00:00 |
vec-select.ll
|
[PowerPC] Emit XXSEL for vec_sel and code that has the same pattern
|
2019-06-25 10:46:13 +00:00 |
vec-trunc.ll
|
[PowerPC] Avoid scalarization of vector truncate
|
2019-02-11 17:29:14 +00:00 |
vector-constrained-fp-intrinsics.ll
|
[Strict FP] Allow custom operation actions
|
2019-08-06 10:43:13 +00:00 |
vector-copysign.ll
|
[PowerPC] Mark FCOPYSIGN legal for FP vectors
|
2019-06-26 01:48:57 +00:00 |
vector-identity-shuffle.ll
|
|
|
vector-merge-store-fp-constants.ll
|
|
|
vector.ll
|
|
|
vperm-instcombine.ll
|
|
|
vperm-lowering.ll
|
|
|
vrspill.ll
|
|
|
vsel-prom.ll
|
|
|
vselect-constants.ll
|
|
|
vsx_builtins.ll
|
|
|
vsx_insert_extract_le.ll
|
|
|
vsx_scalar_ld_st.ll
|
|
|
vsx_shuffle_le.ll
|
recommit:[PowerPC] Eliminate loads/swap feeding swap/store for vector type by using big-endian load/store
|
2019-08-01 05:26:02 +00:00 |
vsx-args.ll
|
|
|
VSX-DForm-Scalars.ll
|
|
|
vsx-div.ll
|
|
|
vsx-elementary-arith.ll
|
|
|
vsx-fma-m.ll
|
|
|
vsx-fma-mutate-trivial-copy.ll
|
[PowerPC] Use the two-constant NR algorithm for refining estimates
|
2019-05-07 13:48:03 +00:00 |
vsx-fma-mutate-undef.ll
|
|
|
vsx-fma-sp.ll
|
|
|
vsx-infl-copy1.ll
|
Set useful flags for vector imm setting instructions
|
2019-03-12 18:27:09 +00:00 |
vsx-infl-copy2.ll
|
|
|
vsx-ldst-builtin-le.ll
|
|
|
vsx-ldst.ll
|
|
|
vsx-minmax.ll
|
|
|
vsx-p8.ll
|
|
|
vsx-p9.ll
|
|
|
vsx-partword-int-loads-and-stores.ll
|
[PowerPC] Remove UseVSXReg
|
2019-03-26 20:28:21 +00:00 |
vsx-recip-est.ll
|
|
|
vsx-self-copy.ll
|
|
|
vsx-spill-norwstore.ll
|
|
|
vsx-spill.ll
|
|
|
vsx-vec-spill.ll
|
|
|
vsx-word-splats.ll
|
|
|
VSX-XForm-Scalars.ll
|
|
|
vsx.ll
|
[PowerPC] Implement the areMemAccessesTriviallyDisjoint hook
|
2019-07-02 03:28:52 +00:00 |
vsxD-Form-spills.ll
|
|
|
vtable-reloc.ll
|
|
|
weak_def_can_be_hidden.ll
|
|
|
xray-attribute-instrumentation.ll
|
|
|
xray-conditional-return.ll
|
|
|
xray-ret-is-terminator.ll
|
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
|
2019-06-13 13:56:19 +00:00 |
xray-tail-call-hidden.ll
|
|
|
xray-tail-call-sled.ll
|
|
|
xvcmpeqdp-v2f64.ll
|
|
|
xxleqv_xxlnand_xxlorc.ll
|
|
|
zero-not-run.ll
|
|
|
zext-and-cmp.ll
|
|
|
zext-bitperm.ll
|
|
|
zext-free.ll
|
|
|