..
2004-11-29-ShrCrash.ll
2004-11-30-shift-crash.ll
2004-11-30-shr-var-crash.ll
2004-12-12-ZeroSizeCommon.ll
2005-01-14-SetSelectCrash.ll
2005-01-14-UndefLong.ll
2005-08-12-rlwimi-crash.ll
2005-09-02-LegalizeDuplicatesCalls.ll
2005-10-08-ArithmeticRotate.ll
2005-11-30-vastart-crash.ll
2006-01-11-darwin-fp-argument.ll
2006-01-20-ShiftPartsCrash.ll
2006-04-01-FloatDoubleExtend.ll
2006-04-05-splat-ish.ll
2006-04-19-vmaddfp-crash.ll
2006-05-12-rlwimi-crash.ll
2006-07-07-ComputeMaskedBits.ll
2006-07-19-stwbrx-crash.ll
2006-08-11-RetVector.ll
2006-08-15-SelectionCrash.ll
2006-09-28-shift_64.ll
2006-10-13-Miscompile.ll
2006-10-17-brcc-miscompile.ll
2006-10-17-ppc64-alloca.ll
2006-11-10-DAGCombineMiscompile.ll
2006-11-29-AltivecFPSplat.ll
2006-12-07-LargeAlloca.ll
2006-12-07-SelectCrash.ll
2007-01-04-ArgExtension.ll
2007-01-15-AsmDialect.ll
[MachineScheduler] Update available queue on the first mop of a new cycle
2020-06-09 19:13:53 +01:00
2007-01-29-lbrx-asm.ll
2007-01-31-InlineAsmAddrMode.ll
2007-02-16-AlignPacked.ll
2007-02-16-InlineAsmNConstraint.ll
2007-02-23-lr-saved-twice.ll
2007-03-24-cntlzd.ll
2007-03-30-SpillerCrash.ll
2007-04-24-InlineAsm-I-Modifier.ll
2007-04-30-InlineAsmEarlyClobber.ll
2007-05-03-InlineAsm-S-Constraint.ll
2007-05-14-InlineAsmSelectCrash.ll
2007-05-22-tailmerge-3.ll
2007-05-30-dagcombine-miscomp.ll
2007-06-28-BCCISelBug.ll
2007-08-04-CoalescerAssert.ll
2007-09-04-AltivecDST.ll
2007-09-07-LoadStoreIdxForms.ll
2007-09-08-unaligned.ll
2007-09-11-RegCoalescerAssert.ll
2007-09-12-LiveIntervalsAssert.ll
2007-10-16-InlineAsmFrameOffset.ll
2007-10-18-PtrArithmetic.ll
2007-10-21-LocalRegAllocAssert2.ll
2007-10-21-LocalRegAllocAssert.ll
2007-11-04-CoalescerCrash.ll
2007-11-16-landingpad-split.ll
2007-11-19-VectorSplitting.ll
2008-02-05-LiveIntervalsAssert.ll
2008-02-09-LocalRegAllocAssert.ll
2008-03-05-RegScavengerAssert.ll
2008-03-17-RegScavengerCrash.ll
2008-03-18-RegScavengerAssert.ll
2008-03-24-AddressRegImm.ll
2008-03-24-CoalescerBug.ll
2008-03-26-CoalescerBug.ll
2008-04-10-LiveIntervalCrash.ll
2008-04-16-CoalescerBug.ll
2008-04-23-CoalescerCrash.ll
2008-05-01-ppc_fp128.ll
2008-06-19-LegalizerCrash.ll
2008-06-21-F128LoadStore.ll
2008-06-23-LiveVariablesCrash.ll
2008-07-10-SplatMiscompile.ll
2008-07-15-Bswap.ll
2008-07-15-Fabs.ll
2008-07-15-SignExtendInreg.ll
2008-07-17-Fneg.ll
2008-07-24-PPC64-CCBug.ll
2008-09-12-CoalescerBug.ll
2008-10-17-AsmMatchingOperands.ll
2008-10-28-f128-i32.ll
[MachineScheduler] Update available queue on the first mop of a new cycle
2020-06-09 19:13:53 +01:00
2008-10-28-UnprocessedNode.ll
2008-12-02-LegalizeTypeAssert.ll
2009-01-16-DeclareISelBug.ll
2009-03-17-LSRBug.ll
2009-05-28-LegalizeBRCC.ll
2009-07-16-InlineAsm-M-Operand.ll
2009-08-17-inline-asm-addr-mode-breakage.ll
2009-09-18-carrybit.ll
2009-11-15-ProcImpDefsBug.ll
2009-11-25-ImpDefBug.ll
2010-02-04-EmptyGlobal.ll
2010-02-12-saveCR.ll
2010-03-09-indirect-call.ll
2010-04-01-MachineCSEBug.ll
2010-05-03-retaddr1.ll
2010-10-11-Fast-Varargs.ll
2010-12-18-PPCStackRefs.ll
2011-12-05-NoSpillDupCR.ll
2011-12-06-SpillAndRestoreCR.ll
2011-12-08-DemandedBitsMiscompile.ll
2012-09-16-TOC-entry-check.ll
2012-10-11-dynalloc.ll
2012-10-12-bitcast.ll
2012-11-16-mischedcall.ll
2013-05-15-preinc-fold.ll
2013-07-01-PHIElimBug.mir
2016-01-07-BranchWeightCrash.ll
2016-04-16-ADD8TLS.ll
2016-04-17-combine.ll
2016-04-28-setjmp.ll
2018-09-19-sextinreg-vector-crash.ll
a2-fp-basic.ll
a2q-stackalign.ll
a2q.ll
aa-tbaa.ll
aantidep-def-ec.mir
aantidep-inline-asm-use.ll
absol-jump-table-enabled.ll
add_cmp.ll
add-fi.ll
addc.ll
adde_return_type.ll
addegluecrash.ll
RegAllocFast: Record internal state based on register units
2020-06-03 16:51:46 -04:00
addi-licm.ll
addi-offset-fold.ll
addi-reassoc.ll
addisdtprelha-nonr3.mir
addrfuncstr.ll
addrspacecast.ll
addze.ll
aggressive-anti-dep-breaker-subreg.ll
aix32-cc-abi-vaarg.ll
[MachineScheduler] Update available queue on the first mop of a new cycle
2020-06-09 19:13:53 +01:00
aix32-crsave.mir
aix64-cc-abi-vaarg.ll
aix64-cc-byval.ll
[XCOFF][AIX] Use 'L..' instead of 'L' for PrivateGlobalPrefix
2020-06-03 17:18:11 +00:00
aix-alias.ll
aix-AppendingLinkage.ll
aix-available-externally-linkage.ll
aix-base-pointer.ll
Enable basepointer for AIX.
2020-07-03 11:55:49 -04:00
aix-calleesavedregs.ll
aix-cc-abi.ll
[MachineScheduler] Update available queue on the first mop of a new cycle
2020-06-09 19:13:53 +01:00
aix-cc-altivec.ll
aix-cc-byval-limitation3.ll
aix-cc-byval-mem.ll
[XCOFF][AIX] Use 'L..' instead of 'L' for PrivateGlobalPrefix
2020-06-03 17:18:11 +00:00
aix-cc-byval-split.ll
aix-cc-byval.ll
[XCOFF][AIX] Use 'L..' instead of 'L' for PrivateGlobalPrefix
2020-06-03 17:18:11 +00:00
aix-crspill.ll
aix-csr.ll
aix-extern-weak.ll
[XCOFF][AIX] Use 'L..' instead of 'L' for PrivateGlobalPrefix
2020-06-03 17:18:11 +00:00
aix-extern.ll
[XCOFF][AIX] Use 'L..' instead of 'L' for PrivateGlobalPrefix
2020-06-03 17:18:11 +00:00
aix-external-sym-sdnode-lowering.ll
aix-func-align.ll
aix-func-dsc-gen.ll
aix-indirect-call.ll
aix-internal.ll
aix-LinkOnceAnyLinkage.ll
aix-LinkOnceODRLinkage.ll
aix-lower-block-address.ll
[XCOFF][AIX] Use 'L..' instead of 'L' for PrivateGlobalPrefix
2020-06-03 17:18:11 +00:00
aix-lower-constant-pool-index.ll
[XCOFF][AIX] Use 'L..' instead of '.L' for getPrivateGlobalPrefix in DataLayout
2020-07-03 18:25:14 +00:00
aix-lower-jump-table.ll
[XCOFF][AIX] Use 'L..' instead of '.L' for getPrivateGlobalPrefix in DataLayout
2020-07-03 18:25:14 +00:00
aix-lr.ll
aix-nest-param.ll
aix-nonzero-zerofill.ll
aix-print-pc.mir
aix-readonly-with-relocation.ll
[AIX] Update data directives for AIX assembly
2020-06-03 10:55:59 -04:00
aix-reference-func-addr-const.ll
[AIX] Update data directives for AIX assembly
2020-06-03 10:55:59 -04:00
aix-return55.ll
aix-space.ll
aix-sret-param.ll
aix-trampoline.ll
aix-undef-func-call.ll
aix-user-defined-memcpy.ll
aix-weak-undef-func-call.ll
aix-weak.ll
[XCOFF][AIX] Use 'L..' instead of 'L' for PrivateGlobalPrefix
2020-06-03 17:18:11 +00:00
aix-WeakODRLinkage.ll
aix-xcoff-data-only-notoc.ll
aix-xcoff-data.ll
[AIX] Update data directives for AIX assembly
2020-06-03 10:55:59 -04:00
aix-xcoff-endian-error.ll
aix-xcoff-externL.ll
[XCOFF][AIX] Use 'L..' instead of 'L' for PrivateGlobalPrefix
2020-06-03 17:18:11 +00:00
aix-xcoff-huge-relocs.ll
[XCOFF][AIX] report_fatal_error when an overflow section is needed
2020-06-08 19:59:04 +00:00
aix-xcoff-lcomm.ll
aix-xcoff-lower-comm.ll
[AIX] Update data directives for AIX assembly
2020-06-03 10:55:59 -04:00
aix-xcoff-mergeable-const.ll
[XCOFF][AIX] Use 'L..' instead of '.L' for getPrivateGlobalPrefix in DataLayout
2020-07-03 18:25:14 +00:00
aix-xcoff-mergeable-str.ll
[XCOFF][AIX] Use 'L..' instead of '.L' for getPrivateGlobalPrefix in DataLayout
2020-07-03 18:25:14 +00:00
aix-xcoff-reloc-symb.mir
aix-xcoff-reloc.ll
aix-xcoff-rodata.ll
[AIX] Update data directives for AIX assembly
2020-06-03 10:55:59 -04:00
aix-xcoff-symbol-rename.ll
[XCOFF][AIX] Give symbol an internal name when desired symbol name contains invalid character(s)
2020-07-06 15:49:15 +00:00
aix-xcoff-textdisassembly.ll
aix-xcoff-toc.ll
[XCOFF][AIX] Use 'L..' instead of 'L' for PrivateGlobalPrefix
2020-06-03 17:18:11 +00:00
aix-xcoff-visibility.ll
Added test case for the patch D75866 "supporting the visibility attribute for aix assembly"
2020-06-09 16:29:28 -04:00
alias.ll
align.ll
alignlongjumptest.mir
alloca-crspill.ll
allocate-r0.ll
altivec-ord.ll
and_add.ll
and_sext.ll
and_sra.ll
and-branch.ll
and-elim.ll
and-imm.ll
and-mask.ll
andc.ll
anon_aggr.ll
anyext_srl.ll
arr-fp-arg-no-copy.ll
ashr-neg1.ll
asm-constraints.ll
asm-dialect.ll
asm-printer-topological-order.ll
asm-Zy.ll
asym-regclass-copy.ll
atomic-1.ll
atomic-2.ll
atomic-minmax.ll
Atomics-64.ll
atomics-constant.ll
Remove GlobalValue::getAlignment().
2020-06-23 19:13:42 -07:00
atomics-fences.ll
atomics-indexed.ll
atomics-regression.ll
atomics.ll
available-externally.ll
bdzlr.ll
big-endian-actual-args.ll
big-endian-call-result.ll
big-endian-formal-args.ll
big-endian-store-forward.ll
bitcast-peephole.mir
bitcasts-direct-move.ll
bitfieldinsert.ll
block-placement-1.mir
block-placement.mir
blockaddress.ll
bool-math.ll
BoolRetToIntTest-2.ll
BoolRetToIntTest.ll
bperm.ll
branch_coalesce.ll
branch_selector.ll
branch-hint.ll
branch-opt.ll
brcond.ll
BreakableToken-reduced.ll
bswap64.ll
bswap-load-store.ll
build-vector-allones.ll
build-vector-tests.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
buildvec_canonicalize.ll
builtins-ppc-elf2-abi.ll
builtins-ppc-p8vector.ll
builtins-ppc-p9-f128.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
builtins-ppc-p10permute.ll
[PowerPC] Implement Vector Replace Builtins in LLVM
2020-07-07 12:22:52 -05:00
bv-pres-v8i1.ll
bv-widen-undef.ll
byval-agg-info.ll
byval-aliased.ll
calls.ll
can-lower-ret.ll
cannonicalize-vector-shifts.ll
canonical-merge-shuffles.ll
[PowerPC] Do not RAUW combined nodes in VECTOR_SHUFFLE legalization
2020-07-06 22:09:28 -05:00
cc.ll
change-no-infs.ll
check-cpu.ll
cmp_elimination.ll
cmp-cmp.ll
cmpb-ppc32.ll
cmpb.ll
coalesce-ext.ll
code-align.ll
codemodel.ll
coldcc2.ll
coldcc.ll
collapse-rotates.mir
combine-fneg.ll
[DAGCombiner] Require ninf for division estimation
2020-06-14 22:58:22 +08:00
combine-setcc.ll
combine-sext-and-shl-after-isel.ll
combine-to-mulh-shift-amount.ll
[DAGCombiner] Combine shifts into multiply-high
2020-06-02 15:22:48 -05:00
combine-to-pre-index-store-crash.ll
compare-duplicate.ll
compare-simm.ll
CompareEliminationSpillIssue.ll
complex-return.ll
constant-combines.ll
constant-pool.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
constants-i64.ll
constants.ll
convert-ri-addi-to-ri.mir
[PowerPC] fold addi's imm operand to its imm form consumer's displacement
2020-06-23 06:28:18 -04:00
convert-rr-to-ri-instr-add.mir
convert-rr-to-ri-instrs-kill-flag.mir
convert-rr-to-ri-instrs-out-of-range.mir
convert-rr-to-ri-instrs-R0-special-handling.mir
convert-rr-to-ri-instrs.mir
convert-rr-to-ri-p9-vector.mir
copysignl.ll
cr1eq-no-extra-moves.ll
cr1eq.ll
cr_spilling.ll
cr-spills.ll
crash.ll
crbit-asm-disabled.ll
crbit-asm.ll
crbits.ll
crsave.ll
crypto_bifs.ll
CSR-fit.ll
csr-save-restore-order.ll
csr-split.ll
ctr-cleanup.ll
ctr-loop-tls-const.ll
ctr-minmaxnum.ll
ctrloop-asm.ll
ctrloop-cpsgn.ll
ctrloop-fp64.ll
ctrloop-fp128.ll
[PowerPC] Don't convert Loop to CTR Loop for fp128 BinaryOperator
2020-06-18 02:54:19 +00:00
ctrloop-i64.ll
ctrloop-i128.ll
ctrloop-intrin.ll
ctrloop-large-ec.ll
ctrloop-le.ll
ctrloop-lt.ll
ctrloop-ne.ll
ctrloop-reg.ll
ctrloop-s000.ll
ctrloop-sh.ll
ctrloop-shortLoops.ll
ctrloop-sums.ll
ctrloop-udivti3.ll
ctrloops-hot-exit.ll
ctrloops-softfloat.ll
ctrloops.ll
cttz.ll
cxx_tlscc64.ll
darwin-labels.ll
dbg.ll
DbgValueOtherTargets.test
dcbf.ll
[PowerPC] Fix pattern for DCBFL/DCBFLP instrinsics.
2020-06-08 20:54:59 -05:00
dcbt-sched.ll
dcbt.ll
[PowerPC] Add support for llvm.ppc.dcbt, llvm.ppc.dcbtst, llvm.ppc.isync intrinsics
2020-06-26 13:02:18 -05:00
debuginfo-split-int.ll
debuginfo-stackarg.ll
delete-node.ll
dform-adjust.ll
direct-move-profit.ll
DisableHoistingDueToBlockHotnessNoProfileData.mir
DisableHoistingDueToBlockHotnessProfileData.mir
div-2.ll
div-e-32.ll
div-e-all.ll
duplicate-returns-for-tailcall.ll
dyn-alloca-aligned.ll
dyn-alloca-offset.ll
e500-1.ll
early-ret2.ll
early-ret-verify.mir
early-ret.ll
early-ret.mir
ec-input.ll
eh-dwarf-cfa.ll
eieio.ll
elf-common.ll
eliminate-compare-of-copy.ll
empty-functions.ll
emptystruct.ll
emutls_generic.ll
eqv-andc-orc-nor.ll
expand-contiguous-isel.ll
expand-foldable-isel.ll
expand-isel-1.mir
expand-isel-2.mir
expand-isel-3.mir
expand-isel-4.mir
expand-isel-5.mir
expand-isel-6.mir
expand-isel-7.mir
expand-isel-8.mir
expand-isel-9.mir
expand-isel-10.mir
expand-isel-liveness.mir
expand-isel.ll
ext-bool-trunc-repl.ll
extra-toc-reg-deps.ll
extract-and-store.ll
extsh.ll
extswsli.ll
f32-to-i64.ll
f128-aggregates.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
f128-arith.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
f128-bitcast.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
f128-compare.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
f128-conv.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
f128-fma.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
f128-passByValue.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
f128-rounding.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
f128-truncateNconv.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
f128-vecExtractNconv.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
fabs.ll
fast-isel-binary.ll
fast-isel-br-const.ll
fast-isel-call.ll
fast-isel-cmp-imm.ll
fast-isel-const.ll
fast-isel-conversion-p5.ll
fast-isel-conversion.ll
fast-isel-crash.ll
fast-isel-ext.ll
fast-isel-fcmp-nan.ll
fast-isel-fold.ll
fast-isel-fpconv.ll
fast-isel-GEP-coalesce.ll
fast-isel-i64offset.ll
fast-isel-icmp-split.ll
fast-isel-indirectbr.ll
fast-isel-load-store-vsx.ll
fast-isel-load-store.ll
fast-isel-redefinition.ll
fast-isel-ret.ll
fast-isel-rsp.ll
fast-isel-shifter.ll
fastcc_stacksize.ll
fastisel-gep-promote-before-add.ll
fcpsgn.ll
fdiv-combine.ll
fdiv.ll
[DAGCombiner] Require ninf for division estimation
2020-06-14 22:58:22 +08:00
float-asmprint.ll
float-load-store-pair.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
float-logic-ops.ll
float-to-int.ll
float-vector-gather.ll
floatPSA.ll
flt-preinc.ll
fma-aggr-FMF.ll
fma-assoc.ll
[PowerPC] Require nsz flag for c-a*b to FNMSUB
2020-06-04 16:41:27 +08:00
fma-combine.ll
[PowerPC] Require nsz flag for c-a*b to FNMSUB
2020-06-04 16:41:27 +08:00
fma-ext.ll
[PowerPC] Require nsz flag for c-a*b to FNMSUB
2020-06-04 16:41:27 +08:00
fma-mutate-duplicate-vreg.ll
fma-mutate-register-constraint.ll
fma-mutate.ll
fma-negate.ll
[PowerPC] Exploit vnmsubfp instruction
2020-06-14 23:19:17 +08:00
fma-precision.ll
[PowerPC] Require nsz flag for c-a*b to FNMSUB
2020-06-04 16:41:27 +08:00
fma.ll
[PowerPC] Require nsz flag for c-a*b to FNMSUB
2020-06-04 16:41:27 +08:00
fmaxnum.ll
fmf-propagation.ll
fminnum.ll
fnabs.ll
fneg.ll
fold-frame-offset-using-rr.mir
fold-li.ll
fold-remove-li.ll
fold-rlwinm-1.ll
fold-rlwinm.mir
[PowerPC] fold a bug for rlwinm folding when with full mask.
2020-06-14 21:27:01 -04:00
fold-zero.ll
fp2int2fp-ppcfp128.ll
fp64-to-int16.ll
fp128-bitcast-after-operation.ll
[MachineScheduler] Update available queue on the first mop of a new cycle
2020-06-09 19:13:53 +01:00
fp128-libcalls.ll
fp_to_uint.ll
fp-branch.ll
fp-int128-fp-combine.ll
fp-int-conversions-direct-moves.ll
fp-int-fp.ll
fp-intrinsics-fptosi-legal.ll
fp-splat.ll
fp-strict-conv.ll
[PowerPC] Support constrained conversion in SPE target
2020-07-13 12:18:36 +08:00
fp-strict-f128.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
fp-strict-minmax.ll
fp-strict-round.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
fp-strict.ll
fp-to-int-ext.ll
fp-to-int-to-fp.ll
fpcopy.ll
frame-size.ll
frameaddr.ll
Frames-dyn-alloca-with-func-call.ll
Frames-dyn-alloca.ll
Frames-large.ll
Frames-leaf.ll
Frames-small.ll
Frames-stack-floor.ll
frounds.ll
fsel.ll
fsl-e500mc.ll
fsl-e5500.ll
fsqrt.ll
fsub-fneg.ll
ftrunc-legalize.ll
ftrunc-vec.ll
func-addr-consts.ll
func-addr.ll
func-alias.ll
[PowerPC] Fix for PC Relative call protocol
2020-07-01 07:08:41 -05:00
funnel-shift-rot.ll
funnel-shift.ll
future-check-features.ll
glob-comp-aa-crash.ll
global-address-non-got-indirect-access.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
gpr-vsr-spill.ll
handle-f16-storage-type.ll
hello.ll
hidden-vis-2.ll
hidden-vis.ll
hoist-logic.ll
htm-ttest.ll
htm.ll
i1-ext-fold.ll
i1-to-double.ll
i32-to-float.ll
i64_fp_round.ll
i64_fp.ll
i64-to-float.ll
i128-and-beyond.ll
ia-mem-r0.ll
ia-neg-const.ll
iabs.ll
ifcvt-diamond-ret.mir
ifcvt-forked-bug-2016-08-08.ll
ifcvt.ll
ifcvt.mir
ifunc.ll
[PowerPC] Fix for PC Relative call protocol
2020-07-01 07:08:41 -05:00
illegal-element-type.ll
in-asm-f64-reg.ll
inc-of-add.ll
[MachineScheduler] Update available queue on the first mop of a new cycle
2020-06-09 19:13:53 +01:00
indexed-load.ll
indirect-hidden.ll
indirectbr.ll
inline-asm-i-constraint-i1.ll
inline-asm-multilevel-gep.ll
inline-asm-s-modifier.ll
inline-asm-scalar-to-vector-error.ll
inline-asm-vsx-clobbers.ll
inlineasm-copy.ll
inlineasm-extendedmne.ll
inlineasm-i64-reg.ll
inlineasm-output-template.ll
[PPCAsmPrinter] support 'L' output template for memory operands
2020-06-15 14:31:44 -07:00
inlineasm-vsx-reg.ll
instr-properties.ll
int-fp-conv-0.ll
int-fp-conv-1.ll
inverted-bool-compares.ll
isel-rc-nox0.ll
isel.ll
ispositive.ll
isync.ll
[PowerPC] Add support for llvm.ppc.dcbt, llvm.ppc.dcbtst, llvm.ppc.isync intrinsics
2020-06-26 13:02:18 -05:00
itofp128.ll
jaggedstructs.ll
jump-tables-collapse-rotate-remove-SrcMI.mir
[PowerPC] Remove extra instruction left by emitRLDICWhenLoweringJumpTables
2020-06-08 20:43:56 -05:00
jump-tables-collapse-rotate.ll
kernel-fp-round.ll
[PowerPC] Support constrained rounding operations
2020-06-14 23:43:31 +08:00
knowCRBitSpill.ll
LargeAbsoluteAddr.ll
larger-than-red-zone.ll
lbz-from-ld-shift.ll
lbzux.ll
ld-st-upd.ll
ldtoc-inv.ll
legalize-vaarg.ll
[PowerPC] Only make copies of registers on stack in variadic function when va_start is called
2020-07-09 07:18:17 +00:00
lha.ll
licm-remat.ll
licm-tocReg.ll
lit.local.cfg
livephysregs.mir
livevars-crash1.mir
livevars-crash2.mir
llrint-conv.ll
llround-conv.ll
load-and-splat.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
load-constant-addr.ll
load-shift-combine.ll
load-shuffle-and-shuffle-store.ll
load-two-flts.ll
load-v4i8-improved.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
logic-ops-on-compares.ll
long-compare.ll
longcall.ll
longdbl-truncate.ll
loop-align.ll
loop-comment.ll
loop-data-prefetch-inner.ll
loop-data-prefetch.ll
loop-hoist-toc-save.ll
loop-instr-form-prepare.ll
[Power9] Add addi post-ra scheduling heuristic
2020-06-08 01:31:07 +00:00
loop-prep-all.ll
lower-globaladdr32-aix-asm.ll
[XCOFF][AIX] Use 'L..' instead of 'L' for PrivateGlobalPrefix
2020-06-03 17:18:11 +00:00
lower-globaladdr32-aix.ll
lower-globaladdr64-aix-asm.ll
[XCOFF][AIX] Use 'L..' instead of 'L' for PrivateGlobalPrefix
2020-06-03 17:18:11 +00:00
lower-globaladdr64-aix.ll
lower-massv-attr.ll
lower-massv.ll
lrint-conv.ll
lround-conv.ll
lsa.ll
lsr-ctrloop.ll
lsr-insns-cost.ll
lsr-postinc-pos.ll
lxv-aligned-stack-slots.ll
lxvw4x-bug.ll
machine-backward-cp.mir
machine-combiner.ll
[PowerPC] remove wrong added FIXME in testcases, NFC
2020-06-16 22:10:48 -04:00
machine-pre.ll
macro-fusion.ll
maddld.ll
mask64.ll
mature-mc-support.ll
mc-instrlat.ll
mcm-1.ll
mcm-2.ll
mcm-3.ll
mcm-4.ll
mcm-5.ll
mcm-6.ll
mcm-7.ll
mcm-8.ll
mcm-9.ll
mcm-10.ll
mcm-11.ll
mcm-12.ll
mcm-13.ll
mcm-default.ll
mcm-obj-2.ll
mcm-obj.ll
mcount-insertion.ll
MCSE-caller-preserved-reg.ll
mem_update.ll
mem-rr-addr-mode.ll
memcmp-mergeexpand.ll
memcmp.ll
memcmpIR.ll
memCmpUsedInZeroEqualityComparison.ll
memcpy_dereferenceable.ll
memcpy-vec.ll
memset-nc-le.ll
memset-nc.ll
merge_stores_dereferenceable.ll
merge-st-chain-op.ll
MergeConsecutiveStores.ll
mftb.ll
mi-peephole-splat.ll
mi-peephole.mir
[NFC][PowerPC] Add a new MIR file to test mi-peephole pass
2020-07-10 16:08:07 +00:00
mi-scheduling-lhs.ll
mi-simplify-code.mir
misched-inorder-latency.ll
misched.ll
MMO-flags-assertion.ll
mtvsrdd.ll
mul-const-i64.ll
mul-const-vector.ll
mul-const.ll
mul-high.ll
[DAGCombiner] Combine shifts into multiply-high
2020-06-02 15:22:48 -05:00
mul-with-overflow.ll
mulhs.ll
mulld.ll
mult-alt-generic-powerpc64.ll
mult-alt-generic-powerpc.ll
multi-return.ll
named-reg-alloc-r0.ll
named-reg-alloc-r1-64.ll
named-reg-alloc-r1.ll
named-reg-alloc-r2-64.ll
named-reg-alloc-r2.ll
named-reg-alloc-r13-64.ll
named-reg-alloc-r13.ll
neg.ll
negate-i1.ll
negctr.ll
no-ctr-loop-if-exit-in-nested-loop.ll
no-dead-strip.ll
no-dup-of-bdnz.ll
[NFC]][PowerPC] Remove unused intrinsic for old CTR loop pass
2020-06-17 07:06:46 +00:00
no-dup-spill-fp.ll
no-duplicate.ll
no-ext-with-count-zeros.ll
no-extra-fp-conv-ldst.ll
no-pref-jumps.ll
no-rlwimi-trivial-commute.mir
NoCRFieldRedefWhenSpillingCRBIT.mir
nomerge.ll
non-simple-args-intrin.ll
noPermuteFormasking.ll
not-fixed-frame-object.ll
novrsave.ll
opt-cmp-inst-cr0-live.ll
opt-li-add-to-addi.ll
opt-sub-inst-cr0-live.mir
optcmp.ll
optimize-andiso.ll
optnone-crbits-i1-ret.ll
or-addressing-mode.ll
ori_imm32.ll
ori_imm64.ll
p8-isel-sched.ll
p8-scalar_vector_conversions.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
p8altivec-shuffles-pred.ll
p9_copy_fp.ll
p9-dform-load-alignment.ll
p9-vector-compares-and-counts.ll
p9-vinsert-vextract.ll
p9-xxinsertw-xxextractuw.ll
p10-bit-manip-ops.ll
[PowerPC][Power10] Implement centrifuge, vector gather every nth bit, vector evaluate Builtins in LLVM/Clang
2020-06-25 21:34:41 -05:00
p10-splatImm32.ll
[PowerPC][Power10] Exploit the xxsplti32dx instruction when lowering VECTOR_SHUFFLE.
2020-07-06 20:28:38 -05:00
p10-splatImm-CPload-pcrel.ll
[PowerPC] Exploit xxspltiw and xxspltidp instructions
2020-07-01 19:18:29 -05:00
p10-splatImm.ll
[PowerPC] Implement Vector Splat Immediate Builtins in Clang
2020-07-06 20:29:33 -05:00
p10-string-ops.ll
[PowerPC][Power10] Implement Vector Clear Left/Rightmost Bytes Builtins in LLVM/Clang
2020-06-20 18:29:16 -05:00
p10-vsx-pcv.ll
[PowerPC][Power10] Implement VSX PCV Generate Operations in LLVM/Clang
2020-06-22 21:09:34 -05:00
pcrel-block-address.ll
pcrel-call-linkage-leaf.ll
pcrel-call-linkage-simple.ll
[PowerPC] Remove extra nop after notoc call
2020-06-05 06:47:44 -05:00
pcrel-call-linkage-with-calls.ll
pcrel-got-indirect.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
pcrel-indirect-call.ll
pcrel-jump-table.ll
pcrel-local-caller-toc.ll
[PowerPC] Fix for PC Relative call protocol
2020-07-01 07:08:41 -05:00
pcrel-relocation-plus-offset.ll
[PowerPC] Do not add the relocation addend to the instruction encoding
2020-06-15 09:51:34 -05:00
pcrel-tail-calls.ll
pcrel.ll
[PowerPC][NFC] Add more PC Relative tests
2020-06-05 05:55:03 -05:00
peephole-align.ll
peephole-miscompile-extswsli.mir
pie.ll
pip-inner.ll
popcnt-zext.ll
popcnt.ll
popcount.ll
[PowerPC] add popcount CodeGen test; NFC
2020-06-25 12:41:33 +04:00
post-ra-ec.ll
pow_massv_075_025exp.ll
DAGCombiner optimization for pow(x,0.75) and pow(x,0.25) on double and single precision even in case massv function is asked
2020-06-12 10:02:16 -04:00
pow.75.ll
power9-moves-and-splats.ll
powf_massv_075_025exp.ll
DAGCombiner optimization for pow(x,0.75) and pow(x,0.25) on double and single precision even in case massv function is asked
2020-06-12 10:02:16 -04:00
ppc32-align-long-double-sf.ll
ppc32-constant-BE-ppcf128.ll
ppc32-cyclecounter.ll
ppc32-i1-stack-arguments-abi-bug.ll
ppc32-i1-vaarg.ll
ppc32-i64-to-float-conv.ll
ppc32-lshrti3.ll
ppc32-nest.ll
ppc32-pic-large.ll
ppc32-pic.ll
ppc32-secure-plt-tls2.ll
ppc32-secure-plt-tls.ll
ppc32-skip-regs.ll
[MachineScheduler] Update available queue on the first mop of a new cycle
2020-06-09 19:13:53 +01:00
ppc32-vacopy.ll
ppc64-32bit-addic.ll
ppc64-abi-extend.ll
ppc64-align-long-double.ll
ppc64-altivec-abi.ll
ppc64-anyregcc-crash.ll
ppc64-anyregcc.ll
ppc64-blnop.ll
ppc64-byval-align.ll
ppc64-calls.ll
ppc64-crash.ll
ppc64-crsave.mir
ppc64-cyclecounter.ll
ppc64-elf-abi.ll
ppc64-fastcc-fast-isel.ll
ppc64-fastcc.ll
ppc64-func-desc-hoist.ll
ppc64-gep-opt.ll
ppc64-get-cache-line-size.ll
ppc64-i128-abi.ll
ppc64-icbt-pwr7.ll
ppc64-icbt-pwr8.ll
ppc64-linux-func-size.ll
ppc64-nest.ll
ppc64-nonfunc-calls.ll
ppc64-P9-mod.ll
[PowerPC] Legalize SREM/UREM directly on P9.
2020-07-06 11:47:31 +00:00
ppc64-P9-setb.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
ppc64-P9-vabsd.ll
ppc64-patchpoint.ll
ppc64-pre-inc-no-extra-phi.ll
ppc64-prefetch.ll
ppc64-r2-alloc.ll
ppc64-sibcall-shrinkwrap.ll
ppc64-sibcall.ll
ppc64-smallarg.ll
ppc64-stackmap-nops.ll
ppc64-stackmap.ll
ppc64-toc.ll
ppc64-vaarg-int.ll
ppc64-varargs.ll
[PowerPC] Only make copies of registers on stack in variadic function when va_start is called
2020-07-09 07:18:17 +00:00
ppc64-zext.ll
ppc64le-aggregates.ll
ppc64le-calls.ll
ppc64le-crsave.ll
ppc64le-localentry-large.ll
ppc64le-localentry.ll
ppc64le-smallarg.ll
ppc440-fp-basic.ll
ppc440-msync.ll
ppc-crbits-onoff.ll
ppc-ctr-dead-code.ll
ppc-disable-non-volatile-cr.ll
ppc-empty-fs.ll
ppc-label2.ll
ppc-label.ll
ppc-passname-assert.ll
ppc-passname.ll
ppc-prologue.ll
ppc-redzone-alignment-bug.ll
ppc-shrink-wrapping.ll
ppc-vaarg-agg.ll
ppcf128-1-opt.ll
ppcf128-1.ll
ppcf128-2.ll
ppcf128-3.ll
ppcf128-4.ll
ppcf128-constrained-fp-intrinsics.ll
[PowerPC] Support constrained rounding operations
2020-06-14 23:43:31 +08:00
ppcf128-endian.ll
ppcf128-freeze.mir
ppcf128sf.ll
ppcsoftops.ll
pr3711_widen_bit.ll
pr12757.ll
pr13641.ll
pr13891.ll
pr15031.ll
pr15359.ll
pr15630.ll
pr15632.ll
pr16556-2.ll
pr16556.ll
pr16573.ll
pr17168.ll
pr17354.ll
pr18663-2.ll
pr18663.ll
pr20442.ll
pr22711.ll
pr24216.ll
pr24546.ll
pr24636.ll
pr25080.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
pr25157-peephole.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
pr25157.ll
pr26180.ll
pr26193.ll
pr26356.ll
pr26378.ll
pr26381.ll
pr26617.ll
pr26690.ll
pr27078.ll
pr27350.ll
pr28130.ll
pr28630.ll
pr30451.ll
pr30640.ll
pr30663.ll
pr30715.ll
pr31144.ll
pr32063.ll
pr32140.ll
pr33093.ll
pr33547.ll
pr35402.ll
pr35688.ll
pr36068.ll
pr36292.ll
pr38087.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
pr38899-split-register-at-spill.mir
pr39478.ll
pr39815.ll
pr40922.ll
pr41088.ll
pr41177.ll
pr42492.ll
[Power9] Add addi post-ra scheduling heuristic
2020-06-08 01:31:07 +00:00
pr43527.ll
pr43976.ll
[MachineScheduler] Update available queue on the first mop of a new cycle
2020-06-09 19:13:53 +01:00
pr44183.ll
pr44239.ll
pr45186.ll
pr45297.ll
pr45301.ll
pr45432.ll
[PowerPC] Do not assume operand of ADDI is an immediate
2020-06-07 22:18:31 -05:00
pr45448.ll
pr45628.ll
[PowerPC] Custom lower rotl v1i128 to vector_shuffle.
2020-06-18 01:32:23 +00:00
pr45709.ll
PR3488.ll
PR33636.ll
PR33671.ll
PR35812-neg-cmpxchg.ll
pre-inc-disable.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
preemption.ll
[NFC] Fix typo in triples from unkown to unknown
2020-07-02 16:21:54 +08:00
preinc-ld-sel-crash.ll
preincprep-i64-check.ll
preincprep-invoke.ll
preincprep-nontrans-crash.ll
private.ll
prolog_vec_spills.mir
pwr3-6x.ll
pwr7-gt-nop.ll
pzero-fp-xored.ll
qpx-bv-sint.ll
qpx-bv.ll
qpx-func-clobber.ll
qpx-load-splat.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
qpx-load.ll
qpx-qvfmadd.ll
qpx-recipest.ll
[DAGCombiner] Require ninf for division estimation
2020-06-14 22:58:22 +08:00
qpx-rounding-ops.ll
qpx-s-load.ll
qpx-s-sel.ll
qpx-s-store.ll
qpx-sel.ll
qpx-split-vsetcc.ll
qpx-store.ll
qpx-unal-cons-lds.ll
qpx-unalperm.ll
quadint-return.ll
r31.ll
recipest.ll
[PowerPC] Enable default support of quad precision operations
2020-07-10 13:27:48 -05:00
reduce_cr.ll
reduce_scalarization02.ll
reduce_scalarization.ll
redundant-copy-after-tail-dup.ll
reg-coalesce-simple.ll
reg-names.ll
reg-scavenging.ll
reloc-align.ll
remap-crash.ll
remat-imm.ll
rematerializable-instruction-machine-licm.ll
[MachineLICM] testcase for hoisting rematerializable instruction, nfc
2020-06-28 03:16:57 -04:00
remove-copy-crunsetcrbit.mir
remove-implicit-use.mir
remove-redundant-li-skip-imp-kill.mir
remove-redundant-load-imm.ll
remove-redundant-load-imm.mir
remove-redundant-moves.ll
remove-redundant-toc-saves.ll
remove-self-copies.mir
repeated-fp-divisors.ll
[DAGCombiner] Require ninf for division estimation
2020-06-14 22:58:22 +08:00
resolvefi-basereg.ll
resolvefi-disp.ll
restore-r30.ll
retaddr2.ll
retaddr.ll
return-val-i128.ll
rlwimi2.ll
rlwimi3.ll
rlwimi-and-or-bits.ll
rlwimi-and.ll
rlwimi-commute.ll
rlwimi-dyn-and.ll
rlwimi-keep-rsh.ll
rlwimi.ll
rlwinm2.ll
rlwinm_rldicl_to_andi.mir
rlwinm-zero-ext.ll
rlwinm.ll
rm-zext.ll
rotl-2.ll
rotl-64.ll
rotl-rotr-crash.ll
rotl.ll
rounding-ops.ll
rs-undef-use.ll
s000-alias-misched.ll
sat-add.ll
saturating-intrinsics.ll
save-bp.ll
save-cr-ppc32svr4.ll
save-crbp-ppc32svr4.ll
scalar_cmp.ll
scalar_vector_test_1.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
scalar_vector_test_2.ll
scalar_vector_test_3.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
scalar_vector_test_4.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
scalar-equal.ll
scalar-min-max.ll
scalar-rounding-ops.ll
scavenging.mir
sched-addi.ll
[Power9] Add addi post-ra scheduling heuristic
2020-06-08 01:31:07 +00:00
schedule-addi-load.mir
scheduling-mem-dependency.ll
sdag-ppcf128.ll
sdiv-pow2.ll
sections.ll
select_const.ll
select_lt0.ll
select-addrRegRegOnly.ll
select-cc.ll
select-i1-vs-i1.ll
select-to-branch.mir
selectiondag-extload-computeknownbits.ll
selectiondag-sextload.ll
set0-v8i16.ll
setcc_no_zext.ll
setcc-logic.ll
setcc-to-sub.ll
setcclike-or-comb.ll
setcr_bc2.mir
setcr_bc3.mir
setcr_bc.mir
seteq-0.ll
setrnd.ll
[NFC][PowerPC] Modify the test case to test RM
2020-06-08 08:55:31 +00:00
sext-vector-inreg.ll
sh-overflow.mir
shift128.ll
shift_mask.ll
shift-cmp.ll
shl_elim.ll
shl_sext.ll
shrink-wrap.ll
shrink-wrap.mir
sign_ext_inreg1.ll
signbit-shift.ll
simplifyConstCmpToISEL.ll
sj-ctr-loop.ll
sjlj_no0x.ll
sjlj.ll
small-arguments.ll
sms-cpy-1.ll
[Power9] Add addi post-ra scheduling heuristic
2020-06-08 01:31:07 +00:00
sms-grp-order.ll
sms-iterator.ll
sms-phi-1.ll
[Power9] Add addi post-ra scheduling heuristic
2020-06-08 01:31:07 +00:00
sms-phi-2.ll
sms-phi-3.ll
sms-phi-5.ll
sms-phi.ll
sms-remark.ll
[PowerPC][MachinePipeliner] Enable pipeliner if hasInstrSchedModel
2020-07-11 02:24:12 +00:00
sms-simple.ll
[Power9] Add addi post-ra scheduling heuristic
2020-06-08 01:31:07 +00:00
smulfixsat.ll
spe.ll
[MachineScheduler] Update available queue on the first mop of a new cycle
2020-06-09 19:13:53 +01:00
spill_p9_setb.ll
spill-nor0.ll
splat-bug.ll
splat-larger-types-as-v16i8.ll
split-index-tc.ll
splitstore-check-volatile.ll
srem-lkk.ll
srem-vector-lkk.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
srl-mask.ll
stack-clash-dynamic-alloca.ll
[PowerPC] Implement probing for dynamic stack allocation
2020-07-03 05:36:40 +00:00
stack-clash-prologue.ll
[PowerPC] Implement probing for prologue
2020-07-04 03:07:08 +00:00
stack-coloring-vararg.mir
stack-guard-reassign.ll
stack-no-redzone.ll
stack-protector.ll
stack-realign.ll
stackmap-frame-setup.ll
stacksize.ll
std-unal-fi.ll
stdux-constuse.ll
stfiwx-2.ll
stfiwx.ll
store_fptoi.ll
store-combine.ll
store-constant.ll
store-load-fwd.ll
store-update.ll
structsinmem.ll
structsinregs.ll
stubs.ll
stwu8.ll
stwu-gta.ll
stwu-sched.ll
stwux.ll
sub-bv-types.ll
sub-of-not.ll
[MachineScheduler] Update available queue on the first mop of a new cycle
2020-06-09 19:13:53 +01:00
subc.ll
subreg-postra-2.ll
subreg-postra.ll
subtract_from_imm.ll
svr4-redzone.ll
swaps-le-1.ll
swaps-le-2.ll
swaps-le-3.ll
swaps-le-4.ll
swaps-le-5.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
swaps-le-6.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
swaps-le-7.ll
tail-dup-analyzable-fallthrough.ll
tail-dup-branch-to-fallthrough.ll
tail-dup-break-cfg.ll
tail-dup-layout.ll
tailcall1-64.ll
tailcall1.ll
tailcall-speculatable-callee.ll
[CodeGen] Enable tail call position check for speculatable functions
2020-06-03 10:37:45 -05:00
tailcall-string-rvo.ll
tailcallpic1.ll
test_call_aix.ll
test_func_desc.ll
[XCOFF][AIX] Give symbol an internal name when desired symbol name contains invalid character(s)
2020-07-06 15:49:15 +00:00
test-and-cmp-folding.ll
testBitReverse.ll
testComparesi32gtu.ll
testComparesi32leu.ll
testComparesi32ltu.ll
testComparesieqsc.ll
testComparesieqsi.ll
testComparesieqsll.ll
testComparesieqss.ll
testComparesiequc.ll
testComparesiequi.ll
testComparesiequll.ll
testComparesiequs.ll
testComparesigesc.ll
testComparesigesi.ll
testComparesigesll.ll
testComparesigess.ll
testComparesigeuc.ll
testComparesigeui.ll
testComparesigeull.ll
testComparesigeus.ll
testComparesigtsc.ll
testComparesigtsi.ll
testComparesigtsll.ll
testComparesigtss.ll
testComparesigtuc.ll
testComparesigtui.ll
testComparesigtus.ll
testComparesilesc.ll
testComparesilesi.ll
testComparesilesll.ll
testComparesiless.ll
testComparesileuc.ll
testComparesileui.ll
testComparesileull.ll
testComparesileus.ll
testComparesiltsc.ll
testComparesiltsi.ll
testComparesiltsll.ll
testComparesiltss.ll
testComparesiltuc.ll
testComparesiltui.ll
testComparesiltus.ll
testComparesinesc.ll
testComparesinesi.ll
testComparesinesll.ll
testComparesiness.ll
testComparesineuc.ll
testComparesineui.ll
testComparesineull.ll
testComparesineus.ll
testCompareslleqsc.ll
testCompareslleqsi.ll
testCompareslleqsll.ll
testCompareslleqss.ll
testComparesllequc.ll
testComparesllequi.ll
testComparesllequll.ll
testComparesllequs.ll
testComparesllgesc.ll
testComparesllgesi.ll
testComparesllgesll.ll
testComparesllgess.ll
testComparesllgeuc.ll
testComparesllgeui.ll
testComparesllgeull.ll
testComparesllgeus.ll
testComparesllgtsll.ll
testComparesllgtuc.ll
testComparesllgtui.ll
testComparesllgtus.ll
testCompareslllesc.ll
testCompareslllesi.ll
testCompareslllesll.ll
testComparesllless.ll
testComparesllleuc.ll
testComparesllleui.ll
testComparesllleull.ll
testComparesllleus.ll
testComparesllltsll.ll
testComparesllltuc.ll
testComparesllltui.ll
testComparesllltus.ll
testComparesllnesll.ll
testComparesllneull.ll
thread-pointer.ll
tls_get_addr_clobbers.ll
tls_get_addr_fence1.mir
tls_get_addr_fence2.mir
tls_get_addr_stackframe.ll
tls-cse.ll
tls-pic.ll
tls-pie-xform.ll
tls-store2.ll
tls.ll
toc-float.ll
toc-load-sched-bug.ll
tocSaveInPrologue.ll
trampoline.ll
trunc-srl-load.ll
two-address-crash.mir
[MachineVerifier] Add TiedOpsRewritten flag to fix verify two-address error
2020-06-09 07:39:42 +00:00
uint-to-fp-v4i32.ll
uint-to-ppcfp128-crash.ll
umulfixsat.ll
umulo-128-legalisation-lowering.ll
[MachineScheduler] Update available queue on the first mop of a new cycle
2020-06-09 19:13:53 +01:00
unal4-std.ll
unal-altivec2.ll
unal-altivec-wint.ll
unal-altivec.ll
unal-vec-ldst.ll
unal-vec-negarith.ll
unaligned-addressing-mode.ll
unaligned-floats.ll
unaligned.ll
unsafe-math.ll
unwind-dw2-g.ll
unwind-dw2.ll
urem-lkk.ll
urem-vector-lkk.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
use-cr-result-of-dom-icmp-st.ll
uwtables.ll
vaddsplat.ll
varargs-struct-float.ll
varargs.ll
variable_elem_vec_extracts.ll
vavg.ll
vcmp-fold.ll
vec_abs.ll
vec_absd.ll
[PowerPC] Exploit vabsd on P9
2020-06-01 02:30:27 +00:00
vec_add_sub_doubleword.ll
vec_add_sub_quadword.ll
vec_auto_constant.ll
vec_br_cmp.ll
vec_buildvector_loadstore.ll
vec_call.ll
vec_clz.ll
vec_cmp.ll
vec_cmpd.ll
vec_constants.ll
vec_conv_fp32_to_i8_elts.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vec_conv_fp32_to_i16_elts.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vec_conv_fp32_to_i64_elts.ll
vec_conv_fp64_to_i8_elts.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vec_conv_fp64_to_i16_elts.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vec_conv_fp64_to_i32_elts.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vec_conv_fp_to_i_4byte_elts.ll
vec_conv_fp_to_i_8byte_elts.ll
vec_conv_i8_to_fp32_elts.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vec_conv_i8_to_fp64_elts.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vec_conv_i16_to_fp32_elts.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vec_conv_i16_to_fp64_elts.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vec_conv_i32_to_fp64_elts.ll
vec_conv_i64_to_fp32_elts.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vec_conv_i_to_fp_4byte_elts.ll
vec_conv_i_to_fp_8byte_elts.ll
vec_conv.ll
vec_extload.ll
vec_extract_p9_2.ll
vec_extract_p9.ll
vec_fmuladd.ll
vec_fneg.ll
vec_insert.ll
vec_int_ext.ll
vec_mergeow.ll
vec_minmax.ll
vec_misaligned.ll
vec_mul_even_odd.ll
vec_mul.ll
vec_perf_shuffle.ll
vec_popcnt.ll
vec_revb.ll
vec_rotate_shift.ll
vec_rounding.ll
vec_select.ll
vec_shift.ll
vec_shuffle_le.ll
vec_shuffle_p8vector_le.ll
vec_shuffle_p8vector.ll
vec_shuffle.ll
vec_sldwi.ll
vec_splat_constant.ll
vec_splat.ll
[MachineScheduler] Update available queue on the first mop of a new cycle
2020-06-09 19:13:53 +01:00
vec_sqrt.ll
vec_urem_const.ll
vec_veqv_vnand_vorc.ll
vec_vrsave.ll
vec_xxpermdi.ll
vec_zero.ll
vec-abi-align.ll
vec-asm-disabled.ll
vec-bswap.ll
vec-itofp.ll
vec-min-max.ll
vec-select.ll
vec-trunc.ll
vector-constrained-fp-intrinsics.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vector-copysign.ll
vector-extend-sign.ll
vector-identity-shuffle.ll
vector-merge-store-fp-constants.ll
vector-rotates.ll
vector-rounding-ops.ll
vector.ll
vmladduhm.ll
vperm-instcombine.ll
vperm-lowering.ll
vrsave-inline-asm.ll
vrspill.ll
vsel-prom.ll
vselect-constants.ll
vsx_builtins.ll
vsx_insert_extract_le.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vsx_scalar_ld_st.ll
vsx_shuffle_le.ll
vsx-args.ll
VSX-DForm-Scalars.ll
vsx-div.ll
vsx-elementary-arith.ll
vsx-fma-m.ll
vsx-fma-mutate-trivial-copy.ll
vsx-fma-mutate-undef.ll
vsx-fma-sp.ll
vsx-infl-copy1.ll
vsx-infl-copy2.ll
vsx-ldst-builtin-le.ll
vsx-ldst.ll
vsx-minmax.ll
vsx-p8.ll
vsx-p9.ll
vsx-partword-int-loads-and-stores.ll
vsx-recip-est.ll
[DAGCombiner] Require ninf for division estimation
2020-06-14 22:58:22 +08:00
vsx-self-copy.ll
vsx-spill-norwstore.ll
vsx-spill.ll
vsx-vec-spill.ll
vsx-word-splats.ll
VSX-XForm-Scalars.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vsx.ll
[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE
2020-06-18 21:54:22 -05:00
vsxD-Form-spills.ll
vtable-reloc.ll
weak_def_can_be_hidden.ll
xray-attribute-instrumentation.ll
xray-conditional-return.ll
xray-ret-is-terminator.ll
xray-tail-call-hidden.ll
xray-tail-call-sled.ll
xvcmpeqdp-v2f64.ll
xxleqv_xxlnand_xxlorc.ll
zero-not-run.ll
zext-and-cmp.ll
zext-bitperm.ll
zext-free.ll
