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QingShan Zhang 65635c700c [PowerPC] Set the mayRaiseFPException for FCMPUS/FCMPUD
From ISA, fcmpu will raise the Floating-Point Invalid Operation
Exception (SNaN) if either of the operands is a Signaling NaN by setting
the bit VXSNAN. But the instruction description didn't set the
mayRaiseFPException which might have impact on the scheduling or some
backend optimization.

Reviewed By: qiucf

Differential Revision: https://reviews.llvm.org/D83937
2020-09-12 02:42:22 +00:00
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